Otherwise kernels that ship symvers.xz instead of symvers.gz
won't get initramfs re-generated.
* microcode_ctl.spec (%posttrans): Check for symvers.xz presence
in addition to symvers.gz.
Resolves: RHEL-58057
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20240531 release, addresses
CVE-2023-22655, CVE-2023-23583. CVE-2023-28746, CVE-2023-38575,
CVE-2023-39368, CVE-2023-42667, CVE-2023-43490, CVE-2023-45733,
CVE-2023-46103, CVE-2023-49141:
- Addition of 06-aa-04/0xe6 (MTL-H/U C0) microcode at revision 0x1c;
- Addition of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) at
revision 0x4121;
- Addition of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) at
revision 0x4121;
- Addition of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-08) at revision 0x4121;
- Addition of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-08) at revision 0x4121;
- Addition of 06-ba-08/0xe0 microcode at revision 0x4121;
- Addition of 06-cf-01/0x87 (EMR-SP A0) microcode at revision
0x21000230;
- Addition of 06-cf-02/0x87 (EMR-SP A1) microcode (in
intel-ucode/06-cf-01) at revision 0x21000230;
- Addition of 06-cf-01/0x87 (EMR-SP A0) microcode (in
intel-ucode/06-cf-02) at revision 0x21000230;
- Addition of 06-cf-02/0x87 (EMR-SP A1) microcode at revision
0x21000230;
- Removal of 06-8f-04/0x10 microcode at revision 0x2c000290;
- Removal of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
0x2b0004d0;
- Removal of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) at revision 0x2c000290;
- Removal of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b0004d0;
- Removal of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at
revision 0x2c000290;
- Removal of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b0004d0;
- Removal of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b0004d0;
- Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) at revision 0x2c000290;
- Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b0004d0;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xb4 up to 0xb6;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xf8 up to 0xfa;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf4 up
to 0xf8;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf4 up
to 0xf6;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf4 up
to 0xf6;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xfa up
to 0xfc;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000181
up to 0x1000191;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003604
up to 0x4003605;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003604 up to 0x5003605;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002703
up to 0x7002802;
- Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
0xe000014 up to 0xe000015;
- Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x38 up
to 0x3e;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003b9
up to 0xd0003d1;
- Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000268
up to 0x1000290;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3e up
to 0x42;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x22 up
to 0x24;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xc2
up to 0xc4;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x34 up
to 0x36;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x4e up
to 0x50;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
0x2c000290 up to 0x2c000390;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0004d0
up to 0x2b0005c0;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) from revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-06/0x10 microcode from revision 0x2c000290 up to
0x2c000390;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0004d0
up to 0x2b0005c0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) from revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000290 up to 0x2c000390;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004d0 up to 0x2b0005c0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
0x2c000290 up to 0x2c000390;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
0x2b0004d0 up to 0x2b0005c0;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x17 up
to 0x19;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x32 up to 0x35;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x32 up to 0x35;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x32 up to 0x35;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x32 up to 0x35;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x32 up to 0x35;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x32
up to 0x35;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x32 up to 0x35;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x32 up to 0x35;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x430 up to 0x433;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x430 up to 0x433;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x430 up to 0x433;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x430
up to 0x433;
- Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x5 up
to 0x7;
- Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000024
up to 0x24000026;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf8 up
to 0xfa;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf8
up to 0xfa;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf8
up to 0xfa;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf8
up to 0xfa;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf8 up to 0xfa;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x5d up
to 0x5e;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x11d up
to 0x123;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x411c up to 0x4121;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x411c up to 0x4121;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x411c up to 0x4121;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x411c
up to 0x4121;
- Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x12 up
to 0x17;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x32 up to 0x35;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x32 up to 0x35;
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x32 up
to 0x35;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x32 up to 0x35;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x32 up to 0x35;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x32 up to 0x35;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x32 up to 0x35;
- Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x32 up
to 0x35.
* .gitignore: Replace /microcode-20231009.tar.gz entry
with /microcode-20240531.tar.gz.
* 0001-releasenote.md-eliminate-usage-of-U-0080.patch
* 0002-releasenote.md-eliminate-most-of-the-trailing-whites.patch: Remove.
* 0003-releasenote.md-remove-excess-Release-Notes-headers.patch: Likewise.
* 0004-releasenote.md-sort-the-entries-of-the-20230808-rele.patch: Likewise.
* 0005-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch: Likewise.
* 0006-releasenote.md-fix-stepping-for-RPL-S.patch: Likewise.
* 0007-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch: Likewise.
* 0008-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch: Likewise.
* 0009-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch: Likewise.
* 0010-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch: Likewise.
* 0011-releasenote.md-add-stub-release-notes-for-microcode-.patch: Likewise.
* 06-8c-01_readme: Add a checksum for revision 0xb6.
* 06-8e-9e-0x-0xca_readme: Add checksum for new microcode revisions
of 06-8e-0c and 06-9e-0[9acd] CPUIDs.
* 06-8e-9e-0x-dell_readme: Likewise.
* codenames.list: Add descriptors for signatures a06a4 (06-aa-04, MTL),
c06f1 (06-cf-01, EMR-SP A0), and c06f2 (06-cf-02, EMR-SP A1).
* microcode_ctl.spec (intel_ucode_version): Bump to 20240531.
(Source0): Add the URL back.
(Patch0001, Patch0002, Patch0003, Patch0004, Patch0005, Patch0006,
Patch0007, Patch0008, Patch0009, Patch0010, Patch0011): Remove.
(%prep): Don't apply the patches.
(%changelog): Add a record.
* sources: Replace microcode-20231009.tar.gz record with
microcode-20240531.tar.gz.
* update_ucode: Also check for symvers.xz in addition to symvers.gz.
Resolves: RHEL-30861
Resolves: RHEL-30864
Resolves: RHEL-30867
Resolves: RHEL-30870
Resolves: RHEL-30873
Resolves: RHEL-41094
Resolves: RHEL-41109
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20231009 release, addresses
CVE-2023-23583
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xac up to 0xb4;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003a5
up to 0xd0003b9;
- Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000230
up to 0x1000268;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xbc
up to 0xc2;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2c up
to 0x34;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x46 up
to 0x4e;
- Update of 06-8f-04/0x10 microcode from revision 0x2c000271 up to
0x2c000290;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
0x2c000271 up to 0x2c000290;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0004b1
up to 0x2b0004d0;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-06/0x10 microcode from revision 0x2c000271 up to
0x2c000290;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0004b1
up to 0x2b0004d0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000271 up to 0x2c000290;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
0x2c000271 up to 0x2c000290;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
0x2b0004b1 up to 0x2b0004d0;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x2e up to 0x32;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x2e up to 0x32;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x2e up to 0x32;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x2e up to 0x32;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x2e up to 0x32;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2e
up to 0x32;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x2e up to 0x32;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x2e up to 0x32;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x42c up to 0x430;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x42c up to 0x430;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x42c up to 0x430;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42c
up to 0x430;
- Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x4 up
to 0x5;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x59 up
to 0x5d;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x119 up
to 0x11d;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x4119 up to 0x411c;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x4119 up to 0x411c;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x4119 up to 0x411c;
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4119
up to 0x411c;
- Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x11 up
to 0x12;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x2e up to 0x32;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x2e up to 0x32;
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2e up
to 0x32;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x2e up to 0x32;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x2e up to 0x32;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x2e up to 0x32;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x2e up to 0x32;
- Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2e up
to 0x32.
* .gitignore: Replace /microcode-20230808.tar.gz entry
with /microcode-20231009.tar.gz.
* 0011-releasenote.md-add-stub-release-notes-for-microcode-.patch: New
file.
* 06-8c-01_readme: Add a checksum for revision 0xb4.
* microcode_ctl.spec (intel_ucode_version): Bump to 20231009.
(Release): Reset to 1.
(Patch0011): New patch.
(%prep): Apply it.
(%changelog): Add a record.
* sources: Replace microcode-20230808.tar.gz record with
microcode-20231009.tar.gz.
Resolves: RHEL-41109
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
Since commit dracut-57~5[1], dracut uses a different set directories
as default $fw_dir, which leads to not resetting it to a state where
kernel-based FW directories (where the microcode for late load resides)
are skipped and leads to having multiple microcode versions in the early
cpio, which prevents the caveats mechanism from working properly.
[1] https://github.com/dracutdevs/dracut/commit/95aeed8975dd
* dracut_99microcode_ctl-fw_dir_override_module_init.sh: Check $fw_dir
for the new default directory set as well in the condition
for the $fw_dir reset check.
* microcode_ctl.spec (Release): Bump to 2.
(%changelog): Add a new record.
Resolves: #2213124
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20230808 release, addresses
CVE-2022-40982, CVE-2022-41804, CVE-2023-23908:
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006f05 up
to 0x2007006;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xaa up to 0xac;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf2 up
to 0xf4;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf2 up
to 0xf4;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf2 up
to 0xf4;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf2 up
to 0xf4;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xf6 up to 0xf8;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf2 up
to 0xf4;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf2 up
to 0xf4;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf2 up
to 0xf4;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf2 up
to 0xf4;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf8 up
to 0xfa;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171
up to 0x1000181;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501
up to 0x4003604;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003501 up to 0x5003604;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601
up to 0x7002703;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390
up to 0xd0003a5;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba
up to 0xbc;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up
to 0x2c;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up
to 0x46;
- Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to
0x2c000271;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000461
up to 0x2b0004b1;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to
0x2c000271;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000461
up to 0x2b0004b1;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
0x2c0001d1 up to 0x2c000271;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
0x2b000461 up to 0x2b0004b1;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x2c up to 0x2e;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x2c up to 0x2e;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x2c up to 0x2e;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x2c up to 0x2e;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x2c up to 0x2e;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2c
up to 0x2e;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x2c up to 0x2e;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x2c up to 0x2e;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x42a up to 0x42c;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x42a up to 0x42c;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x42a up to 0x42c;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42a
up to 0x42c;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up
to 0xf8;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6
up to 0xf8;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6
up to 0xf8;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6
up to 0xf8;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf6 up to 0xf8;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up
to 0x59;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x113 up
to 0x119;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x2c up to 0x2e;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x2c up to 0x2e;
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2c up
to 0x2e;
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x2c up to 0x2e;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x2c up to 0x2e;
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x2c up to 0x2e;
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x2c up to 0x2e;
- Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2c up
to 0x2e;
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x4112 up to 0x4119 (old pf 0xc0);
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x4112 up to 0x4119 (old pf 0xc0);
- Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x4112 up to 0x4119 (old pf 0xc0);
- Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4112
up to 0x4119 (old pf 0xc0);
- Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x10 up
to 0x11 (old pf 0x1).
* .gitignore: Replace /microcode-20230516.tar.gz entry
with /microcode-20230808.tar.gz.
* 0001-releasenote.md-eliminate-usage-of-U-0080.patch: New file.
* 0002-releasenote.md-eliminate-most-of-the-trailing-whites.patch: Likewise.
* 0003-releasenote.md-remove-excess-Release-Notes-headers.patch: Likewise.
* 0004-releasenote.md-sort-the-entries-of-the-20230808-rele.patch: Likewise.
* 0005-releasenote.md-fix-incorrect-platform-mask-for-RPL-H.patch: Likewise.
* 0006-releasenote.md-fix-stepping-for-RPL-S.patch: Likewise.
* 0007-releasenote.md-add-missing-06-ba-03-e0-to-the-new-mi.patch: Likewise.
* 0008-releasenote.md-remove-the-duplicating-06-9e-0c-22-re.patch: Likewise.
* 0009-releasenote.md-fix-old-revisions-for-06-8e-09-10-and.patch: Likewise.
* 0010-releasenote.md-add-old-revisions-for-06-be-00-11-06-.patch: Likewise.
* 06-55-04_readme: Add a checksum for revision 0x2007006.
* 06-8c-01_readme: Add a checksum for revision 0xac.
* 06-8e-9e-0x-0xca_readme: Add a checksum for revision 0xf4 of 06-9e-0d
microcode, a part of microcode-20221108 release, and checksums revision
0xf4/0xf8/0xfa, fix revision of 06-9e-0d micorocde (0xf8 instead 0xf2
in microcode-20230516).
* 06-8e-9e-0x-dell_readme: Likewise.
* microcode_ctl.spec (intel_ucode_version): Bump to 20230808.
(Patch0001, Patch0002, Patch0003, Patch0004, Patch0005, Patch0006, Patch0007,
Patch0008, Patch0009, Patch0010): New patches.
(%prep): Apply them.
(%changelog): Add a record.
* sources: Replace microcode-20230516.tar.gz record with
microcode-20230808.tar.gz.
Resolves: #2223992
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20230516 release:
- Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10;
- Addition of 06-9a-04/0x40 (AZB A0) microcode at revision 0x4;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006e05 up
to 0x2006f05;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa6 up to 0xaa;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xf0 up
to 0xf2;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xf4 up to 0xf6;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xf0 up
to 0xf2;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf4 up
to 0xf8;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000161
up to 0x1000171;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003303
up to 0x4003501;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003303 up to 0x5003501;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002503
up to 0x7002601;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000389
up to 0xd000390;
- Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000211
up to 0x1000230;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb8
up to 0xba;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x32 up
to 0x33;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up
to 0x2a;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x42 up
to 0x44;
- Update of 06-8f-04/0x10 microcode from revision 0x2c000170 up to
0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision
0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000181
up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode from revision 0x2c000170 up to
0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000181
up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) from revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
revision 0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) from revision 0x2b000181 up to 0x2b000461;
- Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
0x2c000170 up to 0x2c0001d1;
- Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
0x2b000181 up to 0x2b000461;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x429 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x429 up to 0x42a;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x429 up to 0x42a;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x429
up to 0x42a;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf4 up
to 0xf6;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf4
up to 0xf6;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf4 up to 0xf6;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x57 up
to 0x58;
- Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x112 up
to 0x113;
- Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode from revision
0x410e up to 0x4112;
- Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in
intel-ucode/06-ba-02) from revision 0x410e up to 0x4112;
- Update of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in
intel-ucode/06-ba-03) from revision 0x410e up to 0x4112;
- Update of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode from revision 0x410e
up to 0x4112.
* .gitignore: Replace /microcode-20230214.tar.gz entry
with /microcode-20230516.tar.gz.
* 06-55-04_readme: Add a checksum for revision 0x2006f05.
* 06-8c-01_readme: Add a checksum for for revision 0xa6, which was
a part of microcode-20230214 release, and for revision 0xaa.
* 06-8e-9e-0x-0xca_readme: Add a checksum for revision 0xf4 of 06-8e-0c
microcode, a part of microcode-20230214 release, and checksums revision
0xf2/0xf6.
* 06-8e-9e-0x-dell_readme: Likewise.
* codenames.list: Add entries for CPU signatures 906a4/40 (AZB)
and b06e0/01 (ADL-N); correct stepping for b0671/32 (RPL-S B0
instead of S0); fix platform mask for b06a2 and b06a3 (RPL-P/H/U):
e0 instead of 07.
* microcode_ctl.spec (intel_ucode_version): Bump to 20230516.
(Release): Reset to 1.
(%build): Remove bogus *_DUPLICATE files with older microcode revisions.
(%changelog): Add a record.
* sources: Replace microcode-20230214.tar.gz record with
microcode-20230516.tar.gz.
Resolves: #2213124
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
During various reasons (specifically, due to being called at various
stags of mirocode_ctl installation/upgrade) it is possible that some
directories do not exist, which is problematic, as find exits
with non-zero exit code if being called on them. Avoid that by wrapping
find calls in a function that checks that the first find argument
is indeed an existing directory before calling find itself.
* update_ucode (find_d): New function.
Convert find calls that are not prefixed with $cmd into find_d calls.
* microcode_ctl.spec (Release): Bump to 4.
(%changelog): Mention it.
Resolves: #2225681
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
The scripts are not expected to work with locale-sensitive data,
and since unusual locales may let them go haywire, try to avoid
it by forcing locale to C at the beginning of the scripts.
* check_caveats: Export LC_ALL=C.
* reload_microcode: Likewise.
* update_ucode: Likewise.
* microcode_ctl.spec (Release): Bump to 3.
(%changelog): Mention it.
Resolves: #2218104
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
Microcode is not supposed to be removed during updates,
so there are several possible code paths/situations when
it is possible that symlinks are not completely cleaned up;
as a result, when such a case occurs (for example, when
there is a microcode, that is not supposed to be OS-loadable
in the first place, added end then removed) a dangling symlinks
may appear during updates; the most straightforward way to deal
with it, it seems, is to just treat the microcode directories
as being owned by the package (which they de-facto are) and simply
cleanup all the dangling symlinks during an update.
* update_ucode: Remove all the dangling symlinks at the end of common
microcode removal phase; remove all the dangling symlinks in the
kernel-specific directories at the end of the update process.
* microcode_ctl.spec (Release): Bump to 2.
(%changelog): Add an entry.
Resolves: #2213022
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20230214 release, addresses
CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090:
- Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
0x2b000181;
- Addition of 06-8f-04/0x10 microcode at revision 0x2c000170;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000181;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-04) at revision 0x2c000170;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000181;
- Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at
revision 0x2c000170;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000181;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-04) at revision 0x2b000181;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-04) at revision 0x2c000170;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000181;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at
revision 0x2c000170;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision
0x2b000181;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision
0x2c000170;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000181;
- Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at
revision 0x2c000170;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000181;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-05) at revision 0x2b000181;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-05) at revision 0x2c000170;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000181;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at
revision 0x2c000170;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000181;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-06) at revision 0x2c000170;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision
0x2b000181;
- Addition of 06-8f-06/0x10 microcode at revision 0x2c000170;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000181;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-06) at revision 0x2b000181;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
intel-ucode/06-8f-06) at revision 0x2c000170;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000181;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000181;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000181;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision
0x2b000181;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
intel-ucode/06-8f-07) at revision 0x2b000181;
- Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000181;
- Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at
revision 0x2c000170;
- Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000181;
- Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
intel-ucode/06-8f-08) at revision 0x2c000170;
- Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000181;
- Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at
revision 0x2c000170;
- Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
intel-ucode/06-8f-08) at revision 0x2b000181;
- Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision
0x2b000181;
- Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision
0x2c000170;
- Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112;
- Addition of 06-ba-02/0xc0 microcode at revision 0x410e;
- Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at
revision 0x410e;
- Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at
revision 0x410e;
- Addition of 06-ba-03/0xc0 microcode at revision 0x410e;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xf0 up to 0xf4;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up
to 0xf4;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e
up to 0x1000161;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302
up to 0x4003303;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003302 up to 0x5003303;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501
up to 0x7002503;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375
up to 0xd000389;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up
to 0x3e;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up
to 0x22;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2
up to 0xb8;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up
to 0x32;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up
to 0x42;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up
to 0x17;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22
up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x421 up to 0x429;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x421 up to 0x429;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x421 up to 0x429;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421
up to 0x429;
- Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023
up to 0x24000024;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up
to 0xf4;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0
up to 0xf4;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0
up to 0xf4;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0
up to 0xf4;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xf0 up to 0xf4;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up
to 0x57;
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to
0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x22 up to 0x2c (old pf 0x3);
- Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to
0x2c (old pf 0x3).
* .gitignore: Replace /microcode-20220809.tar.gz entry with
/microcode-20230214.tar.gz.
* codenames.list: Add entries for CPU signatures 606c1 (ICL-D B0),
806f4 (SPR-SP E0/S1), 806f5 (SPR-HBM B1, SPR-SP E2), 806f6 (SPR-SP E3),
806f7 (SPR-SP E4/S2), 806f8 (SPR-HBM B3, SPR-SP E5/S3), b0671 (RPL-S S0),
806a2 (SPR-P 6+8/H 6+8 J0), and 806a3 (SPR-U 2+8 Q0).
* microcode_ctl.spec (intel_ucode_version): Bump to 20230214.
(Release): Reset to 1.
(%changelog): Add a record.
* sources: Replace microcode-20220809.tar.gz record with
microcode-20230214.tar.gz.
Resolves: #2171237Resolves: #2171262
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20220510 release, addresses
CVE-2022-21233:
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006d05 up
to 0x2006e05;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d
up to 0x100015e;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363
up to 0xd000375;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up
to 0x3c;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up
to 0x20;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0
up to 0xb2;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up
to 0x28;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up
to 0x40;
- Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision
0x1f up to 0x22;
- Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) from revision 0x1f up to 0x22;
- Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x1f up to 0x22;
- Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
from revision 0x1f up to 0x22;
- Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-97-05) from revision 0x1f up to 0x22;
- Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f
up to 0x22;
- Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x1f up to 0x22;
- Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
from revision 0x1f up to 0x22;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
0x41c up to 0x421;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) from revision 0x41c up to 0x421;
- Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) from revision 0x41c up to 0x421;
- Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c
up to 0x421;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up
to 0x54;
- Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-02) from revision 0x1f up to 0x22;
- Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) from revision 0x1f up to 0x22;
- Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up
to 0x22;
- Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02)
from revision 0x1f up to 0x22;
- Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
intel-ucode/06-bf-05) from revision 0x1f up to 0x22;
- Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) from revision 0x1f up to 0x22;
- Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05)
from revision 0x1f up to 0x22;
- Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up
to 0x22.
* .gitignore: Replace /microcode-20220510.tar.gz entry with
/microcode-20220809.tar.gz.
* 0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch: Remove.
* 06-55-04_readme: Add a checksum for revision 0x2006e05, add the link
to the 2022.2 IPU KB article.
* README.caveats: Add the link to the 2022.2 IPU KB article.
* microcode_ctl.spec (intel_ucode_version): Bump to 20220809.
(Patch1001): Remove.
(%prep): No longer apply %patch1001.
(%changelog): Add a record.
* sources: Replace microcode-20220510.tar.gz record with
microcode-20220809.tar.gz.
Resolves: #2115663
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20220510 release, addresses
CVE-2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 (#2086743):
- Addition of 06-97-02/0x03 (ADL-HX C0) microcode at revision 0x1f;
- Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-97-02) at revision 0x1f;
- Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
at revision 0x1f;
- Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
at revision 0x1f;
- Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
intel-ucode/06-97-05) at revision 0x1f;
- Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode at revision 0x1f;
- Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
at revision 0x1f;
- Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
at revision 0x1f;
- Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode at
revision 0x41c;
- Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
intel-ucode/06-9a-03) at revision 0x41c;
- Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
intel-ucode/06-9a-04) at revision 0x41c;
- Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode at revision 0x41c;
- Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
intel-ucode/06-bf-02) at revision 0x1f;
- Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-02) at revision 0x1f;
- Addition of 06-bf-02/0x03 (ADL C0) microcode at revision 0x1f;
- Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02)
at revision 0x1f;
- Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
intel-ucode/06-bf-05) at revision 0x1f;
- Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
intel-ucode/06-bf-05) at revision 0x1f;
- Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05)
at revision 0x1f;
- Addition of 06-bf-05/0x03 (ADL C0) microcode at revision 0x1f;
- Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xec up to 0xf0;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006c0a up
to 0x2006d05;
- Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xec up to 0xf0;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x9a up to 0xa4;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up
to 0xf0;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up
to 0xf0;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xec up
to 0xf0;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xec up
to 0xf0;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xec up to 0xf0;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xec up
to 0xf0;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xec up
to 0xf0;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xec up
to 0xf0;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xec up
to 0xf0;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xec up
to 0xf0;
- Update of 06-37-09/0x0f (VLV D0) microcode from revision 0x90c up
to 0x90d;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015c
up to 0x100015d;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400320a
up to 0x4003302;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x500320a up to 0x5003302;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002402
up to 0x7002501;
- Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x46 up
to 0x48;
- Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x24 up
to 0x28;
- Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x36 up
to 0x38;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000331
up to 0xd000363;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x38 up
to 0x3a;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1c up
to 0x1e;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa8
up to 0xb0;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2d up
to 0x31;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x22 up
to 0x26;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3c up
to 0x3e;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x15 up
to 0x16;
- Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x2400001f
up to 0x24000023;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xec up
to 0xf0;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xec
up to 0xf0;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xee
up to 0xf0;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xea
up to 0xf0;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xec up to 0xf0;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x50 up
to 0x53.
* .gitignore: Replace /microcode-20220207.tar.gz entry with
/microcode-20220510.tar.gz.
* 0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch: New
patch.
* 06-4e-03_readme: Add a checksum for revision 0xf0, add the link
to the 2022.1 IPU KB article.
* 06-55-04_readme: Add a checksum for revision 0x2006d05, add the link
to the 2022.1 IPU KB article.
* 06-5e-03_readme: Add a checksum for revision 0xf0, add the link
to the 2022.1 IPU KB article.
* 06-8c-01_readme: Add a checksum for revision 0xa4, add the link
to the 2022.1 IPU KB article.
* 06-8e-9e-0x-0xca_readme: Add checksums for revision 0xf0, add the link
to the 2022.1 IPU KB article.
* 06-8e-9e-0x-dell_readme: Likewise.
* codenames.list: Add an entry for CPU signatures 90672 (ADL-S/HX C0),
90675 (ADL-S K0), 906a3 (ADL-P L0, ADL-U R0), 906a4 (ADL-P R0),
b06f2 (ADL C0), and b06f5 (ADL C0).
* microcode_ctl.spec (intel_ucode_version): Bump to 20220510.
(Patch1001): New patch (fixes in releasenote.md).
(%prep): Apply it.
(%changelog): Add a record.
* sources: Replace microcode-20220207.tar.gz record with
microcode-20220510.tar.gz.
Resolves: #2090248Resolves: #2090261Resolves: #2086751Resolves: #2040069
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
- Update Intel CPU microcode to microcode-20220207 release, addresses
CVE-2021-0127, CVE-2021-0145, and CVE-2021-33120:
- Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
- Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
at revision 0xb00000f;
- Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
at revision 0xb00000f;
- Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
- Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xea up to 0xec;
- Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb00003e up
to 0xb000040;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006b06 up
to 0x2006c0a;
- Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xea up to 0xec;
- Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x88 up to 0x9a;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xea up
to 0xec;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xea up
to 0xec;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xea up
to 0xec;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xea up
to 0xec;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
revision 0xea up to 0xec;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xea up
to 0xec;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xea up
to 0xec;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xea up
to 0xec;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xea up
to 0xec;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xea up
to 0xec;
- Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
from revision 0x46 up to 0x49;
- Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up
to 0x1a;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b
up to 0x100015c;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102
up to 0x400320a;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
0x5003102 up to 0x500320a;
- Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302
up to 0x7002402;
- Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
0x700001b up to 0x700001c;
- Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019
up to 0xf00001a;
- Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
0xe000012 up to 0xe000014;
- Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up
to 0x46;
- Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up
to 0x24;
- Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up
to 0x36;
- Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0
up to 0xd000331;
- Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up
to 0x38;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up
to 0x1c;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6
up to 0xa8;
- Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up
to 0x2d;
- Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up
to 0x22;
- Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up
to 0x3c;
- Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up
to 0x15;
- Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up
to 0x2400001f;
- Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up
to 0xec;
- Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea
up to 0xec;
- Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec
up to 0xee;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8
up to 0xea;
- Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
0xea up to 0xec;
- Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up
to 0x50.
* .gitignore (/microcode-20210608.tar.gz): Replace with...
(/microcode-20220207.tar.gz): ...this.
* 06-4e-03_readme: Add a checksum for revision 0xec; add a link to the KB
article dedicated to 2021.2 IPU.
* 06-55-04_readme: Add a checksum for revision 0x2006c0a; add a link
to the KB article dedicated to 2021.2 IPU.
* 06-5e-03_readme: Add a checksum for revision 0xec; add a link to the KB
article dedicated to 2021.2 IPU.
* 06-8c-01_readme: Add a checksum for revision 0x9a; add a link to the KB
article dedicated to 2021.2 IPU.
* 06-8e-9e-0x-0xca_readme: Add checksums for revision 0xec; add links
to 2021.1 IPU and 2021.2 IPU KB articles.
* 06-8e-9e-0x-dell_readme: Likewise.
* README.caveats: Add a link to the KB article dedicated to 2021.2 IPU.
* codenames.list: Add an entry for CPU signature 80667 (SNR C0).
* microcode_ctl.spec (intel_ucode_version): Bump to 20220207.
(Release): Reset to 1.
(%changelog): Add a record.
* sources: Replace microcode-20210608.tar.gz record with
microcode-20220207.tar.gz.
Resolves: #2053253
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
Unfortunately, hexdump doesn't support enforcing endianness of printed
fields (or printing of fields out of order, for that matter), and there
is no trivial analogue of dd conv=swab for 4-byte swaps, so we use xxd's
so-called "little-endian mode" to convert the endianness to big endian,
then print fields per-byte with hexdump and process the constructed
0xaabbccdd numbers. Note that this also swaps the order of the date fields
to mm.dd.yyYY (instead of YYyy.mm.dd).
* gen_provides.sh: Pipe dd, xxd, and xxd -r to swap quad-bytes into big
endian, print them as sequences of bytes to construct the fields
of necessary size.
* microcode_ctl.spec (BuildRequires): Add /usr/bin/xxd.
Resolves: #1880064
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
* gen_updates2.py (read_revs_dir): Consistently prefix struct.unpack
formats with "<" to signify that it is little-endian data.
Resolves: #1880064
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
It makes little sense in some places, but that is subject to some future
fixes.
Resolves: #1880064
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
Apparently, it was short-lived. The python interpreter binary name
is still has to be provided explicitly, though; as well as the build
dependency, since the buildroot no longer contains a python interpreter.
Resolves: #1880064
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
Eugene Syromiatnikov
Mohan Boddu
Jeffrey Bastian
DistroBaker
Troy Dawson
Petr Šabata
Release Configuration Management