Tool to transform and deploy CPU microcode update for x86.
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Eugene Syromiatnikov b314ff2835 Intel microcode update 20220207
- Update Intel CPU microcode to microcode-20220207 release, addresses
  CVE-2021-0127, CVE-2021-0145, and CVE-2021-33120:
  - Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
  - Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
    at revision 0xb00000f;
  - Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
    at revision 0xb00000f;
  - Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
  - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
    intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xea up to 0xec;
  - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
    intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb00003e up
    to 0xb000040;
  - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
    intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006b06 up
    to 0x2006c0a;
  - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
    intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xea up to 0xec;
  - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
    intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x88 up to 0x9a;
  - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xea up
    to 0xec;
  - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xea up
    to 0xec;
  - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xea up
    to 0xec;
  - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xea up
    to 0xec;
  - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
    microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
    revision 0xea up to 0xec;
  - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xea up
    to 0xec;
  - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xea up
    to 0xec;
  - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xea up
    to 0xec;
  - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xea up
    to 0xec;
  - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
    intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xea up
    to 0xec;
  - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
    from revision 0x46 up to 0x49;
  - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up
    to 0x1a;
  - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b
    up to 0x100015c;
  - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102
    up to 0x400320a;
  - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
    0x5003102 up to 0x500320a;
  - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302
    up to 0x7002402;
  - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
    0x700001b up to 0x700001c;
  - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019
    up to 0xf00001a;
  - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
    0xe000012 up to 0xe000014;
  - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up
    to 0x46;
  - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up
    to 0x24;
  - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up
    to 0x36;
  - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0
    up to 0xd000331;
  - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up
    to 0x38;
  - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up
    to 0x1c;
  - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6
    up to 0xa8;
  - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up
    to 0x2d;
  - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up
    to 0x22;
  - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up
    to 0x3c;
  - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up
    to 0x15;
  - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up
    to 0x2400001f;
  - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up
    to 0xec;
  - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea
    up to 0xec;
  - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec
    up to 0xee;
  - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8
    up to 0xea;
  - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
    0xea up to 0xec;
  - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up
    to 0x50.

* .gitignore (/microcode-20210608.tar.gz): Replace with...
(/microcode-20220207.tar.gz): ...this.
* 06-4e-03_readme: Add a checksum for revision 0xec;  add a link to the KB
article dedicated to 2021.2 IPU.
* 06-55-04_readme: Add a checksum for revision 0x2006c0a;  add a link
to the KB article dedicated to 2021.2 IPU.
* 06-5e-03_readme: Add a checksum for revision 0xec;  add a link to the KB
article dedicated to 2021.2 IPU.
* 06-8c-01_readme: Add a checksum for revision 0x9a;  add a link to the KB
article dedicated to 2021.2 IPU.
* 06-8e-9e-0x-0xca_readme: Add checksums for revision 0xec;  add links
to 2021.1 IPU and 2021.2 IPU KB articles.
* 06-8e-9e-0x-dell_readme: Likewise.
* README.caveats: Add a link to the KB article dedicated to 2021.2 IPU.
* codenames.list: Add an entry for CPU signature 80667 (SNR C0).
* microcode_ctl.spec (intel_ucode_version): Bump to 20220207.
(Release): Reset to 1.
(%changelog): Add a record.
* sources: Replace microcode-20210608.tar.gz record with
microcode-20220207.tar.gz.

Resolves: #2053253
Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2022-02-14 21:50:48 +01:00
.gitignore Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
01-microcode.conf Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-2d-07_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-2d-07_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-2d-07_readme Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-4e-03_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-4e-03_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-4e-03_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
06-4f-01_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-4f-01_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-4f-01_readme Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-5e-03_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-5e-03_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-5e-03_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
06-8c-01_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8c-01_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8c-01_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
06-8e-9e-0x-0xca_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8e-9e-0x-0xca_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8e-9e-0x-0xca_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
06-8e-9e-0x-dell_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8e-9e-0x-dell_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-8e-9e-0x-dell_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
06-55-04_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-55-04_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
06-55-04_readme Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
99-microcode-override.conf Import RHEL packaging 2021-07-26 18:44:11 +02:00
README Import RHEL packaging 2021-07-26 18:44:11 +02:00
README.caveats Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
check_caveats Import RHEL packaging 2021-07-26 18:44:11 +02:00
codenames.list Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
dracut_99microcode_ctl-fw_dir_override_module_init.sh Import RHEL packaging 2021-07-26 18:44:11 +02:00
gating.yaml add RHEL9 gating.yaml file 2021-06-30 14:42:43 -05:00
gen_provides.sh gen_provides.sh: make microcode header decoding endianness-agnostic 2021-07-26 23:18:05 +02:00
gen_updates2.py gen_updates2.py: consistently specify endianness in struct.unpack formats 2021-07-26 23:18:05 +02:00
intel_config Import RHEL packaging 2021-07-26 18:44:11 +02:00
intel_disclaimer Import RHEL packaging 2021-07-26 18:44:11 +02:00
intel_readme Import RHEL packaging 2021-07-26 18:44:11 +02:00
microcode.service Import RHEL packaging 2021-07-26 18:44:11 +02:00
microcode_ctl.spec Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
reload_microcode Import RHEL packaging 2021-07-26 18:44:11 +02:00
sources Intel microcode update 20220207 2022-02-14 21:50:48 +01:00
update_ucode Import RHEL packaging 2021-07-26 18:44:11 +02:00

README

The microcode_ctl package contains microcode files (vendor-provided binary data
and/or code in proprietary format that affects behaviour of a device) for Intel
CPUs that may be loaded into the CPU during boot.

This directory contains information regarding various aspects of the provided
microcode files and their usage.

 * LICENSE.intel-ucode
   "license" file from the Intel x86 CPU microcode archive.
 * README
   This file.
 * README.caveats
   Caveats (mechanism for enabling/disabling usage of sets of microcode files
   based on caveat configuration and user preferences) documentation.
   Also contains general information about microcode update behaviour and links
   with additional information about the relevant microarchitectural
   vulnerabilities.
 * README.intel-ucode
   "README.md" file from the Intel x86 CPU microcode archive.
 * RELEASE_NOTES.intel-ucode
   "releasenote.md" file from the Intel x86 CPU microcode archive.
 * SECURITY.intel-ucode
   "security.md" file from the Intel x86 CPU microcode archive.
 * SUMMARY.intel-ucode
   Information about supplied microcode files extracted from their headers,
   in a table form.  Columns have the following meaning:
    * "Path": path to the microcode file under one of the following directories:
       * /usr/share/microcode_ctl/ucode_with_caveats/intel
       * /usr/share/microcode_ctl/ucode_with_caveats
       * /usr/share/microcode_ctl
       * /lib/firmware
       * /etc/firmware
    * "Offset": offset of the microcode blob within the micocode file in bytes.
    * "Ext. Offset": offset of the extended signature header within
      the microcode file in bytes.
    * "Data Size": size of microcode data in bytes.  0 means 2000 bytes.
    * "Total Size": size of microcode blob in bytes, incuding headers.
      0 means 2048 bytes.
    * "CPUID": CPU ID signature (in format returned by the CPUID instruction).
    * "Platform ID Mask": mask of suitable Platform IDs (provided in bits
      52..50 of MSR 0x17).
    * "Revision": microcode revision.
    * "Date": microcode creation date.
    * "Checksum": sum (in base 1<< 32) of all 32-bit values comprising
      the microcode (from Offset up to Offset + Total Size).
    * "Codenames": list of known CPU codenames associated with the CPUID
      and Platform ID Mask combination.
   Please refer to README.cavets, section "Microcode file structure"
   for additional information regarding microcode header fields.
 * caveats
   Directory that contains readme files for each specific caveat.