forked from rpms/kernel
130 lines
4.4 KiB
Diff
130 lines
4.4 KiB
Diff
From be1cba911af4925ef0f42bdfee9682b01c94dfcb Mon Sep 17 00:00:00 2001
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From: Borislav Petkov <bp@suse.de>
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Date: Tue, 19 Apr 2022 09:52:41 -0700
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Subject: [PATCH 02/36] x86/cpu: Load microcode during
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restore_processor_state()
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When resuming from system sleep state, restore_processor_state()
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restores the boot CPU MSRs. These MSRs could be emulated by microcode.
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If microcode is not loaded yet, writing to emulated MSRs leads to
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unchecked MSR access error:
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...
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PM: Calling lapic_suspend+0x0/0x210
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unchecked MSR access error: WRMSR to 0x10f (tried to write 0x0...0) at rIP: ... (native_write_msr)
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Call Trace:
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<TASK>
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? restore_processor_state
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x86_acpi_suspend_lowlevel
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acpi_suspend_enter
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suspend_devices_and_enter
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pm_suspend.cold
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state_store
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kobj_attr_store
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sysfs_kf_write
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kernfs_fop_write_iter
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new_sync_write
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vfs_write
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ksys_write
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__x64_sys_write
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do_syscall_64
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entry_SYSCALL_64_after_hwframe
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RIP: 0033:0x7fda13c260a7
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To ensure microcode emulated MSRs are available for restoration, load
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the microcode on the boot CPU before restoring these MSRs.
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[ Pawan: write commit message and productize it. ]
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Fixes: e2a1256b17b1 ("x86/speculation: Restore speculation related MSRs during S3 resume")
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Reported-by: Kyle D. Pelton <kyle.d.pelton@intel.com>
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Signed-off-by: Borislav Petkov <bp@suse.de>
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Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
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Tested-by: Kyle D. Pelton <kyle.d.pelton@intel.com>
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Cc: stable@vger.kernel.org
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Link: https://bugzilla.kernel.org/show_bug.cgi?id=215841
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Link: https://lore.kernel.org/r/4350dfbf785cd482d3fafa72b2b49c83102df3ce.1650386317.git.pawan.kumar.gupta@linux.intel.com
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(cherry picked from commit f9e14dbbd454581061c736bf70bf5cbb15ac927c)
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Signed-off-by: Mridula Shastry <mridula.c.shastry@oracle.com>
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Reviewed-by: Todd Vierling <todd.vierling@oracle.com>
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---
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arch/x86/include/asm/microcode.h | 2 ++
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arch/x86/kernel/cpu/microcode/core.c | 6 +++---
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arch/x86/power/cpu.c | 8 ++++++++
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3 files changed, 13 insertions(+), 3 deletions(-)
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diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
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index 2b7cc5397f80..a930a63d1260 100644
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--- a/arch/x86/include/asm/microcode.h
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+++ b/arch/x86/include/asm/microcode.h
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@@ -133,6 +133,7 @@ extern void load_ucode_ap(void);
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void reload_early_microcode(void);
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extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
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extern bool initrd_gone;
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+void microcode_bsp_resume(void);
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#else
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static inline int __init microcode_init(void) { return 0; };
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static inline void __init load_ucode_bsp(void) { }
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@@ -140,6 +141,7 @@ static inline void load_ucode_ap(void) { }
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static inline void reload_early_microcode(void) { }
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static inline bool
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get_builtin_firmware(struct cpio_data *cd, const char *name) { return false; }
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+static inline void microcode_bsp_resume(void) { }
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#endif
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#endif /* _ASM_X86_MICROCODE_H */
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diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
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index e263da7247af..f0946658f885 100644
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--- a/arch/x86/kernel/cpu/microcode/core.c
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+++ b/arch/x86/kernel/cpu/microcode/core.c
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@@ -778,9 +778,9 @@ static struct subsys_interface mc_cpu_interface = {
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};
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/**
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- * mc_bp_resume - Update boot CPU microcode during resume.
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+ * microcode_bsp_resume - Update boot CPU microcode during resume.
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*/
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-static void mc_bp_resume(void)
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+void microcode_bsp_resume(void)
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{
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int cpu = smp_processor_id();
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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@@ -792,7 +792,7 @@ static void mc_bp_resume(void)
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}
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static struct syscore_ops mc_syscore_ops = {
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- .resume = mc_bp_resume,
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+ .resume = microcode_bsp_resume,
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};
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static int mc_cpu_starting(unsigned int cpu)
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diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
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index f48756c903d4..dd5a29553697 100644
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--- a/arch/x86/power/cpu.c
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+++ b/arch/x86/power/cpu.c
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@@ -25,6 +25,7 @@
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#include <asm/cpu.h>
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#include <asm/mmu_context.h>
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#include <linux/dmi.h>
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+#include <asm/microcode.h>
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#ifdef CONFIG_X86_32
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__visible unsigned long saved_context_ebx;
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@@ -266,6 +267,13 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)
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x86_platform.restore_sched_clock_state();
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mtrr_bp_restore();
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perf_restore_debug_store();
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+
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+ microcode_bsp_resume();
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+
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+ /*
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+ * This needs to happen after the microcode has been updated upon resume
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+ * because some of the MSRs are "emulated" in microcode.
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+ */
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msr_restore_context(ctxt);
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}
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--
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2.39.3
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