Add valgrind-3.14.0-ppc64-lxvb16x.patch
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valgrind-3.14.0-ppc64-lxvb16x.patch
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88
valgrind-3.14.0-ppc64-lxvb16x.patch
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@ -0,0 +1,88 @@
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commit 5c00e04a1b61475a7f731f8cfede114201815e0a
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Author: Mark Wielaard <mark@klomp.org>
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Date: Sun Dec 9 23:25:05 2018 +0100
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Implement ppc64 lxvb16x as 128-bit vector load with reversed double words.
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This makes it possible for memcheck to know which part of the 128bit
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vector is defined, even if the load is partly beyond an addressable block.
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Partially resolves bug 386945.
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diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
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index 7af4973..ec2f90a 100644
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--- a/VEX/priv/guest_ppc_toIR.c
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+++ b/VEX/priv/guest_ppc_toIR.c
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@@ -20702,54 +20702,29 @@ dis_vx_load ( UInt theInstr )
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{
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DIP("lxvb16x %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
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- IRTemp byte[16];
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- int i;
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- UInt ea_off = 0;
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- IRExpr* irx_addr;
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- IRTemp tmp_low[9];
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- IRTemp tmp_hi[9];
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+ /* The result of lxvb16x should be the same on big and little
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+ endian systems. We do a host load, then reverse the bytes in
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+ the double words. If the host load was little endian we swap
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+ them around again. */
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- tmp_low[0] = newTemp( Ity_I64 );
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- tmp_hi[0] = newTemp( Ity_I64 );
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- assign( tmp_low[0], mkU64( 0 ) );
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- assign( tmp_hi[0], mkU64( 0 ) );
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-
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- for ( i = 0; i < 8; i++ ) {
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- byte[i] = newTemp( Ity_I64 );
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- tmp_low[i+1] = newTemp( Ity_I64 );
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-
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- irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
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- ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
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- ea_off += 1;
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-
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- assign( byte[i], binop( Iop_Shl64,
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- unop( Iop_8Uto64,
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- load( Ity_I8, irx_addr ) ),
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- mkU8( 8 * ( 7 - i ) ) ) );
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+ IRTemp high = newTemp(Ity_I64);
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+ IRTemp high_rev = newTemp(Ity_I64);
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+ IRTemp low = newTemp(Ity_I64);
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+ IRTemp low_rev = newTemp(Ity_I64);
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- assign( tmp_low[i+1],
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- binop( Iop_Or64,
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- mkexpr( byte[i] ), mkexpr( tmp_low[i] ) ) );
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- }
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+ IRExpr *t128 = load( Ity_V128, mkexpr( EA ) );
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- for ( i = 0; i < 8; i++ ) {
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- byte[i + 8] = newTemp( Ity_I64 );
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- tmp_hi[i+1] = newTemp( Ity_I64 );
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+ assign( high, unop(Iop_V128HIto64, t128) );
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+ assign( high_rev, unop(Iop_Reverse8sIn64_x1, mkexpr(high)) );
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+ assign( low, unop(Iop_V128to64, t128) );
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+ assign( low_rev, unop(Iop_Reverse8sIn64_x1, mkexpr(low)) );
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- irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ),
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- ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) );
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- ea_off += 1;
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+ if (host_endness == VexEndnessLE)
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+ t128 = binop( Iop_64HLtoV128, mkexpr (low_rev), mkexpr (high_rev) );
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+ else
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+ t128 = binop( Iop_64HLtoV128, mkexpr (high_rev), mkexpr (low_rev) );
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- assign( byte[i+8], binop( Iop_Shl64,
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- unop( Iop_8Uto64,
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- load( Ity_I8, irx_addr ) ),
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- mkU8( 8 * ( 7 - i ) ) ) );
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- assign( tmp_hi[i+1], binop( Iop_Or64,
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- mkexpr( byte[i+8] ),
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- mkexpr( tmp_hi[i] ) ) );
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- }
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- putVSReg( XT, binop( Iop_64HLtoV128,
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- mkexpr( tmp_low[8] ), mkexpr( tmp_hi[8] ) ) );
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+ putVSReg( XT, t128 );
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break;
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}
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@ -141,6 +141,7 @@ Patch19: valgrind-3.14.0-ppc64-ldbrx.patch
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Patch20: valgrind-3.14.0-ppc64-unaligned-words.patch
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Patch21: valgrind-3.14.0-ppc64-lxvd2x.patch
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Patch22: valgrind-3.14.0-ppc64-unaligned-vecs.patch
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Patch23: valgrind-3.14.0-ppc64-lxvb16x.patch
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%if %{build_multilib}
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# Ensure glibc{,-devel} is installed for both multilib arches
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@ -296,6 +297,7 @@ Valgrind User Manual for details.
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%patch20 -p1
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%patch21 -p1
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%patch22 -p1
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%patch23 -p1
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%build
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CC=gcc
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@ -536,6 +538,7 @@ fi
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- Add valgrind-3.14.0-ppc64-unaligned-words.patch
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- Add valgrind-3.14.0-ppc64-lxvd2x.patch
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- Add valgrind-3.14.0-ppc64-unaligned-vecs.patch
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- Add valgrind-3.14.0-ppc64-lxvb16x.patch
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* Sat Dec 1 2018 Mark Wielaard <mjw@fedoraproject.org> - 3.14.0.5
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- Add valgrind-3.14.0-wcsncmp.patch (#1645971)
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