Add valgrind-3.14.0-ppc64-unaligned-vecs.patch
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valgrind-3.14.0-ppc64-unaligned-vecs.patch
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28
valgrind-3.14.0-ppc64-unaligned-vecs.patch
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commit 321771ee63740333ad355244e0764295218843b8
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Author: Mark Wielaard <mark@klomp.org>
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Date: Sun Dec 9 14:26:39 2018 +0100
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memcheck: Allow unaligned loads of 128bit vectors on ppc64[le].
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On powerpc partial unaligned loads of vectors from partially invalid
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addresses are OK and could be generated by our translation of lxvd2x.
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Adjust partial_load memcheck tests to allow partial loads of 16 byte
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vectors on powerpc64.
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Part of resolving bug #386945.
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diff --git a/memcheck/mc_main.c b/memcheck/mc_main.c
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index 737f79d..101916b 100644
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--- a/memcheck/mc_main.c
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+++ b/memcheck/mc_main.c
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@@ -1354,6 +1354,9 @@ void mc_LOADV_128_or_256_slow ( /*OUT*/ULong* res,
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tl_assert(szB == 16); // s390 doesn't have > 128 bit SIMD
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/* OK if all loaded bytes are from the same page. */
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Bool alignedOK = ((a & 0xfff) <= 0x1000 - szB);
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+# elif defined(VGA_ppc64be) || defined(VGA_ppc64le)
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+ /* lxvd2x might generate an unaligned 128 bit vector load. */
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+ Bool alignedOK = (szB == 16);
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# else
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/* OK if the address is aligned by the load size. */
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Bool alignedOK = (0 == (a & (szB - 1)));
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@ -140,6 +140,7 @@ Patch18: valgrind-3.14.0-final_tidyup.patch
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Patch19: valgrind-3.14.0-ppc64-ldbrx.patch
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Patch20: valgrind-3.14.0-ppc64-unaligned-words.patch
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Patch21: valgrind-3.14.0-ppc64-lxvd2x.patch
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Patch22: valgrind-3.14.0-ppc64-unaligned-vecs.patch
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%if %{build_multilib}
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# Ensure glibc{,-devel} is installed for both multilib arches
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@ -294,6 +295,7 @@ Valgrind User Manual for details.
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%patch19 -p1
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%patch20 -p1
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%patch21 -p1
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%patch22 -p1
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%build
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CC=gcc
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@ -533,6 +535,7 @@ fi
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- Add valgrind-3.14.0-ppc64-ldbrx.patch
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- Add valgrind-3.14.0-ppc64-unaligned-words.patch
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- Add valgrind-3.14.0-ppc64-lxvd2x.patch
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- Add valgrind-3.14.0-ppc64-unaligned-vecs.patch
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* Sat Dec 1 2018 Mark Wielaard <mjw@fedoraproject.org> - 3.14.0.5
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- Add valgrind-3.14.0-wcsncmp.patch (#1645971)
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