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import rdma-core-35.0-1.el8

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CentOS Sources 2021-11-09 05:08:32 -05:00 committed by Stepan Oksanichenko
parent efa753cb66
commit 36179cfd96
28 changed files with 96 additions and 53267 deletions
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2
.gitignore vendored
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@ -1,2 +1,2 @@
SOURCES/rdma-core-32.0.tar.gz
SOURCES/rdma-core-35.0.tar.gz
SOURCES/rxe_cfg.8.gz

2
.rdma-core.metadata
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@ -1,2 +1,2 @@
9b86b0000880648824ffdb11dde4d06c206f2536 SOURCES/rdma-core-32.0.tar.gz
de4b0a7d11ba10b4d35687a6dce8d3d6a60df342 SOURCES/rdma-core-35.0.tar.gz
9187638355d9bee854989bbfc6c2956301fd52aa SOURCES/rxe_cfg.8.gz

51546
SOURCES/0001-ABI-Files.patch
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File diff suppressed because it is too large Load Diff

91
SOURCES/0001-Fix-cmd_fd-leak-in-mlx5_alloc_context.patch
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@ -1,91 +0,0 @@
From 169d050bc82a519fdc28f83bb685d86804383f0b Mon Sep 17 00:00:00 2001
From: Greg Inozemtsev <greg@purestorage.com>
Date: Tue, 27 Oct 2020 11:24:30 -0700
Subject: [PATCH] Fix cmd_fd leak in mlx5_alloc_context
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The alloc_context function is supposed to take ownership of cmd_fd
and close it if it fails and returns NULL. This was not done in
early exit error paths from mlx5_init_context (called from mlx5_alloc_context).
Fixes: cb3be404fadc (“mlx5: Refactor mlx5_alloc_context()”)
Signed-off-by: Greg Inozemtsev <greg@purestorage.com>
---
providers/mlx5/mlx5.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/providers/mlx5/mlx5.c b/providers/mlx5/mlx5.c
index 0a091f5b6b49..551560d561fe 100644
--- a/providers/mlx5/mlx5.c
+++ b/providers/mlx5/mlx5.c
@@ -1334,25 +1334,14 @@ static void mlx5_uninit_context(struct mlx5_context *context)
}
static struct mlx5_context *mlx5_init_context(struct ibv_device *ibdev,
- int cmd_fd,
- void *private_data)
+ int cmd_fd)
{
- struct mlx5dv_context_attr *ctx_attr = private_data;
struct mlx5_device *mdev = to_mdev(ibdev);
struct mlx5_context *context;
int low_lat_uuars;
int tot_uuars;
int ret;
- if (ctx_attr && ctx_attr->comp_mask) {
- errno = EINVAL;
- return NULL;
- }
-
- ret = get_uar_info(mdev, &tot_uuars, &low_lat_uuars);
- if (ret)
- return NULL;
-
context = verbs_init_and_alloc_context(ibdev, cmd_fd, context, ibv_ctx,
RDMA_DRIVER_MLX5);
if (!context)
@@ -1365,6 +1354,12 @@ static struct mlx5_context *mlx5_init_context(struct ibv_device *ibdev,
strcpy(context->hostname, "host_unknown");
mlx5_single_threaded = single_threaded_app();
+
+ ret = get_uar_info(mdev, &tot_uuars, &low_lat_uuars);
+ if (ret) {
+ mlx5_uninit_context(context);
+ return NULL;
+ }
context->tot_uuars = tot_uuars;
context->low_lat_uuars = low_lat_uuars;
@@ -1569,10 +1564,15 @@ static struct verbs_context *mlx5_alloc_context(struct ibv_device *ibdev,
bool always_devx = false;
int ret;
- context = mlx5_init_context(ibdev, cmd_fd, NULL);
+ context = mlx5_init_context(ibdev, cmd_fd);
if (!context)
return NULL;
+ if (ctx_attr && ctx_attr->comp_mask) {
+ errno = EINVAL;
+ goto err;
+ }
+
req.total_num_bfregs = context->tot_uuars;
req.num_low_latency_bfregs = context->low_lat_uuars;
req.max_cqe_version = MLX5_CQE_VERSION_V1;
@@ -1627,7 +1627,7 @@ static struct verbs_context *mlx5_import_context(struct ibv_device *ibdev,
struct mlx5_context *mctx;
int ret;
- mctx = mlx5_init_context(ibdev, cmd_fd, NULL);
+ mctx = mlx5_init_context(ibdev, cmd_fd);
if (!mctx)
return NULL;
--
2.25.4

71
SOURCES/0001-Only-load-i40iw-for-i40e-device-with-specific-PCI-ID.patch Normal file
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@ -0,0 +1,71 @@
From 23408827f9f74062a43041154a78505bc9fa4ed8 Mon Sep 17 00:00:00 2001
From: Honggang Li <honli@redhat.com>
Date: Tue, 3 Nov 2020 20:21:33 +0800
Subject: [PATCH] Only load i40iw for i40e device with specific PCI IDs
This a redhat specific hack to handle i40iw huge memory consuming issue.
rdma-core upstream maintainer believes this issue should be handled in
kernel space with i40e/i40iw driver. Unfortunately, Intel does not care
about this request.
<snip>
Just for the record, why is it a bad idea to use the original udev
rule that contained "kmod load i40iw". Two reasons:
a) for most i40e NICs i40iw is irrelevant and we have the memory issue
that Intel won't fix.
b) if i40iw is loaded you can no longer unload i40e by itself.
$ modprobe i40iw
$ modprobe -r i40e
modprobe: FATAL: Module i40e is in use.
Bad user experience and we may break existing user scripts!
Even worse unloading i40iw unloads i40e implicitly.
Also i40iw is going away upstream at some point.
<snip>
Resolves: bz1850462
Signed-off-by: Honggang Li <honli@redhat.com>
---
kernel-boot/rdma-hw-modules.rules | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/kernel-boot/rdma-hw-modules.rules b/kernel-boot/rdma-hw-modules.rules
index 95eaf7206702..541516eb98f4 100644
--- a/kernel-boot/rdma-hw-modules.rules
+++ b/kernel-boot/rdma-hw-modules.rules
@@ -11,11 +11,29 @@ ENV{ID_NET_DRIVER}=="be2net", RUN{builtin}+="kmod load ocrdma"
ENV{ID_NET_DRIVER}=="bnxt_en", RUN{builtin}+="kmod load bnxt_re"
ENV{ID_NET_DRIVER}=="cxgb4", RUN{builtin}+="kmod load iw_cxgb4"
ENV{ID_NET_DRIVER}=="hns", RUN{builtin}+="kmod load hns_roce"
-ENV{ID_NET_DRIVER}=="i40e", RUN{builtin}+="kmod load i40iw"
ENV{ID_NET_DRIVER}=="mlx4_en", RUN{builtin}+="kmod load mlx4_ib"
ENV{ID_NET_DRIVER}=="mlx5_core", RUN{builtin}+="kmod load mlx5_ib"
ENV{ID_NET_DRIVER}=="qede", RUN{builtin}+="kmod load qedr"
+# Because most of X722 don't support RDMA, only load i40iw for X722 with specific device IDs.
+#define I40E_INTEL_VENDOR_ID 0x8086
+#define I40E_DEV_ID_X722 0x37CC
+#define I40E_DEV_ID_KX_X722 0x37CE
+#define I40E_DEV_ID_QSFP_X722 0x37CF
+#define I40E_DEV_ID_SFP_X722 0x37D0
+#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1
+#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2
+#define I40E_DEV_ID_SFP_I_X722 0x37D3
+#define I40E_DEV_ID_X722_VF 0x37CD
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37cc", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37ce", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37cf", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37d0", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37d1", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37d2", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37d3", RUN{builtin}+="kmod load i40iw"
+ENV{ID_NET_DRIVER}=="i40e", ENV{ID_VENDOR_ID}=="0x8086", ENV{ID_MODEL_ID}=="0x37cd", RUN{builtin}+="kmod load i40iw"
+
# The user must explicitly load these modules via /etc/modules-load.d/ or otherwise
# rxe
--
2.25.4

36
SOURCES/0001-bnxt_re-Fix-reported-error-code-from-create_cq.patch
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@ -1,36 +0,0 @@
From ef1a51192eb44e7f23d3c5b63a80c0b8b6358660 Mon Sep 17 00:00:00 2001
From: Kamal Heib <kamalheib1@gmail.com>
Date: Thu, 14 Jan 2021 12:34:39 +0200
Subject: [PATCH] bnxt_re: Fix reported error code from create_cq
[ Upstream commit 9a1c8f63344c5b7eb911332501d48fd6b14edde1 ]
Report EINVAL when trying to call bnxt_re_create_cq() with number of CQEs
out of the supported range.
Fixes: fa8dce26b88c ("libbnxt_re: Add support for CQ and QP management")
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/bnxt_re/verbs.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/providers/bnxt_re/verbs.c b/providers/bnxt_re/verbs.c
index 03237e7f8103..20902ab5c020 100644
--- a/providers/bnxt_re/verbs.c
+++ b/providers/bnxt_re/verbs.c
@@ -173,8 +173,10 @@ struct ibv_cq *bnxt_re_create_cq(struct ibv_context *ibvctx, int ncqe,
struct bnxt_re_context *cntx = to_bnxt_re_context(ibvctx);
struct bnxt_re_dev *dev = to_bnxt_re_dev(ibvctx->device);
- if (ncqe > dev->max_cq_depth)
+ if (!ncqe || ncqe > dev->max_cq_depth) {
+ errno = EINVAL;
return NULL;
+ }
cq = calloc(1, sizeof(*cq));
if (!cq)
--
2.25.4

36
SOURCES/0001-cxgb4-Fix-reported-error-code-from-create_cq.patch
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@ -1,36 +0,0 @@
From 5dee0eaa3a3c1f6b8e960038384e16ae730d201e Mon Sep 17 00:00:00 2001
From: Kamal Heib <kamalheib1@gmail.com>
Date: Thu, 24 Dec 2020 16:11:16 +0200
Subject: [PATCH] cxgb4: Fix reported error code from create_cq
[ Upstream commit 8f85e04863e379d798c88a68eee5e34341961eff ]
Report EINVAL when trying to call c4iw_create_cq() with number of CQEs
out of the supported range.
Fixes: d6e6ae69be5e ("Add libcxgb4 files.")
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/cxgb4/verbs.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/providers/cxgb4/verbs.c b/providers/cxgb4/verbs.c
index 32bae6906a15..d0e366f0fca4 100644
--- a/providers/cxgb4/verbs.c
+++ b/providers/cxgb4/verbs.c
@@ -171,6 +171,11 @@ struct ibv_cq *c4iw_create_cq(struct ibv_context *context, int cqe,
struct c4iw_dev *dev = to_c4iw_dev(context->device);
int ret;
+ if (!cqe || cqe > T4_MAX_CQ_DEPTH) {
+ errno = EINVAL;
+ return NULL;
+ }
+
chp = calloc(1, sizeof *chp);
if (!chp) {
return NULL;
--
2.25.4

86
SOURCES/0001-efa-Flush-write-combining-writes-before-writing-to-t.patch
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@ -1,86 +0,0 @@
From 4b7203f835727e9314ef42db682b578730783d7d Mon Sep 17 00:00:00 2001
From: Gal Pressman <galpress@amazon.com>
Date: Wed, 11 Nov 2020 14:21:13 +0200
Subject: [PATCH] efa: Flush write combining writes before writing to the LLQ
[ Upstream commit 9a0d3830da11a187fb6bffe4f6f361560a0b2f40 ]
An mmio_wc_start() is needed before writing to the LLQ memory in order
to prevent the WQEs copy (WC memory) from being reordered relative to
other mmio writes, such as tx doorbells (NC memory).
This prevents the provider to issue more than max_tx_batch LLQ writes
between two doorbells. This is especially relevant when the user calls
the _post API with more WQEs than max_tx_batch.
Fixes: 7aad28d11981 ("efa: Respect maximum TX doorbell batch")
Signed-off-by: Shadi Ammouri <sammouri@amazon.com>
Signed-off-by: Gal Pressman <galpress@amazon.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/efa/verbs.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/providers/efa/verbs.c b/providers/efa/verbs.c
index e179ff24e911..e80660d1907f 100644
--- a/providers/efa/verbs.c
+++ b/providers/efa/verbs.c
@@ -1389,7 +1389,6 @@ static inline void efa_rq_ring_doorbell(struct efa_rq *rq, uint16_t pc)
static inline void efa_sq_ring_doorbell(struct efa_sq *sq, uint16_t pc)
{
- mmio_flush_writes();
mmio_write32(sq->wq.db, pc);
}
@@ -1510,15 +1509,19 @@ int efa_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr,
if (curbatch == qp->sq.max_batch_wr) {
curbatch = 0;
+ mmio_flush_writes();
efa_sq_ring_doorbell(&qp->sq, qp->sq.wq.pc);
+ mmio_wc_start();
}
wr = wr->next;
}
ring_db:
- if (curbatch)
+ if (curbatch) {
+ mmio_flush_writes();
efa_sq_ring_doorbell(&qp->sq, qp->sq.wq.pc);
+ }
/*
* Not using mmio_wc_spinunlock as the doorbell write should be done
@@ -1774,6 +1777,7 @@ static int efa_send_wr_complete(struct ibv_qp_ex *ibvqpx)
pc = qp->sq.wq.pc - qp->sq.num_wqe_pending;
sq_desc_idx = pc & qp->sq.wq.desc_mask;
+ /* mmio_wc_start() comes from efa_send_wr_start() */
while (qp->sq.num_wqe_pending) {
num_wqe_to_copy = min3(qp->sq.num_wqe_pending,
qp->sq.wq.wqe_cnt - sq_desc_idx,
@@ -1792,13 +1796,17 @@ static int efa_send_wr_complete(struct ibv_qp_ex *ibvqpx)
qp->sq.wq.desc_mask;
if (curbatch == max_txbatch) {
+ mmio_flush_writes();
efa_sq_ring_doorbell(&qp->sq, pc);
curbatch = 0;
+ mmio_wc_start();
}
}
- if (curbatch)
+ if (curbatch) {
+ mmio_flush_writes();
efa_sq_ring_doorbell(&qp->sq, qp->sq.wq.pc);
+ }
out:
/*
* Not using mmio_wc_spinunlock as the doorbell write should be done
--
2.25.4

78
SOURCES/0001-infiniband-diags-specify-the-HCA-name-and-Port-numbe.patch
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@ -1,78 +0,0 @@
From a2c4768ff2f0516791b80640894c5abd4eab14bf Mon Sep 17 00:00:00 2001
From: Honggang Li <honli@redhat.com>
Date: Tue, 27 Oct 2020 17:06:43 +0800
Subject: [PATCH] infiniband-diags: specify the HCA name and Port number when
run ibportstate
A host, from which execute the enable/disable/reset command, may be
connected to multiple InfiniBand fabrics. When the HCA name and
Port number were not specified, the libibumad library will pick up the
first active port it was found, which may not be wanted. Recommend to
specific the HCA name and Port number when run ibportstate.
On the other hand, HCA port may be locally changed without the
knowledge of the Subnet Manager. When locally enable a disabled HCA
port, the HCA name and Port number must be specified.
Signed-off-by: Honggang Li <honli@redhat.com>
---
infiniband-diags/ibportstate.c | 4 ++--
infiniband-diags/man/ibportstate.8.in.rst | 13 +++++++------
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/infiniband-diags/ibportstate.c b/infiniband-diags/ibportstate.c
index 17d1e1503834..7f3afb83bdb3 100644
--- a/infiniband-diags/ibportstate.c
+++ b/infiniband-diags/ibportstate.c
@@ -401,8 +401,8 @@ int main(int argc, char **argv)
"\twidth, query, down, arm, active, vls, mtu, lid, smlid, lmc,\n"
"\tmkey, mkeylease, mkeyprot\n";
const char *usage_examples[] = {
- "3 1 disable\t\t\t# by lid",
- "-G 0x2C9000100D051 1 enable\t# by guid",
+ "-C qib0 -P 1 3 1 disable # by CA name, CA Port Number, lid, physical port number",
+ "-C qib0 -P 1 3 1 enable # by CA name, CA Port Number, lid, physical port number",
"-D 0 1\t\t\t# (query) by direct route",
"3 1 reset\t\t\t# by lid",
"3 1 speed 1\t\t\t# by lid",
diff --git a/infiniband-diags/man/ibportstate.8.in.rst b/infiniband-diags/man/ibportstate.8.in.rst
index da1de4c76317..309a3d191c51 100644
--- a/infiniband-diags/man/ibportstate.8.in.rst
+++ b/infiniband-diags/man/ibportstate.8.in.rst
@@ -22,8 +22,9 @@ DESCRIPTION
ibportstate allows the port state and port physical state of an IB port
to be queried (in addition to link width and speed being validated
relative to the peer port when the port queried is a switch port),
-or a switch port to be disabled, enabled, or reset. It
-also allows the link speed/width enabled on any IB port to be adjusted.
+or a switch port to be disabled, enabled, or reset. InfiniBand HCA port
+state may be changed locally without the knowledge of the Subnet Manager.
+It also allows the link speed/width enabled on any IB port to be adjusted.
OPTIONS
=======
@@ -34,8 +35,8 @@ OPTIONS
mkey, mkeylease, mkeyprot
(Default is query)
- **enable, disable, and reset** are only allowed on switch ports (An
- error is indicated if attempted on CA or router ports)
+ **enable, disable, and reset** change or reset a switch or HCA port state
+ (You must specify the CA name and Port number when locally change CA port state.)
**off** change the port state to disable.
@@ -114,8 +115,8 @@ EXAMPLES
========
::
- ibportstate 3 1 disable # by lid
- ibportstate -G 0x2C9000100D051 1 enable # by guid
+ ibportstate -C qib0 -P 1 3 1 disable # by CA name, CA Port Number, lid, physical port number
+ ibportstate -C qib0 -P 1 3 1 enable # by CA name, CA Port Number, lid, physical port number
ibportstate -D 0 1 # (query) by direct route
ibportstate 3 1 reset # by lid
ibportstate 3 1 speed 1 # by lid
--
2.25.4

34
SOURCES/0001-libqedr-Fix-reported-error-code-from-create_cq.patch
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@ -1,34 +0,0 @@
From da998d0d6eb8ca6fbe7848cf4c0808797ab9c882 Mon Sep 17 00:00:00 2001
From: Kamal Heib <kamalheib1@gmail.com>
Date: Wed, 23 Dec 2020 18:49:52 +0200
Subject: [PATCH] libqedr: Fix reported error code from create_cq
[ Upstream commit e8b5a1d673f1eb2d93fb9fe09759fa03a6cf8aad ]
Report EINVAL when trying to call qelr_create_cq() with number of CQEs
bigger than the supported max_cqes, also fix the printed range.
Fixes: c0965e4fe6fe ("libqedr (qelr) verbs")
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/qedr/qelr_verbs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/providers/qedr/qelr_verbs.c b/providers/qedr/qelr_verbs.c
index e75d508f100b..631c9f844a95 100644
--- a/providers/qedr/qelr_verbs.c
+++ b/providers/qedr/qelr_verbs.c
@@ -231,7 +231,8 @@ struct ibv_cq *qelr_create_cq(struct ibv_context *context, int cqe,
if (!cqe || cqe > cxt->max_cqes) {
DP_ERR(cxt->dbg_fp,
"create cq: failed. attempted to allocate %d cqes but valid range is 1...%d\n",
- cqe, cqe > cxt->max_cqes);
+ cqe, cxt->max_cqes);
+ errno = EINVAL;
return NULL;
}
--
2.25.4

75
SOURCES/0001-libqedr-Set-XRC-functions-only-in-RoCE-mode.patch
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@ -1,75 +0,0 @@
From fd10f4c26b1ff052ea3b893247d1b6d06d01e36a Mon Sep 17 00:00:00 2001
From: Kamal Heib <kamalheib1@gmail.com>
Date: Tue, 10 Nov 2020 16:59:59 +0200
Subject: [PATCH] libqedr: Set XRC functions only in RoCE mode
As libqedr support both RoCE and iWarp, make sure to set the XRC
functions only in RoCE mode, also change the assignment of the XRC
functions to use verbs_set_ops().
Fixes: cae4a99ae679 ("libqedr: add support for XRC-SRQ's.")
Signed-off-by: Kamal Heib <kamalheib1@gmail.com>
---
providers/qedr/qelr_main.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/providers/qedr/qelr_main.c b/providers/qedr/qelr_main.c
index bdfaa930f0c6..e31cd452906f 100644
--- a/providers/qedr/qelr_main.c
+++ b/providers/qedr/qelr_main.c
@@ -113,6 +113,14 @@ static const struct verbs_context_ops qelr_ctx_ops = {
.free_context = qelr_free_context,
};
+static const struct verbs_context_ops qelr_ctx_roce_ops = {
+ .close_xrcd = qelr_close_xrcd,
+ .create_qp_ex = qelr_create_qp_ex,
+ .create_srq_ex = qelr_create_srq_ex,
+ .get_srq_num = qelr_get_srq_num,
+ .open_xrcd = qelr_open_xrcd,
+};
+
static void qelr_uninit_device(struct verbs_device *verbs_device)
{
struct qelr_device *dev = get_qelr_dev(&verbs_device->device);
@@ -171,7 +179,6 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
int cmd_fd,
void *private_data)
{
- struct verbs_context *v_ctx;
struct qelr_devctx *ctx;
struct qelr_alloc_context cmd = {};
struct qelr_alloc_context_resp resp;
@@ -181,7 +188,6 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
if (!ctx)
return NULL;
- v_ctx = &ctx->ibv_ctx;
memset(&resp, 0, sizeof(resp));
qelr_open_debug_file(ctx);
@@ -194,6 +200,8 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
goto cmd_err;
verbs_set_ops(&ctx->ibv_ctx, &qelr_ctx_ops);
+ if (IS_ROCE(ibdev))
+ verbs_set_ops(&ctx->ibv_ctx, &qelr_ctx_roce_ops);
ctx->srq_table = calloc(QELR_MAX_SRQ_ID, sizeof(*ctx->srq_table));
if (!ctx->srq_table) {
@@ -252,12 +260,6 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
goto cmd_err;
}
- v_ctx->create_qp_ex = qelr_create_qp_ex;
- v_ctx->open_xrcd = qelr_open_xrcd;
- v_ctx->close_xrcd = qelr_close_xrcd;
- v_ctx->create_srq_ex = qelr_create_srq_ex;
- v_ctx->get_srq_num = qelr_get_srq_num;
-
return &ctx->ibv_ctx;
cmd_err:
--
2.25.4

52
SOURCES/0001-librdmacm-Don-t-overwrite-errno-returned-from-libibv.patch
View File

@ -1,52 +0,0 @@
From ea4c14b07e9856cdbb70fc09771ae9373d39391c Mon Sep 17 00:00:00 2001
From: Xiao Yang <yangx.jy@cn.fujitsu.com>
Date: Wed, 16 Dec 2020 17:22:52 +0800
Subject: [PATCH] librdmacm: Don't overwrite errno returned from libibverbs
[ Upstream commit 11bf28021e62235f312e3132013e3736e4e835e0 ]
Some functions reports fixed ENOMEM when getting any failure, so
it's hard for user to know which actual error happens on them.
Fixes: 663098bfc3ac ("Rename librdmacm")
Signed-off-by: Xiao Yang <yangx.jy@cn.fujitsu.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
librdmacm/cma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/librdmacm/cma.c b/librdmacm/cma.c
index 6e3956558471..2e7d019a3f7f 100644
--- a/librdmacm/cma.c
+++ b/librdmacm/cma.c
@@ -635,7 +635,7 @@ static int ucma_get_device(struct cma_id_private *id_priv, __be64 guid,
if (!cma_dev->pd)
cma_dev->pd = ibv_alloc_pd(cma_dev->verbs);
if (!cma_dev->pd) {
- ret = ERR(ENOMEM);
+ ret = -1;
goto out;
}
@@ -1490,7 +1490,7 @@ static int ucma_create_cqs(struct rdma_cm_id *id, uint32_t send_size, uint32_t r
return 0;
err:
ucma_destroy_cqs(id);
- return ERR(ENOMEM);
+ return -1;
}
int rdma_create_srq_ex(struct rdma_cm_id *id, struct ibv_srq_init_attr_ex *attr)
@@ -1662,7 +1662,7 @@ int rdma_create_qp_ex(struct rdma_cm_id *id,
attr->srq = id->srq;
qp = ibv_create_qp_ex(id->verbs, attr);
if (!qp) {
- ret = ERR(ENOMEM);
+ ret = -1;
goto err1;
}
--
2.25.4

33
SOURCES/0001-mlx5-Consider-single-threaded-mode-for-shared-UAR.patch
View File

@ -1,33 +0,0 @@
From 0d9ed0f09b92f730ae3a755415c4e68e62c4cf99 Mon Sep 17 00:00:00 2001
From: Yishai Hadas <yishaih@nvidia.com>
Date: Wed, 9 Dec 2020 09:15:39 +0200
Subject: [PATCH] mlx5: Consider single threaded mode for shared UAR
[ Upstream commit 9d6cbd2858d237d1d56bada430eca032074204c8 ]
In case application uses a single threaded mode even a UAR that is
shared between QPs doesn't need to take a lock.
Fixes: 7fdcd258bc5f ("mlx5: Move to fully dynamic UAR mode including QPs")
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/mlx5/verbs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/providers/mlx5/verbs.c b/providers/mlx5/verbs.c
index 7907218295f6..cc93dc4c366e 100644
--- a/providers/mlx5/verbs.c
+++ b/providers/mlx5/verbs.c
@@ -326,7 +326,7 @@ static void mlx5_insert_dyn_uuars(struct mlx5_context *ctx,
if (!bf_uar->dyn_alloc_uar)
bf->bfreg_dyn_index = (ctx->curr_legacy_dyn_sys_uar_page - 1) * num_bfregs_per_page + j;
bf->dyn_alloc_uar = bf_uar->dyn_alloc_uar;
- bf->need_lock = bf_uar->qp_shared;
+ bf->need_lock = bf_uar->qp_shared && !mlx5_single_threaded;
mlx5_spinlock_init(&bf->lock, bf->need_lock);
if (j != 0) {
bf->uar = bf_uar->uar;
--
2.25.4

75
SOURCES/0001-mlx5-DR-Avoid-ICM-depletion-on-multiple-domains.patch
View File

@ -1,75 +0,0 @@
From dadee6df65387ba0fea0d78cc9c99af0350d3c37 Mon Sep 17 00:00:00 2001
From: Alex Vesker <valex@nvidia.com>
Date: Tue, 8 Dec 2020 18:41:02 +0200
Subject: [PATCH] mlx5: DR, Avoid ICM depletion on multiple domains
[ Upstream commit 951fdedd1ad580a0281e9bca22477942f5256c69 ]
When running multiple domains on the same PF, large ICM allocation can
deplete all of the resource and lead to failures on other domains, this
was seen on ConnectX6DX devices with limited size of action ICM (modify
header).
The solution is take into consideration the total available resource
size.
Fixes: c86f095752f2 ("mlx5: DR, Increase ICM action memory allocation size up-to 8MB")
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/mlx5/dr_domain.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/providers/mlx5/dr_domain.c b/providers/mlx5/dr_domain.c
index 0a4b565ef85b..1a999965cb9b 100644
--- a/providers/mlx5/dr_domain.c
+++ b/providers/mlx5/dr_domain.c
@@ -283,24 +283,38 @@ static void dr_domain_caps_uninit(struct mlx5dv_dr_domain *dmn)
static int dr_domain_check_icm_memory_caps(struct mlx5dv_dr_domain *dmn)
{
+ uint32_t max_req_bytes_log, max_req_chunks_log;
+
+ /* Check for minimum ICM log byte size requirements */
if (dmn->info.caps.log_modify_hdr_icm_size < DR_CHUNK_SIZE_4K +
DR_MODIFY_ACTION_LOG_SIZE) {
errno = ENOMEM;
return errno;
}
- dmn->info.max_log_action_icm_sz = min_t(uint32_t,
- DR_CHUNK_SIZE_1024K,
- dmn->info.caps.log_modify_hdr_icm_size
- - DR_MODIFY_ACTION_LOG_SIZE);
-
if (dmn->info.caps.log_icm_size < DR_CHUNK_SIZE_1024K +
DR_STE_LOG_SIZE) {
errno = ENOMEM;
return errno;
}
- dmn->info.max_log_sw_icm_sz = DR_CHUNK_SIZE_1024K;
+ /* Current code tries to use large allocations to improve our internal
+ * memory allocation (less DMs and less FW calls).
+ * When creating multiple domains on the same PF, we want to make sure
+ * we don't deplete all of the ICM resources on a single domain.
+ * To provide some functionality with a limited resource we will use
+ * up to 1/8 of the total available size allowing opening a domain
+ * of each type.
+ */
+ max_req_bytes_log = dmn->info.caps.log_modify_hdr_icm_size - 3;
+ max_req_chunks_log = max_req_bytes_log - DR_MODIFY_ACTION_LOG_SIZE;
+ dmn->info.max_log_action_icm_sz =
+ min_t(uint32_t, DR_CHUNK_SIZE_1024K, max_req_chunks_log);
+
+ max_req_bytes_log = dmn->info.caps.log_icm_size - 3;
+ max_req_chunks_log = max_req_bytes_log - DR_STE_LOG_SIZE;
+ dmn->info.max_log_sw_icm_sz =
+ min_t(uint32_t, DR_CHUNK_SIZE_1024K, max_req_chunks_log);
return 0;
}
--
2.25.4

41
SOURCES/0001-mlx5-DR-Create-NC-UAR-as-default-but-fall-back-to-WC.patch
View File

@ -1,41 +0,0 @@
From 297cc2c6323514a69b57aeeb5207cf63e5e2549b Mon Sep 17 00:00:00 2001
From: Bodong Wang <bodong@nvidia.com>
Date: Tue, 27 Oct 2020 08:59:02 -0500
Subject: [PATCH] mlx5: DR, Create NC UAR as default but fall-back to WC if
failed
[ Upstream commit 40b8e48792a423da1ceeaf58ac8eee81e9e0194a ]
Some devices may only support either NC or WC UAR. To handle such
devices, first try to create NC, then try WC if NC failed.
Fixes: 84ac5272a05a ("mlx5: Enhance mlx5dv_devx_alloc_uar() functionality")
Signed-off-by: Bodong Wang <bodong@nvidia.com>
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/mlx5/dr_domain.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/providers/mlx5/dr_domain.c b/providers/mlx5/dr_domain.c
index b47c5841f624..5b8739dca2ef 100644
--- a/providers/mlx5/dr_domain.c
+++ b/providers/mlx5/dr_domain.c
@@ -50,7 +50,13 @@ static int dr_domain_init_resources(struct mlx5dv_dr_domain *dmn)
return ret;
}
- dmn->uar = mlx5dv_devx_alloc_uar(dmn->ctx, 0);
+ dmn->uar = mlx5dv_devx_alloc_uar(dmn->ctx,
+ MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC);
+
+ if (!dmn->uar)
+ dmn->uar = mlx5dv_devx_alloc_uar(dmn->ctx,
+ MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF);
+
if (!dmn->uar) {
dr_dbg(dmn, "Can't allocate UAR\n");
goto clean_pd;
--
2.25.4

176
SOURCES/0001-mlx5-DR-Fix-incorrect-use-of-fl_roce_enabled-capabil.patch
View File

@ -1,176 +0,0 @@
From 2432a74c845b7b529cb6e9044140b9445922a7ae Mon Sep 17 00:00:00 2001
From: Alex Vesker <valex@nvidia.com>
Date: Wed, 28 Oct 2020 12:26:32 +0200
Subject: [PATCH] mlx5: DR, Fix incorrect use of fl_roce_enabled capability
[ Upstream commit 2337d6790ad21b1d0c5373cf2aa6f8e70a510434 ]
Creating a FL QP should be allowed only when RoCE is enabled (roce_en)
and FL is supported with RoCE enabled. Previously we relied on the
general HCA cap whether RoCE is enabled and ignored its real state.
Creating a FL QP even if RoCE is disabled which could results in a
failure to modify QP.
Fixes: 6724f6530d3e ("mlx5: DR, Query RoCE capabilities")
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/mlx5/dr_devx.c | 24 ++++++++++++++++++++++++
providers/mlx5/dr_domain.c | 2 +-
providers/mlx5/dr_send.c | 8 +++++++-
providers/mlx5/mlx5_ifc.h | 29 +++++++++++++++++++++++++++++
providers/mlx5/mlx5dv_dr.h | 2 ++
5 files changed, 63 insertions(+), 2 deletions(-)
diff --git a/providers/mlx5/dr_devx.c b/providers/mlx5/dr_devx.c
index cd0f8bbc2e44..74a8155b8777 100644
--- a/providers/mlx5/dr_devx.c
+++ b/providers/mlx5/dr_devx.c
@@ -66,6 +66,26 @@ int dr_devx_query_esw_vport_context(struct ibv_context *ctx,
return 0;
}
+static int dr_devx_query_nic_vport_context(struct ibv_context *ctx,
+ bool *roce_en)
+{
+ uint32_t out[DEVX_ST_SZ_DW(query_nic_vport_context_out)] = {};
+ uint32_t in[DEVX_ST_SZ_DW(query_nic_vport_context_in)] = {};
+ int err;
+
+ DEVX_SET(query_nic_vport_context_in, in, opcode,
+ MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
+ err = mlx5dv_devx_general_cmd(ctx, in, sizeof(in), out, sizeof(out));
+ if (err) {
+ dr_dbg_ctx(ctx, "Query nic vport context failed %d\n", err);
+ return err;
+ }
+
+ *roce_en = DEVX_GET(query_nic_vport_context_out, out,
+ nic_vport_context.roce_en);
+ return 0;
+}
+
int dr_devx_query_gvmi(struct ibv_context *ctx, bool other_vport,
uint16_t vport_number, uint16_t *gvmi)
{
@@ -225,6 +245,10 @@ int dr_devx_query_device(struct ibv_context *ctx, struct dr_devx_caps *caps)
/* RoCE caps */
if (roce) {
+ err = dr_devx_query_nic_vport_context(ctx, &caps->roce_caps.roce_en);
+ if (err)
+ return err;
+
DEVX_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
DEVX_SET(query_hca_cap_in, in, op_mod,
MLX5_SET_HCA_CAP_OP_MOD_ROCE |
diff --git a/providers/mlx5/dr_domain.c b/providers/mlx5/dr_domain.c
index 916283e505aa..b47c5841f624 100644
--- a/providers/mlx5/dr_domain.c
+++ b/providers/mlx5/dr_domain.c
@@ -199,7 +199,7 @@ static int dr_domain_caps_init(struct ibv_context *ctx,
* force-loopback.
*/
if ((dmn->type != MLX5DV_DR_DOMAIN_TYPE_FDB) &&
- !dmn->info.caps.roce_caps.fl_rc_qp_when_roce_enabled)
+ !dr_send_allow_fl(&dmn->info.caps))
return 0;
ret = dr_domain_query_fdb_caps(ctx, dmn);
diff --git a/providers/mlx5/dr_send.c b/providers/mlx5/dr_send.c
index dfda549d7f01..67ab1c7eb40f 100644
--- a/providers/mlx5/dr_send.c
+++ b/providers/mlx5/dr_send.c
@@ -820,6 +820,12 @@ int dr_send_postsend_action(struct mlx5dv_dr_domain *dmn,
return ret;
}
+bool dr_send_allow_fl(struct dr_devx_caps *caps)
+{
+ return (caps->roce_caps.roce_en &&
+ caps->roce_caps.fl_rc_qp_when_roce_enabled);
+}
+
static int dr_prepare_qp_to_rts(struct mlx5dv_dr_domain *dmn)
{
struct dr_devx_qp_rts_attr rts_attr = {};
@@ -844,7 +850,7 @@ static int dr_prepare_qp_to_rts(struct mlx5dv_dr_domain *dmn)
rtr_attr.port_num = port;
/* Enable force-loopback on the QP */
- if (dmn->info.caps.roce_caps.fl_rc_qp_when_roce_enabled) {
+ if (dr_send_allow_fl(&dmn->info.caps)) {
rtr_attr.fl = true;
} else {
ret = dr_devx_query_gid(dmn->ctx, port, gid_index, &rtr_attr.dgid_attr);
diff --git a/providers/mlx5/mlx5_ifc.h b/providers/mlx5/mlx5_ifc.h
index 815207a435a8..58b7da23b3aa 100644
--- a/providers/mlx5/mlx5_ifc.h
+++ b/providers/mlx5/mlx5_ifc.h
@@ -49,6 +49,7 @@ enum {
MLX5_CMD_OP_RTS2RTS_QP = 0x505,
MLX5_CMD_OP_QUERY_QP = 0x50b,
MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
+ MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
MLX5_CMD_OP_QUERY_LAG = 0x842,
MLX5_CMD_OP_CREATE_TIR = 0x900,
@@ -1963,6 +1964,34 @@ struct mlx5_ifc_query_esw_vport_context_in_bits {
u8 reserved_at_60[0x20];
};
+struct mlx5_ifc_nic_vport_context_bits {
+ u8 reserved_at_0[0x1f];
+ u8 roce_en[0x1];
+
+ u8 reserved_at_20[0x7e0];
+};
+
+struct mlx5_ifc_query_nic_vport_context_out_bits {
+ u8 status[0x8];
+ u8 reserved_at_8[0x18];
+
+ u8 syndrome[0x20];
+
+ u8 reserved_at_40[0x40];
+
+ struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
+};
+
+struct mlx5_ifc_query_nic_vport_context_in_bits {
+ u8 opcode[0x10];
+ u8 reserved_at_10[0x10];
+
+ u8 reserved_at_20[0x10];
+ u8 op_mod[0x10];
+
+ u8 reserved_at_40[0x40];
+};
+
enum {
MLX5_QPC_ST_RC = 0x0,
};
diff --git a/providers/mlx5/mlx5dv_dr.h b/providers/mlx5/mlx5dv_dr.h
index 22e99eef4f32..a130211c15f5 100644
--- a/providers/mlx5/mlx5dv_dr.h
+++ b/providers/mlx5/mlx5dv_dr.h
@@ -582,6 +582,7 @@ struct dr_devx_vport_cap {
};
struct dr_devx_roce_cap {
+ bool roce_en;
bool fl_rc_qp_when_roce_enabled;
};
@@ -1032,6 +1033,7 @@ struct dr_send_ring {
int dr_send_ring_alloc(struct mlx5dv_dr_domain *dmn);
void dr_send_ring_free(struct dr_send_ring *send_ring);
int dr_send_ring_force_drain(struct mlx5dv_dr_domain *dmn);
+bool dr_send_allow_fl(struct dr_devx_caps *caps);
int dr_send_postsend_ste(struct mlx5dv_dr_domain *dmn, struct dr_ste *ste,
uint8_t *data, uint16_t size, uint16_t offset);
int dr_send_postsend_htbl(struct mlx5dv_dr_domain *dmn, struct dr_ste_htbl *htbl,
--
2.25.4

38
SOURCES/0001-mlx5-Fix-wqe-size-parameter-in-wqe-signature-calcula.patch
View File

@ -1,38 +0,0 @@
From e99103602f477c84f31b79779f7544d6e1704593 Mon Sep 17 00:00:00 2001
From: Michael Guralnik <michaelgur@nvidia.com>
Date: Mon, 19 Oct 2020 09:00:56 +0300
Subject: [PATCH] mlx5: Fix wqe size parameter in wqe signature calculation
[ Upstream commit 8cde184624d192f7cd61247eec92a3a9b4ba7c7f ]
WQE signature calculation requires passing the size of the WQE as a
parameter.
Current code passes the qpn_ds field as the WQE size which is wrong.
Fixing to extract from the qpn_ds the WQE size in bytes and use it for
the signature calculations.
Fixes: 8c4791ae2395 ("libmlx5: First version of libmlx5")
Signed-off-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/mlx5/qp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/providers/mlx5/qp.c b/providers/mlx5/qp.c
index 077346d63137..13d7bcccc39d 100644
--- a/providers/mlx5/qp.c
+++ b/providers/mlx5/qp.c
@@ -368,7 +368,7 @@ static int set_data_inl_seg(struct mlx5_qp *qp, struct ibv_send_wr *wr,
static uint8_t wq_sig(struct mlx5_wqe_ctrl_seg *ctrl)
{
- return calc_sig(ctrl, be32toh(ctrl->qpn_ds));
+ return calc_sig(ctrl, (be32toh(ctrl->qpn_ds) & 0x3f) << 4);
}
#ifdef MLX5_DEBUG
--
2.25.4

57
SOURCES/0001-pyverbs-Add-mlx5dv-CQ-support.patch
View File

@ -1,57 +0,0 @@
From 4707d4b89fcdab09d568a823ddf521f835a47fe9 Mon Sep 17 00:00:00 2001
From: Ido Kalir <idok@mellanox.com>
Date: Thu, 6 Aug 2020 14:44:31 +0300
Subject: [PATCH] pyverbs: Add mlx5dv CQ support
Support the creation of QPInitAttr and QPInitAttrEx with a DV CQ
instance.
Signed-off-by: Ido Kalir <idok@mellanox.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
---
pyverbs/qp.pyx | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/pyverbs/qp.pyx b/pyverbs/qp.pyx
index 24dfc667227a..09d1c55af835 100644
--- a/pyverbs/qp.pyx
+++ b/pyverbs/qp.pyx
@@ -119,7 +119,7 @@ cdef class QPInitAttr(PyverbsObject):
if scq is not None:
if type(scq) is CQ:
self.attr.send_cq = (<CQ>scq).cq
- elif type(scq) is CQEX:
+ elif isinstance(scq, CQEX):
self.attr.send_cq = (<CQEX>scq).ibv_cq
else:
raise PyverbsUserError('Expected CQ/CQEX, got {t}'.\
@@ -129,7 +129,7 @@ cdef class QPInitAttr(PyverbsObject):
if rcq is not None:
if type(rcq) is CQ:
self.attr.recv_cq = (<CQ>rcq).cq
- elif type(rcq) is CQEX:
+ elif isinstance(rcq, CQEX):
self.attr.recv_cq = (<CQEX>rcq).ibv_cq
else:
raise PyverbsUserError('Expected CQ/CQEX, got {t}'.\
@@ -282,7 +282,7 @@ cdef class QPInitAttrEx(PyverbsObject):
if scq is not None:
if type(scq) is CQ:
self.attr.send_cq = (<CQ>scq).cq
- elif type(scq) is CQEX:
+ elif isinstance(scq, CQEX):
self.attr.send_cq = (<CQEX>scq).ibv_cq
else:
raise PyverbsUserError('Expected CQ/CQEX, got {t}'.\
@@ -292,7 +292,7 @@ cdef class QPInitAttrEx(PyverbsObject):
if rcq is not None:
if type(rcq) is CQ:
self.attr.recv_cq = (<CQ>rcq).cq
- elif type(rcq) is CQEX:
+ elif isinstance(rcq, CQEX):
self.attr.recv_cq = (<CQEX>rcq).ibv_cq
else:
raise PyverbsUserError('Expected CQ/CQEX, got {t}'.\
--
2.25.4

41
SOURCES/0001-qedr-fix-USE_AFTER_FREE-issue.patch
View File

@ -1,41 +0,0 @@
From 9f25aebffc4f6d4d9b7ccf3e1ba911b997fb9ab4 Mon Sep 17 00:00:00 2001
From: Honggang Li <honli@redhat.com>
Date: Sun, 15 Nov 2020 17:53:47 +0800
Subject: [PATCH] qedr: fix USE_AFTER_FREE issue
[ Upstream commit 56137398dbd58f876cb6238da9babb9500ac38b4 ]
Issue was detected by Coverity.
Error: USE_AFTER_FREE (CWE-416): [#def10]
rdma-core-33.0/providers/qedr/qelr_verbs.c:2678: freed_arg: "free" frees "srq".
rdma-core-33.0/providers/qedr/qelr_verbs.c:2680: pass_freed_arg: Passing freed pointer "srq" as an argument to "fprintf".
|# 2678| free(srq);
|# 2679| err0:
|# 2680|-> DP_ERR(cxt->dbg_fp,
|# 2681| "create srq: failed to create %p. rc=%d\n", srq, rc);
|# 2682| return NULL;
Fixes: cae4a99ae679 ("libqedr: add support for XRC-SRQ's.")
Signed-off-by: Honggang Li <honli@redhat.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
providers/qedr/qelr_verbs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/providers/qedr/qelr_verbs.c b/providers/qedr/qelr_verbs.c
index 4e77a1976a91..e75d508f100b 100644
--- a/providers/qedr/qelr_verbs.c
+++ b/providers/qedr/qelr_verbs.c
@@ -2678,7 +2678,7 @@ err1:
free(srq);
err0:
DP_ERR(cxt->dbg_fp,
- "create srq: failed to create %p. rc=%d\n", srq, rc);
+ "create srq: failed to create. rc=%d\n", rc);
return NULL;
}
--
2.25.4

34
SOURCES/0001-rdma_server-Add-s-option-in-rdma_server-s-manual.patch
View File

@ -1,34 +0,0 @@
From d83d397af58977f9c8af3fecff6e86ce76634e4b Mon Sep 17 00:00:00 2001
From: Xiao Yang <yangx.jy@cn.fujitsu.com>
Date: Fri, 11 Dec 2020 14:59:10 +0800
Subject: [PATCH] rdma_server: Add '-s' option in rdma_server's manual
[ Upstream commit e0ec9a5204eaefeddb35de580d610e066d6a9022 ]
Fixes: 519d8d7aa965 ("librdmacm: Add command line option to specify server")
Fixes: cdea72a1e7e6 ("librdmacm: Change server default address to any address.")
Signed-off-by: Xiao Yang <yangx.jy@cn.fujitsu.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
librdmacm/man/rdma_server.1 | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/librdmacm/man/rdma_server.1 b/librdmacm/man/rdma_server.1
index ada2564983f3..f83633e0b195 100644
--- a/librdmacm/man/rdma_server.1
+++ b/librdmacm/man/rdma_server.1
@@ -13,6 +13,10 @@ two nodes. This example is intended to provide a very simple coding
example of how to use RDMA.
.SH "OPTIONS"
.TP
+\-s server_address
+Specifies the address that the rdma_server listens on. By default the
+server listens on any address(0.0.0.0).
+.TP
\-p port
Changes the port number that the server listens on. By default the server
listens on port 7471.
--
2.25.4

34
SOURCES/0001-srp_daemon-Fix-systemd-dependency.patch
View File

@ -1,34 +0,0 @@
From d3122072034c574cadbd74df60bfe6c2464a9924 Mon Sep 17 00:00:00 2001
From: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
Date: Mon, 11 Jan 2021 10:51:01 +0100
Subject: [PATCH] srp_daemon: Fix systemd dependency
[ Upstream commit 460f4368ece1652bcf9c4d282e331e9422c02841 ]
remote-fs-pre.target is a passive target that is not loaded without someone
actively requiring it. Even is remote-fs.target is active.
This means that srp_daemon will not get started at boot
unless another service explicitely requires remote-fs-pre.target.
This solves the issue by having the srp_daemon service wanted by
the multi-user.target.
Fixes: 1c7fe513e3e9 (srp_daemon: One systemd service per port)
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
srp_daemon/srp_daemon.service.in | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/srp_daemon/srp_daemon.service.in b/srp_daemon/srp_daemon.service.in
index 188b7e1a3712..bdd70db566af 100644
--- a/srp_daemon/srp_daemon.service.in
+++ b/srp_daemon/srp_daemon.service.in
@@ -16,4 +16,4 @@ ProtectKernelModules=yes
RestrictRealtime=yes
[Install]
-WantedBy=remote-fs-pre.target
+WantedBy=multi-user.target
--
2.25.4

358
SOURCES/0001-tests-Add-mlx5-CQ-tests.patch
View File

@ -1,358 +0,0 @@
From 8aae7abe241c81ef7d461940d7bb7f2973172b99 Mon Sep 17 00:00:00 2001
From: Ido Kalir <idok@mellanox.com>
Date: Tue, 18 Aug 2020 16:03:05 +0300
Subject: [PATCH] tests: Add mlx5 CQ tests
Add tests for mlx5dv CQ, including traffic and some bad creation flows.
Signed-off-by: Ido Kalir <idok@mellanox.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
---
tests/CMakeLists.txt | 1 +
tests/base.py | 28 ++++-
tests/mlx5_base.py | 6 +-
tests/test_mlx5_cq.py | 237 ++++++++++++++++++++++++++++++++++++++++++
4 files changed, 269 insertions(+), 3 deletions(-)
create mode 100644 tests/test_mlx5_cq.py
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index 4de98d08a81e..ce3b5ef25b81 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -14,6 +14,7 @@ rdma_python_test(tests
test_cqex.py
test_device.py
test_efadv.py
+ test_mlx5_cq.py
test_mlx5_dc.py
test_mlx5_lag_affinity.py
test_mlx5_pp.py
diff --git a/tests/base.py b/tests/base.py
index 3eb5f5db9648..1ca52f0ce5bf 100644
--- a/tests/base.py
+++ b/tests/base.py
@@ -104,6 +104,29 @@ class RDMATestCase(unittest.TestCase):
self.gid_index = gid_index
self.pkey_index = pkey_index
self.ip_addr = None
+ self.pre_environment = {}
+
+ def set_env_variable(self, var, value):
+ """
+ Set environment variable. The current value for each variable is stored
+ and is set back at the end of the test.
+ :param var: The name of the environment variable
+ :param value: The requested new value of this environment variable
+ """
+ if var not in self.pre_environment.keys():
+ self.pre_environment[var] = os.environ.get(var)
+ os.environ[var] = value
+
+ def tearDown(self):
+ """
+ Restore the previous environment variables values before ending the test.
+ """
+ for k, v in self.pre_environment.items():
+ if v is None:
+ os.environ.pop(k)
+ else:
+ os.environ[k] = v
+ super().tearDown()
def is_eth_and_has_roce_hw_bug(self):
"""
@@ -256,7 +279,7 @@ class TrafficResources(BaseResources):
needed for traffic.
"""
def __init__(self, dev_name, ib_port, gid_index, with_srq=False,
- qp_count=1):
+ qp_count=1, msg_size=1024):
"""
Initializes a TrafficResources object with the given values and creates
basic RDMA resources.
@@ -265,11 +288,12 @@ class TrafficResources(BaseResources):
:param gid_index: Which GID index to use
:param with_srq: If True, create SRQ and attach to QPs
:param qp_count: Number of QPs to create
+ :param msg_size: Size of resource msg. If None, use 1024 as default.
"""
super(TrafficResources, self).__init__(dev_name=dev_name,
ib_port=ib_port,
gid_index=gid_index)
- self.msg_size = 1024
+ self.msg_size = msg_size
self.num_msgs = 1000
self.port_attr = None
self.mr = None
diff --git a/tests/mlx5_base.py b/tests/mlx5_base.py
index 099906f35129..a4202bae6a0d 100644
--- a/tests/mlx5_base.py
+++ b/tests/mlx5_base.py
@@ -18,8 +18,9 @@ from pyverbs.mr import MR
class Mlx5DcResources(TrafficResources):
def __init__(self, dev_name, ib_port, gid_index, send_ops_flags,
- qp_count=1):
+ qp_count=1, create_flags=0):
self.send_ops_flags = send_ops_flags
+ self.create_flags = create_flags
super().__init__(dev_name, ib_port, gid_index, with_srq=True,
qp_count=qp_count)
@@ -77,7 +78,10 @@ class Mlx5DcResources(TrafficResources):
try:
for _ in range(self.qp_count):
comp_mask = dve.MLX5DV_QP_INIT_ATTR_MASK_DC
+ if self.create_flags:
+ comp_mask |= dve.MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS
attr = Mlx5DVQPInitAttr(comp_mask=comp_mask,
+ create_flags=self.create_flags,
dc_init_attr=Mlx5DVDCInitAttr())
qp = Mlx5QP(self.ctx, qp_init_attr, attr)
self.qps.append(qp)
diff --git a/tests/test_mlx5_cq.py b/tests/test_mlx5_cq.py
new file mode 100644
index 000000000000..1f757c27345e
--- /dev/null
+++ b/tests/test_mlx5_cq.py
@@ -0,0 +1,237 @@
+import unittest
+import errno
+
+from pyverbs.providers.mlx5.mlx5dv import Mlx5Context, Mlx5DVContextAttr, \
+ Mlx5DVCQInitAttr, Mlx5CQ, context_flags_to_str
+from pyverbs.pyverbs_error import PyverbsRDMAError, PyverbsUserError
+from tests.base import RDMATestCase, RCResources
+import pyverbs.providers.mlx5.mlx5_enums as dve
+from tests.mlx5_base import Mlx5DcResources
+from pyverbs.cq import CqInitAttrEx
+import pyverbs.enums as e
+import tests.utils as u
+
+
+def create_dv_cq(res):
+ """
+ Create Mlx5 DV CQ.
+ :param res: An instance of BaseResources.
+ :return: None
+ """
+ dvcq_init_attr = Mlx5DVCQInitAttr()
+ if res.cqe_comp_res_format:
+ dvcq_init_attr.cqe_comp_res_format = res.cqe_comp_res_format
+ dvcq_init_attr.comp_mask |= dve.MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE
+ if res.flags:
+ dvcq_init_attr.flags = res.flags
+ dvcq_init_attr.comp_mask |= dve.MLX5DV_CQ_INIT_ATTR_MASK_FLAGS
+ if res.cqe_size:
+ dvcq_init_attr.cqe_size = res.cqe_size
+ dvcq_init_attr.comp_mask |= dve.MLX5DV_CQ_INIT_ATTR_MASK_CQE_SIZE
+ try:
+ res.cq = Mlx5CQ(res.ctx, CqInitAttrEx(), dvcq_init_attr)
+ except PyverbsRDMAError as ex:
+ if ex.error_code == errno.EOPNOTSUPP:
+ raise unittest.SkipTest('Create Mlx5DV CQ is not supported')
+ raise ex
+
+
+class Mlx5CQRes(RCResources):
+ def __init__(self, dev_name, ib_port, gid_index, cqe_comp_res_format=None,
+ flags=None, cqe_size=None, msg_size=1024, requested_dev_cap=None):
+ """
+ Initialize Mlx5 DV CQ resources based on RC resources that include RC
+ QP.
+ :param dev_name: Device name to be used
+ :param ib_port: IB port of the device to use
+ :param gid_index: Which GID index to use
+ :param cqe_comp_res_format: Type of compression to use
+ :param flags: DV CQ specific flags
+ :param cqe_size: The CQE size
+ :param msg_size: The resource msg size
+ :param requested_dev_cap: A necessary device cap. If it's not supported
+ by the device, the test will be skipped.
+ """
+ self.cqe_comp_res_format = cqe_comp_res_format
+ self.flags = flags
+ self.cqe_size = cqe_size
+ self.requested_dev_cap = requested_dev_cap
+ super().__init__(dev_name, ib_port, gid_index, msg_size=msg_size)
+
+ def create_context(self):
+ mlx5dv_attr = Mlx5DVContextAttr()
+ try:
+ self.ctx = Mlx5Context(mlx5dv_attr, name=self.dev_name)
+ except PyverbsUserError as ex:
+ raise unittest.SkipTest(f'Could not open mlx5 context ({ex})')
+ except PyverbsRDMAError:
+ raise unittest.SkipTest('Opening mlx5 context is not supported')
+ if self.requested_dev_cap:
+ if not self.ctx.query_mlx5_device().flags & self.requested_dev_cap:
+ miss_caps = context_flags_to_str(self.requested_dev_cap)
+ raise unittest.SkipTest(f'Device caps doesn\'t support {miss_caps}')
+
+ def create_cq(self):
+ create_dv_cq(self)
+
+
+class Mlx5DvCqDcRes(Mlx5DcResources):
+ def __init__(self, dev_name, ib_port, gid_index, cqe_comp_res_format=None,
+ flags=None, cqe_size=None, create_flags=None):
+ """
+ Initialize Mlx5 DV CQ resources based on RC resources that include RC
+ QP.
+ :param dev_name: Device name to be used
+ :param ib_port: IB port of the device to use
+ :param gid_index: Which GID index to use
+ :param cqe_comp_res_format: Type of compression to use
+ :param flags: DV CQ specific flags
+ :param cqe_size: The CQ's CQe size
+ :param create_flags: DV QP specific flags
+ """
+ self.cqe_comp_res_format = cqe_comp_res_format
+ self.flags = flags
+ self.cqe_size = cqe_size
+ super().__init__(dev_name, ib_port, gid_index,
+ send_ops_flags=e.IBV_QP_EX_WITH_SEND,
+ create_flags=create_flags)
+
+ def create_cq(self):
+ create_dv_cq(self)
+
+
+class DvCqTest(RDMATestCase):
+ def setUp(self):
+ super().setUp()
+ self.iters = 10
+ self.server = None
+ self.client = None
+ self.traffic_args = None
+
+ def create_players(self, resource, **resource_arg):
+ """
+ Init DV CQ tests resources.
+ :param resource: The RDMA resources to use.
+ :param resource_arg: Dict of args that specify the resource specific
+ attributes.
+ :return: None
+ """
+ self.client = resource(**self.dev_info, **resource_arg)
+ self.server = resource(**self.dev_info, **resource_arg)
+ self.client.pre_run(self.server.psns, self.server.qps_num)
+ self.server.pre_run(self.client.psns, self.client.qps_num)
+ if resource == Mlx5DvCqDcRes:
+ self.client.remote_dct_num = self.server.dct_qp.qp_num
+ self.server.remote_dct_num = self.client.dct_qp.qp_num
+ self.traffic_args = {'client': self.client, 'server': self.server,
+ 'iters': self.iters, 'gid_idx': self.gid_index,
+ 'port': self.ib_port}
+
+ def test_dv_cq_traffic(self):
+ """
+ Run SEND traffic using DC CQ.
+ """
+ self.create_players(Mlx5CQRes)
+ u.traffic(**self.traffic_args, is_cq_ex=True)
+
+ def test_dv_cq_compression_flags(self):
+ """
+ Create DV CQ with different types of CQE compression formats. The test
+ also does bad flow and try to use more than one compression formats.
+ """
+ # Create DV CQ with all legal compression flags.
+ for comp_type in [dve.MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX,
+ dve.MLX5DV_CQE_RES_FORMAT_CSUM,
+ dve.MLX5DV_CQE_RES_FORMAT_HASH]:
+ self.create_players(Mlx5CQRes, cqe_comp_res_format=comp_type,
+ requested_dev_cap=dve.MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
+ u.traffic(**self.traffic_args, is_cq_ex=True)
+
+ # Try to create DV CQ with more than one compression flags.
+ cqe_multi_format = dve.MLX5DV_CQE_RES_FORMAT_HASH | \
+ dve.MLX5DV_CQE_RES_FORMAT_CSUM
+ with self.assertRaises(PyverbsRDMAError) as ex:
+ self.create_players(Mlx5CQRes, cqe_comp_res_format=cqe_multi_format)
+ self.assertEqual(ex.exception.error_code, errno.EINVAL)
+
+ def test_dv_cq_padding(self):
+ """
+ Create DV CQ with padding flag.
+ """
+ self.create_players(Mlx5CQRes, cqe_size=128,
+ flags=dve.MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD,
+ requested_dev_cap=dve.MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD)
+ u.traffic(**self.traffic_args, is_cq_ex=True)
+
+ def test_dv_cq_padding_not_aligned_cqe_size(self):
+ """
+ Create DV CQ with padding flag when CQE size is not 128B. The creation
+ should fail because padding is supported only with CQE size of 128B.
+ """
+ # Padding flag works only when the cqe size is 128.
+ with self.assertRaises(PyverbsRDMAError) as ex:
+ self.create_players(Mlx5CQRes, cqe_size=64,
+ flags=dve.MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD,
+ requested_dev_cap=dve.MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD)
+ self.assertEqual(ex.exception.error_code, errno.EINVAL)
+
+ def test_dv_cq_cqe_size_128(self):
+ """
+ Test multiple sizes of msg using CQE size of 128B.
+ """
+ msg_sizes = [60, # Lower than 64B
+ 70, # In range of 64B - 128B
+ 140] # Bigger than 128B
+ for size in msg_sizes:
+ self.create_players(Mlx5CQRes, cqe_size=128, msg_size=size)
+ u.traffic(**self.traffic_args, is_cq_ex=True)
+
+ def test_dv_cq_cqe_size_64(self):
+ """
+ Test multiple sizes of msg using CQE size of 64B.
+ """
+ msg_sizes = [16, # Lower than 32B
+ 60, # In range of 32B - 64B
+ 70] # Bigger than 64B
+ for size in msg_sizes:
+ self.create_players(Mlx5CQRes, cqe_size=64, msg_size=size)
+ u.traffic(**self.traffic_args, is_cq_ex=True)
+
+ def test_dv_cq_cqe_size_with_bad_size(self):
+ """
+ Create CQ with ilegal cqe_size value.
+ """
+ # Set the CQE size in the CQE creation.
+ with self.assertRaises(PyverbsRDMAError) as ex:
+ self.create_players(Mlx5CQRes, cqe_size=100)
+ self.assertEqual(ex.exception.error_code, errno.EINVAL)
+
+ # Set the CQE size using the environment value.
+ self.set_env_variable('MLX5_CQE_SIZE', '100')
+ with self.assertRaises(PyverbsRDMAError) as ex:
+ self.create_players(Mlx5CQRes)
+ self.assertEqual(ex.exception.error_code, errno.EINVAL)
+
+ def test_dv_cq_cqe_size_environment_var(self):
+ """
+ Create DV CQs with all the legal cqe_size values using the environment
+ variable mechanism.
+ """
+ for cqe_size in ['64', '128']:
+ self.set_env_variable('MLX5_CQE_SIZE', cqe_size)
+ self.create_players(Mlx5CQRes)
+
+ def test_scatter_to_cqe_control_by_qp(self):
+ """
+ Create QP with specific SCATTER_TO_CQE flags. The test set different
+ values in the scatter2cqe environment variable and create the QP with
+ enable/disable flags. The QP should ignore the environment variable
+ value and behave according to the specific creation flag.
+ """
+ for s2c_env_val in ['0', '1']:
+ for qp_s2c_value in [dve.MLX5DV_QP_CREATE_DISABLE_SCATTER_TO_CQE,
+ dve.MLX5DV_QP_CREATE_ALLOW_SCATTER_TO_CQE]:
+ self.set_env_variable('MLX5_SCATTER_TO_CQE', s2c_env_val)
+ self.create_players(Mlx5DvCqDcRes, create_flags=qp_s2c_value)
+ u.traffic(**self.traffic_args, new_send=True,
+ send_op=e.IBV_QP_EX_WITH_SEND, is_cq_ex=True)
--
2.25.4

45
SOURCES/0001-tests-Check-CQE-compression-cap-before-using-it.patch
View File

@ -1,45 +0,0 @@
From 7be6d311d4bbdb93d06abfc9888e9f805d2d6fdb Mon Sep 17 00:00:00 2001
From: Edward Srouji <edwards@nvidia.com>
Date: Wed, 30 Dec 2020 17:03:34 +0200
Subject: [PATCH] tests: Check CQE compression cap before using it
Add a CQE compression capability check in mlx5 CQ tests before creating
a CQ. If the device does not support the requested CQE compression type,
the test will be skipped.
Fixes: 8aae7abe241c ("tests: Add mlx5 CQ tests")
Signed-off-by: Edward Srouji <edwards@nvidia.com>
Reviewed-by: Ido Kalir <idok@nvidia.com>
---
tests/test_mlx5_cq.py | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/tests/test_mlx5_cq.py b/tests/test_mlx5_cq.py
index 1f757c27345e..8be568c54262 100644
--- a/tests/test_mlx5_cq.py
+++ b/tests/test_mlx5_cq.py
@@ -2,7 +2,7 @@ import unittest
import errno
from pyverbs.providers.mlx5.mlx5dv import Mlx5Context, Mlx5DVContextAttr, \
- Mlx5DVCQInitAttr, Mlx5CQ, context_flags_to_str
+ Mlx5DVCQInitAttr, Mlx5CQ, context_flags_to_str, cqe_comp_to_str
from pyverbs.pyverbs_error import PyverbsRDMAError, PyverbsUserError
from tests.base import RDMATestCase, RCResources
import pyverbs.providers.mlx5.mlx5_enums as dve
@@ -22,6 +22,12 @@ def create_dv_cq(res):
if res.cqe_comp_res_format:
dvcq_init_attr.cqe_comp_res_format = res.cqe_comp_res_format
dvcq_init_attr.comp_mask |= dve.MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE
+ # Check CQE compression capability
+ cqe_comp_caps = res.ctx.query_mlx5_device().cqe_comp_caps
+ if not (cqe_comp_caps['supported_format'] & res.cqe_comp_res_format) or \
+ not cqe_comp_caps['max_num']:
+ cqe_comp_str = cqe_comp_to_str(res.cqe_comp_res_format)
+ raise unittest.SkipTest(f'CQE compression {cqe_comp_str} is not supported')
if res.flags:
dvcq_init_attr.flags = res.flags
dvcq_init_attr.comp_mask |= dve.MLX5DV_CQ_INIT_ATTR_MASK_FLAGS
--
2.25.4

71
SOURCES/0001-udaddy-Fix-create_reply_ah-error-flow.patch
View File

@ -1,71 +0,0 @@
From 8bb25f86ea1976bc8dcc009be37e7c779d131811 Mon Sep 17 00:00:00 2001
From: Patrisious Haddad <phaddad@nvidia.com>
Date: Mon, 26 Oct 2020 10:38:13 +0200
Subject: [PATCH] udaddy: Fix create_reply_ah error flow
[ Upstream commit 2213fe559b74d4281f9d42e425dfbd7e0f582a67 ]
Return error in case create_reply_ah() fails to create AH.
Fixes: a7eb7efbf69f ("r8077: Add support for UD QPs to the RDMA CM library, along with a goofy test program")
Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
Signed-off-by: Yishai Hadas <yishaih@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
librdmacm/examples/udaddy.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/librdmacm/examples/udaddy.c b/librdmacm/examples/udaddy.c
index 9283caa4971f..9f911289da3c 100644
--- a/librdmacm/examples/udaddy.c
+++ b/librdmacm/examples/udaddy.c
@@ -449,23 +449,27 @@ static void destroy_nodes(void)
free(test.nodes);
}
-static void create_reply_ah(struct cmatest_node *node, struct ibv_wc *wc)
+static int create_reply_ah(struct cmatest_node *node, struct ibv_wc *wc)
{
struct ibv_qp_attr attr;
struct ibv_qp_init_attr init_attr;
node->ah = ibv_create_ah_from_wc(node->pd, wc, node->mem,
node->cma_id->port_num);
+ if (!node->ah)
+ return -1;
node->remote_qpn = be32toh(wc->imm_data);
- ibv_query_qp(node->cma_id->qp, &attr, IBV_QP_QKEY, &init_attr);
+ if (ibv_query_qp(node->cma_id->qp, &attr, IBV_QP_QKEY, &init_attr))
+ return -1;
node->remote_qkey = attr.qkey;
+ return 0;
}
static int poll_cqs(void)
{
struct ibv_wc wc[8];
- int done, i, ret;
+ int done, i, ret, rc;
for (i = 0; i < connections; i++) {
if (!test.nodes[i].connected)
@@ -478,8 +482,13 @@ static int poll_cqs(void)
return ret;
}
- if (ret && !test.nodes[i].ah)
- create_reply_ah(&test.nodes[i], wc);
+ if (ret && !test.nodes[i].ah) {
+ rc = create_reply_ah(&test.nodes[i], wc);
+ if (rc) {
+ printf("udaddy: failed to create reply AH\n");
+ return rc;
+ }
+ }
}
}
return 0;
--
2.25.4

48
SOURCES/0001-verbs-Replace-SQ-with-RQ-in-max_recv_sge-s-documents.patch
View File

@ -1,48 +0,0 @@
From e86cfd2fcf1a48bebb6055d8016469aa75a17768 Mon Sep 17 00:00:00 2001
From: Xiao Yang <yangx.jy@cn.fujitsu.com>
Date: Thu, 14 Jan 2021 13:23:37 +0800
Subject: [PATCH] verbs: Replace SQ with RQ in max_recv_sge's documents
[ Upstream commit 380acc92201e6a038258403a36291671b6041ebe ]
Fix copy/paste mistake.
Fixes: 9845a77c8812 ("Add remaining libibverbs manpages")
Fixes: 058c67977dad ("XRC man pages")
Signed-off-by: Xiao Yang <yangx.jy@cn.fujitsu.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
libibverbs/man/ibv_create_qp.3 | 2 +-
libibverbs/man/ibv_create_qp_ex.3 | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/libibverbs/man/ibv_create_qp.3 b/libibverbs/man/ibv_create_qp.3
index 1cdf247445d2..dfbd245fa7b7 100644
--- a/libibverbs/man/ibv_create_qp.3
+++ b/libibverbs/man/ibv_create_qp.3
@@ -40,7 +40,7 @@ struct ibv_qp_cap {
uint32_t max_send_wr; /* Requested max number of outstanding WRs in the SQ */
uint32_t max_recv_wr; /* Requested max number of outstanding WRs in the RQ */
uint32_t max_send_sge; /* Requested max number of scatter/gather (s/g) elements in a WR in the SQ */
-uint32_t max_recv_sge; /* Requested max number of s/g elements in a WR in the SQ */
+uint32_t max_recv_sge; /* Requested max number of s/g elements in a WR in the RQ */
uint32_t max_inline_data;/* Requested max number of data (bytes) that can be posted inline to the SQ, otherwise 0 */
.in -8
};
diff --git a/libibverbs/man/ibv_create_qp_ex.3 b/libibverbs/man/ibv_create_qp_ex.3
index 277e9fa05e61..309281262ac6 100644
--- a/libibverbs/man/ibv_create_qp_ex.3
+++ b/libibverbs/man/ibv_create_qp_ex.3
@@ -49,7 +49,7 @@ struct ibv_qp_cap {
uint32_t max_send_wr; /* Requested max number of outstanding WRs in the SQ */
uint32_t max_recv_wr; /* Requested max number of outstanding WRs in the RQ */
uint32_t max_send_sge; /* Requested max number of scatter/gather (s/g) elements in a WR in the SQ */
-uint32_t max_recv_sge; /* Requested max number of s/g elements in a WR in the SQ */
+uint32_t max_recv_sge; /* Requested max number of s/g elements in a WR in the RQ */
uint32_t max_inline_data;/* Requested max number of data (bytes) that can be posted inline to the SQ, otherwise 0 */
.in -8
};
--
2.25.4

122
SOURCES/0001-verbs-Update-the-type-of-some-variables-in-documents.patch
View File

@ -1,122 +0,0 @@
From 7472c8b823221507f83052037750dd48fdeabff3 Mon Sep 17 00:00:00 2001
From: Xiao Yang <yangx.jy@cn.fujitsu.com>
Date: Mon, 11 Jan 2021 16:57:24 +0800
Subject: [PATCH] verbs: Update the type of some variables in documents
[ Upstream commit 503ee09888b8454de502d88821b9d872faebe75a ]
The type of some variables has been changed from int to
unsigned int thus update the corresponding documents.
Fixes: 8fe7f12f1723 ("verbs: Bitwise flag values should be unsigned")
Signed-off-by: Xiao Yang <yangx.jy@cn.fujitsu.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Nicolas Morey-Chaisemartin <nmoreychaisemartin@suse.com>
---
libibverbs/man/ibv_bind_mw.3 | 4 ++--
libibverbs/man/ibv_create_cq_ex.3 | 2 +-
libibverbs/man/ibv_modify_qp.3 | 2 +-
libibverbs/man/ibv_poll_cq.3 | 2 +-
libibverbs/man/ibv_post_send.3 | 4 ++--
libibverbs/man/ibv_query_qp.3 | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/libibverbs/man/ibv_bind_mw.3 b/libibverbs/man/ibv_bind_mw.3
index af309d000dea..6b995af7b436 100644
--- a/libibverbs/man/ibv_bind_mw.3
+++ b/libibverbs/man/ibv_bind_mw.3
@@ -28,7 +28,7 @@ is an ibv_mw_bind struct, as defined in <infiniband/verbs.h>.
struct ibv_mw_bind {
.in +8
uint64_t wr_id; /* User defined WR ID */
-int send_flags; /* Use ibv_send_flags */
+unsigned int send_flags; /* Use ibv_send_flags */
struct ibv_mw_bind_info bind_info; /* MW bind information */
.in -8
}
@@ -40,7 +40,7 @@ struct ibv_mw_bind_info {
struct ibv_mr *mr; /* The MR to bind the MW to */
uint64_t addr; /* The address the MW should start at */
uint64_t length; /* The length (in bytes) the MW should span */
-int mw_access_flags; /* Access flags to the MW. Use ibv_access_flags */
+unsigned int mw_access_flags; /* Access flags to the MW. Use ibv_access_flags */
.in -8
};
.fi
diff --git a/libibverbs/man/ibv_create_cq_ex.3 b/libibverbs/man/ibv_create_cq_ex.3
index 0f05693ec3bb..81eb37b96e75 100644
--- a/libibverbs/man/ibv_create_cq_ex.3
+++ b/libibverbs/man/ibv_create_cq_ex.3
@@ -122,7 +122,7 @@ Below members and functions are used in order to poll the current completion. Th
.BI "uint32_t ibv_wc_read_src_qp(struct ibv_cq_ex " "*cq"); \c
Get the source QP number field from the current completion.
-.BI "int ibv_wc_read_wc_flags(struct ibv_cq_ex " "*cq"); \c
+.BI "unsigned int ibv_wc_read_wc_flags(struct ibv_cq_ex " "*cq"); \c
Get the QP flags field from the current completion.
.BI "uint16_t ibv_wc_read_pkey_index(struct ibv_cq_ex " "*cq"); \c
diff --git a/libibverbs/man/ibv_modify_qp.3 b/libibverbs/man/ibv_modify_qp.3
index fd8596491e2f..a8cd19acdf54 100644
--- a/libibverbs/man/ibv_modify_qp.3
+++ b/libibverbs/man/ibv_modify_qp.3
@@ -32,7 +32,7 @@ uint32_t qkey; /* Q_Key for the QP (valid only
uint32_t rq_psn; /* PSN for receive queue (valid only for RC/UC QPs) */
uint32_t sq_psn; /* PSN for send queue (valid only for RC/UC QPs) */
uint32_t dest_qp_num; /* Destination QP number (valid only for RC/UC QPs) */
-int qp_access_flags; /* Mask of enabled remote access operations (valid only for RC/UC QPs) */
+unsigned int qp_access_flags; /* Mask of enabled remote access operations (valid only for RC/UC QPs) */
struct ibv_qp_cap cap; /* QP capabilities (valid if HCA supports QP resizing) */
struct ibv_ah_attr ah_attr; /* Primary path address vector (valid only for RC/UC QPs) */
struct ibv_ah_attr alt_ah_attr; /* Alternate path address vector (valid only for RC/UC QPs) */
diff --git a/libibverbs/man/ibv_poll_cq.3 b/libibverbs/man/ibv_poll_cq.3
index 957fd151495a..823865808202 100644
--- a/libibverbs/man/ibv_poll_cq.3
+++ b/libibverbs/man/ibv_poll_cq.3
@@ -39,7 +39,7 @@ uint32_t invalidated_rkey; /* Local RKey that was invalidated */
};
uint32_t qp_num; /* Local QP number of completed WR */
uint32_t src_qp; /* Source QP number (remote QP number) of completed WR (valid only for UD QPs) */
-int wc_flags; /* Flags of the completed WR */
+unsigned int wc_flags; /* Flags of the completed WR */
uint16_t pkey_index; /* P_Key index (valid only for GSI QPs) */
uint16_t slid; /* Source LID */
uint8_t sl; /* Service Level */
diff --git a/libibverbs/man/ibv_post_send.3 b/libibverbs/man/ibv_post_send.3
index 4fb99f7ccde0..2c488b090578 100644
--- a/libibverbs/man/ibv_post_send.3
+++ b/libibverbs/man/ibv_post_send.3
@@ -34,7 +34,7 @@ struct ibv_send_wr *next; /* Pointer to next WR in list, N
struct ibv_sge *sg_list; /* Pointer to the s/g array */
int num_sge; /* Size of the s/g array */
enum ibv_wr_opcode opcode; /* Operation type */
-int send_flags; /* Flags of the WR properties */
+unsigned int send_flags; /* Flags of the WR properties */
union {
.in +8
__be32 imm_data; /* Immediate data (in network byte order) */
@@ -103,7 +103,7 @@ struct ibv_mw_bind_info {
struct ibv_mr *mr; /* The Memory region (MR) to bind the MW to */
uint64_t addr; /* The address the MW should start at */
uint64_t length; /* The length (in bytes) the MW should span */
-int mw_access_flags; /* Access flags to the MW. Use ibv_access_flags */
+unsigned int mw_access_flags; /* Access flags to the MW. Use ibv_access_flags */
.in -8
};
.fi
diff --git a/libibverbs/man/ibv_query_qp.3 b/libibverbs/man/ibv_query_qp.3
index 907bc56a52ef..05242def03b9 100644
--- a/libibverbs/man/ibv_query_qp.3
+++ b/libibverbs/man/ibv_query_qp.3
@@ -37,7 +37,7 @@ uint32_t qkey; /* Q_Key of the QP (valid only for
uint32_t rq_psn; /* PSN for receive queue (valid only for RC/UC QPs) */
uint32_t sq_psn; /* PSN for send queue (valid only for RC/UC QPs) */
uint32_t dest_qp_num; /* Destination QP number (valid only for RC/UC QPs) */
-int qp_access_flags; /* Mask of enabled remote access operations (valid only for RC/UC QPs) */
+unsigned int qp_access_flags; /* Mask of enabled remote access operations (valid only for RC/UC QPs) */
struct ibv_qp_cap cap; /* QP capabilities */
struct ibv_ah_attr ah_attr; /* Primary path address vector (valid only for RC/UC QPs) */
struct ibv_ah_attr alt_ah_attr; /* Alternate path address vector (valid only for RC/UC QPs) */
--
2.25.4

25
SOURCES/udev-keep-NAME_KERNEL-as-default-interface-naming-co.patch
View File

@ -1,24 +1,31 @@
From fd9b3596cb1a21e54ffb102392178b6bd5d14c78 Mon Sep 17 00:00:00 2001
From 538cd05b34bf15076ce40273926d7580d421a670 Mon Sep 17 00:00:00 2001
From: Jarod Wilson <jarod@redhat.com>
Date: Wed, 21 Aug 2019 17:09:13 -0400
Subject: [PATCH rdma-core] udev: keep NAME_KERNEL as default interface
naming convention
Subject: [PATCH] udev: keep NAME_KERNEL as default interface naming convention
Signed-off-by: Jarod Wilson <jarod@redhat.com>
---
kernel-boot/rdma-persistent-naming.rules | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
kernel-boot/rdma-persistent-naming.rules | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel-boot/rdma-persistent-naming.rules b/kernel-boot/rdma-persistent-naming.rules
index 9b61e163..a561746b 100644
index 6f9c53a5..b5413edb 100644
--- a/kernel-boot/rdma-persistent-naming.rules
+++ b/kernel-boot/rdma-persistent-naming.rules
@@ -25,4 +25,4 @@
@@ -26,10 +26,10 @@
# Device type = RoCE
# mlx5_0 -> rocex525400c0fe123455
#
-ACTION=="add", SUBSYSTEM=="infiniband", PROGRAM="rdma_rename %k NAME_FALLBACK"
+ACTION=="add", SUBSYSTEM=="infiniband", PROGRAM="rdma_rename %k NAME_KERNEL"
--
2.20.1
# Example:
# * NAME_FIXED
# fixed name for specific board_id
#
-#ACTION=="add", ATTR{board_id}=="MSF0010110035", SUBSYSTEM=="infiniband", PROGRAM="rdma_rename %k NAME_FIXED myib"
\ No newline at end of file
+#ACTION=="add", ATTR{board_id}=="MSF0010110035", SUBSYSTEM=="infiniband", PROGRAM="rdma_rename %k NAME_FIXED myib"
--
2.30.1

58
SPECS/rdma-core.spec
View File

@ -1,6 +1,6 @@
Name: rdma-core
Version: 32.0
Release: 4%{?dist}
Version: 35.0
Release: 1%{?dist}
Summary: RDMA core userspace libraries and daemons
# Almost everything is licensed under the OFA dual GPLv2, 2 Clause BSD license
@ -17,33 +17,9 @@ Source1: ibdev2netdev
Source2: rxe_cfg
Source3: rxe_cfg.8.gz
Patch3: udev-keep-NAME_KERNEL-as-default-interface-naming-co.patch
# stable-v32 patch
Patch101: 0001-ABI-Files.patch
# Bug fixes applied after upstream v32.0
Patch201: 0001-Fix-cmd_fd-leak-in-mlx5_alloc_context.patch
Patch202: 0001-mlx5-Fix-wqe-size-parameter-in-wqe-signature-calcula.patch
Patch203: 0001-mlx5-DR-Fix-incorrect-use-of-fl_roce_enabled-capabil.patch
Patch204: 0001-mlx5-DR-Create-NC-UAR-as-default-but-fall-back-to-WC.patch
Patch205: 0001-efa-Flush-write-combining-writes-before-writing-to-t.patch
Patch206: 0001-udaddy-Fix-create_reply_ah-error-flow.patch
Patch207: 0001-infiniband-diags-specify-the-HCA-name-and-Port-numbe.patch
Patch208: 0001-libqedr-Set-XRC-functions-only-in-RoCE-mode.patch
Patch209: 0001-qedr-fix-USE_AFTER_FREE-issue.patch
Patch210: 0001-mlx5-Consider-single-threaded-mode-for-shared-UAR.patch
Patch211: 0001-rdma_server-Add-s-option-in-rdma_server-s-manual.patch
Patch212: 0001-librdmacm-Don-t-overwrite-errno-returned-from-libibv.patch
Patch213: 0001-libqedr-Fix-reported-error-code-from-create_cq.patch
Patch214: 0001-cxgb4-Fix-reported-error-code-from-create_cq.patch
Patch215: 0001-verbs-Update-the-type-of-some-variables-in-documents.patch
Patch216: 0001-verbs-Replace-SQ-with-RQ-in-max_recv_sge-s-documents.patch
Patch217: 0001-bnxt_re-Fix-reported-error-code-from-create_cq.patch
Patch218: 0001-mlx5-DR-Avoid-ICM-depletion-on-multiple-domains.patch
Patch219: 0001-srp_daemon-Fix-systemd-dependency.patch
Patch220: 0001-pyverbs-Add-mlx5dv-CQ-support.patch
Patch221: 0001-tests-Add-mlx5-CQ-tests.patch
Patch222: 0001-tests-Check-CQE-compression-cap-before-using-it.patch
# RHEL specific patch for OPA ibacm plugin
Patch300: 0001-ibacm-acm.c-load-plugin-while-it-is-soft-link.patch
Patch301: 0001-Only-load-i40iw-for-i40e-device-with-specific-PCI-ID.patch
# Do not build static libs by default.
%define with_static %{?_with_static: 1} %{?!_with_static: 0}
@ -285,30 +261,8 @@ easy, object-oriented access to IB verbs.
%prep
%setup -q
%patch3 -p1
%patch101 -p1
%patch201 -p1
%patch202 -p1
%patch203 -p1
%patch204 -p1
%patch205 -p1
%patch206 -p1
%patch207 -p1
%patch208 -p1
%patch209 -p1
%patch210 -p1
%patch211 -p1
%patch212 -p1
%patch213 -p1
%patch214 -p1
%patch215 -p1
%patch216 -p1
%patch217 -p1
%patch218 -p1
%patch219 -p1
%patch220 -p1
%patch221 -p1
%patch222 -p1
%patch300 -p1
%patch301 -p1
%build
@ -694,6 +648,10 @@ fi
%endif
%changelog
* Fri May 14 2021 Honggang Li <honli@redhat.com> - 35.0-1
- Update to upstream v35 release for features and fixes
- Resolves: bz1915311
* Thu Jan 28 2021 Honggang Li <honli@redhat.com> - 32.0-4
- Update to upstream stable release v32.1
- Fix mlx5 pyverbs CQ test