cfbebe833a
- kvm-target-i386-cpu-set-correct-supported-XCR0-features-.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-do-not-rely-on-ExtSaveArea-for-accelerat.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-return-bool-from-x86_cpu_filter_features.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-add-AVX10-feature-and-AVX10-version-prop.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-add-CPUID.24-features-for-AVX10.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-Add-feature-dependencies-for-AVX10.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-Add-AVX512-state-when-AVX10-is-supported.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-Introduce-GraniteRapids-v2-model.patch [RHEL-30316 RHEL-45111] - kvm-target-i386-add-sha512-sm3-sm4-feature-bits.patch [RHEL-30316 RHEL-45111] - kvm-arm-disable-pauth-for-virt-rhel9.patch [RHEL-75782] - kvm-tests-qtest-disable-most-pauth-tests.patch [RHEL-75782] - Resolves: RHEL-30316 ([Intel 9.6 FEAT] [GNR] Virt-QEMU: Add AVX10.1 instruction support) - Resolves: RHEL-45111 ([Intel 9.6 FEAT] [CWF][DMR] Virt-QEMU: Advertise new instructions SHA2-512NI, SM3, and SM4) - Resolves: RHEL-75782 ([Nvidia "Grace"] Lack of "PAuth" CPU feature results in live migration failure from RHEL 9.6 to 10)
51 lines
2.0 KiB
Diff
51 lines
2.0 KiB
Diff
From 9ed7a4e63c88a9b2afe51ffad36c12b174ad6e7a Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Thu, 31 Oct 2024 16:52:26 +0800
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Subject: [PATCH 01/11] target/i386: cpu: set correct supported XCR0 features
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for TCG
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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RH-MergeRequest: 281: Add support for the AVX10.1, SHA512, SM3 and SM4 instruction sets.
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RH-Jira: RHEL-30316 RHEL-45111
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RH-Acked-by: Vitaly Kuznetsov <vkuznets@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Commit: [1/9] a27738f95f7c00915cd16288e469276a879f6bdf (bonzini/rhel-qemu-kvm)
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
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Link: https://lore.kernel.org/r/20241031085233.425388-2-tao1.su@linux.intel.com
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 33098002a838a0450f243f5e17463aca700e923d)
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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---
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target/i386/cpu.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index ed278dd4a1..cff7ae1c54 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1297,7 +1297,9 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.needs_ecx = true, .ecx = 0,
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.reg = R_EAX,
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},
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- .tcg_features = ~0U,
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+ .tcg_features = XSTATE_FP_MASK | XSTATE_SSE_MASK |
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+ XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
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+ XSTATE_PKRU_MASK,
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.migratable_flags = XSTATE_FP_MASK | XSTATE_SSE_MASK |
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XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
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XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK |
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@@ -1310,7 +1312,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.needs_ecx = true, .ecx = 0,
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.reg = R_EDX,
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},
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- .tcg_features = ~0U,
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+ .tcg_features = 0U,
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},
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/*Below are MSR exposed features*/
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[FEAT_ARCH_CAPABILITIES] = {
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--
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2.48.0
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