72 lines
2.6 KiB
Diff
72 lines
2.6 KiB
Diff
From 04387fbe913b26a3819d711ea91b99be6faa8616 Mon Sep 17 00:00:00 2001
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From: "plai@redhat.com" <plai@redhat.com>
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Date: Tue, 26 Nov 2019 19:36:50 +0000
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Subject: [PATCH 06/11] x86/cpu: Enable MOVDIR64B cpu feature
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RH-Author: plai@redhat.com
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Message-id: <1574797015-32564-3-git-send-email-plai@redhat.com>
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Patchwork-id: 92691
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O-Subject: [RHEL8.2 qemu-kvm PATCH 2/7] x86/cpu: Enable MOVDIR64B cpu feature
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Bugzilla: 1634827
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RH-Acked-by: Eduardo Habkost <ehabkost@redhat.com>
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RH-Acked-by: Michael S. Tsirkin <mst@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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From: Liu Jingqi <jingqi.liu@intel.com>
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MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
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Direct store is implemented by using write combining (WC) for writing
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data directly into memory without caching the data.
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The bit definition:
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CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B
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The release document ref below link:
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https://software.intel.com/sites/default/files/managed/c5/15/\
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architecture-instruction-set-extensions-programming-reference.pdf
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Cc: Xu Tao <tao3.xu@intel.com>
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Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
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Message-Id: <1541488407-17045-3-git-send-email-jingqi.liu@intel.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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(cherry picked from commit 1c65775ffc2dbd276a8bffe592feba0e186a151c)
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Signed-off-by: Paul Lai <plai@redhat.com>
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Resolved Conflicts:
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target/i386/cpu.c
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Signed-off-by: Danilo C. L. de Paula <ddepaula@redhat.com>
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---
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target/i386/cpu.c | 2 +-
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target/i386/cpu.h | 1 +
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2 files changed, 2 insertions(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index f2ab558..307b629 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1022,7 +1022,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"la57", NULL, NULL, NULL,
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NULL, NULL, "rdpid", NULL,
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NULL, "cldemote", NULL, "movdiri",
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- NULL, NULL, NULL, NULL,
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+ "movdir64b", NULL, NULL, NULL,
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},
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.cpuid = {
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.eax = 7,
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index 6ba0b1e..d33fa8d 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -719,6 +719,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_ECX_RDPID (1U << 22)
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#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */
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#define CPUID_7_0_ECX_MOVDIRI (1U << 27) /* MOVDIRI Instruction */
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+#define CPUID_7_0_ECX_MOVDIR64B (1U << 28) /* MOVDIR64B Instruction */
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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--
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1.8.3.1
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