44 lines
1.5 KiB
Diff
44 lines
1.5 KiB
Diff
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From 3edc5689dd2b5a55655ab99e0153ad85ab50d773 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Wed, 3 Jul 2024 13:42:49 +0200
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Subject: [PATCH 09/11] target/i386: add sha512, sm3, sm4 feature bits
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RH-Author: Paolo Bonzini <pbonzini@redhat.com>
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RH-MergeRequest: 281: Add support for the AVX10.1, SHA512, SM3 and SM4 instruction sets.
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RH-Jira: RHEL-30316 RHEL-45111
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RH-Acked-by: Vitaly Kuznetsov <vkuznets@redhat.com>
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RH-Acked-by: Miroslav Rezanina <mrezanin@redhat.com>
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RH-Commit: [9/9] ec773b43841f1a38f0e5829c1d66cd5b517c5267 (bonzini/rhel-qemu-kvm)
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Status: queued for QEMU 10.0
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SHA512, SM3, SM4 (CPUID[EAX=7,ECX=1).EAX bits 0 to 2) is supported by
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Clearwater Forest processor, add it to QEMU as it does not need any
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specific enablement.
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See https://lore.kernel.org/kvm/20241105054825.870939-1-tao1.su@linux.intel.com/
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for reference.
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Reviewed-by: Tao Su <tao1.su@linux.intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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---
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target/i386/cpu.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index ad368252d8..a70a3aa670 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1114,7 +1114,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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[FEAT_7_1_EAX] = {
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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- NULL, NULL, NULL, NULL,
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+ "sha512", "sm3", "sm4", NULL,
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"avx-vnni", "avx512-bf16", NULL, "cmpccxadd",
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NULL, NULL, "fzrm", "fsrs",
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"fsrc", NULL, NULL, NULL,
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--
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2.48.0
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