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update ignore list
2007-07-03 01:38:31 +00:00
clog
microcode_ctl-1.17
- Update to upstream 1.17
2007-07-03 01:37:32 +00:00
microcode_ctl-1.17.tar.gz
- Add AMD x86/x86-64 microcode. (Dated: 2009-10-09) Doesn't need microcode_ctl modifications as it's loaded by request_firmware() like any other sensible driver. - Eventually, this AMD firmware can probably live inside kernel-firmware once it is split out.
2009-12-04 17:32:38 +00:00
amd-ucode-2009-10-09.tar
retry the upload, which mysteriously failed last time.
2010-08-28 03:33:55 +00:00
microcode-20100826.dat
+* Mon Nov 01 2010 Anton Arapov <anton@redhat.com> 1.17-8 +- Update to microcode-20100914.dat
2010-11-01 14:00:47 +00:00
/microcode_ctl-1.17.tar.gz
/amd-ucode-2009-10-09.tar
/microcode-20100914.dat
Update to microcode-20101123.dat * Wed Jan 05 2011 Anton Arapov <anton@redhat.com> 1.17-9 - Update to microcode-20101123.dat Signed-off-by: Anton Arapov <aarapov@redhat.com>
2011-01-06 08:47:50 +00:00
/microcode-20101123.dat
- Update to amd-ucode-2011-01-11.tar
2011-03-07 07:10:52 +00:00
/amd-ucode-2011-01-11.tar
update to new intel microcode
2011-05-12 08:53:38 +00:00
/microcode-20110428.dat
Ship splitted microcode or Intel CPUs [#690930]
2011-08-04 08:05:16 +00:00
/intel-microcode2ucode.c
Update to microcode-20110915.dat
2011-09-27 17:58:27 +00:00
/microcode-20110915.dat
update microcode to 20111110
2011-12-13 10:05:58 +00:00
/microcode-20111110.dat
update amd microcode
2012-02-07 09:14:10 +00:00
/amd-ucode-2012-01-17.tar
update Intel microcode ssia, microcode-20120606.dat Signed-off-by: Anton Arapov <anton@redhat.com>
2012-06-07 11:25:13 +00:00
/microcode-20120606.dat
update to upstream version 1.18 ssia Signed-off-by: Anton Arapov <anton@redhat.com>
2012-07-25 18:54:18 +00:00
/microcode_ctl-1.18.tar.xz
/microcode_ctl.rules
update to version 2.0 Signed-off-by: Anton Arapov <anton@redhat.com>
2012-08-06 14:23:55 +00:00
/microcode_ctl-2.0.tar.xz
Update to upstream 2.0-1 Signed-off-by: Anton Arapov <anton@redhat.com>
2012-10-02 07:26:49 +00:00
/microcode_ctl-2.0-1.tar.xz
new release Signed-off-by: Anton Arapov <anton@redhat.com>
2012-10-17 12:57:35 +00:00
/microcode_ctl-2.0-2.tar.xz
new release Signed-off-by: Anton Arapov <anton@redhat.com>
2013-04-03 09:23:09 +00:00
/microcode_ctl-2.0-3.tar.xz
new release Signed-off-by: Anton Arapov <anton@redhat.com>
2013-07-27 07:57:33 +00:00
/microcode_ctl-2.1.tar.xz
New release Signed-off-by: Anton Arapov <anton@redhat.com>
2013-08-14 16:41:48 +00:00
/microcode_ctl-2.1-1.tar.xz
new release. Signed-off-by: Anton Arapov <anton@redhat.com>
2013-09-09 09:50:49 +00:00
/microcode_ctl-2.1-2.tar.xz
new release. Signed-off-by: Anton Arapov <anton@descope.org>
2014-01-24 07:04:01 +00:00
/microcode_ctl-2.1-3.tar.xz
New release Signed-off-by: Anton Arapov <anton@redhat.com>
2014-05-01 12:30:11 +00:00
/microcode_ctl-2.1-4.tar.xz
new release. new intel firmware 20140624. Signed-off-by: Anton Arapov <anton@descope.org>
2014-07-08 12:52:30 +00:00
/microcode_ctl-2.1-5.tar.xz
new release. new intel firmware 20140913 Signed-off-by: Anton Arapov <anton@descope.org>
2014-09-21 07:27:19 +00:00
/microcode_ctl-2.1-6.tar.xz
new release. new intel firmware 20150121 Signed-off-by: Anton Arapov <anton@descope.org>
2015-02-03 11:14:07 +00:00
/microcode_ctl-2.1-7.tar.xz
new release. new intel firmware 20151106 Signed-off-by: Anton Arapov <arapov@gmail.com>
2016-01-12 14:24:04 +00:00
/microcode_ctl-2.1-8.tar.xz
new release. new intel firmware 20160607 Signed-off-by: Anton Arapov <arapov@gmail.com>
2016-06-24 12:56:13 +00:00
/microcode_ctl-2.1-9.tar.xz
new release. new intel firmware 20160714 Signed-off-by: Anton Arapov <arapov@gmail.com>
2016-07-21 10:02:31 +00:00
/microcode_ctl-2.1-10.tar.xz
Update to upstream 2.1-11. 20161104 Signed-off-by: Anton Arapov <arapov@gmail.com>
2016-12-02 09:20:31 +00:00
/microcode_ctl-2.1-11.tar.xz
Update to upstream 2.1-12. 20170511 Signed-off-by: Anton Arapov <arapov@gmail.com>
2017-05-23 17:01:48 +00:00
/microcode_ctl-2.1-12.tar.xz
Update to upstream 2.1-13. 20170707 Signed-off-by: Anton Arapov <arapov@gmail.com>
2017-07-12 14:40:20 +00:00
/microcode_ctl-2.1-13.tar.xz
Update to upstream 2.1-14. 20171117 Signed-off-by: Anton Arapov <arapov@gmail.com>
2017-11-21 17:19:59 +00:00
/microcode_ctl-2.1-14.tar.xz
Update to upstream 2.1-15. 20180108 Signed-off-by: Anton Arapov <arapov@gmail.com>
2018-01-09 17:38:24 +00:00
/microcode_ctl-2.1-15.tar.xz
Release. Intel CPU microcode update. 20180312
2018-03-15 11:56:59 +00:00
/microcode_ctl-2.1-16.tar.xz
Release. Intel CPU microcode update. 20180425 Signed-off-by: Anton Arapov <arapov@gmail.com>
2018-05-16 07:18:52 +00:00
/microcode_ctl-2.1-17.tar.xz
Release. Intel CPU microcode update. 20180703 Signed-off-by: Anton Arapov <arapov@gmail.com>
2018-07-09 07:12:03 +00:00
/microcode_ctl-2.1-18.tar.xz
Release. Intel CPU microcode update. 20180807 Signed-off-by: Anton Arapov <arapov@gmail.com>
2018-08-13 08:31:41 +00:00
/microcode_ctl-2.1-19.tar.xz
Release. Intel CPU microcode update. 20190312 Signed-off-by: Anton Arapov <arapov@gmail.com>
2019-05-09 12:24:29 +00:00
/microcode_ctl-2.1-20.tar.xz
Release. Intel CPU microcode update. 20190514 Signed-off-by: Anton Arapov <arapov@gmail.com>
2019-05-15 06:42:05 +00:00
/microcode_ctl-2.1-21.tar.xz
Release. Intel CPU microcode update. 20190618 Signed-off-by: Anton Arapov <arapov@gmail.com>
2019-06-20 14:00:50 +00:00
/microcode_ctl-2.1-22.tar.xz
Release. Intel CPU microcode update. 20190918 Signed-off-by: Anton Arapov <arapov@gmail.com>
2019-10-02 09:33:33 +00:00
/microcode_ctl-2.1-23.tar.xz
Release. Intel CPU microcode update. 20191115 Signed-off-by: Anton Arapov <arapov@gmail.com>
2019-11-18 10:16:10 +00:00
/microcode_ctl-2.1-25.tar.xz
Release. Intel CPU microcode update. 20200508 Signed-off-by: Anton Arapov <arapov@gmail.com>
2020-05-11 09:13:11 +00:00
/microcode_ctl-2.1-26.tar.xz
Release. Intel CPU microcode update. 20200520 Signed-off-by: Anton Arapov <arapov@gmail.com>
2020-05-21 07:22:12 +00:00
/microcode_ctl-2.1-27.tar.xz
Release. Intel CPU microcode update. 20200609 Signed-off-by: Anton Arapov <arapov@gmail.com>
2020-06-10 05:04:21 +00:00
/microcode_ctl-2.1-28.tar.xz
Release. Intel CPU microcode update. 20200616 Signed-off-by: Anton Arapov <arapov@gmail.com>
2020-06-16 21:40:30 +00:00
/microcode_ctl-2.1-29.tar.xz
Update to upstream 2.1-30. 20201110 - Update to upstream 2.1-30. 20201110 - Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; - Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28; - Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; - Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; - Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0; - Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0; - Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision 0xe0; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x43 up to 0x44; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode from revision 0xd6 up to 0xe2; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157 up to 0x1000159; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006906 up to 0x2006a08; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01 up to 0x4003003; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5002f01 up to 0x5003003; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up to 0x40; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up to 0x1e; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode from revision 0xd6 up to 0xe2; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up to 0x18; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78 up to 0xa0; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xd6 up to 0xde; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xd6 up to 0xde; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xd6 up to 0xe0; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xd6 up to 0xde; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xd6 up to 0xde; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xd6 up to 0xde; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xd6 up to 0xde; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xd6 up to 0xde; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xd6 up to 0xde; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xd6 up to 0xde; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0. - Addresses CVE-2020-8965, CVE-2020-8966, CVE-2020-8968 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2020-11-11 06:51:42 +00:00
/microcode_ctl-2.1-30.tar.xz
Update to upstream 2.1-31. 20201118 - Update to upstream 2.1-31. 20201118 - Removal of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up to 0x34. Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2020-11-20 20:50:36 +00:00
/microcode_ctl-2.1-31.tar.xz
Update to upstream 2.1-32. 20210216 - Update to upstream 2.1-32. 20210216 - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006a08 up to 0x2006a0a; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003003 up to 0x4003006; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003003 up to 0x5003006. Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2021-02-17 18:06:43 +00:00
/microcode_ctl-2.1-32.tar.xz
Update to upstream 2.1-33. 20210608 - Update to upstream 2.1-33. 20210608 - Addition of 06-55-05/0xb7 (CLX-SP A0) microcode at revision 0x3000010; - Addition of 06-6a-05/0x87 (ICX-SP C0) microcode at revision 0xc0002f0; - Addition of 06-6a-06/0x87 (ICX-SP D0) microcode at revision 0xd0002a0; - Addition of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f; - Addition of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04) at revision 0xb00000f; - Addition of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05) at revision 0xb00000f; - Addition of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f; - Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x88; - Addition of 06-8c-02/0xc2 (TGL-R C0) microcode at revision 0x16; - Addition of 06-8d-01/0xc2 (TGL-H R0) microcode at revision 0x2c; - Addition of 06-96-01/0x01 (EHL B1) microcode at revision 0x11; - Addition of 06-9c-00/0x01 (JSL A0/A1) microcode at revision 0x1d; - Addition of 06-a7-01/0x02 (RKL-S B0) microcode at revision 0x40; - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in intel-ucode-with-caveats/06-4f-01) from revision 0xb000038 up to 0xb00003e; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x44 up to 0x46; - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x16 up to 0x19; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode from revision 0xe2 up to 0xea; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000159 up to 0x100015b; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006a0a up to 0x2006b06; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003006 up to 0x4003102; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003006 up to 0x5003102; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x700001e up to 0x7002302; - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision 0x7000019 up to 0x700001b; - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000017 up to 0xf000019; - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision 0xe00000f up to 0xe000012; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x40 up to 0x44; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x1e up to 0x20; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode from revision 0xe2 up to 0xea; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x2e up to 0x34; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x34 up to 0x36; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x18 up to 0x1a; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa0 up to 0xa6; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x28 up to 0x2a; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xde up to 0xea; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xde up to 0xea; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xe0 up to 0xea; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xde up to 0xea; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xde up to 0xea; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xde up to 0xea; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xde up to 0xea; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xde up to 0xea; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xde up to 0xea; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xde up to 0xea; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xe0 up to 0xea; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xe0 up to 0xea; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xe0 up to 0xec; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe0 up to 0xe8; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xe0 up to 0xea. Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2021-06-08 17:30:30 +00:00
/microcode_ctl-2.1-33.tar.xz
Update to upstream 2.1-34. 20220207 - Update to upstream 2.1-34. 20220207 - Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f; - Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04) at revision 0xb00000f; - Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05) at revision 0xb00000f; - Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f; - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in intel-ucode-with-caveats/06-4f-01) from revision 0xb00003e up to 0xb000040; - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode from revision 0x46 up to 0x49; - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up to 0x1a; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode from revision 0xea up to 0xec; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b up to 0x100015c; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006b06 up to 0x2006c0a; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102 up to 0x400320a; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003102 up to 0x500320a; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302 up to 0x7002402; - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision 0x700001b up to 0x700001c; - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019 up to 0xf00001a; - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision 0xe000012 up to 0xe000014; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up to 0x46; - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up to 0x24; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode from revision 0xea up to 0xec; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up to 0x36; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0 up to 0xd000331; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up to 0x38; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up to 0x1c; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6 up to 0xa8; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up to 0x2d; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0x88 up to 0x9a; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up to 0x22; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up to 0x3c; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xea up to 0xec; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xea up to 0xec; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xea up to 0xec; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xea up to 0xec; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xea up to 0xec; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up to 0x15; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up to 0x2400001f; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xea up to 0xec; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xea up to 0xec; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up to 0xec; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea up to 0xec; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec up to 0xee; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8 up to 0xea; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xea up to 0xec; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up to 0x50. Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2022-02-09 04:04:37 +00:00
/microcode_ctl-2.1-34.tar.xz
Update to upstream 2.1-35. 20220419 - Update to upstream 2.1-35. 20220419 - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x24 up to 0x28. Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2022-05-10 12:53:53 +00:00
/microcode_ctl-2.1-35.tar.xz
Update to upstream 2.1-36. 20220510 - Update to upstream 2.1-36. 20220510 - Addition of 06-97-02/0x03 (ADL-HX C0) microcode at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) at revision 0x1f; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) at revision 0x1f; - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode at revision 0x41c; - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) at revision 0x41c; - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) at revision 0x41c; - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode at revision 0x41c; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) at revision 0x1f; - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) at revision 0x1f; - Addition of 06-bf-05/0x03 (ADL C0) microcode at revision 0x1f; - Update of 06-37-09/0x0f (VLV D0) microcode from revision 0x90c up to 0x90d; - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode from revision 0xec up to 0xf0; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015c up to 0x100015d; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006c0a up to 0x2006d05; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400320a up to 0x4003302; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x500320a up to 0x5003302; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002402 up to 0x7002501; - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x46 up to 0x48; - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode from revision 0xec up to 0xf0; - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x36 up to 0x38; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000331 up to 0xd000363; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x38 up to 0x3a; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1c up to 0x1e; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa8 up to 0xb0; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2d up to 0x31; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0x9a up to 0xa4; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x22 up to 0x26; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3c up to 0x3e; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xec up to 0xf0; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xec up to 0xf0; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xec up to 0xf0; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xec up to 0xf0; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xec up to 0xf0; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x15 up to 0x16; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x2400001f up to 0x24000023; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xec up to 0xf0; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xec up to 0xf0; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xec up to 0xf0; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xec up to 0xf0; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xec up to 0xf0; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xec up to 0xf0; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xec up to 0xf0; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xee up to 0xf0; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xea up to 0xf0; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xec up to 0xf0; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x50 up to 0x53. - Addresses CVE-2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2022-05-10 19:11:55 +00:00
/microcode_ctl-2.1-36.tar.xz
Update to upstream 2.1-37. 20220809 - Update to upstream 2.1-37. 20220809 - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d up to 0x100015e; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006d05 up to 0x2006e05; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363 up to 0xd000375; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up to 0x3c; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up to 0x20; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0 up to 0xb2; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up to 0x28; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up to 0x40; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x1f up to 0x22; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x1f up to 0x22; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x41c up to 0x421; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x41c up to 0x421; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x41c up to 0x421; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c up to 0x421; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up to 0x54; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x1f up to 0x22; - Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x1f up to 0x22; - Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up to 0x22. - Addresses CVE-2022-21233 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2022-08-09 19:06:17 +00:00
/microcode_ctl-2.1-37.tar.xz
Update to upstream 2.1-40. 20230516 - Update to upstream 2.1-40. 20230516 - Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000230; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode at revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) at revision 0x2c0001d1; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in intel-ucode/06-8f-04) at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) at revision 0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) at revision 0x2c0001d1; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) at revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision 0x2c0001d1; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in intel-ucode/06-8f-05) at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) at revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) at revision 0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) at revision 0x2c0001d1; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) at revision 0x2c0001d1; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision 0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) at revision 0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) at revision 0x2c0001d1; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) at revision 0x2b000461; - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; - Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at revision 0x2c0001d1; - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) at revision 0x2c0001d1; - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; - Addition of 06-8f-06/0x10 (SPR-HBM B2) microcode (in intel-ucode/06-8f-08) at revision 0x2c0001d1; - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) at revision 0x2b000461; - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision 0x2b000461; - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision 0x2c0001d1; - Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x113; - Addition of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode at revision 0x4112; - Addition of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) at revision 0x4112; - Addition of 06-ba-02/0xc0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) at revision 0x4112; - Addition of 06-ba-03/0xc0 (RPL-U 2+8 Q0) microcode at revision 0x4112; - Addition of 06-be-00/0x01 (ADL-N A0) microcode at revision 0x10; - Addition of 06-9a-04/0x40 (AZB A0/R0) microcode at revision 0x4; - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e up to 0x1000171; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006e05 up to 0x2006f05; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302 up to 0x4003501; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003302 up to 0x5003501; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501 up to 0x7002601; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375 up to 0xd000390; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up to 0x3e; - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up to 0x22; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2 up to 0xba; - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up to 0x33; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0xa4 up to 0xaa; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x28 up to 0x2a; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up to 0x44; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf0 up to 0xf2; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xf0 up to 0xf6; - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up to 0x17; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x421 up to 0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x421 up to 0x42a; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x421 up to 0x42a; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421 up to 0x42a; - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023 up to 0x24000024; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf0 up to 0xf2; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf0 up to 0xf8; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up to 0xf6; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0 up to 0xf6; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0 up to 0xf6; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0 up to 0xf6; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf0 up to 0xf6; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up to 0x58; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3); - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to 0x2c (old pf 0x3). - Addresses CVE-2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2023-05-25 17:42:24 +00:00
/microcode_ctl-2.1-40.tar.xz
Update to upstream 2.1-41. 20230808 - Update to upstream 2.1-41. 20230808 - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000171 up to 0x1000181; - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode from revision 0x2006f05 up to 0x2007006; - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003501 up to 0x4003604; - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003501 up to 0x5003604; - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002601 up to 0x7002703; - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000390 up to 0xd0003a5; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xba up to 0xbc; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0xaa up to 0xac; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2a up to 0x2c; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x44 up to 0x46; - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xf2 up to 0xf4; - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) microcode from revision 0xf6 up to 0xf8; - Update of 06-8f-04/0x10 microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c0001d1 up to 0x2c000271; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b000461 up to 0x2b0004b1; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02) from revision 0x2c up to 0x2e; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05) from revision 0x2c up to 0x2e; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x42a up to 0x42c; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x42a up to 0x42c; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x42a up to 0x42c; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42a up to 0x42c; - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision 0xf2 up to 0xf4; - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision 0xf8 up to 0xfa; - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf6 up to 0xf8; - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf6 up to 0xf8; - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision 0xf6 up to 0xf8; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x58 up to 0x59; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x113 up to 0x119; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02) from revision 0x2c up to 0x2e; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05) from revision 0x2c up to 0x2e; - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x2c up to 0x2e; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4112 up to 0x4119 (old pf 0xc0); - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x10 up to 0x11 (old pf 0x1). - Addresses CVE-2022-21216, CVE-2022-40982, CVE-2022-41804, CVE-2023-23908 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2023-08-14 07:21:47 +00:00
/microcode_ctl-2.1-41.tar.xz
Update to upstrem 2.1-42. 20231114 - Update to upstrem 2.1-42. 20231114 - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003a5 up to 0xd0003b9; - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x1000230 up to 0x1000268; - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xbc up to 0xc2; - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision 0xac up to 0xb4; - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x2c up to 0x34; - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x46 up to 0x4e; - Update of 06-8f-04/0x10 microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-04) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-04) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-05) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-05) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode (in intel-ucode/06-8f-06) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-06) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in intel-ucode/06-8f-07) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in intel-ucode/06-8f-08) from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision 0x2c000271 up to 0x2c000290; - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision 0x2b0004b1 up to 0x2b0004d0; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (RPL-S 8+8 C0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (RPL-S 6+0 C0) microcode (in intel-ucode/06-97-02) from revision 0x2e up to 0x32; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (RPL-S 8+8 C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (RPL-S 6+0 C0) microcode (in intel-ucode/06-97-05) from revision 0x2e up to 0x32; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision 0x42c up to 0x430; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in intel-ucode/06-9a-03) from revision 0x42c up to 0x430; - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in intel-ucode/06-9a-04) from revision 0x42c up to 0x430; - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x4 up to 0x5; - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x42c up to 0x430; - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x59 up to 0x5d; - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x119 up to 0x11d; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision 0x4119 up to 0x411c; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in intel-ucode/06-ba-02) from revision 0x4119 up to 0x411c; - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in intel-ucode/06-ba-03) from revision 0x4119 up to 0x411c; - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4119 up to 0x411c; - Update of 06-be-00/0x11 (ADL-N A0) microcode from revision 0x11 up to 0x12; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (RPL-S 8+8 C0) microcode from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (RPL-S 6+0 C0) microcode (in intel-ucode/06-bf-02) from revision 0x2e up to 0x32; - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-bf-02/0x07 (RPL-S 8+8 C0) microcode (in intel-ucode/06-bf-05) from revision 0x2e up to 0x32; - Update of 06-bf-05/0x07 (RPL-S 6+0 C0) microcode from revision 0x2e up to 0x32. - Addresses CVE-2023-23583 Signed-off-by: Eugene Syromiatnikov <esyr@redhat.com>
2023-11-14 18:22:26 +00:00
/microcode_ctl-2.1-42.tar.xz
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