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Enable vc4 and v3d for Raspberry Pi graphics in AlmaLinux (Resolves: https://github.com/AlmaLinux/raspberry-pi/issues/32)

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This commit is contained in:
Koichiro Iwao 2025-05-13 15:46:06 +00:00 committed by root
commit 9b312b98c9
8 changed files with 2634 additions and 1137 deletions
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6
.gitignore vendored
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@ -1,5 +1,5 @@
SOURCES/libclc-18.1.2.src.tar.xz
SOURCES/mesa-24.1.2.tar.xz
SOURCES/libclc-19.1.1.src.tar.xz
SOURCES/mesa-24.2.8.tar.xz
SOURCES/meson-1.3.0.tar.gz
SOURCES/spirv-llvm-translator-259f72c.tar.gz
SOURCES/spirv-llvm-translator-90a9764.tar.gz
SOURCES/wayland-protocols-1.34.tar.xz

6
.mesa.metadata
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@ -1,5 +1,5 @@
fd59e738537ad513a715d5080682d9a690480ebe SOURCES/libclc-18.1.2.src.tar.xz
5cdb8437b70ba4c384d602052b7396aab2018363 SOURCES/mesa-24.1.2.tar.xz
81a02b6bb65f0d0e3704a6dbeea919340a7b108c SOURCES/libclc-19.1.1.src.tar.xz
c7994d1bf40879518b6ae331dd92e04b6e9d436e SOURCES/mesa-24.2.8.tar.xz
6e2c98cccd1b85d5fe8716e7b0f6f080acd77f37 SOURCES/meson-1.3.0.tar.gz
d86613dcde6eb304e204df4e4d466edbc45f7c13 SOURCES/spirv-llvm-translator-259f72c.tar.gz
821a2175ada624e0aa397b26ea25eb2dfe25a1dc SOURCES/spirv-llvm-translator-90a9764.tar.gz
9e2df4b15428c0b0ce7d9256d4f469b70daab524 SOURCES/wayland-protocols-1.34.tar.xz

153
SOURCES/0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch
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@ -1,153 +0,0 @@
From fddf49504e1bebb7efc52c1a0516300c0f217f18 Mon Sep 17 00:00:00 2001
From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Date: Wed, 26 Jun 2024 12:11:48 +0200
Subject: [PATCH] Revert "ac, radeonsi: remove has_syncobj,
has_fence_to_handle"
This reverts commit 02fe3c32cdfc3cf48cd691d6321978b8d4c3e61b.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11352
---
src/amd/common/ac_gpu_info.c | 12 ++++++++++++
src/amd/common/ac_gpu_info.h | 2 ++
src/gallium/drivers/r600/r600_pipe_common.c | 1 +
src/gallium/drivers/radeonsi/si_fence.c | 10 ++++++++++
src/gallium/drivers/radeonsi/si_get.c | 8 ++++++--
5 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 78febf796b4..3f711bd45ec 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -355,6 +355,14 @@ static intptr_t readlink(const char *path, char *buf, size_t bufsiz)
#define CIK_TILE_MODE_COLOR_2D 14
+static bool has_syncobj(int fd)
+{
+ uint64_t value;
+ if (drmGetCap(fd, DRM_CAP_SYNCOBJ, &value))
+ return false;
+ return value ? true : false;
+}
+
static bool has_timeline_syncobj(int fd)
{
uint64_t value;
@@ -1068,7 +1076,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->memory_freq_mhz_effective *= ac_memory_ops_per_clock(info->vram_type);
info->has_userptr = true;
+ info->has_syncobj = has_syncobj(fd);
info->has_timeline_syncobj = has_timeline_syncobj(fd);
+ info->has_fence_to_handle = info->has_syncobj;
info->has_local_buffers = true;
info->has_bo_metadata = true;
info->has_eqaa_surface_allocator = info->gfx_level < GFX11;
@@ -1974,7 +1984,9 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
fprintf(f, "Kernel & winsys capabilities:\n");
fprintf(f, " drm = %i.%i.%i\n", info->drm_major, info->drm_minor, info->drm_patchlevel);
fprintf(f, " has_userptr = %i\n", info->has_userptr);
+ fprintf(f, " has_syncobj = %u\n", info->has_syncobj);
fprintf(f, " has_timeline_syncobj = %u\n", info->has_timeline_syncobj);
+ fprintf(f, " has_fence_to_handle = %u\n", info->has_fence_to_handle);
fprintf(f, " has_local_buffers = %u\n", info->has_local_buffers);
fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata);
fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 68fbe909a97..40670d87770 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -218,7 +218,9 @@ struct radeon_info {
uint32_t max_submitted_ibs[AMD_NUM_IP_TYPES];
bool is_amdgpu;
bool has_userptr;
+ bool has_syncobj;
bool has_timeline_syncobj;
+ bool has_fence_to_handle;
bool has_local_buffers;
bool has_bo_metadata;
bool has_eqaa_surface_allocator;
diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c
index aaa171a07ed..5a10aad5907 100644
--- a/src/gallium/drivers/r600/r600_pipe_common.c
+++ b/src/gallium/drivers/r600/r600_pipe_common.c
@@ -1338,6 +1338,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
printf("has_userptr = %i\n", rscreen->info.has_userptr);
+ printf("has_syncobj = %u\n", rscreen->info.has_syncobj);
printf("r600_max_quad_pipes = %i\n", rscreen->info.r600_max_quad_pipes);
printf("max_gpu_freq_mhz = %i\n", rscreen->info.max_gpu_freq_mhz);
diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index a1ae9125e00..1d2406df9fd 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -374,10 +374,16 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl
switch (type) {
case PIPE_FD_TYPE_NATIVE_SYNC:
+ if (!sscreen->info.has_fence_to_handle)
+ goto finish;
+
sfence->gfx = ws->fence_import_sync_file(ws, fd);
break;
case PIPE_FD_TYPE_SYNCOBJ:
+ if (!sscreen->info.has_syncobj)
+ goto finish;
+
sfence->gfx = ws->fence_import_syncobj(ws, fd);
break;
@@ -385,6 +391,7 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl
unreachable("bad fence fd type when importing");
}
+finish:
if (!sfence->gfx) {
FREE(sfence);
return;
@@ -400,6 +407,9 @@ static int si_fence_get_fd(struct pipe_screen *screen, struct pipe_fence_handle
struct si_fence *sfence = (struct si_fence *)fence;
int gfx_fd = -1;
+ if (!sscreen->info.has_fence_to_handle)
+ return -1;
+
util_queue_fence_wait(&sfence->ready);
/* Deferred fences aren't supported. */
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index a9ac90dca52..3c8a75e9583 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -168,8 +168,6 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT: /* TODO: remove if it's slow */
case PIPE_CAP_NULL_TEXTURES:
case PIPE_CAP_HAS_CONST_BW:
- case PIPE_CAP_FENCE_SIGNAL:
- case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_CL_GL_SHARING:
return 1;
@@ -287,9 +285,15 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
PIPE_CONTEXT_PRIORITY_MEDIUM |
PIPE_CONTEXT_PRIORITY_HIGH;
+ case PIPE_CAP_FENCE_SIGNAL:
+ return sscreen->info.has_syncobj;
+
case PIPE_CAP_CONSTBUF0_FLAGS:
return SI_RESOURCE_FLAG_32BIT;
+ case PIPE_CAP_NATIVE_FENCE_FD:
+ return sscreen->info.has_fence_to_handle;
+
case PIPE_CAP_DRAW_PARAMETERS:
case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
--
2.45.2

41
SOURCES/0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch
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@ -1,41 +0,0 @@
From 1f3ea20998329788f6a14166d8ba9b3948b7e864 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Exp=C3=B3sito?= <jexposit@redhat.com>
Date: Thu, 27 Jun 2024 13:07:11 +0200
Subject: [PATCH] llvmpipe: Init eglQueryDmaBufModifiersEXT num_modifiers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Initialize the number of modifiers when `max` is 0 as documented [1]:
If <max_formats> is 0, no formats are returned, but the total number
of formats is returned in <num_formats>, and no error is generated.
[1] https://registry.khronos.org/EGL/extensions/EXT/EGL_EXT_image_dma_buf_import_modifiers.txt
Fixes: d74ea2c117fe ("llvmpipe: Implement dmabuf handling")
Signed-off-by: José Expósito <jexposit@redhat.com>
---
src/gallium/drivers/llvmpipe/lp_texture.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c
index 0044e689aab..30d5057cf9f 100644
--- a/src/gallium/drivers/llvmpipe/lp_texture.c
+++ b/src/gallium/drivers/llvmpipe/lp_texture.c
@@ -1724,10 +1724,10 @@ llvmpipe_resource_get_param(struct pipe_screen *screen,
static void
llvmpipe_query_dmabuf_modifiers(struct pipe_screen *pscreen, enum pipe_format format, int max, uint64_t *modifiers, unsigned int *external_only, int *count)
{
- if (max) {
- *count = 1;
+ *count = 1;
+
+ if (max)
*modifiers = DRM_FORMAT_MOD_LINEAR;
- }
}
static bool
--
2.45.2

2565
SOURCES/RHEL-53423.patch Normal file
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File diff suppressed because it is too large Load Diff

131
SOURCES/fix-egl-on-s390x.patch
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@ -1,131 +0,0 @@
From 5ca85d75c05de9df7c3170122dfdb04bc795b43a Mon Sep 17 00:00:00 2001
From: Daniel Stone <daniels@collabora.com>
Date: Fri, 21 Jun 2024 11:24:31 +0100
Subject: [PATCH 1/3] dri: Fix BGR format exclusion
The check we had for BGR vs. RGB formats was testing completely the
wrong thing. Fix it so we can restore the previous set of configs we
expose to the frontend, which also fixes surfaceless platform on s390x.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: ad0edea53a73 ("st/dri: Check format properties from format helpers")
Closes: mesa/mesa#11360
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837>
---
src/gallium/frontends/dri/dri_screen.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/src/gallium/frontends/dri/dri_screen.c b/src/gallium/frontends/dri/dri_screen.c
index 97d11f324ee0b..2e9ce01147a89 100644
--- a/src/gallium/frontends/dri/dri_screen.c
+++ b/src/gallium/frontends/dri/dri_screen.c
@@ -386,17 +386,21 @@ dri_fill_in_modes(struct dri_screen *screen)
uint8_t msaa_modes[MSAA_VISUAL_MAX_SAMPLES];
/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
- if (!allow_rgba_ordering &&
- util_format_get_component_shift(pipe_formats[f],
- UTIL_FORMAT_COLORSPACE_RGB, 0)
+ if (!allow_rgba_ordering) {
+ unsigned sh_ax = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3);
+ unsigned sh_b = util_format_get_component_shift(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2);
#if UTIL_ARCH_BIG_ENDIAN
- >
+ unsigned sz_b = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 2);
+
+ if (sz_b + sh_b == sh_ax)
+ continue;
#else
- <
+ unsigned sz_ax = util_format_get_component_bits(pipe_formats[f], UTIL_FORMAT_COLORSPACE_RGB, 3);
+
+ if (sz_ax + sh_ax == sh_b)
+ continue;
#endif
- util_format_get_component_shift(pipe_formats[f],
- UTIL_FORMAT_COLORSPACE_RGB, 2))
- continue;
+ }
if (!allow_rgb10 &&
util_format_get_component_bits(pipe_formats[f],
--
GitLab
From 94e15d0f64a3a5ca6b86a3e02343cac0d453aed6 Mon Sep 17 00:00:00 2001
From: Daniel Stone <daniels@collabora.com>
Date: Fri, 21 Jun 2024 14:19:06 +0100
Subject: [PATCH 2/3] egl/surfaceless: Enable RGBA configs
Doing this is harmless since we operate on an allowlist of pipe_configs
anyway.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837>
---
src/egl/drivers/dri2/platform_surfaceless.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/egl/drivers/dri2/platform_surfaceless.c b/src/egl/drivers/dri2/platform_surfaceless.c
index 0668ec9285ff3..4b69874d3f60a 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -190,6 +190,8 @@ surfaceless_get_capability(void *loaderPrivate, enum dri_loader_cap cap)
switch (cap) {
case DRI_LOADER_CAP_FP16:
return 1;
+ case DRI_LOADER_CAP_RGBA_ORDERING:
+ return 1;
default:
return 0;
}
--
GitLab
From 9eeaa4618f8a7bc8215ac3f195ced7f8eae4342e Mon Sep 17 00:00:00 2001
From: Daniel Stone <daniels@collabora.com>
Date: Fri, 21 Jun 2024 14:19:06 +0100
Subject: [PATCH 3/3] egl/gbm: Enable RGBA configs
Doing this is harmless since we operate on an allowlist of pipe_configs
anyway.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29837>
---
src/gallium/drivers/lima/ci/lima-fails.txt | 2 --
src/gbm/backends/dri/gbm_dri.c | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/lima/ci/lima-fails.txt b/src/gallium/drivers/lima/ci/lima-fails.txt
index d6c4edbb5ef5e..155498dbb5679 100644
--- a/src/gallium/drivers/lima/ci/lima-fails.txt
+++ b/src/gallium/drivers/lima/ci/lima-fails.txt
@@ -55,9 +55,7 @@ wayland-dEQP-EGL.functional.wide_color.window_888_colorspace_srgb,Fail
x11-dEQP-EGL.functional.create_context.no_config,Fail
x11-dEQP-EGL.functional.image.modify.renderbuffer_depth16_renderbuffer_clear_depth,Fail
-x11-dEQP-EGL.functional.render.multi_context.gles2.rgb888_window,Fail
x11-dEQP-EGL.functional.render.multi_context.gles2.rgba8888_pbuffer,Fail
-x11-dEQP-EGL.functional.render.multi_thread.gles2.rgb888_window,Fail
x11-dEQP-EGL.functional.render.multi_thread.gles2.rgba8888_pbuffer,Fail
x11-dEQP-EGL.functional.wide_color.pbuffer_8888_colorspace_srgb,Fail
x11-dEQP-EGL.functional.wide_color.window_8888_colorspace_srgb,Fail
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index 0526f4f8dc16f..6cc2d5d8197f5 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -108,6 +108,8 @@ dri_get_capability(void *loaderPrivate, enum dri_loader_cap cap)
switch (cap) {
case DRI_LOADER_CAP_FP16:
return 1;
+ case DRI_LOADER_CAP_RGBA_ORDERING:
+ return 1;
default:
return 0;
}
--
GitLab

736
SOURCES/raspberrypi-2712D0.patch
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@ -1,736 +0,0 @@
From 646544da9e3b50cc72b963fe9693c979dbbbf636 Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Tue, 14 May 2024 09:40:16 +0200
Subject: [PATCH 1/3] broadcom/cle: fix up shader record for V3D 7.1.10 /
2712D0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
(cherry picked from commit 7b807c3e948398da96293c6252c57505e11c74c9)
---
src/broadcom/cle/v3d_packet.xml | 63 +++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/src/broadcom/cle/v3d_packet.xml b/src/broadcom/cle/v3d_packet.xml
index 09dde392fac..4763b891aab 100644
--- a/src/broadcom/cle/v3d_packet.xml
+++ b/src/broadcom/cle/v3d_packet.xml
@@ -1211,6 +1211,69 @@
<field name="Coordinate Shader Uniforms Address" size="32" start="28b" type="address"/>
</struct>
+ <!-- This one is exclusive to 2712D0 (V3D 7.1.10) -->
+ <struct name="GL Shader State Record Draw Index" min_ver="71">
+ <field name="Point size in shaded vertex data" size="1" start="0" type="bool"/>
+ <field name="Enable clipping" size="1" start="1" type="bool"/>
+
+ <field name="Vertex ID read by coordinate shader" size="1" start="2" type="bool"/>
+ <field name="Instance ID read by coordinate shader" size="1" start="3" type="bool"/>
+ <field name="Base Instance ID read by coordinate shader" size="1" start="4" type="bool"/>
+ <field name="cs_basevertex" size="1" start="5" type="bool"/>
+ <field name="cs_drawindex" size="1" start="6" type="bool"/>
+
+ <field name="Vertex ID read by vertex shader" size="1" start="7" type="bool"/>
+ <field name="Instance ID read by vertex shader" size="1" start="8" type="bool"/>
+ <field name="Base Instance ID read by vertex shader" size="1" start="9" type="bool"/>
+ <field name="vs_basevertex" size="1" start="10" type="bool"/>
+ <field name="vs_drawindex" size="1" start="11" type="bool"/>
+
+ <field name="Fragment shader does Z writes" size="1" start="12" type="bool"/>
+ <field name="Turn off early-z test" size="1" start="13" type="bool"/>
+
+ <field name="Fragment shader uses real pixel centre W in addition to centroid W2" size="1" start="15" type="bool"/>
+ <field name="Enable Sample Rate Shading" size="1" start="16" type="bool"/>
+ <field name="Any shader reads hardware-written Primitive ID" size="1" start="17" type="bool"/>
+ <field name="Insert Primitive ID as first varying to fragment shader" size="1" start="18" type="bool"/>
+ <field name="Turn off scoreboard" size="1" start="19" type="bool"/>
+ <field name="Do scoreboard wait on first thread switch" size="1" start="20" type="bool"/>
+ <field name="Disable implicit point/line varyings" size="1" start="21" type="bool"/>
+ <field name="No prim pack" size="1" start="22" type="bool"/>
+ <field name="Never defer FEP depth writes" size="1" start="23" type="bool"/>
+
+ <field name="Number of varyings in Fragment Shader" size="8" start="3b" type="uint"/>
+
+ <field name="Coordinate Shader output VPM segment size" size="4" start="4b" type="uint"/>
+ <field name="Min Coord Shader output segments required in play in addition to VCM cache size" size="4" start="36" type="uint"/>
+
+ <field name="Coordinate Shader input VPM segment size" size="4" start="5b" type="uint"/>
+ <field name="Min Coord Shader input segments required in play" size="4" start="44" type="uint" minus_one="true"/>
+
+ <field name="Vertex Shader output VPM segment size" size="4" start="6b" type="uint"/>
+ <field name="Min Vertex Shader output segments required in play in addition to VCM cache size" size="4" start="52" type="uint"/>
+
+ <field name="Vertex Shader input VPM segment size" size="4" start="7b" type="uint"/>
+ <field name="Min Vertex Shader input segments required in play" size="4" start="60" type="uint" minus_one="true"/>
+
+ <field name="Fragment Shader Code Address" size="29" start="67" type="address"/>
+ <field name="Fragment Shader 4-way threadable" size="1" start="64" type="bool"/>
+ <field name="Fragment Shader start in final thread section" size="1" start="65" type="bool"/>
+ <field name="Fragment Shader Propagate NaNs" size="1" start="66" type="bool"/>
+ <field name="Fragment Shader Uniforms Address" size="32" start="12b" type="address"/>
+
+ <field name="Vertex Shader Code Address" size="29" start="131" type="address"/>
+ <field name="Vertex Shader 4-way threadable" size="1" start="128" type="bool"/>
+ <field name="Vertex Shader start in final thread section" size="1" start="129" type="bool"/>
+ <field name="Vertex Shader Propagate NaNs" size="1" start="130" type="bool"/>
+ <field name="Vertex Shader Uniforms Address" size="32" start="20b" type="address"/>
+
+ <field name="Coordinate Shader Code Address" size="29" start="195" type="address"/>
+ <field name="Coordinate Shader 4-way threadable" size="1" start="192" type="bool"/>
+ <field name="Coordinate Shader start in final thread section" size="1" start="193" type="bool"/>
+ <field name="Coordinate Shader Propagate NaNs" size="1" start="194" type="bool"/>
+ <field name="Coordinate Shader Uniforms Address" size="32" start="28b" type="address"/>
+ </struct>
+
<struct name="Geometry Shader State Record">
<field name="Geometry Bin Mode Shader Code Address" size="29" start="3" type="address"/>
<field name="Geometry Bin Mode Shader 4-way threadable" size="1" start="0" type="bool"/>
--
2.49.0
From 576044e52be2c504ef011029015ecce1b95744b6 Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Tue, 14 May 2024 10:24:07 +0200
Subject: [PATCH 2/3] v3d: support 2712D0
2710D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versoning framework doesn't
support changes based on revision number alone.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
(cherry picked from commit 1fc846dce396e2e0d1be23568e22ae2510df71bd)
---
src/broadcom/common/v3d_device_info.h | 6 +
src/gallium/drivers/v3d/v3dx_draw.c | 354 +++++++++++++++++---------
2 files changed, 233 insertions(+), 127 deletions(-)
diff --git a/src/broadcom/common/v3d_device_info.h b/src/broadcom/common/v3d_device_info.h
index 8dfc7858727..0df25e8dcce 100644
--- a/src/broadcom/common/v3d_device_info.h
+++ b/src/broadcom/common/v3d_device_info.h
@@ -52,4 +52,10 @@ typedef int (*v3d_ioctl_fun)(int fd, unsigned long request, void *arg);
bool
v3d_get_device_info(int fd, struct v3d_device_info* devinfo, v3d_ioctl_fun fun);
+static inline bool
+v3d_device_has_draw_index(struct v3d_device_info *devinfo)
+{
+ return devinfo->ver > 71 || (devinfo->ver == 71 && devinfo->rev >= 10);
+}
+
#endif
diff --git a/src/gallium/drivers/v3d/v3dx_draw.c b/src/gallium/drivers/v3d/v3dx_draw.c
index 6bcb5818fb4..754bd54f0b0 100644
--- a/src/gallium/drivers/v3d/v3dx_draw.c
+++ b/src/gallium/drivers/v3d/v3dx_draw.c
@@ -471,6 +471,230 @@ v3d_emit_tes_gs_shader_params(struct v3d_job *job,
}
}
+static void
+emit_shader_state_record(struct v3d_context *v3d,
+ struct v3d_job *job,
+ const struct pipe_draw_info *info,
+ struct v3d_vertex_stateobj *vtx,
+ struct v3d_cl_reloc cs_uniforms,
+ struct v3d_cl_reloc vs_uniforms,
+ struct v3d_cl_reloc fs_uniforms,
+ struct vpm_config *vpm_cfg_bin,
+ struct vpm_config *vpm_cfg)
+{
+#if V3D_VERSION >= 71
+ /* 2712D0 (V3D 7.1.10) has included draw index and base vertex,
+ * shuffling all the fields in the packet. Since the versioning
+ * framework doesn't handle revision numbers, the XML has a
+ * different shader state record packet including the new fields
+ * and we decide at run time which packet we need to emit.
+ */
+ if (v3d_device_has_draw_index(&v3d->screen->devinfo)) {
+ cl_emit(&job->indirect, GL_SHADER_STATE_RECORD_DRAW_INDEX, shader) {
+ shader.enable_clipping = true;
+ shader.point_size_in_shaded_vertex_data =
+ (info->mode == MESA_PRIM_POINTS &&
+ v3d->rasterizer->base.point_size_per_vertex);
+ shader.fragment_shader_does_z_writes =
+ v3d->prog.fs->prog_data.fs->writes_z;
+ shader.turn_off_early_z_test =
+ v3d->prog.fs->prog_data.fs->disable_ez;
+ shader.fragment_shader_uses_real_pixel_centre_w_in_addition_to_centroid_w2 =
+ v3d->prog.fs->prog_data.fs->uses_center_w;
+ shader.any_shader_reads_hardware_written_primitive_id =
+ (v3d->prog.gs && v3d->prog.gs->prog_data.gs->uses_pid) ||
+ v3d->prog.fs->prog_data.fs->uses_pid;
+ shader.insert_primitive_id_as_first_varying_to_fragment_shader =
+ !v3d->prog.gs && v3d->prog.fs->prog_data.fs->uses_pid;
+ shader.do_scoreboard_wait_on_first_thread_switch =
+ v3d->prog.fs->prog_data.fs->lock_scoreboard_on_first_thrsw;
+ shader.disable_implicit_point_line_varyings =
+ !v3d->prog.fs->prog_data.fs->uses_implicit_point_line_varyings;
+ shader.number_of_varyings_in_fragment_shader =
+ v3d->prog.fs->prog_data.fs->num_inputs;
+ shader.coordinate_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.cs->resource)->bo,
+ v3d->prog.cs->offset);
+ shader.vertex_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.vs->resource)->bo,
+ v3d->prog.vs->offset);
+ shader.fragment_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.fs->resource)->bo,
+ v3d->prog.fs->offset);
+ shader.coordinate_shader_input_vpm_segment_size =
+ v3d->prog.cs->prog_data.vs->vpm_input_size;
+ shader.vertex_shader_input_vpm_segment_size =
+ v3d->prog.vs->prog_data.vs->vpm_input_size;
+ shader.coordinate_shader_output_vpm_segment_size =
+ v3d->prog.cs->prog_data.vs->vpm_output_size;
+ shader.vertex_shader_output_vpm_segment_size =
+ v3d->prog.vs->prog_data.vs->vpm_output_size;
+ shader.coordinate_shader_uniforms_address = cs_uniforms;
+ shader.vertex_shader_uniforms_address = vs_uniforms;
+ shader.fragment_shader_uniforms_address = fs_uniforms;
+ shader.min_coord_shader_input_segments_required_in_play =
+ vpm_cfg_bin->As;
+ shader.min_vertex_shader_input_segments_required_in_play =
+ vpm_cfg->As;
+ shader.min_coord_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ vpm_cfg_bin->Ve;
+ shader.min_vertex_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ vpm_cfg->Ve;
+ shader.coordinate_shader_4_way_threadable =
+ v3d->prog.cs->prog_data.vs->base.threads == 4;
+ shader.vertex_shader_4_way_threadable =
+ v3d->prog.vs->prog_data.vs->base.threads == 4;
+ shader.fragment_shader_4_way_threadable =
+ v3d->prog.fs->prog_data.fs->base.threads == 4;
+ shader.coordinate_shader_start_in_final_thread_section =
+ v3d->prog.cs->prog_data.vs->base.single_seg;
+ shader.vertex_shader_start_in_final_thread_section =
+ v3d->prog.vs->prog_data.vs->base.single_seg;
+ shader.fragment_shader_start_in_final_thread_section =
+ v3d->prog.fs->prog_data.fs->base.single_seg;
+ shader.vertex_id_read_by_coordinate_shader =
+ v3d->prog.cs->prog_data.vs->uses_vid;
+ shader.instance_id_read_by_coordinate_shader =
+ v3d->prog.cs->prog_data.vs->uses_iid;
+ shader.vertex_id_read_by_vertex_shader =
+ v3d->prog.vs->prog_data.vs->uses_vid;
+ shader.instance_id_read_by_vertex_shader =
+ v3d->prog.vs->prog_data.vs->uses_iid;
+ }
+ return;
+ }
+#endif
+
+ assert(!v3d_device_has_draw_index(&v3d->screen->devinfo));
+ cl_emit(&job->indirect, GL_SHADER_STATE_RECORD, shader) {
+ shader.enable_clipping = true;
+ /* V3D_DIRTY_PRIM_MODE | V3D_DIRTY_RASTERIZER */
+ shader.point_size_in_shaded_vertex_data =
+ (info->mode == MESA_PRIM_POINTS &&
+ v3d->rasterizer->base.point_size_per_vertex);
+
+ /* Must be set if the shader modifies Z, discards, or modifies
+ * the sample mask. For any of these cases, the fragment
+ * shader needs to write the Z value (even just discards).
+ */
+ shader.fragment_shader_does_z_writes =
+ v3d->prog.fs->prog_data.fs->writes_z;
+
+ /* Set if the EZ test must be disabled (due to shader side
+ * effects and the early_z flag not being present in the
+ * shader).
+ */
+ shader.turn_off_early_z_test =
+ v3d->prog.fs->prog_data.fs->disable_ez;
+
+ shader.fragment_shader_uses_real_pixel_centre_w_in_addition_to_centroid_w2 =
+ v3d->prog.fs->prog_data.fs->uses_center_w;
+
+ shader.any_shader_reads_hardware_written_primitive_id =
+ (v3d->prog.gs && v3d->prog.gs->prog_data.gs->uses_pid) ||
+ v3d->prog.fs->prog_data.fs->uses_pid;
+ shader.insert_primitive_id_as_first_varying_to_fragment_shader =
+ !v3d->prog.gs && v3d->prog.fs->prog_data.fs->uses_pid;
+
+ shader.do_scoreboard_wait_on_first_thread_switch =
+ v3d->prog.fs->prog_data.fs->lock_scoreboard_on_first_thrsw;
+ shader.disable_implicit_point_line_varyings =
+ !v3d->prog.fs->prog_data.fs->uses_implicit_point_line_varyings;
+
+ shader.number_of_varyings_in_fragment_shader =
+ v3d->prog.fs->prog_data.fs->num_inputs;
+
+ shader.coordinate_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.cs->resource)->bo,
+ v3d->prog.cs->offset);
+ shader.vertex_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.vs->resource)->bo,
+ v3d->prog.vs->offset);
+ shader.fragment_shader_code_address =
+ cl_address(v3d_resource(v3d->prog.fs->resource)->bo,
+ v3d->prog.fs->offset);
+
+#if V3D_VERSION == 42
+ shader.coordinate_shader_propagate_nans = true;
+ shader.vertex_shader_propagate_nans = true;
+ shader.fragment_shader_propagate_nans = true;
+
+ /* XXX: Use combined input/output size flag in the common
+ * case.
+ */
+ shader.coordinate_shader_has_separate_input_and_output_vpm_blocks =
+ v3d->prog.cs->prog_data.vs->separate_segments;
+ shader.vertex_shader_has_separate_input_and_output_vpm_blocks =
+ v3d->prog.vs->prog_data.vs->separate_segments;
+ shader.coordinate_shader_input_vpm_segment_size =
+ v3d->prog.cs->prog_data.vs->separate_segments ?
+ v3d->prog.cs->prog_data.vs->vpm_input_size : 1;
+ shader.vertex_shader_input_vpm_segment_size =
+ v3d->prog.vs->prog_data.vs->separate_segments ?
+ v3d->prog.vs->prog_data.vs->vpm_input_size : 1;
+#endif
+ /* On V3D 7.1 there isn't a specific flag to set if we are using
+ * shared/separate segments or not. We just set the value of
+ * vpm_input_size to 0, and set output to the max needed. That should be
+ * already properly set on prog_data_vs_bin
+ */
+#if V3D_VERSION == 71
+ shader.coordinate_shader_input_vpm_segment_size =
+ v3d->prog.cs->prog_data.vs->vpm_input_size;
+ shader.vertex_shader_input_vpm_segment_size =
+ v3d->prog.vs->prog_data.vs->vpm_input_size;
+#endif
+
+ shader.coordinate_shader_output_vpm_segment_size =
+ v3d->prog.cs->prog_data.vs->vpm_output_size;
+ shader.vertex_shader_output_vpm_segment_size =
+ v3d->prog.vs->prog_data.vs->vpm_output_size;
+
+ shader.coordinate_shader_uniforms_address = cs_uniforms;
+ shader.vertex_shader_uniforms_address = vs_uniforms;
+ shader.fragment_shader_uniforms_address = fs_uniforms;
+
+ shader.min_coord_shader_input_segments_required_in_play =
+ vpm_cfg_bin->As;
+ shader.min_vertex_shader_input_segments_required_in_play =
+ vpm_cfg->As;
+
+ shader.min_coord_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ vpm_cfg_bin->Ve;
+ shader.min_vertex_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ vpm_cfg->Ve;
+
+ shader.coordinate_shader_4_way_threadable =
+ v3d->prog.cs->prog_data.vs->base.threads == 4;
+ shader.vertex_shader_4_way_threadable =
+ v3d->prog.vs->prog_data.vs->base.threads == 4;
+ shader.fragment_shader_4_way_threadable =
+ v3d->prog.fs->prog_data.fs->base.threads == 4;
+
+ shader.coordinate_shader_start_in_final_thread_section =
+ v3d->prog.cs->prog_data.vs->base.single_seg;
+ shader.vertex_shader_start_in_final_thread_section =
+ v3d->prog.vs->prog_data.vs->base.single_seg;
+ shader.fragment_shader_start_in_final_thread_section =
+ v3d->prog.fs->prog_data.fs->base.single_seg;
+
+ shader.vertex_id_read_by_coordinate_shader =
+ v3d->prog.cs->prog_data.vs->uses_vid;
+ shader.instance_id_read_by_coordinate_shader =
+ v3d->prog.cs->prog_data.vs->uses_iid;
+ shader.vertex_id_read_by_vertex_shader =
+ v3d->prog.vs->prog_data.vs->uses_vid;
+ shader.instance_id_read_by_vertex_shader =
+ v3d->prog.vs->prog_data.vs->uses_iid;
+
+#if V3D_VERSION == 42
+ shader.address_of_default_attribute_values =
+ cl_address(v3d_resource(vtx->defaults)->bo,
+ vtx->defaults_offset);
+#endif
+ }
+}
+
static void
v3d_emit_gl_shader_state(struct v3d_context *v3d,
const struct pipe_draw_info *info)
@@ -580,133 +804,9 @@ v3d_emit_gl_shader_state(struct v3d_context *v3d,
vpm_cfg.Gv);
}
- cl_emit(&job->indirect, GL_SHADER_STATE_RECORD, shader) {
- shader.enable_clipping = true;
- /* V3D_DIRTY_PRIM_MODE | V3D_DIRTY_RASTERIZER */
- shader.point_size_in_shaded_vertex_data =
- (info->mode == MESA_PRIM_POINTS &&
- v3d->rasterizer->base.point_size_per_vertex);
-
- /* Must be set if the shader modifies Z, discards, or modifies
- * the sample mask. For any of these cases, the fragment
- * shader needs to write the Z value (even just discards).
- */
- shader.fragment_shader_does_z_writes =
- v3d->prog.fs->prog_data.fs->writes_z;
-
- /* Set if the EZ test must be disabled (due to shader side
- * effects and the early_z flag not being present in the
- * shader).
- */
- shader.turn_off_early_z_test =
- v3d->prog.fs->prog_data.fs->disable_ez;
-
- shader.fragment_shader_uses_real_pixel_centre_w_in_addition_to_centroid_w2 =
- v3d->prog.fs->prog_data.fs->uses_center_w;
-
- shader.any_shader_reads_hardware_written_primitive_id =
- (v3d->prog.gs && v3d->prog.gs->prog_data.gs->uses_pid) ||
- v3d->prog.fs->prog_data.fs->uses_pid;
- shader.insert_primitive_id_as_first_varying_to_fragment_shader =
- !v3d->prog.gs && v3d->prog.fs->prog_data.fs->uses_pid;
-
- shader.do_scoreboard_wait_on_first_thread_switch =
- v3d->prog.fs->prog_data.fs->lock_scoreboard_on_first_thrsw;
- shader.disable_implicit_point_line_varyings =
- !v3d->prog.fs->prog_data.fs->uses_implicit_point_line_varyings;
-
- shader.number_of_varyings_in_fragment_shader =
- v3d->prog.fs->prog_data.fs->num_inputs;
-
- shader.coordinate_shader_code_address =
- cl_address(v3d_resource(v3d->prog.cs->resource)->bo,
- v3d->prog.cs->offset);
- shader.vertex_shader_code_address =
- cl_address(v3d_resource(v3d->prog.vs->resource)->bo,
- v3d->prog.vs->offset);
- shader.fragment_shader_code_address =
- cl_address(v3d_resource(v3d->prog.fs->resource)->bo,
- v3d->prog.fs->offset);
-
-#if V3D_VERSION == 42
- shader.coordinate_shader_propagate_nans = true;
- shader.vertex_shader_propagate_nans = true;
- shader.fragment_shader_propagate_nans = true;
-
- /* XXX: Use combined input/output size flag in the common
- * case.
- */
- shader.coordinate_shader_has_separate_input_and_output_vpm_blocks =
- v3d->prog.cs->prog_data.vs->separate_segments;
- shader.vertex_shader_has_separate_input_and_output_vpm_blocks =
- v3d->prog.vs->prog_data.vs->separate_segments;
- shader.coordinate_shader_input_vpm_segment_size =
- v3d->prog.cs->prog_data.vs->separate_segments ?
- v3d->prog.cs->prog_data.vs->vpm_input_size : 1;
- shader.vertex_shader_input_vpm_segment_size =
- v3d->prog.vs->prog_data.vs->separate_segments ?
- v3d->prog.vs->prog_data.vs->vpm_input_size : 1;
-#endif
- /* On V3D 7.1 there isn't a specific flag to set if we are using
- * shared/separate segments or not. We just set the value of
- * vpm_input_size to 0, and set output to the max needed. That should be
- * already properly set on prog_data_vs_bin
- */
-#if V3D_VERSION == 71
- shader.coordinate_shader_input_vpm_segment_size =
- v3d->prog.cs->prog_data.vs->vpm_input_size;
- shader.vertex_shader_input_vpm_segment_size =
- v3d->prog.vs->prog_data.vs->vpm_input_size;
-#endif
-
- shader.coordinate_shader_output_vpm_segment_size =
- v3d->prog.cs->prog_data.vs->vpm_output_size;
- shader.vertex_shader_output_vpm_segment_size =
- v3d->prog.vs->prog_data.vs->vpm_output_size;
-
- shader.coordinate_shader_uniforms_address = cs_uniforms;
- shader.vertex_shader_uniforms_address = vs_uniforms;
- shader.fragment_shader_uniforms_address = fs_uniforms;
-
- shader.min_coord_shader_input_segments_required_in_play =
- vpm_cfg_bin.As;
- shader.min_vertex_shader_input_segments_required_in_play =
- vpm_cfg.As;
-
- shader.min_coord_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
- vpm_cfg_bin.Ve;
- shader.min_vertex_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
- vpm_cfg.Ve;
-
- shader.coordinate_shader_4_way_threadable =
- v3d->prog.cs->prog_data.vs->base.threads == 4;
- shader.vertex_shader_4_way_threadable =
- v3d->prog.vs->prog_data.vs->base.threads == 4;
- shader.fragment_shader_4_way_threadable =
- v3d->prog.fs->prog_data.fs->base.threads == 4;
-
- shader.coordinate_shader_start_in_final_thread_section =
- v3d->prog.cs->prog_data.vs->base.single_seg;
- shader.vertex_shader_start_in_final_thread_section =
- v3d->prog.vs->prog_data.vs->base.single_seg;
- shader.fragment_shader_start_in_final_thread_section =
- v3d->prog.fs->prog_data.fs->base.single_seg;
-
- shader.vertex_id_read_by_coordinate_shader =
- v3d->prog.cs->prog_data.vs->uses_vid;
- shader.instance_id_read_by_coordinate_shader =
- v3d->prog.cs->prog_data.vs->uses_iid;
- shader.vertex_id_read_by_vertex_shader =
- v3d->prog.vs->prog_data.vs->uses_vid;
- shader.instance_id_read_by_vertex_shader =
- v3d->prog.vs->prog_data.vs->uses_iid;
-
-#if V3D_VERSION == 42
- shader.address_of_default_attribute_values =
- cl_address(v3d_resource(vtx->defaults)->bo,
- vtx->defaults_offset);
-#endif
- }
+ emit_shader_state_record(v3d, job, info, vtx,
+ cs_uniforms, vs_uniforms, fs_uniforms,
+ &vpm_cfg_bin, &vpm_cfg);
bool cs_loaded_any = false;
const bool cs_uses_builtins = v3d->prog.cs->prog_data.vs->uses_iid ||
--
2.49.0
From de2176a6688d036abdfd6d2a13d4aa9834cf870c Mon Sep 17 00:00:00 2001
From: Iago Toral Quiroga <itoral@igalia.com>
Date: Thu, 23 Nov 2023 11:33:57 +0100
Subject: [PATCH 3/3] v3dv: support 2712D0
2712D0 has V3D 7.1.10 which included draw index and
base vertex in the shader state record packet, shuffling
the locations of most of its fields. Handle this at run
time by emitting the appropriate packet based on the
V3D version since our current versioning framework doesn't
support changes based on revision number alone.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29189>
(cherry picked from commit b545e78f12b02069fa363a4a7ef749a996ea3c4b)
---
src/broadcom/vulkan/v3dvx_cmd_buffer.c | 94 +++++++++++++++++---------
src/broadcom/vulkan/v3dvx_pipeline.c | 75 +++++++++++++++++---
2 files changed, 129 insertions(+), 40 deletions(-)
diff --git a/src/broadcom/vulkan/v3dvx_cmd_buffer.c b/src/broadcom/vulkan/v3dvx_cmd_buffer.c
index 1b511408bfe..1b9d02e126c 100644
--- a/src/broadcom/vulkan/v3dvx_cmd_buffer.c
+++ b/src/broadcom/vulkan/v3dvx_cmd_buffer.c
@@ -2343,6 +2343,13 @@ v3dX(cmd_buffer_emit_gl_shader_state)(struct v3dv_cmd_buffer *cmd_buffer)
uint32_t shader_state_record_length =
cl_packet_length(GL_SHADER_STATE_RECORD);
+#if V3D_VERSION >= 71
+ if (v3d_device_has_draw_index(&pipeline->device->devinfo)) {
+ shader_state_record_length =
+ cl_packet_length(GL_SHADER_STATE_RECORD_DRAW_INDEX);
+ }
+#endif
+
if (pipeline->has_gs) {
shader_state_record_length +=
cl_packet_length(GEOMETRY_SHADER_STATE_RECORD) +
@@ -2390,39 +2397,64 @@ v3dX(cmd_buffer_emit_gl_shader_state)(struct v3dv_cmd_buffer *cmd_buffer)
pipeline->device->default_attribute_float;
#endif
- cl_emit_with_prepacked(&job->indirect, GL_SHADER_STATE_RECORD,
- pipeline->shader_state_record, shader) {
-
- /* FIXME: we are setting this values here and during the
- * prepacking. This is because both cl_emit_with_prepacked and v3dvx_pack
- * asserts for minimum values of these. It would be good to get
- * v3dvx_pack to assert on the final value if possible
- */
- shader.min_coord_shader_input_segments_required_in_play =
- pipeline->vpm_cfg_bin.As;
- shader.min_vertex_shader_input_segments_required_in_play =
- pipeline->vpm_cfg.As;
-
- shader.coordinate_shader_code_address =
- v3dv_cl_address(assembly_bo, vs_bin_variant->assembly_offset);
- shader.vertex_shader_code_address =
- v3dv_cl_address(assembly_bo, vs_variant->assembly_offset);
- shader.fragment_shader_code_address =
- v3dv_cl_address(assembly_bo, fs_variant->assembly_offset);
-
- shader.coordinate_shader_uniforms_address = cmd_buffer->state.uniforms.vs_bin;
- shader.vertex_shader_uniforms_address = cmd_buffer->state.uniforms.vs;
- shader.fragment_shader_uniforms_address = cmd_buffer->state.uniforms.fs;
-
-#if V3D_VERSION == 42
- shader.address_of_default_attribute_values =
- v3dv_cl_address(default_attribute_values, 0);
+#if V3D_VERSION >= 71
+ if (v3d_device_has_draw_index(&pipeline->device->devinfo)) {
+ cl_emit_with_prepacked(&job->indirect, GL_SHADER_STATE_RECORD_DRAW_INDEX,
+ pipeline->shader_state_record, shader) {
+ shader.min_coord_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg_bin.As;
+ shader.min_vertex_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg.As;
+ shader.coordinate_shader_code_address =
+ v3dv_cl_address(assembly_bo, vs_bin_variant->assembly_offset);
+ shader.vertex_shader_code_address =
+ v3dv_cl_address(assembly_bo, vs_variant->assembly_offset);
+ shader.fragment_shader_code_address =
+ v3dv_cl_address(assembly_bo, fs_variant->assembly_offset);
+ shader.coordinate_shader_uniforms_address = cmd_buffer->state.uniforms.vs_bin;
+ shader.vertex_shader_uniforms_address = cmd_buffer->state.uniforms.vs;
+ shader.fragment_shader_uniforms_address = cmd_buffer->state.uniforms.fs;
+ shader.any_shader_reads_hardware_written_primitive_id =
+ (pipeline->has_gs && prog_data_gs->uses_pid) || prog_data_fs->uses_pid;
+ shader.insert_primitive_id_as_first_varying_to_fragment_shader =
+ !pipeline->has_gs && prog_data_fs->uses_pid;
+ }
+ } else
#endif
+ {
+ cl_emit_with_prepacked(&job->indirect, GL_SHADER_STATE_RECORD,
+ pipeline->shader_state_record, shader) {
+ /* FIXME: we are setting this values here and during the
+ * prepacking. This is because both cl_emit_with_prepacked and v3dvx_pack
+ * asserts for minimum values of these. It would be good to get
+ * v3dvx_pack to assert on the final value if possible
+ */
+ shader.min_coord_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg_bin.As;
+ shader.min_vertex_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg.As;
- shader.any_shader_reads_hardware_written_primitive_id =
- (pipeline->has_gs && prog_data_gs->uses_pid) || prog_data_fs->uses_pid;
- shader.insert_primitive_id_as_first_varying_to_fragment_shader =
- !pipeline->has_gs && prog_data_fs->uses_pid;
+ shader.coordinate_shader_code_address =
+ v3dv_cl_address(assembly_bo, vs_bin_variant->assembly_offset);
+ shader.vertex_shader_code_address =
+ v3dv_cl_address(assembly_bo, vs_variant->assembly_offset);
+ shader.fragment_shader_code_address =
+ v3dv_cl_address(assembly_bo, fs_variant->assembly_offset);
+
+ shader.coordinate_shader_uniforms_address = cmd_buffer->state.uniforms.vs_bin;
+ shader.vertex_shader_uniforms_address = cmd_buffer->state.uniforms.vs;
+ shader.fragment_shader_uniforms_address = cmd_buffer->state.uniforms.fs;
+
+ #if V3D_VERSION == 42
+ shader.address_of_default_attribute_values =
+ v3dv_cl_address(default_attribute_values, 0);
+ #endif
+
+ shader.any_shader_reads_hardware_written_primitive_id =
+ (pipeline->has_gs && prog_data_gs->uses_pid) || prog_data_fs->uses_pid;
+ shader.insert_primitive_id_as_first_varying_to_fragment_shader =
+ !pipeline->has_gs && prog_data_fs->uses_pid;
+ }
}
/* Upload vertex element attributes (SHADER_STATE_ATTRIBUTE_RECORD) */
diff --git a/src/broadcom/vulkan/v3dvx_pipeline.c b/src/broadcom/vulkan/v3dvx_pipeline.c
index 5ae0d2597b0..ad66374289e 100644
--- a/src/broadcom/vulkan/v3dvx_pipeline.c
+++ b/src/broadcom/vulkan/v3dvx_pipeline.c
@@ -394,6 +394,10 @@ v3dX(pipeline_pack_state)(struct v3dv_pipeline *pipeline,
static void
pack_shader_state_record(struct v3dv_pipeline *pipeline)
{
+ /* To siplify the code we ignore here GL_SHADER_STATE_RECORD_DRAW_INDEX
+ * used with 2712D0, since we know that has the same size as the regular
+ * version.
+ */
assert(sizeof(pipeline->shader_state_record) >=
cl_packet_length(GL_SHADER_STATE_RECORD));
@@ -406,6 +410,14 @@ pack_shader_state_record(struct v3dv_pipeline *pipeline)
struct v3d_vs_prog_data *prog_data_vs_bin =
pipeline->shared_data->variants[BROADCOM_SHADER_VERTEX_BIN]->prog_data.vs;
+ bool point_size_in_shaded_vertex_data;
+ if (!pipeline->has_gs) {
+ point_size_in_shaded_vertex_data = pipeline->topology == MESA_PRIM_POINTS;
+ } else {
+ struct v3d_gs_prog_data *prog_data_gs =
+ pipeline->shared_data->variants[BROADCOM_SHADER_GEOMETRY]->prog_data.gs;
+ point_size_in_shaded_vertex_data = prog_data_gs->writes_psiz;
+ }
/* Note: we are not packing addresses, as we need the job (see
* cl_pack_emit_reloc). Additionally uniforms can't be filled up at this
@@ -413,17 +425,62 @@ pack_shader_state_record(struct v3dv_pipeline *pipeline)
* pipeline (like viewport), . Would need to be filled later, so we are
* doing a partial prepacking.
*/
+#if V3D_VERSION >= 71
+ /* 2712D0 (V3D 7.1.10) has included draw index and base vertex, shuffling all
+ * the fields in the packet. Since the versioning framework doesn't handle
+ * revision numbers, the XML has a different shader state record packet
+ * including the new fields and we device at run time which packet we need
+ * to emit.
+ */
+ if (v3d_device_has_draw_index(&pipeline->device->devinfo)) {
+ v3dvx_pack(pipeline->shader_state_record, GL_SHADER_STATE_RECORD_DRAW_INDEX, shader) {
+ shader.enable_clipping = true;
+ shader.point_size_in_shaded_vertex_data = point_size_in_shaded_vertex_data;
+ shader.fragment_shader_does_z_writes = prog_data_fs->writes_z;
+ shader.turn_off_early_z_test = prog_data_fs->disable_ez;
+ shader.fragment_shader_uses_real_pixel_centre_w_in_addition_to_centroid_w2 =
+ prog_data_fs->uses_center_w;
+ shader.enable_sample_rate_shading =
+ pipeline->sample_rate_shading ||
+ (pipeline->msaa && prog_data_fs->force_per_sample_msaa);
+ shader.any_shader_reads_hardware_written_primitive_id = false;
+ shader.do_scoreboard_wait_on_first_thread_switch =
+ prog_data_fs->lock_scoreboard_on_first_thrsw;
+ shader.disable_implicit_point_line_varyings =
+ !prog_data_fs->uses_implicit_point_line_varyings;
+ shader.number_of_varyings_in_fragment_shader = prog_data_fs->num_inputs;
+ shader.coordinate_shader_input_vpm_segment_size = prog_data_vs_bin->vpm_input_size;
+ shader.vertex_shader_input_vpm_segment_size = prog_data_vs->vpm_input_size;
+ shader.coordinate_shader_output_vpm_segment_size = prog_data_vs_bin->vpm_output_size;
+ shader.vertex_shader_output_vpm_segment_size = prog_data_vs->vpm_output_size;
+ shader.min_coord_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg_bin.As;
+ shader.min_vertex_shader_input_segments_required_in_play =
+ pipeline->vpm_cfg.As;
+ shader.min_coord_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ pipeline->vpm_cfg_bin.Ve;
+ shader.min_vertex_shader_output_segments_required_in_play_in_addition_to_vcm_cache_size =
+ pipeline->vpm_cfg.Ve;
+ shader.coordinate_shader_4_way_threadable = prog_data_vs_bin->base.threads == 4;
+ shader.vertex_shader_4_way_threadable = prog_data_vs->base.threads == 4;
+ shader.fragment_shader_4_way_threadable = prog_data_fs->base.threads == 4;
+ shader.coordinate_shader_start_in_final_thread_section = prog_data_vs_bin->base.single_seg;
+ shader.vertex_shader_start_in_final_thread_section = prog_data_vs->base.single_seg;
+ shader.fragment_shader_start_in_final_thread_section = prog_data_fs->base.single_seg;
+ shader.vertex_id_read_by_coordinate_shader = prog_data_vs_bin->uses_vid;
+ shader.base_instance_id_read_by_coordinate_shader = prog_data_vs_bin->uses_biid;
+ shader.instance_id_read_by_coordinate_shader = prog_data_vs_bin->uses_iid;
+ shader.vertex_id_read_by_vertex_shader = prog_data_vs->uses_vid;
+ shader.base_instance_id_read_by_vertex_shader = prog_data_vs->uses_biid;
+ shader.instance_id_read_by_vertex_shader = prog_data_vs->uses_iid;
+ }
+ return;
+ }
+#endif
+
v3dvx_pack(pipeline->shader_state_record, GL_SHADER_STATE_RECORD, shader) {
shader.enable_clipping = true;
-
- if (!pipeline->has_gs) {
- shader.point_size_in_shaded_vertex_data =
- pipeline->topology == MESA_PRIM_POINTS;
- } else {
- struct v3d_gs_prog_data *prog_data_gs =
- pipeline->shared_data->variants[BROADCOM_SHADER_GEOMETRY]->prog_data.gs;
- shader.point_size_in_shaded_vertex_data = prog_data_gs->writes_psiz;
- }
+ shader.point_size_in_shaded_vertex_data = point_size_in_shaded_vertex_data;
/* Must be set if the shader modifies Z, discards, or modifies
* the sample mask. For any of these cases, the fragment
--
2.49.0

133
SPECS/mesa.spec
View File

@ -1,15 +1,20 @@
%ifnarch s390x
%global with_hardware 1
%global with_radeonsi 1
%global with_vmware 1
%global with_vulkan_hw 1
%global with_vdpau 1
%global with_va 1
%if !0%{?rhel}
%global with_r300 1
%global with_r600 1
%global with_nine 1
%global with_nvk %{with vulkan_hw}
%global with_omx 1
%if 0%{?with_vulkan_hw}
%global with_nvk %{with_vulkan_hw}
%endif
%global with_opencl 1
%endif
%global base_vulkan ,amd
%global base_vulkan %{?with_vulkan_hw:,amd}%{!?with_vulkan_hw:%{nil}}
%endif
%ifnarch %{ix86}
@ -20,15 +25,16 @@
%ifarch %{ix86} x86_64
%global with_iris 1
%global with_crocus 1
%global with_vmware 1
%global with_crocus 1
%global with_xa 1
%global with_intel_clc 1
%global intel_platform_vulkan ,intel,intel_hasvk
%global intel_platform_vulkan %{?with_vulkan_hw:,intel,intel_hasvk}%{!?with_vulkan_hw:%{nil}}
%endif
%ifarch x86_64
%if !0%{?with_vulkan_hw}
%global with_intel_vk_rt 1
%endif
%endif
%ifarch %{arm} aarch64
# RHEL doesn't ship vc4 and v3d but we do for RPi
@ -39,23 +45,15 @@
%if !0%{?rhel}
%global with_etnaviv 1
%global with_lima 1
%global with_tegra 1
%global with_vc4 1
%global with_v3d 1
%endif
%global with_freedreno 1
%global with_kmsro 1
%global with_panfrost 1
%global with_tegra 1
%global with_xa 1
%global extra_platform_vulkan ,broadcom,freedreno
%endif
%ifnarch %{arm} s390x
%if !0%{?rhel}
%global with_r300 1
%global with_r600 1
%endif
%global with_radeonsi 1
%global extra_platform_vulkan %{?with_vulkan_hw:,broadcom,freedreno,panfrost,imagination-experimental}%{!?with_vulkan_hw:%{nil}}
%endif
%if !0%{?rhel}
@ -73,9 +71,9 @@
Name: mesa
Summary: Mesa graphics libraries
%global ver 24.1.2
%global ver 24.2.8
Version: %{lua:ver = string.gsub(rpm.expand("%{ver}"), "-", "~"); print(ver)}
Release: 3%{?dist}.alma.2
Release: 2%{?dist}.alma.1
License: MIT AND BSD-3-Clause AND SGI-B-2.0
URL: http://www.mesa3d.org
@ -89,9 +87,9 @@ Source1: Mesa-MLAA-License-Clarification-Email.txt
%global meson_ver 1.3.0
Source2: https://github.com/mesonbuild/meson/releases/download/%{meson_ver}/meson-%{meson_ver}.tar.gz
# libclc is not available in RHEL 9 but it is required for Intel drivers since
# libclc is not available in RHEL but it is required for Intel drivers since
# mesa >= 24.1.0
%global libclc_version 18.1.2
%global libclc_version 19.1.1
Source3: https://github.com/llvm/llvm-project/releases/download/llvmorg-%{libclc_version}/libclc-%{libclc_version}.src.tar.xz
BuildRequires: libedit-devel
BuildRequires: clang-devel >= %{libclc_version}
@ -99,8 +97,8 @@ BuildRequires: clang-devel >= %{libclc_version}
# BuildRequires: spirv-llvm-translator-tools
# spirv-llvm-translator is a dependency of libclc
%global spirv_llvm_trans_ver 18.1.0
%global spirv_llvm_trans_commit 259f72c06ce9dff3867f842aaeb1e414c97066a5
%global spirv_llvm_trans_ver 19.1.1
%global spirv_llvm_trans_commit 90a976491d3847657396456e0e94d7dc48d35996
%global spirv_llvm_trans_shortcommit %(c=%{spirv_llvm_trans_commit}; echo ${c:0:7})
Source4: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/archive/%{spirv_llvm_trans_commit}/spirv-llvm-translator-%{spirv_llvm_trans_shortcommit}.tar.gz
BuildRequires: cmake
@ -115,16 +113,12 @@ BuildRequires: zlib-devel
Source5: https://gitlab.freedesktop.org/wayland/wayland-protocols/-/releases/%{wayland_protocols_ver}/downloads/wayland-protocols-%{wayland_protocols_ver}.tar.xz
BuildRequires: wayland-devel
# mesa patches (< 10000)
Patch10: gnome-shell-glthread-disable.patch
Patch11: 0001-llvmpipe-Init-eglQueryDmaBufModifiersEXT-num_modifie.patch
Patch12: 0001-Revert-ac-radeonsi-remove-has_syncobj-has_fence_to_h.patch
# s390x only
Patch100: fix-egl-on-s390x.patch
# Add support for Raspberry Pi 2712D0 stepping
Patch1000: raspberrypi-2712D0.patch
# AMD Navi4x support:
# Backport fixes for radeonsi and disable GFX12 on radv
# https://issues.redhat.com/browse/RHEL-53419
Patch11: RHEL-53423.patch
# Build our own version but keep the dependency for the RPM macros
BuildRequires: meson
@ -137,7 +131,7 @@ BuildRequires: kernel-headers
# We only check for the minimum version of pkgconfig(libdrm) needed so that the
# SRPMs for each arch still have the same build dependencies. See:
# https://bugzilla.redhat.com/show_bug.cgi?id=1859515
BuildRequires: pkgconfig(libdrm) >= 2.4.119
BuildRequires: pkgconfig(libdrm) >= 2.4.121
%if 0%{?with_libunwind}
BuildRequires: pkgconfig(libunwind)
%endif
@ -180,9 +174,6 @@ BuildRequires: pkgconfig(vdpau) >= 1.1
%if 0%{?with_va}
BuildRequires: pkgconfig(libva) >= 0.38.0
%endif
%if 0%{?with_omx}
BuildRequires: pkgconfig(libomxil-bellagio)
%endif
BuildRequires: pkgconfig(libelf)
BuildRequires: pkgconfig(libglvnd) >= 1.3.2
BuildRequires: llvm-devel >= %{libclc_version}
@ -219,6 +210,7 @@ BuildRequires: python3-mako
BuildRequires: python3-ply
%endif
BuildRequires: python3-pycparser
BuildRequires: python3-pyyaml
BuildRequires: vulkan-headers
BuildRequires: glslang
%if 0%{?with_vulkan_hw}
@ -231,6 +223,7 @@ BuildRequires: pkgconfig(vulkan)
%package filesystem
Summary: Mesa driver filesystem
Provides: mesa-dri-filesystem = %{?epoch:%{epoch}:}%{version}-%{release}
Obsoletes: mesa-omx-drivers < %{?epoch:%{epoch}:}%{version}-%{release}
%description filesystem
%{summary}.
@ -291,15 +284,6 @@ Requires: (%{name}-libEGL%{?_isa} = %{?epoch:%{epoch}:}%{version}-%{releas
%description dri-drivers
%{summary}.
%if 0%{?with_omx}
%package omx-drivers
Summary: Mesa-based OMX drivers
Requires: %{name}-filesystem%{?_isa} = %{?epoch:%{epoch}:}%{version}-%{release}
%description omx-drivers
%{summary}.
%endif
%if 0%{?with_va}
%package va-drivers
Summary: Mesa-based VA-API video acceleration drivers
@ -433,21 +417,14 @@ Requires: %{name}-libd3d%{?_isa} = %{?epoch:%{epoch}:}%{version}-%{release
%package vulkan-drivers
Summary: Mesa Vulkan drivers
Requires: vulkan%{_isa}
Requires: %{name}-filesystem%{?_isa} = %{?epoch:%{epoch}:}%{version}-%{release}
Obsoletes: mesa-vulkan-devel < %{?epoch:%{epoch}:}%{version}-%{release}
%description vulkan-drivers
The drivers with support for the Vulkan API.
%prep
%autosetup -n %{name}-%{ver} -N
%autopatch -p1 -M 99
%ifarch s390x
%autopatch -p1 -m 100
%endif
%ifarch aarch64
%autopatch -p1 -m 1000
%endif
%autosetup -n %{name}-%{ver} -p1
cp %{SOURCE1} docs/
# Extract meson
@ -541,12 +518,11 @@ export MESON_PACKAGE_CACHE_DIR="%{cargo_registry}/"
-Ddri3=enabled \
-Dosmesa=true \
%if 0%{?with_hardware}
-Dgallium-drivers=swrast,virgl,nouveau%{?with_r300:,r300}%{?with_crocus:,crocus}%{?with_iris:,iris}%{?with_vmware:,svga}%{?with_radeonsi:,radeonsi}%{?with_r600:,r600}%{?with_freedreno:,freedreno}%{?with_etnaviv:,etnaviv}%{?with_tegra:,tegra}%{?with_vc4:,vc4}%{?with_v3d:,v3d}%{?with_kmsro:,kmsro}%{?with_lima:,lima}%{?with_panfrost:,panfrost}%{?with_vulkan_hw:,zink} \
-Dgallium-drivers=swrast,virgl,nouveau%{?with_r300:,r300}%{?with_crocus:,crocus}%{?with_iris:,iris}%{?with_vmware:,svga}%{?with_radeonsi:,radeonsi}%{?with_r600:,r600}%{?with_freedreno:,freedreno}%{?with_etnaviv:,etnaviv}%{?with_tegra:,tegra}%{?with_vc4:,vc4}%{?with_v3d:,v3d}%{?with_lima:,lima}%{?with_panfrost:,panfrost}%{?with_vulkan_hw:,zink} \
%else
-Dgallium-drivers=swrast,virgl \
%endif
-Dgallium-vdpau=%{?with_vdpau:enabled}%{!?with_vdpau:disabled} \
-Dgallium-omx=%{?with_omx:bellagio}%{!?with_omx:disabled} \
-Dgallium-va=%{?with_va:enabled}%{!?with_va:disabled} \
-Dgallium-xa=%{?with_xa:enabled}%{!?with_xa:disabled} \
-Dgallium-nine=%{?with_nine:true}%{!?with_nine:false} \
@ -642,16 +618,13 @@ popd
%files filesystem
%doc docs/Mesa-MLAA-License-Clarification-Email.txt
%dir %{_libdir}/dri
%if 0%{?with_hardware}
%if 0%{?with_vdpau}
%dir %{_libdir}/vdpau
%endif
%endif
%dir %{_datadir}/drirc.d
%files libGL
%{_libdir}/libGLX_mesa.so.0*
%{_libdir}/libGLX_system.so.0*
%files libGL-devel
%dir %{_includedir}/GL
%dir %{_includedir}/GL/internal
%{_includedir}/GL/internal/dri_interface.h
%{_libdir}/pkgconfig/dri.pc
@ -731,9 +704,10 @@ popd
%endif
%files dri-drivers
%dir %{_datadir}/drirc.d
%{_datadir}/drirc.d/00-mesa-defaults.conf
%{_libdir}/libgallium-*.so
%{_libdir}/dri/kms_swrast_dri.so
%{_libdir}/dri/libdril_dri.so
%{_libdir}/dri/swrast_dri.so
%{_libdir}/dri/virtio_gpu_dri.so
@ -820,17 +794,13 @@ popd
%{_libdir}/dri/sti_dri.so
%{_libdir}/dri/sun4i-drm_dri.so
%{_libdir}/dri/udl_dri.so
%{_libdir}/dri/vkms_dri.so
%{_libdir}/dri/zynqmp-dpsub_dri.so
%endif
%if 0%{?with_vulkan_hw}
%{_libdir}/dri/zink_dri.so
%endif
%if 0%{?with_omx}
%files omx-drivers
%{_libdir}/bellagio/libomx_mesa.so
%endif
%if 0%{?with_va}
%files va-drivers
%{_libdir}/dri/nouveau_drv_video.so
@ -845,6 +815,7 @@ popd
%if 0%{?with_vdpau}
%files vdpau-drivers
%dir %{_libdir}/vdpau
%{_libdir}/vdpau/libvdpau_nouveau.so.1*
%if 0%{?with_r600}
%{_libdir}/vdpau/libvdpau_r600.so.1*
@ -879,18 +850,40 @@ popd
%{_datadir}/vulkan/icd.d/broadcom_icd.*.json
%{_libdir}/libvulkan_freedreno.so
%{_datadir}/vulkan/icd.d/freedreno_icd.*.json
%{_libdir}/libvulkan_panfrost.so
%{_datadir}/vulkan/icd.d/panfrost_icd.*.json
%{_libdir}/libpowervr_rogue.so
%{_libdir}/libvulkan_powervr_mesa.so
%{_datadir}/vulkan/icd.d/powervr_mesa_icd.*.json
%endif
%endif
%changelog
* Wed Apr 10 2025 Koichiro Iwao <meta@almalinux.org> - 24.1.2-3.alma.2
- Add support for Raspberry Pi 2712D0 stepping
Resolves: https://bugs.almalinux.org/view.php?id=497
* Thu Apr 10 2025 Koichiro Iwao <meta@almalinux.org> - 24.1.2-3.alma.1
* Tue May 13 2025 Koichiro Iwao <meta@almalinux.org> - 24.2.8-2.alma.1
- Enable vc4 and v3d for Raspberry Pi graphics in AlmaLinux (Resolves:
https://github.com/AlmaLinux/raspberry-pi/issues/32)
* Thu Feb 13 2025 José Expósito <jexposit@redhat.com> - 24.2.8-2
- AMD Navi4x support
Backport fixes for radeonsi and disable GFX12 on radv
Resolves: https://issues.redhat.com/browse/RHEL-53419
* Thu Nov 28 2024 José Expósito <jexposit@redhat.com> - 24.2.8-1
- Update to 24.2.8
Resolves: https://issues.redhat.com/browse/RHEL-53868
* Tue Nov 19 2024 José Expósito <jexposit@redhat.com> - 24.2.7-1
- Update to 24.2.7 and LLVM 19
Resolves: https://issues.redhat.com/browse/RHEL-66062
* Thu Nov 14 2024 José Expósito <jexposit@redhat.com> - 24.2.6-2
- Do not build aarch64 drivers on x86
Resolves: https://issues.redhat.com/browse/RHEL-66062
* Tue Nov 12 2024 José Expósito <jexposit@redhat.com> - 24.2.6-1
- Update to 24.2.6
Resolves: https://issues.redhat.com/browse/RHEL-66062
* Mon Aug 26 2024 José Expósito <jexposit@redhat.com> - 24.1.2-3
- Match mesa-libEGL version
Cherry-picked from: https://src.fedoraproject.org/rpms/mesa/pull-request/24