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Merge branch 'f15'

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Conflicts:
	.gitignore
	mesa.spec
	sources
This commit is contained in:
Dave Airlie 2011-04-16 18:01:53 +10:00
commit 12a9941c4b
8 changed files with 277 additions and 20125 deletions
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5
.gitignore vendored
View File

@ -17,3 +17,8 @@ mesa-20100720.tar.bz2
/mesa-20110107.tar.xz
/mesa-20110315.tar.xz
/mesa-20110327.tar.xz
/MesaLib-7.10.1.tar.bz2
/mesa-20110327.tar.xz
/mesa-20110330.tar.xz
/mesa-20110401.tar.xz
/mesa-20110412.tar.xz

33
mesa-7.10-nouveau-classic-libdrm.patch
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@ -1,33 +0,0 @@
From c43905b6c43ac34bbcb5a9e44414fa500e5cebeb Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Mon, 17 Jan 2011 12:54:27 +1000
Subject: [PATCH 3/3] mesa-7.10-nouveau-classic-libdrm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
---
src/mesa/drivers/dri/nouveau/nouveau_driver.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.h b/src/mesa/drivers/dri/nouveau/nouveau_driver.h
index 8036b18..c5ac128 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_driver.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_driver.h
@@ -38,7 +38,6 @@
#include <assert.h>
#include "nouveau_device.h"
-#include "nouveau_pushbuf.h"
#include "nouveau_grobj.h"
#include "nouveau_channel.h"
#include "nouveau_bo.h"
@@ -46,6 +45,7 @@
#include "nouveau_screen.h"
#include "nouveau_state.h"
#include "nouveau_surface.h"
+#include "nv04_pushbuf.h"
#define DRIVER_DATE "20091015"
#define DRIVER_AUTHOR "Nouveau"
--
1.7.3.4

114
mesa-7.10-nouveau-revert.patch
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@ -1,114 +0,0 @@
From 20f77c532547c7f8f1cb26f41357037821cf2a9f Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Mon, 17 Jan 2011 12:47:12 +1000
Subject: [PATCH 2/3] mesa-7.10-nouveau-revert.patch
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
---
src/gallium/drivers/nv50/nv50_context.c | 4 ----
src/gallium/drivers/nv50/nv50_shader_state.c | 2 +-
src/gallium/drivers/nv50/nv50_state.c | 5 ++---
src/gallium/drivers/nv50/nv50_vbo.c | 2 +-
src/gallium/drivers/nvc0/nvc0_screen.c | 2 +-
src/gallium/drivers/nvfx/nvfx_vbo.c | 14 +++++++++++---
6 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c
index 4f97616..0874cb5 100644
--- a/src/gallium/drivers/nv50/nv50_context.c
+++ b/src/gallium/drivers/nv50/nv50_context.c
@@ -49,10 +49,6 @@ nv50_destroy(struct pipe_context *pipe)
struct nv50_context *nv50 = nv50_context(pipe);
int i;
- for (i = 0; i < nv50->vtxbuf_nr; i++) {
- pipe_resource_reference(&nv50->vtxbuf[i].buffer, NULL);
- }
-
for (i = 0; i < 64; i++) {
if (!nv50->state.hw[i])
continue;
diff --git a/src/gallium/drivers/nv50/nv50_shader_state.c b/src/gallium/drivers/nv50/nv50_shader_state.c
index 1c1b66d..306aa81 100644
--- a/src/gallium/drivers/nv50/nv50_shader_state.c
+++ b/src/gallium/drivers/nv50/nv50_shader_state.c
@@ -71,7 +71,7 @@ nv50_transfer_constbuf(struct nv50_context *nv50,
map += nr;
}
- pipe_buffer_unmap(pipe, transfer);
+ pipe_buffer_unmap(pipe, buf, transfer);
}
static void
diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index b4eda0f..04291e4 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -779,9 +779,8 @@ nv50_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
{
struct nv50_context *nv50 = nv50_context(pipe);
- util_copy_vertex_buffers(nv50->vtxbuf,
- &nv50->vtxbuf_nr,
- vb, count);
+ memcpy(nv50->vtxbuf, vb, sizeof(*vb) * count);
+ nv50->vtxbuf_nr = count;
nv50->dirty |= NV50_NEW_ARRAYS;
}
diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index 53f319a..d41a59d 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -284,7 +284,7 @@ nv50_draw_elements_inline(struct pipe_context *pipe,
nzi = TRUE;
}
- pipe_buffer_unmap(pipe, transfer);
+ pipe_buffer_unmap(pipe, indexBuffer, transfer);
}
static void
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c
index f608b32..e14d4fd 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -110,7 +110,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_SHADER_STENCIL_EXPORT:
return 0;
case PIPE_CAP_PRIMITIVE_RESTART:
- case PIPE_CAP_INSTANCED_DRAWING:
+// case PIPE_CAP_INSTANCED_DRAWING:
return 1;
default:
NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
diff --git a/src/gallium/drivers/nvfx/nvfx_vbo.c b/src/gallium/drivers/nvfx/nvfx_vbo.c
index 01dacb4..1c88f5f 100644
--- a/src/gallium/drivers/nvfx/nvfx_vbo.c
+++ b/src/gallium/drivers/nvfx/nvfx_vbo.c
@@ -591,10 +591,18 @@ nvfx_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
{
struct nvfx_context *nvfx = nvfx_context(pipe);
- util_copy_vertex_buffers(nvfx->vtxbuf,
- &nvfx->vtxbuf_nr,
- vb, count);
+ for(unsigned i = 0; i < count; ++i)
+ {
+ pipe_resource_reference(&nvfx->vtxbuf[i].buffer, vb[i].buffer);
+ nvfx->vtxbuf[i].buffer_offset = vb[i].buffer_offset;
+ nvfx->vtxbuf[i].max_index = vb[i].max_index;
+ nvfx->vtxbuf[i].stride = vb[i].stride;
+ }
+
+ for(unsigned i = count; i < nvfx->vtxbuf_nr; ++i)
+ pipe_resource_reference(&nvfx->vtxbuf[i].buffer, 0);
+ nvfx->vtxbuf_nr = count;
nvfx->use_vertex_buffers = -1;
nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
}
--
1.7.3.4

19963
mesa-7.10-nouveau-updates.patch
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File diff suppressed because it is too large Load Diff

125
mesa-intel-snb-regression-reverts.patch Normal file
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@ -0,0 +1,125 @@
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 32ee37f..21ce92c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -52,35 +52,6 @@ static void guess_execution_size(struct brw_compile *p,
}
-/**
- * Prior to Sandybridge, the SEND instruction accepted non-MRF source
- * registers, implicitly moving the operand to a message register.
- *
- * On Sandybridge, this is no longer the case. This function performs the
- * explicit move; it should be called before emitting a SEND instruction.
- */
-static void
-gen6_resolve_implied_move(struct brw_compile *p,
- struct brw_reg *src,
- GLuint msg_reg_nr)
-{
- struct intel_context *intel = &p->brw->intel;
- if (intel->gen != 6)
- return;
-
- if (src->file == BRW_ARCHITECTURE_REGISTER_FILE && src->nr == BRW_ARF_NULL)
- return;
-
- brw_push_insn_state(p);
- brw_set_mask_control(p, BRW_MASK_DISABLE);
- brw_set_compression_control(p, BRW_COMPRESSION_NONE);
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
- retype(*src, BRW_REGISTER_TYPE_UD));
- brw_pop_insn_state(p);
- *src = brw_message_reg(msg_reg_nr);
-}
-
-
static void brw_set_dest(struct brw_compile *p,
struct brw_instruction *insn,
struct brw_reg dest)
@@ -1800,7 +1771,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
GLuint bind_table_index)
{
struct intel_context *intel = &p->brw->intel;
- struct brw_reg src = brw_vec8_grf(0, 0);
int msg_type;
/* Setup MRF[1] with offset into const buffer */
@@ -1817,7 +1787,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
addr_reg, brw_imm_d(offset));
brw_pop_insn_state(p);
- gen6_resolve_implied_move(p, &src, 0);
struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
insn->header.predicate_control = BRW_PREDICATE_NONE;
@@ -1826,7 +1795,7 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
insn->header.mask_control = BRW_MASK_DISABLE;
brw_set_dest(p, insn, dest);
- brw_set_src0(insn, src);
+ brw_set_src0(insn, brw_vec8_grf(0, 0));
if (intel->gen == 6)
msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
@@ -1997,7 +1966,20 @@ void brw_SAMPLE(struct brw_compile *p,
{
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ if (src0.file != BRW_ARCHITECTURE_REGISTER_FILE ||
+ src0.nr != BRW_ARF_NULL) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), src0.type), src0);
+ brw_pop_insn_state(p);
+ }
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
insn->header.predicate_control = 0; /* XXX */
@@ -2052,7 +2034,17 @@ void brw_urb_WRITE(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
+ retype(src0, BRW_REGISTER_TYPE_UD));
+ brw_pop_insn_state(p);
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
@@ -2162,7 +2154,17 @@ void brw_ff_sync(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
+ retype(src0, BRW_REGISTER_TYPE_UD));
+ brw_pop_insn_state(p);
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, dest);

96
mesa-nouveau-fix-build.patch Normal file
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@ -0,0 +1,96 @@
From 9882bff4ce5843b4122a0348acecc7523b9aee22 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Tue, 12 Apr 2011 21:20:48 +1000
Subject: [PATCH] nouveau_vieux: fix build since sampler objects merge
---
src/mesa/drivers/dri/nouveau/nv04_state_tex.c | 8 ++++----
src/mesa/drivers/dri/nouveau/nv10_state_tex.c | 8 ++++----
src/mesa/drivers/dri/nouveau/nv20_state_tex.c | 8 ++++----
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
index 6c96e58..648d6b1 100644
--- a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
+++ b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
@@ -82,11 +82,11 @@ nv04_emit_tex_obj(struct gl_context *ctx, int emit)
if (t->Sampler.MinFilter != GL_NEAREST &&
t->Sampler.MinFilter != GL_LINEAR) {
- lod_max = CLAMP(MIN2(t->MaxLod, t->_MaxLambda),
+ lod_max = CLAMP(MIN2(t->Sampler.MaxLod, t->_MaxLambda),
0, 15) + 1;
lod_bias = CLAMP(ctx->Texture.Unit[i].LodBias +
- t->LodBias, -16, 15) * 8;
+ t->Sampler.LodBias, -16, 15) * 8;
}
format |= nvgl_wrap_mode(t->Sampler.WrapT) << 28 |
@@ -96,9 +96,9 @@ nv04_emit_tex_obj(struct gl_context *ctx, int emit)
lod_max << 12 |
get_tex_format(ti);
- filter |= log2i(t->MaxAnisotropy) << 31 |
+ filter |= log2i(t->Sampler.MaxAnisotropy) << 31 |
nvgl_filter_mode(t->Sampler.MagFilter) << 28 |
- log2i(t->MaxAnisotropy) << 27 |
+ log2i(t->Sampler.MaxAnisotropy) << 27 |
nvgl_filter_mode(t->Sampler.MinFilter) << 24 |
(lod_bias & 0xff) << 16;
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
index 1d98b19..620a686 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
@@ -183,7 +183,7 @@ nv10_emit_tex_obj(struct gl_context *ctx, int emit)
| nvgl_filter_mode(t->Sampler.MinFilter) << 24;
tx_enable = NV10_3D_TEX_ENABLE_ENABLE
- | log2i(t->MaxAnisotropy) << 4;
+ | log2i(t->Sampler.MaxAnisotropy) << 4;
if (t->Target == GL_TEXTURE_RECTANGLE) {
BEGIN_RING(chan, celsius, NV10_3D_TEX_NPOT_PITCH(i), 1);
@@ -198,9 +198,9 @@ nv10_emit_tex_obj(struct gl_context *ctx, int emit)
if (t->Sampler.MinFilter != GL_NEAREST &&
t->Sampler.MinFilter != GL_LINEAR) {
- int lod_min = t->MinLod;
- int lod_max = MIN2(t->MaxLod, t->_MaxLambda);
- int lod_bias = t->LodBias
+ int lod_min = t->Sampler.MinLod;
+ int lod_max = MIN2(t->Sampler.MaxLod, t->_MaxLambda);
+ int lod_bias = t->Sampler.LodBias
+ ctx->Texture.Unit[i].LodBias;
lod_max = CLAMP(lod_max, 0, 15);
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
index fdbfdf4..eab74ae 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
@@ -195,7 +195,7 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
| 2 << 12;
tx_enable = NV20_3D_TEX_ENABLE_ENABLE
- | log2i(t->MaxAnisotropy) << 4;
+ | log2i(t->Sampler.MaxAnisotropy) << 4;
if (t->Target == GL_TEXTURE_RECTANGLE) {
BEGIN_RING(chan, kelvin, NV20_3D_TEX_NPOT_PITCH(i), 1);
@@ -210,9 +210,9 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
if (t->Sampler.MinFilter != GL_NEAREST &&
t->Sampler.MinFilter != GL_LINEAR) {
- int lod_min = t->MinLod;
- int lod_max = MIN2(t->MaxLod, t->_MaxLambda);
- int lod_bias = t->LodBias
+ int lod_min = t->Sampler.MinLod;
+ int lod_max = MIN2(t->Sampler.MaxLod, t->_MaxLambda);
+ int lod_bias = t->Sampler.LodBias
+ ctx->Texture.Unit[i].LodBias;
lod_max = CLAMP(lod_max, 0, 15);
--
1.7.4.2

64
mesa.spec
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@ -12,24 +12,26 @@
%define _default_patch_fuzz 2
%define manpages gl-manpages-1.0.1
%define gitdate 20110327
%define gitdate 20110412
#% define snapshot
Summary: Mesa graphics libraries
Name: mesa
Version: 7.11
Release: 0.2.%{gitdate}.0%{?dist}
Release: 0.6.%{gitdate}.0%{?dist}
License: MIT
Group: System Environment/Libraries
URL: http://www.mesa3d.org
#Source0: http://downloads.sf.net/mesa3d/MesaLib-%{version}.tar.bz2
#Source0: http://www.mesa3d.org/beta/MesaLib-%{version}%{?snapshot}.tar.bz2
#Source0: ftp://ftp.freedesktop.org/pub/%{name}/%{version}/MesaLib-%{version}.tar.bz2
Source0: %{name}-%{gitdate}.tar.xz
Source2: %{manpages}.tar.bz2
Source3: make-git-snapshot.sh
Source4: llvmcore.mk
Patch1: mesa-nouveau-fix-build.patch
Patch2: mesa-7.1-nukeglthread-debug.patch
Patch3: mesa-no-mach64.patch
Patch4: legacy-drivers.patch
@ -211,8 +213,9 @@ Requires: Xorg %(xserver-sdk-abi-requires ansic) %(xserver-sdk-abi-requires vide
2D driver for VMware SVGA vGPU
%prep
#setup -q -n mesa-%{version}%{?snapshot} -b0 -b2
#setup -q -n Mesa-%{version}%{?snapshot} -b0 -b2
%setup -q -n mesa-%{gitdate} -b2
%patch1 -p1 -b .nv-fix
%patch2 -p1 -b .intel-glthread
%patch3 -p1 -b .no-mach64
%patch4 -p1 -b .classic
@ -228,8 +231,8 @@ Requires: Xorg %(xserver-sdk-abi-requires ansic) %(xserver-sdk-abi-requires vide
autoreconf --install
export CFLAGS="$RPM_OPT_FLAGS -fno-omit-frame-pointer"
export CXXFLAGS="$RPM_OPT_FLAGS -fno-omit-frame-pointer"
export CFLAGS="$RPM_OPT_FLAGS"
export CXXFLAGS="$RPM_OPT_FLAGS"
%ifarch %{ix86}
# i do not have words for how much the assembly dispatch code infuriates me
%define common_flags --enable-selinux --enable-pic --enable-udev --disable-asm
@ -266,15 +269,16 @@ mv libllvmcore*.so %{_lib}
--enable-egl \
--enable-gles1 \
--enable-gles2 \
--enable-gallium-llvm \
--disable-gallium-intel \
--disable-gallium-svga \
--disable-gallium-egl \
%if %{with_hardware}
--enable-gallium-llvm \
--enable-gallium-radeon \
--enable-gallium-r600 \
--enable-gallium-nouveau \
%else
--disable-gallium-llvm \
--disable-gallium-radeon \
--disable-gallium-r600 \
--disable-gallium-nouveau \
@ -312,7 +316,7 @@ done | xargs install -m 0755 -t $RPM_BUILD_ROOT%{_libdir}/dri >& /dev/null || :
# strip out undesirable headers
pushd $RPM_BUILD_ROOT%{_includedir}/GL
rm [a-fh-np-wyz]*.h glf*.h glut*.h
rm -f [a-fh-np-wyz]*.h glf*.h glut*.h
popd
pushd $RPM_BUILD_ROOT%{_libdir}
@ -390,8 +394,11 @@ rm -rf $RPM_BUILD_ROOT
%{_libdir}/dri/r200_dri.so
%{_libdir}/dri/r300_dri.so
%{_libdir}/dri/r600_dri.so
%ifnarch %{sparc}
# we no intel chipsets on sparc. Please move on...
%{_libdir}/dri/i915_dri.so
%{_libdir}/dri/i965_dri.so
%endif
%{_libdir}/dri/nouveau_dri.so
%{_libdir}/dri/nouveau_vieux_dri.so
%endif
@ -406,12 +413,15 @@ rm -rf $RPM_BUILD_ROOT
%{_libdir}/dri/i810_dri.so
%{_libdir}/dri/sis_dri.so
%endif
%{_libdir}/dri/mga_dri.so
%{_libdir}/dri/r128_dri.so
%ifnarch %{sparc}
# we no much hardware....
%{_libdir}/dri/mga_dri.so
%{_libdir}/dri/savage_dri.so
%{_libdir}/dri/tdfx_dri.so
%{_libdir}/dri/unichrome_dri.so
%endif
%endif
%files libGL-devel
%defattr(-,root,root,-)
@ -477,15 +487,41 @@ rm -rf $RPM_BUILD_ROOT
%{_libdir}/libOSMesa.so
%changelog
* Sun Mar 27 2011 Dave Airlie <airlied@redhat.com> 7.11-0.2.20110327.0
- llvmcore fix build using g++ instead of gcc
* Tue Apr 12 2011 Dave Airlie <airlied@redhat.com> 7.11-0.6.20110412.0
- latest upstream snapshot to fix r200 regression.
* Fri Apr 01 2011 Dave Airlie <airlied@redhat.com> 7.11-0.5.20110401.0
- Revert upstream patches causing SNB regression.
* Fri Apr 01 2011 Dave Airlie <airlied@redhat.com> 7.11-0.4.20110401.0
- upstream snapshot again - proper fix for ILK + nv50 gnome-shell issue
* Wed Mar 30 2011 Dave Airlie <airlied@redhat.com> 7.11-0.3.20110330.0
- mesa-intel-fix-gs-rendering-regression.patch, attempt to fix gnome shell
rendering.
* Wed Mar 30 2011 Dave Airlie <airlied@redhat.com> 7.11-0.2.20110330.0
- snapshot upstream again to hopefully fix ILK bug
* Sun Mar 27 2011 Dave Airlie <airlied@redhat.com> 7.11-0.1.20110327.0
- latest git snapshot, seems quiet + re-enable llvmcore
- pull latest snapshot + 3 post snapshot fixes
* Tue Mar 15 2011 Adam Jackson <ajax@redhat.com> 7.11-0.20110315.0
- Today's git snap
- Add with_llvmcore macro, and turn it off momentarily
* Wed Mar 23 2011 Adam Jackson <ajax@redhat.com> 7.10.1-1
- mesa 7.10.1
* Fri Mar 18 2011 Dennis Gilmore <dennis@ausil.us> 7.10-0.30
- fall back to non native jit on sparc.
* Mon Mar 14 2011 Dave Airlie <airlied@redhat.com> 7.10-0.29
- use g++ to link llvmcore.so so it gets libstdc++ (#674079)
* Fri Mar 04 2011 Dan Horák <dan[at]danny.cz> 7.10-0.28
- enable gallium-llvm only when with_hardware is set (workarounds linking
failure on s390(x))
* Wed Feb 23 2011 Jerome Glisse <jglisse@redhat.com> 7.10-0.27
- Build without -fno-omit-frame-pointer as gcc 4.6.0 seems to lead to
bogus code with that option (#679924)
* Wed Feb 09 2011 Adam Jackson <ajax@redhat.com> 7.10-0.26
- BuildRequires: libdrm >= 2.4.24-0 (#668363)

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6ae05158e678f4594343f32c2ca50515 gl-manpages-1.0.1.tar.bz2
3ad97eb2b70c9cd1ec8483e826f02b01 mesa-20110327.tar.xz
b8a15e6f9892d004c3407d6a0659fb5b mesa-20110412.tar.xz