import UBI llvm-18.1.8-3.module+el8.10.0+22393+9aa055f1
This commit is contained in:
parent
e9be506d8c
commit
e6d5f15904
12
.gitignore
vendored
12
.gitignore
vendored
@ -1,6 +1,6 @@
|
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SOURCES/cmake-17.0.6.src.tar.xz
|
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SOURCES/cmake-17.0.6.src.tar.xz.sig
|
||||
SOURCES/llvm-17.0.6.src.tar.xz
|
||||
SOURCES/llvm-17.0.6.src.tar.xz.sig
|
||||
SOURCES/third-party-17.0.6.src.tar.xz
|
||||
SOURCES/third-party-17.0.6.src.tar.xz.sig
|
||||
SOURCES/cmake-18.1.8.src.tar.xz
|
||||
SOURCES/cmake-18.1.8.src.tar.xz.sig
|
||||
SOURCES/llvm-18.1.8.src.tar.xz
|
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SOURCES/llvm-18.1.8.src.tar.xz.sig
|
||||
SOURCES/third-party-18.1.8.src.tar.xz
|
||||
SOURCES/third-party-18.1.8.src.tar.xz.sig
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
4b397344260c934e687be7efa0f8456a9dd46f44 SOURCES/cmake-17.0.6.src.tar.xz
|
||||
fa31d348b6780478403484e22139d25f403503d4 SOURCES/cmake-17.0.6.src.tar.xz.sig
|
||||
860a3605f08a0a56a8de4e073e26a259871623a6 SOURCES/llvm-17.0.6.src.tar.xz
|
||||
2ad479ab00a6d5e61ecb953997cfeef6650a687a SOURCES/llvm-17.0.6.src.tar.xz.sig
|
||||
a35dc22cd3d983a556f6e4a63c8dac6a84e01caf SOURCES/third-party-17.0.6.src.tar.xz
|
||||
12128cdab7414aeedd573c61cbc2fa82e75491db SOURCES/third-party-17.0.6.src.tar.xz.sig
|
||||
1ea03e355b705b4cada3051bd7301a57daa19283 SOURCES/cmake-18.1.8.src.tar.xz
|
||||
33c2f4327abc20c6098be064ab6bbc15536031f2 SOURCES/cmake-18.1.8.src.tar.xz.sig
|
||||
f9befa4cbef3f688ab48fca42449e13c5bcb872d SOURCES/llvm-18.1.8.src.tar.xz
|
||||
8310ebfda8205233b5ecb6baa7f5272efae31155 SOURCES/llvm-18.1.8.src.tar.xz.sig
|
||||
ada9cf5deaec0a730c751ffd84145acedc6eafeb SOURCES/third-party-18.1.8.src.tar.xz
|
||||
b87b233f778b610a7f8ed1cf9aea4112dfcd7a06 SOURCES/third-party-18.1.8.src.tar.xz.sig
|
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|
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@ -1,98 +0,0 @@
|
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From dbc6b9344bde269a2499d47e7f08c172a88f289a Mon Sep 17 00:00:00 2001
|
||||
From: pvanhout <pierre.vanhoutryve@amd.com>
|
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Date: Thu, 3 Aug 2023 10:53:08 +0200
|
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Subject: [PATCH] [DAG] Fix crash in replaceStoreOfInsertLoad
|
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|
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Idx's type can be different from Ptr's, causing a "Binary operator types must match" assertion failure when emitting the MUL.
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|
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Reviewed By: arsenm
|
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|
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Differential Revision: https://reviews.llvm.org/D156972
|
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|
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(cherry picked from commit 98ccc70b93a39a7ea3e26f7f5b5fe40d39b5a7e5)
|
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---
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +-
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.../AMDGPU/replace-store-of-insert-load.ll | 58 +++++++++++++++++++
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2 files changed, 59 insertions(+), 1 deletion(-)
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create mode 100644 llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll
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diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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index 235f0da86b90..dbc8be3c52b8 100644
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--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -20517,7 +20517,7 @@ SDValue DAGCombiner::replaceStoreOfInsertLoad(StoreSDNode *ST) {
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EVT PtrVT = Ptr.getValueType();
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SDValue Offset =
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- DAG.getNode(ISD::MUL, DL, PtrVT, Idx,
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+ DAG.getNode(ISD::MUL, DL, PtrVT, DAG.getZExtOrTrunc(Idx, DL, PtrVT),
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DAG.getConstant(EltVT.getSizeInBits() / 8, DL, PtrVT));
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SDValue NewPtr = DAG.getNode(ISD::ADD, DL, PtrVT, Ptr, Offset);
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MachinePointerInfo PointerInfo(ST->getAddressSpace());
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diff --git a/llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll b/llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll
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new file mode 100644
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index 000000000000..35a602af68c0
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--- /dev/null
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+++ b/llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll
|
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@@ -0,0 +1,58 @@
|
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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s
|
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+
|
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+; Regression test for a bug in `DAGCombiner::replaceStoreOfInsertLoad` where
|
||||
+; Idx could be smaller than PtrVT, causing a MUL to be emitted with inconsistent
|
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+; LHS/RHS types.
|
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+
|
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+define void @testcase_0(ptr addrspace(1) %in, float %arg) {
|
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+; CHECK-LABEL: testcase_0:
|
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+; CHECK: ; %bb.0:
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+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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+; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:12
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+; CHECK-NEXT: s_waitcnt vmcnt(0)
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||||
+; CHECK-NEXT: s_setpc_b64 s[30:31]
|
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+ %loaded = load <4 x float>, ptr addrspace(1) %in
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+ %modified = insertelement <4 x float> %loaded, float %arg, i64 3
|
||||
+ store <4 x float> %modified, ptr addrspace(1) %in
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+ ret void
|
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+}
|
||||
+
|
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+define void @testcase_1(ptr addrspace(1) %in, float %arg) {
|
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+; CHECK-LABEL: testcase_1:
|
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+; CHECK: ; %bb.0:
|
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+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
+; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:16
|
||||
+; CHECK-NEXT: s_waitcnt vmcnt(0)
|
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+; CHECK-NEXT: s_setpc_b64 s[30:31]
|
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+ %loaded = load <6 x float>, ptr addrspace(1) %in
|
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+ %modified = insertelement <6 x float> %loaded, float %arg, i64 4
|
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+ store <6 x float> %modified, ptr addrspace(1) %in
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+ ret void
|
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+}
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+
|
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+define void @testcase_2(ptr addrspace(1) %in, double %arg) {
|
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+; CHECK-LABEL: testcase_2:
|
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+; CHECK: ; %bb.0:
|
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+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
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+; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:8
|
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+; CHECK-NEXT: s_waitcnt vmcnt(0)
|
||||
+; CHECK-NEXT: s_setpc_b64 s[30:31]
|
||||
+ %loaded = load <4 x double>, ptr addrspace(1) %in
|
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+ %modified = insertelement <4 x double> %loaded, double %arg, i64 1
|
||||
+ store <4 x double> %modified, ptr addrspace(1) %in
|
||||
+ ret void
|
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+}
|
||||
+
|
||||
+define void @testcase_3(ptr addrspace(1) %in, double %arg) {
|
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+; CHECK-LABEL: testcase_3:
|
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+; CHECK: ; %bb.0:
|
||||
+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
+; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:56
|
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+; CHECK-NEXT: s_waitcnt vmcnt(0)
|
||||
+; CHECK-NEXT: s_setpc_b64 s[30:31]
|
||||
+ %loaded = load <8 x double>, ptr addrspace(1) %in
|
||||
+ %modified = insertelement <8 x double> %loaded, double %arg, i64 7
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||||
+ store <8 x double> %modified, ptr addrspace(1) %in
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+ ret void
|
||||
+}
|
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--
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2.44.0
|
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|
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@ -1,74 +0,0 @@
|
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From 9d1f05a7b8537deb5f626cd1b7b26ef2678f4c8e Mon Sep 17 00:00:00 2001
|
||||
From: Arthur Eubanks <aeubanks@google.com>
|
||||
Date: Thu, 27 Jul 2023 13:27:58 -0700
|
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Subject: [PATCH] [PEI] Don't zero out noreg operands
|
||||
|
||||
A tail call may have $noreg operands.
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||||
|
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Fixes a crash.
|
||||
|
||||
Reviewed By: xgupta
|
||||
|
||||
Differential Revision: https://reviews.llvm.org/D156485
|
||||
|
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(cherry picked from commit f800c1f3b207e7bcdc8b4c7192928d9a078242a0)
|
||||
---
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llvm/lib/CodeGen/PrologEpilogInserter.cpp | 9 +++++++--
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llvm/test/CodeGen/X86/zero-call-used-regs.ll | 14 ++++++++++++++
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2 files changed, 21 insertions(+), 2 deletions(-)
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||||
|
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diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
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index e323aaaeefaf..49047719fdaa 100644
|
||||
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
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+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
|
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@@ -1285,6 +1285,8 @@ void PEI::insertZeroCallUsedRegs(MachineFunction &MF) {
|
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continue;
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|
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MCRegister Reg = MO.getReg();
|
||||
+ if (!Reg)
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+ continue;
|
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|
||||
// This picks up sibling registers (e.q. %al -> %ah).
|
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for (MCRegUnit Unit : TRI.regunits(Reg))
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@@ -1308,8 +1310,11 @@ void PEI::insertZeroCallUsedRegs(MachineFunction &MF) {
|
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if (!MO.isReg())
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continue;
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|
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- for (const MCPhysReg &Reg :
|
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- TRI.sub_and_superregs_inclusive(MO.getReg()))
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+ MCRegister Reg = MO.getReg();
|
||||
+ if (!Reg)
|
||||
+ continue;
|
||||
+
|
||||
+ for (const MCPhysReg Reg : TRI.sub_and_superregs_inclusive(Reg))
|
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RegsToZero.reset(Reg);
|
||||
}
|
||||
}
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||||
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs.ll b/llvm/test/CodeGen/X86/zero-call-used-regs.ll
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||||
index 63d51c916bb9..97ad5ce9c8cb 100644
|
||||
--- a/llvm/test/CodeGen/X86/zero-call-used-regs.ll
|
||||
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs.ll
|
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@@ -241,6 +241,20 @@ entry:
|
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ret i32 %x
|
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}
|
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|
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+define dso_local void @tailcall(ptr %p) local_unnamed_addr #0 "zero-call-used-regs"="used-gpr" {
|
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+; I386-LABEL: tailcall:
|
||||
+; I386: # %bb.0:
|
||||
+; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
+; I386-NEXT: jmpl *(%eax) # TAILCALL
|
||||
+;
|
||||
+; X86-64-LABEL: tailcall:
|
||||
+; X86-64: # %bb.0:
|
||||
+; X86-64-NEXT: jmpq *(%rdi) # TAILCALL
|
||||
+ %c = load ptr, ptr %p
|
||||
+ tail call void %c()
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
; Don't emit zeroing registers in "main" function.
|
||||
define dso_local i32 @main() local_unnamed_addr #1 {
|
||||
; I386-LABEL: main:
|
||||
--
|
||||
2.43.0
|
||||
|
||||
@ -1,26 +1,13 @@
|
||||
diff -Naur a/llvm/docs/conf.py b/llvm/docs/conf.py
|
||||
--- a/llvm/docs/conf.py 2020-09-15 09:12:24.318287611 +0000
|
||||
+++ b/llvm/docs/conf.py 2020-09-15 15:01:00.025893199 +0000
|
||||
@@ -36,21 +36,7 @@
|
||||
".rst": "restructuredtext",
|
||||
}
|
||||
diff --git a/llvm/docs/conf.py b/llvm/docs/conf.py
|
||||
index cf8a75980b53..b208ad138e89 100644
|
||||
--- a/llvm/docs/conf.py
|
||||
+++ b/llvm/docs/conf.py
|
||||
@@ -26,7 +26,7 @@ from datetime import date
|
||||
|
||||
-try:
|
||||
- import recommonmark
|
||||
-except ImportError:
|
||||
- # manpages do not use any .md sources
|
||||
- if not tags.has("builder-man"):
|
||||
- raise
|
||||
-else:
|
||||
- import sphinx
|
||||
-
|
||||
- if sphinx.version_info >= (3, 0):
|
||||
- # This requires 0.5 or later.
|
||||
- extensions.append("recommonmark")
|
||||
- else:
|
||||
- source_parsers = {".md": "recommonmark.parser.CommonMarkParser"}
|
||||
- source_suffix[".md"] = "markdown"
|
||||
+import sphinx
|
||||
# Add any Sphinx extension module names here, as strings. They can be extensions
|
||||
# coming with Sphinx (named 'sphinx.ext.*') or your custom ones.
|
||||
-extensions = ["myst_parser", "sphinx.ext.intersphinx", "sphinx.ext.todo"]
|
||||
+extensions = ["sphinx.ext.intersphinx", "sphinx.ext.todo"]
|
||||
|
||||
# The encoding of source files.
|
||||
# source_encoding = 'utf-8-sig'
|
||||
# Automatic anchors for markdown titles
|
||||
from llvm_slug import make_slug
|
||||
|
||||
893
SOURCES/99273.patch
Normal file
893
SOURCES/99273.patch
Normal file
@ -0,0 +1,893 @@
|
||||
From 91052169960477fbc39169c10f9fae3bec732510 Mon Sep 17 00:00:00 2001
|
||||
From: Carl Ritson <carl.ritson@amd.com>
|
||||
Date: Wed, 17 Jul 2024 15:07:42 +0900
|
||||
Subject: [PATCH 1/3] [AMDGPU] Implement workaround for GFX11.5 export priority
|
||||
|
||||
On GFX11.5 shaders having completed exports need to execute/wait
|
||||
at a lower priority than shaders still executing exports.
|
||||
Add code to maintain normal priority of 2 for shaders that export
|
||||
and drop to priority 0 after exports.
|
||||
---
|
||||
llvm/lib/Target/AMDGPU/AMDGPU.td | 15 +-
|
||||
.../lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 112 ++++++
|
||||
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 1 +
|
||||
llvm/lib/Target/AMDGPU/GCNSubtarget.h | 3 +
|
||||
.../AMDGPU/required-export-priority.ll | 344 ++++++++++++++++++
|
||||
.../AMDGPU/required-export-priority.mir | 293 +++++++++++++++
|
||||
6 files changed, 765 insertions(+), 3 deletions(-)
|
||||
create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
create mode 100644 llvm/test/CodeGen/AMDGPU/required-export-priority.mir
|
||||
|
||||
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
|
||||
index dfc8eaea66f7b..14fcf6a210a78 100644
|
||||
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
|
||||
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
|
||||
@@ -947,6 +947,12 @@ def FeatureHasRestrictedSOffset : SubtargetFeature<"restricted-soffset",
|
||||
"Has restricted SOffset (immediate not supported)."
|
||||
>;
|
||||
|
||||
+def FeatureRequiredExportPriority : SubtargetFeature<"required-export-priority",
|
||||
+ "HasRequiredExportPriority",
|
||||
+ "true",
|
||||
+ "Export priority must be explicitly manipulated on GFX11.5"
|
||||
+>;
|
||||
+
|
||||
//===------------------------------------------------------------===//
|
||||
// Subtarget Features (options and debugging)
|
||||
//===------------------------------------------------------------===//
|
||||
@@ -1597,14 +1603,16 @@ def FeatureISAVersion11_5_0 : FeatureSet<
|
||||
!listconcat(FeatureISAVersion11_Common.Features,
|
||||
[FeatureSALUFloatInsts,
|
||||
FeatureDPPSrc1SGPR,
|
||||
- FeatureVGPRSingleUseHintInsts])>;
|
||||
+ FeatureVGPRSingleUseHintInsts,
|
||||
+ FeatureRequiredExportPriority])>;
|
||||
|
||||
def FeatureISAVersion11_5_1 : FeatureSet<
|
||||
!listconcat(FeatureISAVersion11_Common.Features,
|
||||
[FeatureSALUFloatInsts,
|
||||
FeatureDPPSrc1SGPR,
|
||||
FeatureVGPRSingleUseHintInsts,
|
||||
- FeatureGFX11FullVGPRs])>;
|
||||
+ FeatureGFX11FullVGPRs,
|
||||
+ FeatureRequiredExportPriority])>;
|
||||
|
||||
def FeatureISAVersion12 : FeatureSet<
|
||||
[FeatureGFX12,
|
||||
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
|
||||
index a402fc6d7e611..a8b171aa82840 100644
|
||||
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
|
||||
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
|
||||
@@ -14,6 +14,7 @@
|
||||
#include "GCNSubtarget.h"
|
||||
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
|
||||
#include "SIMachineFunctionInfo.h"
|
||||
+#include "llvm/CodeGen/MachineFrameInfo.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/ScheduleDAG.h"
|
||||
#include "llvm/TargetParser/TargetParser.h"
|
||||
@@ -1104,6 +1105,7 @@ void GCNHazardRecognizer::fixHazards(MachineInstr *MI) {
|
||||
fixWMMAHazards(MI);
|
||||
fixShift64HighRegBug(MI);
|
||||
fixVALUMaskWriteHazard(MI);
|
||||
+ fixRequiredExportPriority(MI);
|
||||
}
|
||||
|
||||
bool GCNHazardRecognizer::fixVcmpxPermlaneHazards(MachineInstr *MI) {
|
||||
@@ -2895,3 +2897,113 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
|
||||
|
||||
return true;
|
||||
}
|
||||
+
|
||||
+static bool ensureEntrySetPrio(MachineFunction *MF, int Priority,
|
||||
+ const SIInstrInfo &TII) {
|
||||
+ MachineBasicBlock &EntryMBB = MF->front();
|
||||
+ if (EntryMBB.begin() != EntryMBB.end()) {
|
||||
+ auto &EntryMI = *EntryMBB.begin();
|
||||
+ if (EntryMI.getOpcode() == AMDGPU::S_SETPRIO &&
|
||||
+ EntryMI.getOperand(0).getImm() >= Priority)
|
||||
+ return false;
|
||||
+ }
|
||||
+
|
||||
+ BuildMI(EntryMBB, EntryMBB.begin(), DebugLoc(), TII.get(AMDGPU::S_SETPRIO))
|
||||
+ .addImm(Priority);
|
||||
+ return true;
|
||||
+}
|
||||
+
|
||||
+bool GCNHazardRecognizer::fixRequiredExportPriority(MachineInstr *MI) {
|
||||
+ if (!ST.hasRequiredExportPriority())
|
||||
+ return false;
|
||||
+
|
||||
+ // Assume the following shader types will never have exports,
|
||||
+ // and avoid adding or adjusting S_SETPRIO.
|
||||
+ MachineBasicBlock *MBB = MI->getParent();
|
||||
+ MachineFunction *MF = MBB->getParent();
|
||||
+ auto CC = MF->getFunction().getCallingConv();
|
||||
+ switch (CC) {
|
||||
+ case CallingConv::AMDGPU_CS:
|
||||
+ case CallingConv::AMDGPU_CS_Chain:
|
||||
+ case CallingConv::AMDGPU_CS_ChainPreserve:
|
||||
+ case CallingConv::AMDGPU_KERNEL:
|
||||
+ return false;
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ const int MaxPriority = 3;
|
||||
+ const int NormalPriority = 2;
|
||||
+ const int PostExportPriority = 0;
|
||||
+
|
||||
+ auto It = MI->getIterator();
|
||||
+ switch (MI->getOpcode()) {
|
||||
+ case AMDGPU::S_ENDPGM:
|
||||
+ case AMDGPU::S_ENDPGM_SAVED:
|
||||
+ case AMDGPU::S_ENDPGM_ORDERED_PS_DONE:
|
||||
+ case AMDGPU::SI_RETURN_TO_EPILOG:
|
||||
+ // Ensure shader with calls raises priority at entry.
|
||||
+ // This ensures correct priority if exports exist in callee.
|
||||
+ if (MF->getFrameInfo().hasCalls())
|
||||
+ return ensureEntrySetPrio(MF, NormalPriority, TII);
|
||||
+ return false;
|
||||
+ case AMDGPU::S_SETPRIO: {
|
||||
+ // Raise minimum priority unless in workaround.
|
||||
+ auto &PrioOp = MI->getOperand(0);
|
||||
+ int Prio = PrioOp.getImm();
|
||||
+ bool InWA = (Prio == PostExportPriority) &&
|
||||
+ (It != MBB->begin() && TII.isEXP(*std::prev(It)));
|
||||
+ if (InWA || Prio >= NormalPriority)
|
||||
+ return false;
|
||||
+ PrioOp.setImm(std::min(Prio + NormalPriority, MaxPriority));
|
||||
+ return true;
|
||||
+ }
|
||||
+ default:
|
||||
+ if (!TII.isEXP(*MI))
|
||||
+ return false;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ // Check entry priority at each export (as there will only be a few).
|
||||
+ // Note: amdgpu_gfx can only be a callee, so defer to caller setprio.
|
||||
+ bool Changed = false;
|
||||
+ if (CC != CallingConv::AMDGPU_Gfx)
|
||||
+ Changed = ensureEntrySetPrio(MF, NormalPriority, TII);
|
||||
+
|
||||
+ auto NextMI = std::next(It);
|
||||
+ bool EndOfShader = false;
|
||||
+ if (NextMI != MBB->end()) {
|
||||
+ // Only need WA at end of sequence of exports.
|
||||
+ if (TII.isEXP(*NextMI))
|
||||
+ return Changed;
|
||||
+ // Assume appropriate S_SETPRIO after export means WA already applied.
|
||||
+ if (NextMI->getOpcode() == AMDGPU::S_SETPRIO &&
|
||||
+ NextMI->getOperand(0).getImm() == PostExportPriority)
|
||||
+ return Changed;
|
||||
+ EndOfShader = NextMI->getOpcode() == AMDGPU::S_ENDPGM;
|
||||
+ }
|
||||
+
|
||||
+ const DebugLoc &DL = MI->getDebugLoc();
|
||||
+
|
||||
+ // Lower priority.
|
||||
+ BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
|
||||
+ .addImm(PostExportPriority);
|
||||
+
|
||||
+ if (!EndOfShader) {
|
||||
+ // Wait for exports to complete.
|
||||
+ BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_WAITCNT_EXPCNT))
|
||||
+ .addReg(AMDGPU::SGPR_NULL)
|
||||
+ .addImm(0);
|
||||
+ }
|
||||
+
|
||||
+ BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
|
||||
+ BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_NOP)).addImm(0);
|
||||
+
|
||||
+ if (!EndOfShader) {
|
||||
+ // Return to normal (higher) priority.
|
||||
+ BuildMI(*MBB, NextMI, DL, TII.get(AMDGPU::S_SETPRIO))
|
||||
+ .addImm(NormalPriority);
|
||||
+ }
|
||||
+
|
||||
+ return true;
|
||||
+}
|
||||
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
|
||||
index 3ccca527c626b..f2a64ab48e180 100644
|
||||
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
|
||||
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
|
||||
@@ -107,6 +107,7 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer {
|
||||
bool fixWMMAHazards(MachineInstr *MI);
|
||||
bool fixShift64HighRegBug(MachineInstr *MI);
|
||||
bool fixVALUMaskWriteHazard(MachineInstr *MI);
|
||||
+ bool fixRequiredExportPriority(MachineInstr *MI);
|
||||
|
||||
int checkMAIHazards(MachineInstr *MI);
|
||||
int checkMAIHazards908(MachineInstr *MI);
|
||||
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
|
||||
index e5817594a4521..def89c785b855 100644
|
||||
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
|
||||
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
|
||||
@@ -238,6 +238,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
|
||||
bool HasVOPDInsts = false;
|
||||
bool HasVALUTransUseHazard = false;
|
||||
bool HasForceStoreSC0SC1 = false;
|
||||
+ bool HasRequiredExportPriority = false;
|
||||
|
||||
// Dummy feature to use for assembler in tablegen.
|
||||
bool FeatureDisable = false;
|
||||
@@ -1282,6 +1283,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
|
||||
|
||||
bool hasRestrictedSOffset() const { return HasRestrictedSOffset; }
|
||||
|
||||
+ bool hasRequiredExportPriority() const { return HasRequiredExportPriority; }
|
||||
+
|
||||
/// \returns true if the target uses LOADcnt/SAMPLEcnt/BVHcnt, DScnt/KMcnt
|
||||
/// and STOREcnt rather than VMcnt, LGKMcnt and VScnt respectively.
|
||||
bool hasExtendedWaitCounts() const { return getGeneration() >= GFX12; }
|
||||
diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
new file mode 100644
|
||||
index 0000000000000..377902f3f0d1a
|
||||
--- /dev/null
|
||||
+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
@@ -0,0 +1,344 @@
|
||||
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
|
||||
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
||||
+
|
||||
+define amdgpu_ps void @test_export_zeroes_f32() #0 {
|
||||
+; GCN-LABEL: test_export_zeroes_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 0
|
||||
+; GCN-NEXT: exp mrt0 off, off, off, off
|
||||
+; GCN-NEXT: exp mrt0 off, off, off, off done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 false, i1 false)
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_export_en_src0_f32() #0 {
|
||||
+; GCN-LABEL: test_export_en_src0_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 2.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 1.0
|
||||
+; GCN-NEXT: exp mrt0 v3, off, off, off done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 1, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_gs void @test_export_gs() #0 {
|
||||
+; GCN-LABEL: test_export_gs:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 2.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 1.0
|
||||
+; GCN-NEXT: exp mrt0 off, v2, off, off done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_hs void @test_export_hs() #0 {
|
||||
+; GCN-LABEL: test_export_hs:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 2.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 1.0
|
||||
+; GCN-NEXT: exp mrt0 off, v2, off, off done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_gfx void @test_export_gfx(float %v) #0 {
|
||||
+; GCN-LABEL: test_export_gfx:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 2.0
|
||||
+; GCN-NEXT: exp mrt0 off, v3, off, off done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_waitcnt expcnt(0)
|
||||
+; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float %v, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_cs void @test_export_cs() #0 {
|
||||
+; GCN-LABEL: test_export_cs:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 2.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 1.0
|
||||
+; GCN-NEXT: exp mrt0 off, v2, off, off done
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_kernel void @test_export_kernel() #0 {
|
||||
+; GCN-LABEL: test_export_kernel:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: v_mov_b32_e32 v0, 4.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0.5
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 2.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 1.0
|
||||
+; GCN-NEXT: exp mrt0 off, v2, off, off done
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 2, float 1.0, float 2.0, float 0.5, float 4.0, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_gfx void @test_no_export_gfx(float %v) #0 {
|
||||
+; GCN-LABEL: test_no_export_gfx:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
+; GCN-NEXT: s_setpc_b64 s[30:31]
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_no_export_ps(float %v) #0 {
|
||||
+; GCN-LABEL: test_no_export_ps:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_if_export_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
|
||||
+; GCN-LABEL: test_if_export_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_mov_b32 s0, exec_lo
|
||||
+; GCN-NEXT: v_cmpx_ne_u32_e32 0, v0
|
||||
+; GCN-NEXT: s_cbranch_execz .LBB9_2
|
||||
+; GCN-NEXT: ; %bb.1: ; %exp
|
||||
+; GCN-NEXT: exp mrt0 v1, v2, v3, v4
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: .LBB9_2: ; %end
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %cc = icmp eq i32 %flag, 0
|
||||
+ br i1 %cc, label %end, label %exp
|
||||
+
|
||||
+exp:
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 false)
|
||||
+ br label %end
|
||||
+
|
||||
+end:
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_if_export_vm_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
|
||||
+; GCN-LABEL: test_if_export_vm_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_mov_b32 s0, exec_lo
|
||||
+; GCN-NEXT: v_cmpx_ne_u32_e32 0, v0
|
||||
+; GCN-NEXT: s_cbranch_execz .LBB10_2
|
||||
+; GCN-NEXT: ; %bb.1: ; %exp
|
||||
+; GCN-NEXT: exp mrt0 v1, v2, v3, v4
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: .LBB10_2: ; %end
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %cc = icmp eq i32 %flag, 0
|
||||
+ br i1 %cc, label %end, label %exp
|
||||
+
|
||||
+exp:
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 false, i1 true)
|
||||
+ br label %end
|
||||
+
|
||||
+end:
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_if_export_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
|
||||
+; GCN-LABEL: test_if_export_done_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_mov_b32 s0, exec_lo
|
||||
+; GCN-NEXT: v_cmpx_ne_u32_e32 0, v0
|
||||
+; GCN-NEXT: s_cbranch_execz .LBB11_2
|
||||
+; GCN-NEXT: ; %bb.1: ; %exp
|
||||
+; GCN-NEXT: exp mrt0 v1, v2, v3, v4 done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: .LBB11_2: ; %end
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %cc = icmp eq i32 %flag, 0
|
||||
+ br i1 %cc, label %end, label %exp
|
||||
+
|
||||
+exp:
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 false)
|
||||
+ br label %end
|
||||
+
|
||||
+end:
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_if_export_vm_done_f32(i32 %flag, float %x, float %y, float %z, float %w) #0 {
|
||||
+; GCN-LABEL: test_if_export_vm_done_f32:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_mov_b32 s0, exec_lo
|
||||
+; GCN-NEXT: v_cmpx_ne_u32_e32 0, v0
|
||||
+; GCN-NEXT: s_cbranch_execz .LBB12_2
|
||||
+; GCN-NEXT: ; %bb.1: ; %exp
|
||||
+; GCN-NEXT: exp mrt0 v1, v2, v3, v4 done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: .LBB12_2: ; %end
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %cc = icmp eq i32 %flag, 0
|
||||
+ br i1 %cc, label %end, label %exp
|
||||
+
|
||||
+exp:
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %x, float %y, float %z, float %w, i1 true, i1 true)
|
||||
+ br label %end
|
||||
+
|
||||
+end:
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_export_pos_before_param_across_load(i32 %idx) #0 {
|
||||
+; GCN-LABEL: test_export_pos_before_param_across_load:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: buffer_load_b32 v0, v0, s[0:3], 0 offen
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 1.0
|
||||
+; GCN-NEXT: v_mov_b32_e32 v3, 0.5
|
||||
+; GCN-NEXT: s_waitcnt vmcnt(0)
|
||||
+; GCN-NEXT: exp pos0 v1, v1, v1, v0 done
|
||||
+; GCN-NEXT: exp invalid_target_32 v2, v2, v2, v2
|
||||
+; GCN-NEXT: exp invalid_target_33 v2, v2, v2, v3
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float 1.0, float 1.0, float 1.0, float 1.0, i1 false, i1 false)
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float 1.0, float 1.0, float 1.0, float 0.5, i1 false, i1 false)
|
||||
+ %load = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) undef, i32 %idx, i32 0, i32 0)
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float %load, i1 true, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_export_across_store_load(i32 %idx, float %v) #0 {
|
||||
+; GCN-LABEL: test_export_across_store_load:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 24
|
||||
+; GCN-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
+; GCN-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
+; GCN-NEXT: v_cndmask_b32_e64 v0, v2, 8, vcc_lo
|
||||
+; GCN-NEXT: v_mov_b32_e32 v2, 0
|
||||
+; GCN-NEXT: scratch_store_b32 v0, v1, off
|
||||
+; GCN-NEXT: scratch_load_b32 v0, off, off
|
||||
+; GCN-NEXT: v_mov_b32_e32 v1, 1.0
|
||||
+; GCN-NEXT: exp pos0 v2, v2, v2, v1 done
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_waitcnt_expcnt null, 0x0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_waitcnt vmcnt(0)
|
||||
+; GCN-NEXT: exp invalid_target_32 v0, v2, v1, v2
|
||||
+; GCN-NEXT: exp invalid_target_33 v0, v2, v1, v2
|
||||
+; GCN-NEXT: s_setprio 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_nop 0
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %data0 = alloca <4 x float>, align 8, addrspace(5)
|
||||
+ %data1 = alloca <4 x float>, align 8, addrspace(5)
|
||||
+ %cmp = icmp eq i32 %idx, 1
|
||||
+ %data = select i1 %cmp, ptr addrspace(5) %data0, ptr addrspace(5) %data1
|
||||
+ store float %v, ptr addrspace(5) %data, align 8
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float 0.0, float 0.0, float 0.0, float 1.0, i1 true, i1 false)
|
||||
+ %load0 = load float, ptr addrspace(5) %data0, align 8
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
|
||||
+ call void @llvm.amdgcn.exp.f32(i32 33, i32 15, float %load0, float 0.0, float 1.0, float 0.0, i1 false, i1 false)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_export_in_callee(float %v) #0 {
|
||||
+; GCN-LABEL: test_export_in_callee:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_getpc_b64 s[0:1]
|
||||
+; GCN-NEXT: s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
|
||||
+; GCN-NEXT: s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
|
||||
+; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0
|
||||
+; GCN-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
|
||||
+; GCN-NEXT: s_mov_b32 s32, 0
|
||||
+; GCN-NEXT: s_waitcnt lgkmcnt(0)
|
||||
+; GCN-NEXT: s_swappc_b64 s[30:31], s[0:1]
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %x = fadd float %v, 1.0
|
||||
+ call void @test_export_gfx(float %x)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+define amdgpu_ps void @test_export_in_callee_prio(float %v) #0 {
|
||||
+; GCN-LABEL: test_export_in_callee_prio:
|
||||
+; GCN: ; %bb.0:
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_mov_b32 s32, 0
|
||||
+; GCN-NEXT: v_add_f32_e32 v0, 1.0, v0
|
||||
+; GCN-NEXT: s_setprio 2
|
||||
+; GCN-NEXT: s_getpc_b64 s[0:1]
|
||||
+; GCN-NEXT: s_add_u32 s0, s0, test_export_gfx@gotpcrel32@lo+4
|
||||
+; GCN-NEXT: s_addc_u32 s1, s1, test_export_gfx@gotpcrel32@hi+12
|
||||
+; GCN-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
|
||||
+; GCN-NEXT: s_waitcnt lgkmcnt(0)
|
||||
+; GCN-NEXT: s_swappc_b64 s[30:31], s[0:1]
|
||||
+; GCN-NEXT: s_endpgm
|
||||
+ %x = fadd float %v, 1.0
|
||||
+ call void @llvm.amdgcn.s.setprio(i16 0)
|
||||
+ call void @test_export_gfx(float %x)
|
||||
+ ret void
|
||||
+}
|
||||
+
|
||||
+declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
|
||||
+declare void @llvm.amdgcn.exp.i32(i32, i32, i32, i32, i32, i32, i1, i1) #1
|
||||
+declare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32) #2
|
||||
+declare void @llvm.amdgcn.s.setprio(i16)
|
||||
+
|
||||
+attributes #0 = { nounwind }
|
||||
+attributes #1 = { nounwind inaccessiblememonly }
|
||||
+attributes #2 = { nounwind readnone }
|
||||
diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.mir b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
|
||||
new file mode 100644
|
||||
index 0000000000000..eee04468036e5
|
||||
--- /dev/null
|
||||
+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.mir
|
||||
@@ -0,0 +1,293 @@
|
||||
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
|
||||
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass=post-RA-hazard-rec -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GFX1150 %s
|
||||
+
|
||||
+--- |
|
||||
+ define amdgpu_ps void @end_of_shader() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @end_of_shader_return_to_epilogue() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @end_of_block() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @start_of_block() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @block_of_exports() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @sparse_exports() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @existing_setprio_1() {
|
||||
+ ret void
|
||||
+ }
|
||||
+ define amdgpu_ps void @existing_setprio_2() {
|
||||
+ ret void
|
||||
+ }
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: end_of_shader
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ ; GFX1150-LABEL: name: end_of_shader
|
||||
+ ; GFX1150: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: end_of_shader_return_to_epilogue
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ ; GFX1150-LABEL: name: end_of_shader_return_to_epilogue
|
||||
+ ; GFX1150: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: SI_RETURN_TO_EPILOG $vgpr0
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ SI_RETURN_TO_EPILOG $vgpr0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: end_of_block
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ ; GFX1150-LABEL: name: end_of_block
|
||||
+ ; GFX1150: bb.0:
|
||||
+ ; GFX1150-NEXT: successors: %bb.1(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.1:
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+
|
||||
+ bb.1:
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: start_of_block
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ ; GFX1150-LABEL: name: start_of_block
|
||||
+ ; GFX1150: bb.0:
|
||||
+ ; GFX1150-NEXT: successors: %bb.1(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.1:
|
||||
+ ; GFX1150-NEXT: successors: %bb.2(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.2:
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+
|
||||
+ bb.1:
|
||||
+ liveins: $vgpr0
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+
|
||||
+ bb.2:
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: block_of_exports
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ ; GFX1150-LABEL: name: block_of_exports
|
||||
+ ; GFX1150: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: sparse_exports
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ ; GFX1150-LABEL: name: sparse_exports
|
||||
+ ; GFX1150: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ EXP 2, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
|
||||
+ EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: existing_setprio_1
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ ; GFX1150-LABEL: name: existing_setprio_1
|
||||
+ ; GFX1150: bb.0:
|
||||
+ ; GFX1150-NEXT: successors: %bb.1(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.1:
|
||||
+ ; GFX1150-NEXT: successors: %bb.2(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 3
|
||||
+ ; GFX1150-NEXT: $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.2:
|
||||
+ ; GFX1150-NEXT: successors: %bb.3(0x80000000)
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 3
|
||||
+ ; GFX1150-NEXT: $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: bb.3:
|
||||
+ ; GFX1150-NEXT: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ $vgpr0 = V_AND_B32_e32 1, $vgpr0, implicit $exec
|
||||
+
|
||||
+ bb.1:
|
||||
+ liveins: $vgpr0
|
||||
+ S_SETPRIO 3
|
||||
+ $vgpr0 = V_OR_B32_e32 2, $vgpr0, implicit $exec
|
||||
+ S_SETPRIO 0
|
||||
+
|
||||
+ bb.2:
|
||||
+ liveins: $vgpr0
|
||||
+ S_SETPRIO 1
|
||||
+ $vgpr0 = V_OR_B32_e32 3, $vgpr0, implicit $exec
|
||||
+ S_SETPRIO 0
|
||||
+
|
||||
+ bb.3:
|
||||
+ liveins: $vgpr0
|
||||
+ EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
+
|
||||
+---
|
||||
+name: existing_setprio_2
|
||||
+tracksRegLiveness: true
|
||||
+liveins:
|
||||
+ - { reg: '$vgpr0' }
|
||||
+body: |
|
||||
+ bb.0:
|
||||
+ liveins: $vgpr0
|
||||
+ ; GFX1150-LABEL: name: existing_setprio_2
|
||||
+ ; GFX1150: liveins: $vgpr0
|
||||
+ ; GFX1150-NEXT: {{ $}}
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 3
|
||||
+ ; GFX1150-NEXT: EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 0
|
||||
+ ; GFX1150-NEXT: S_WAITCNT_EXPCNT $sgpr_null, 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_NOP 0
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 2
|
||||
+ ; GFX1150-NEXT: S_SETPRIO 3
|
||||
+ ; GFX1150-NEXT: S_ENDPGM 0
|
||||
+ S_SETPRIO 3
|
||||
+ EXP 1, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ EXP_DONE 0, $vgpr0, $vgpr0, $vgpr0, $vgpr0, -1, -1, 15, implicit $exec
|
||||
+ S_SETPRIO 3
|
||||
+ S_ENDPGM 0
|
||||
+...
|
||||
|
||||
From 8ea44e65f2c19facff751aeb2ac960f907fb210f Mon Sep 17 00:00:00 2001
|
||||
From: Carl Ritson <carl.ritson@amd.com>
|
||||
Date: Wed, 17 Jul 2024 16:18:02 +0900
|
||||
Subject: [PATCH 2/3] Remove -verify-machineinstrs from test.
|
||||
|
||||
---
|
||||
llvm/test/CodeGen/AMDGPU/required-export-priority.ll | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
index 377902f3f0d1a..ebc209bd4d451 100644
|
||||
--- a/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
+++ b/llvm/test/CodeGen/AMDGPU/required-export-priority.ll
|
||||
@@ -1,5 +1,5 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
|
||||
-; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
|
||||
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefix=GCN %s
|
||||
|
||||
define amdgpu_ps void @test_export_zeroes_f32() #0 {
|
||||
; GCN-LABEL: test_export_zeroes_f32:
|
||||
204
SPECS/llvm.spec
204
SPECS/llvm.spec
@ -31,9 +31,9 @@
|
||||
%bcond_without lto_build
|
||||
%endif
|
||||
|
||||
%global maj_ver 17
|
||||
%global min_ver 0
|
||||
%global patch_ver 6
|
||||
%global maj_ver 18
|
||||
%global min_ver 1
|
||||
%global patch_ver 8
|
||||
#global rc_ver 4
|
||||
|
||||
%if %{with snapshot_build}
|
||||
@ -138,11 +138,11 @@ Source5: https://github.com/llvm/llvm-project/releases/download/llvmorg-%{maj_ve
|
||||
Source6: release-keys.asc
|
||||
%endif
|
||||
|
||||
# Backport of https://reviews.llvm.org/D156485 for RHEL-23865.
|
||||
Patch0: 0001-PEI-Don-t-zero-out-noreg-operands.patch
|
||||
Patch1: 0001-DAG-Fix-crash-in-replaceStoreOfInsertLoad.patch
|
||||
|
||||
# RHEL-specific patch to avoid unwanted recommonmark dep
|
||||
# Backport with modifications from
|
||||
# https://github.com/llvm/llvm-project/pull/99273
|
||||
# Fixes RHEL-54336
|
||||
Patch001: 99273.patch
|
||||
# RHEL-specific patch to avoid unwanted python3-myst-parser dep
|
||||
Patch101: 0101-Deactivate-markdown-doc.patch
|
||||
|
||||
BuildRequires: gcc
|
||||
@ -156,7 +156,7 @@ BuildRequires: ncurses-devel
|
||||
BuildRequires: python3-psutil
|
||||
BuildRequires: python3-sphinx
|
||||
%if %{undefined rhel}
|
||||
BuildRequires: python3-recommonmark
|
||||
BuildRequires: python3-myst-parser
|
||||
%endif
|
||||
BuildRequires: multilib-rpm-config
|
||||
%if %{with gold}
|
||||
@ -210,14 +210,12 @@ Requires: libedit-devel
|
||||
# but this caused bugs (rhbz#1773678) and forced us to carry two non-upstream
|
||||
# patches.
|
||||
Requires: %{name}-static%{?_isa} = %{version}-%{release}
|
||||
%if %{without compat_build}
|
||||
Requires: %{name}-test%{?_isa} = %{version}-%{release}
|
||||
Requires: %{name}-googletest%{?_isa} = %{version}-%{release}
|
||||
%endif
|
||||
|
||||
|
||||
Requires(post): %{_sbindir}/alternatives
|
||||
Requires(postun): %{_sbindir}/alternatives
|
||||
Requires(post): /usr/sbin/alternatives
|
||||
Requires(postun): /usr/sbin/alternatives
|
||||
|
||||
Provides: llvm-devel(major) = %{maj_ver}
|
||||
|
||||
@ -235,6 +233,8 @@ Documentation for the LLVM compiler infrastructure.
|
||||
|
||||
%package libs
|
||||
Summary: LLVM shared libraries
|
||||
Requires(post): /sbin/ldconfig
|
||||
Requires(postun): /sbin/ldconfig
|
||||
|
||||
%description libs
|
||||
Shared libraries for the LLVM compiler infrastructure.
|
||||
@ -255,8 +255,6 @@ Summary: CMake utilities shared across LLVM subprojects
|
||||
CMake utilities shared across LLVM subprojects.
|
||||
This is for internal use by LLVM packages only.
|
||||
|
||||
%if %{without compat_build}
|
||||
|
||||
%package test
|
||||
Summary: LLVM regression tests
|
||||
Requires: %{name}%{?_isa} = %{version}-%{release}
|
||||
@ -281,22 +279,14 @@ Summary: Package that installs llvm-toolset
|
||||
Requires: clang = %{version}
|
||||
Requires: llvm = %{version}
|
||||
|
||||
%ifnarch s390x
|
||||
Requires: lld = %{version}
|
||||
%endif
|
||||
|
||||
%description toolset
|
||||
This is the main package for llvm-toolset.
|
||||
%endif
|
||||
|
||||
%endif
|
||||
|
||||
%prep
|
||||
%if %{without snapshot_build}
|
||||
%{gpgverify} --keyring='%{SOURCE6}' --signature='%{SOURCE1}' --data='%{SOURCE0}'
|
||||
%{gpgverify} --keyring='%{SOURCE6}' --signature='%{SOURCE3}' --data='%{SOURCE2}'
|
||||
%{gpgverify} --keyring='%{SOURCE6}' --signature='%{SOURCE5}' --data='%{SOURCE4}'
|
||||
%endif
|
||||
%setup -T -q -b 2 -n %{cmake_srcdir}
|
||||
# TODO: It would be more elegant to set -DLLVM_COMMON_CMAKE_UTILS=%{_builddir}/%{cmake_srcdir},
|
||||
# but this is not a CACHED variable, so we can't actually set it externally :(
|
||||
@ -371,24 +361,16 @@ export ASMFLAGS="%{build_cflags}"
|
||||
\
|
||||
-DLLVM_INCLUDE_TESTS:BOOL=ON \
|
||||
-DLLVM_BUILD_TESTS:BOOL=ON \
|
||||
%if %{with compat_build}
|
||||
-DLLVM_INSTALL_GTEST:BOOL=OFF \
|
||||
%else
|
||||
-DLLVM_INSTALL_GTEST:BOOL=ON \
|
||||
%endif
|
||||
-DLLVM_LIT_ARGS=-v \
|
||||
\
|
||||
-DLLVM_INCLUDE_EXAMPLES:BOOL=ON \
|
||||
-DLLVM_BUILD_EXAMPLES:BOOL=OFF \
|
||||
\
|
||||
-DLLVM_INCLUDE_UTILS:BOOL=ON \
|
||||
%if %{with compat_build}
|
||||
-DLLVM_INSTALL_UTILS:BOOL=OFF \
|
||||
%else
|
||||
-DLLVM_INSTALL_UTILS:BOOL=ON \
|
||||
-DLLVM_UTILS_INSTALL_DIR:PATH=%{_bindir} \
|
||||
-DLLVM_UTILS_INSTALL_DIR:PATH=bin \
|
||||
-DLLVM_TOOLS_INSTALL_DIR:PATH=bin \
|
||||
%endif
|
||||
\
|
||||
-DLLVM_INCLUDE_DOCS:BOOL=ON \
|
||||
-DLLVM_BUILD_DOCS:BOOL=ON \
|
||||
@ -409,12 +391,14 @@ export ASMFLAGS="%{build_cflags}"
|
||||
-DSPHINX_WARNINGS_AS_ERRORS=OFF \
|
||||
-DCMAKE_INSTALL_PREFIX=%{install_prefix} \
|
||||
-DLLVM_INSTALL_SPHINX_HTML_DIR=%{_pkgdocdir}/html \
|
||||
-DSPHINX_EXECUTABLE=%{_bindir}/sphinx-build-3 \
|
||||
-DSPHINX_EXECUTABLE=/usr/bin/sphinx-build-3 \
|
||||
-DLLVM_INCLUDE_BENCHMARKS=OFF \
|
||||
%if %{with lto_build}
|
||||
-DLLVM_UNITTEST_LINK_FLAGS="-Wl,-plugin-opt=O0" \
|
||||
%endif
|
||||
%ifarch x86_64
|
||||
-DCMAKE_SHARED_LINKER_FLAGS="$LDFLAGS -Wl,-z,cet-report=error"
|
||||
%endif
|
||||
|
||||
# Build libLLVM.so first. This ensures that when libLLVM.so is linking, there
|
||||
# are no other compile jobs running. This will help reduce OOM errors on the
|
||||
@ -427,29 +411,34 @@ export ASMFLAGS="%{build_cflags}"
|
||||
|
||||
mkdir -p %{buildroot}/%{_bindir}
|
||||
|
||||
%if %{without compat_build}
|
||||
|
||||
# Fix some man pages
|
||||
ln -s llvm-config.1 %{buildroot}%{_mandir}/man1/llvm-config%{exec_suffix}-%{__isa_bits}.1
|
||||
|
||||
# Install binaries needed for lit tests
|
||||
%global test_binaries llvm-isel-fuzzer llvm-opt-fuzzer
|
||||
|
||||
for f in %{test_binaries}
|
||||
do
|
||||
install -m 0755 %{_vpath_builddir}/bin/$f %{buildroot}%{_bindir}
|
||||
install -m 0755 %{_vpath_builddir}/bin/$f %{buildroot}%{install_bindir}
|
||||
done
|
||||
|
||||
# Remove testing of update utility tools
|
||||
rm -rf test/tools/UpdateTestChecks
|
||||
|
||||
%multilib_fix_c_header --file %{_includedir}/llvm/Config/llvm-config.h
|
||||
|
||||
# Install libraries needed for unittests
|
||||
%if %{without compat_build}
|
||||
%global build_libdir %{_vpath_builddir}/%{_lib}
|
||||
%else
|
||||
%global build_libdir %{_vpath_builddir}/lib
|
||||
%endif
|
||||
|
||||
install %{build_libdir}/libLLVMTestingSupport.a %{buildroot}%{_libdir}
|
||||
install %{build_libdir}/libLLVMTestingAnnotations.a %{buildroot}%{_libdir}
|
||||
install %{build_libdir}/libLLVMTestingSupport.a %{buildroot}%{install_libdir}
|
||||
install %{build_libdir}/libLLVMTestingAnnotations.a %{buildroot}%{install_libdir}
|
||||
|
||||
# Fix multi-lib
|
||||
%multilib_fix_c_header --file %{install_includedir}/llvm/Config/llvm-config.h
|
||||
|
||||
%if %{without compat_build}
|
||||
|
||||
# Fix some man pages
|
||||
ln -s llvm-config.1 %{buildroot}%{_mandir}/man1/llvm-config%{exec_suffix}-%{__isa_bits}.1
|
||||
|
||||
%if %{with gold}
|
||||
# Add symlink to lto plugin in the binutils plugin directory.
|
||||
@ -465,14 +454,6 @@ for f in %{buildroot}/%{install_bindir}/*; do
|
||||
ln -s ../../%{install_bindir}/$filename %{buildroot}/%{_bindir}/$filename%{exec_suffix}
|
||||
done
|
||||
|
||||
# Move header files
|
||||
mkdir -p %{buildroot}/%{pkg_includedir}
|
||||
ln -s ../../../%{install_includedir}/llvm %{buildroot}/%{pkg_includedir}/llvm
|
||||
ln -s ../../../%{install_includedir}/llvm-c %{buildroot}/%{pkg_includedir}/llvm-c
|
||||
|
||||
# Fix multi-lib
|
||||
%multilib_fix_c_header --file %{install_includedir}/llvm/Config/llvm-config.h
|
||||
|
||||
# Create ld.so.conf.d entry
|
||||
mkdir -p %{buildroot}/etc/ld.so.conf.d
|
||||
cat >> %{buildroot}/etc/ld.so.conf.d/%{name}-%{_arch}.conf << EOF
|
||||
@ -486,9 +467,6 @@ for f in %{build_install_prefix}/share/man/man1/*; do
|
||||
mv $f %{buildroot}%{_mandir}/man1/$filename%{exec_suffix}.1
|
||||
done
|
||||
|
||||
# Remove opt-viewer, since this is just a compatibility package.
|
||||
rm -Rf %{build_install_prefix}/share/opt-viewer
|
||||
|
||||
%endif
|
||||
|
||||
# llvm-config special casing. llvm-config is managed by update-alternatives.
|
||||
@ -521,7 +499,6 @@ mkdir -p %{buildroot}%{pkg_datadir}/llvm/cmake
|
||||
cp -Rv ../cmake/* %{buildroot}%{pkg_datadir}/llvm/cmake
|
||||
|
||||
%check
|
||||
|
||||
# non reproducible errors
|
||||
rm test/tools/dsymutil/X86/swift-interface.test
|
||||
|
||||
@ -530,65 +507,86 @@ rm test/tools/dsymutil/X86/swift-interface.test
|
||||
LD_LIBRARY_PATH=%{buildroot}/%{install_libdir} %{__ninja} check-all -C %{_vpath_builddir}
|
||||
%endif
|
||||
|
||||
%ldconfig_scriptlets libs
|
||||
%if %{with compat_build}
|
||||
# Packages that install files in /etc/ld.so.conf have to manually run
|
||||
# ldconfig.
|
||||
# See https://bugzilla.redhat.com/show_bug.cgi?id=2001328 and
|
||||
# https://docs.fedoraproject.org/en-US/packaging-guidelines/Scriptlets/#_linker_configuration_files
|
||||
%post -p /sbin/ldconfig libs
|
||||
%postun -p /sbin/ldconfig libs
|
||||
%endif
|
||||
|
||||
%post devel
|
||||
%{_sbindir}/update-alternatives --install %{_bindir}/llvm-config%{exec_suffix} llvm-config%{exec_suffix} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits} %{__isa_bits}
|
||||
/usr/sbin/update-alternatives --install %{_bindir}/llvm-config%{exec_suffix} llvm-config%{exec_suffix} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits} %{__isa_bits}
|
||||
%if %{without compat_build}
|
||||
%{_sbindir}/update-alternatives --install %{_bindir}/llvm-config-%{maj_ver} llvm-config-%{maj_ver} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits} %{__isa_bits}
|
||||
/usr/sbin/update-alternatives --install %{_bindir}/llvm-config-%{maj_ver} llvm-config-%{maj_ver} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits} %{__isa_bits}
|
||||
|
||||
# During the upgrade from LLVM 16 (F38) to LLVM 17 (F39), we found out the
|
||||
# main llvm-devel package was leaving entries in the alternatives system.
|
||||
# Try to remove them now.
|
||||
for v in 14 15 16; do
|
||||
if [[ -e %{_bindir}/llvm-config-$v
|
||||
&& "x$(%{_bindir}/llvm-config-$v --version | awk -F . '{ print $1 }')" != "x$v" ]]; then
|
||||
/usr/sbin/update-alternatives --remove llvm-config-$v %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
fi
|
||||
done
|
||||
%endif
|
||||
|
||||
%postun devel
|
||||
if [ $1 -eq 0 ]; then
|
||||
%{_sbindir}/update-alternatives --remove llvm-config%{exec_suffix} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
%if %{without compat_build}
|
||||
%{_sbindir}/update-alternatives --remove llvm-config-%{maj_ver} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
%endif
|
||||
/usr/sbin/update-alternatives --remove llvm-config%{exec_suffix} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
fi
|
||||
%if %{without compat_build}
|
||||
# When upgrading between minor versions (i.e. from x.y.1 to x.y.2), we must
|
||||
# not remove the alternative.
|
||||
# However, during a major version upgrade (i.e. from 16.x.y to 17.z.w), the
|
||||
# alternative must be removed in order to give priority to a newly installed
|
||||
# compat package.
|
||||
if [[ $1 -eq 0
|
||||
|| "x$(%{_bindir}/llvm-config-%{maj_ver} --version | awk -F . '{ print $1 }')" != "x%{maj_ver}" ]]; then
|
||||
/usr/sbin/update-alternatives --remove llvm-config-%{maj_ver} %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
fi
|
||||
%endif
|
||||
|
||||
%files
|
||||
%license LICENSE.TXT
|
||||
%exclude %{_mandir}/man1/llvm-config*
|
||||
%{_mandir}/man1/*
|
||||
%{_bindir}/*
|
||||
%{install_bindir}/*
|
||||
%if %{with compat_build}
|
||||
# This is for all the binaries with the version suffix.
|
||||
%{_bindir}/*%{exec_suffix}
|
||||
%endif
|
||||
|
||||
%exclude %{_bindir}/llvm-config%{exec_suffix}
|
||||
%exclude %{install_bindir}/llvm-config%{exec_suffix}-%{__isa_bits}
|
||||
|
||||
%if %{without compat_build}
|
||||
%exclude %{_bindir}/llvm-config-%{maj_ver}
|
||||
%exclude %{install_bindir}/llvm-config-%{maj_ver}-%{__isa_bits}
|
||||
%exclude %{_bindir}/not
|
||||
%exclude %{_bindir}/count
|
||||
%exclude %{_bindir}/yaml-bench
|
||||
%exclude %{_bindir}/lli-child-target
|
||||
%exclude %{_bindir}/llvm-isel-fuzzer
|
||||
%exclude %{_bindir}/llvm-opt-fuzzer
|
||||
%{_datadir}/opt-viewer
|
||||
%else
|
||||
%{install_bindir}
|
||||
%endif
|
||||
%exclude %{install_bindir}/not
|
||||
%exclude %{install_bindir}/count
|
||||
%exclude %{install_bindir}/yaml-bench
|
||||
%exclude %{install_bindir}/lli-child-target
|
||||
%exclude %{install_bindir}/llvm-isel-fuzzer
|
||||
%exclude %{install_bindir}/llvm-opt-fuzzer
|
||||
%{pkg_datadir}/opt-viewer
|
||||
|
||||
%files libs
|
||||
%license LICENSE.TXT
|
||||
%{install_libdir}/libLLVM-%{maj_ver}%{?llvm_snapshot_version_suffix:%{llvm_snapshot_version_suffix}}.so
|
||||
%if %{without compat_build}
|
||||
%if %{with gold}
|
||||
%{_libdir}/LLVMgold.so
|
||||
%{install_libdir}/LLVMgold.so
|
||||
%if %{without compat_build}
|
||||
%{_libdir}/bfd-plugins/LLVMgold.so
|
||||
%endif
|
||||
%{_libdir}/libLLVM-%{maj_ver}.%{min_ver}*.so
|
||||
%{_libdir}/libLTO.so*
|
||||
%else
|
||||
%config(noreplace) /etc/ld.so.conf.d/%{name}-%{_arch}.conf
|
||||
%if %{with gold}
|
||||
%{_libdir}/%{name}/lib/LLVMgold.so
|
||||
%endif
|
||||
%{install_libdir}/libLLVM-%{maj_ver}.%{min_ver}*.so
|
||||
%{install_libdir}/libLLVM-%{maj_ver}.so
|
||||
%{install_libdir}/libLLVM.so.%{maj_ver}.%{min_ver}
|
||||
%{install_libdir}/libLTO.so*
|
||||
%exclude %{install_libdir}/libLTO.so
|
||||
%endif
|
||||
%{install_libdir}/libRemarks.so*
|
||||
%if %{with compat_build}
|
||||
%config(noreplace) /etc/ld.so.conf.d/%{name}-%{_arch}.conf
|
||||
%endif
|
||||
|
||||
%files devel
|
||||
%license LICENSE.TXT
|
||||
@ -601,14 +599,8 @@ fi
|
||||
%{install_includedir}/llvm-c
|
||||
%{install_libdir}/libLLVM.so
|
||||
%{install_libdir}/cmake/llvm
|
||||
%if %{without compat_build}
|
||||
%{install_bindir}/llvm-config-%{maj_ver}-%{__isa_bits}
|
||||
%ghost %{_bindir}/llvm-config-%{maj_ver}
|
||||
%else
|
||||
%{pkg_includedir}/llvm
|
||||
%{pkg_includedir}/llvm-c
|
||||
%{install_libdir}/libLTO.so
|
||||
%endif
|
||||
|
||||
%files doc
|
||||
%license LICENSE.TXT
|
||||
@ -617,27 +609,23 @@ fi
|
||||
%files static
|
||||
%license LICENSE.TXT
|
||||
%{install_libdir}/*.a
|
||||
%if %{without compat_build}
|
||||
%exclude %{install_libdir}/libLLVMTestingSupport.a
|
||||
%exclude %{install_libdir}/libLLVMTestingAnnotations.a
|
||||
%exclude %{install_libdir}/libllvm_gtest.a
|
||||
%exclude %{install_libdir}/libllvm_gtest_main.a
|
||||
%endif
|
||||
|
||||
%files cmake-utils
|
||||
%license LICENSE.TXT
|
||||
%{pkg_datadir}/llvm/cmake
|
||||
|
||||
%if %{without compat_build}
|
||||
|
||||
%files test
|
||||
%license LICENSE.TXT
|
||||
%{_bindir}/not
|
||||
%{_bindir}/count
|
||||
%{_bindir}/yaml-bench
|
||||
%{_bindir}/lli-child-target
|
||||
%{_bindir}/llvm-isel-fuzzer
|
||||
%{_bindir}/llvm-opt-fuzzer
|
||||
%{install_bindir}/not
|
||||
%{install_bindir}/count
|
||||
%{install_bindir}/yaml-bench
|
||||
%{install_bindir}/lli-child-target
|
||||
%{install_bindir}/llvm-isel-fuzzer
|
||||
%{install_bindir}/llvm-opt-fuzzer
|
||||
|
||||
%files googletest
|
||||
%license LICENSE.TXT
|
||||
@ -653,9 +641,19 @@ fi
|
||||
%license LICENSE.TXT
|
||||
%endif
|
||||
|
||||
%endif
|
||||
|
||||
%changelog
|
||||
* Fri Oct 18 2024 Tom Stellard <tstellar@redhat.com> - 18.1.8-3
|
||||
- Remove stray fi from postun scriptlet
|
||||
|
||||
* Fri Oct 18 2024 Tulio Magno Quites Machado Filho <tuliom@redhat.com> - 18.1.8-2
|
||||
- Workaround for GFX11.5 export priority
|
||||
|
||||
* Fri Oct 18 2024 Tom Stellard <tstellar@redhat.com> - 18.1.8-1
|
||||
- 18.1.8 Release
|
||||
|
||||
* Fri Oct 18 2024 Tom Stellard <tstellar@redhat.com> - 18.1.2-1
|
||||
- 18.1.2 Release
|
||||
|
||||
* Wed Jul 17 2024 Tom Stellard <tstellar@redhat.com> - 17.0.6-3
|
||||
- Backport fix for RHEL-49522
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user