180 lines
5.3 KiB
Diff
180 lines
5.3 KiB
Diff
diff -up /dev/null libdrm-2.3.0/shared-core/nouveau_drm.h
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--- /dev/null 2007-08-31 14:38:01.267001567 +1000
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+++ libdrm-2.3.0/shared-core/nouveau_drm.h 2007-09-20 08:23:08.000000000 +1000
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@@ -0,0 +1,164 @@
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+/*
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+ * Copyright 2005 Stephane Marchesin.
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+ * All Rights Reserved.
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a
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+ * copy of this software and associated documentation files (the "Software"),
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+ * to deal in the Software without restriction, including without limitation
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+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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+ * and/or sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice (including the next
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+ * paragraph) shall be included in all copies or substantial portions of the
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+ * Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+#ifndef __NOUVEAU_DRM_H__
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+#define __NOUVEAU_DRM_H__
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+
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+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 10
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+
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+struct drm_nouveau_channel_alloc {
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+ uint32_t fb_ctxdma_handle;
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+ uint32_t tt_ctxdma_handle;
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+
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+ int channel;
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+ uint32_t put_base;
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+ /* FIFO control regs */
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+ drm_handle_t ctrl;
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+ int ctrl_size;
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+ /* DMA command buffer */
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+ drm_handle_t cmdbuf;
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+ int cmdbuf_size;
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+ /* Notifier memory */
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+ drm_handle_t notifier;
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+ int notifier_size;
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+};
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+
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+struct drm_nouveau_channel_free {
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+ int channel;
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+};
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+
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+struct drm_nouveau_grobj_alloc {
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+ int channel;
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+ uint32_t handle;
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+ int class;
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+};
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+
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+#define NOUVEAU_MEM_ACCESS_RO 1
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+#define NOUVEAU_MEM_ACCESS_WO 2
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+#define NOUVEAU_MEM_ACCESS_RW 3
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+struct drm_nouveau_notifierobj_alloc {
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+ int channel;
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+ uint32_t handle;
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+ int count;
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+
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+ uint32_t offset;
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+};
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+
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+struct drm_nouveau_gpuobj_free {
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+ int channel;
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+ uint32_t handle;
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+};
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+
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+#define NOUVEAU_MEM_FB 0x00000001
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+#define NOUVEAU_MEM_AGP 0x00000002
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+#define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004
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+#define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008
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+#define NOUVEAU_MEM_PCI 0x00000010
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+#define NOUVEAU_MEM_PCI_ACCEPTABLE 0x00000020
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+#define NOUVEAU_MEM_PINNED 0x00000040
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+#define NOUVEAU_MEM_USER_BACKED 0x00000080
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+#define NOUVEAU_MEM_MAPPED 0x00000100
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+#define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */
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+#define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */
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+
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+struct drm_nouveau_mem_alloc {
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+ int flags;
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+ int alignment;
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+ uint64_t size; // in bytes
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+ uint64_t offset;
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+ drm_handle_t map_handle;
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+};
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+
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+struct drm_nouveau_mem_free {
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+ uint64_t offset;
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+ int flags;
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+};
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+
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+/* FIXME : maybe unify {GET,SET}PARAMs */
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+#define NOUVEAU_GETPARAM_PCI_VENDOR 3
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+#define NOUVEAU_GETPARAM_PCI_DEVICE 4
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+#define NOUVEAU_GETPARAM_BUS_TYPE 5
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+#define NOUVEAU_GETPARAM_FB_PHYSICAL 6
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+#define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
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+#define NOUVEAU_GETPARAM_FB_SIZE 8
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+#define NOUVEAU_GETPARAM_AGP_SIZE 9
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+#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
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+#define NOUVEAU_GETPARAM_CHIPSET_ID 11
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+struct drm_nouveau_getparam {
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+ uint64_t param;
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+ uint64_t value;
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+};
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+
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+#define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
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+#define NOUVEAU_SETPARAM_CMDBUF_SIZE 2
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+struct drm_nouveau_setparam {
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+ uint64_t param;
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+ uint64_t value;
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+};
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+
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+enum nouveau_card_type {
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+ NV_UNKNOWN =0,
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+ NV_04 =4,
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+ NV_05 =5,
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+ NV_10 =10,
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+ NV_11 =11,
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+ NV_15 =11,
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+ NV_17 =17,
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+ NV_20 =20,
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+ NV_25 =20,
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+ NV_30 =30,
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+ NV_34 =30,
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+ NV_40 =40,
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+ NV_44 =44,
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+ NV_50 =50,
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+ NV_LAST =0xffff,
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+};
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+
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+enum nouveau_bus_type {
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+ NV_AGP =0,
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+ NV_PCI =1,
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+ NV_PCIE =2,
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+};
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+
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+#define NOUVEAU_MAX_SAREA_CLIPRECTS 16
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+
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+struct drm_nouveau_sarea {
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+ /* the cliprects */
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+ struct drm_clip_rect boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
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+ unsigned int nbox;
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+};
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+
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+#define DRM_NOUVEAU_CARD_INIT 0x00
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+#define DRM_NOUVEAU_GETPARAM 0x01
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+#define DRM_NOUVEAU_SETPARAM 0x02
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+#define DRM_NOUVEAU_CHANNEL_ALLOC 0x03
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+#define DRM_NOUVEAU_CHANNEL_FREE 0x04
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+#define DRM_NOUVEAU_GROBJ_ALLOC 0x05
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+#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06
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+#define DRM_NOUVEAU_GPUOBJ_FREE 0x07
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+#define DRM_NOUVEAU_MEM_ALLOC 0x08
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+#define DRM_NOUVEAU_MEM_FREE 0x09
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+
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+#endif /* __NOUVEAU_DRM_H__ */
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+
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diff -up libdrm-2.3.0/shared-core/Makefile.am.nouveau libdrm-2.3.0/shared-core/Makefile.am
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--- libdrm-2.3.0/shared-core/Makefile.am.nouveau 2006-11-08 14:03:26.000000000 +1000
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+++ libdrm-2.3.0/shared-core/Makefile.am 2007-07-27 13:09:08.000000000 +1000
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@@ -29,6 +29,7 @@ klibdrminclude_HEADERS = \
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i915_drm.h \
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mach64_drm.h \
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mga_drm.h \
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+ nouveau_drm.h \
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r128_drm.h \
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radeon_drm.h \
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savage_drm.h \
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