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- Update nouveau patch.

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This commit is contained in:
Dave Airlie 2007-09-19 23:56:46 +00:00
parent 1c6ec9a0b5
commit a274c27095
2 changed files with 75 additions and 58 deletions
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5
libdrm.spec
View File

@ -1,7 +1,7 @@
Summary: Direct Rendering Manager runtime library
Name: libdrm
Version: 2.3.0
Release: 6%{?dist}
Release: 7%{?dist}
License: MIT
Group: System Environment/Libraries
URL: http://dri.sourceforge.net
@ -77,6 +77,9 @@ rm -rf $RPM_BUILD_ROOT
%{_libdir}/pkgconfig/libdrm.pc
%changelog
* Thu Sep 20 2007 Dave Airlie <airlied@redhat.com> - 2.3.0-7
- Update nouveau patch.
* Tue Aug 21 2007 Adam Jackson <ajax@redhat.com> - 2.3.0-6
- Rebuild for build id

128
nouveau.patch
View File

@ -1,6 +1,7 @@
--- /dev/null 2007-03-29 16:01:53.376400525 -0400
+++ libdrm-2.3.0/shared-core/nouveau_drm.h 2007-03-29 19:02:49.000000000 -0400
@@ -0,0 +1,152 @@
diff -up /dev/null libdrm-2.3.0/shared-core/nouveau_drm.h
--- /dev/null 2007-08-31 14:38:01.267001567 +1000
+++ libdrm-2.3.0/shared-core/nouveau_drm.h 2007-09-20 08:23:08.000000000 +1000
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2005 Stephane Marchesin.
+ * All Rights Reserved.
@ -28,9 +29,12 @@
+#ifndef __NOUVEAU_DRM_H__
+#define __NOUVEAU_DRM_H__
+
+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 6
+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 10
+
+struct drm_nouveau_channel_alloc {
+ uint32_t fb_ctxdma_handle;
+ uint32_t tt_ctxdma_handle;
+
+typedef struct drm_nouveau_fifo_alloc {
+ int channel;
+ uint32_t put_base;
+ /* FIFO control regs */
@ -39,52 +43,61 @@
+ /* DMA command buffer */
+ drm_handle_t cmdbuf;
+ int cmdbuf_size;
+}
+drm_nouveau_fifo_alloc_t;
+ /* Notifier memory */
+ drm_handle_t notifier;
+ int notifier_size;
+};
+
+typedef struct drm_nouveau_object_init {
+struct drm_nouveau_channel_free {
+ int channel;
+};
+
+struct drm_nouveau_grobj_alloc {
+ int channel;
+ uint32_t handle;
+ int class;
+}
+drm_nouveau_object_init_t;
+};
+
+#define NOUVEAU_MEM_ACCESS_RO 1
+#define NOUVEAU_MEM_ACCESS_WO 2
+#define NOUVEAU_MEM_ACCESS_RW 3
+typedef struct drm_nouveau_dma_object_init {
+struct drm_nouveau_notifierobj_alloc {
+ int channel;
+ uint32_t handle;
+ int class;
+ int access;
+ int target;
+ int count;
+
+ uint32_t offset;
+ int size;
+}
+drm_nouveau_dma_object_init_t;
+};
+
+struct drm_nouveau_gpuobj_free {
+ int channel;
+ uint32_t handle;
+};
+
+#define NOUVEAU_MEM_FB 0x00000001
+#define NOUVEAU_MEM_AGP 0x00000002
+#define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004
+#define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008
+#define NOUVEAU_MEM_PINNED 0x00000010
+#define NOUVEAU_MEM_USER_BACKED 0x00000020
+#define NOUVEAU_MEM_MAPPED 0x00000040
+#define NOUVEAU_MEM_INSTANCE 0x00000080 /* internal */
+#define NOUVEAU_MEM_PCI 0x00000010
+#define NOUVEAU_MEM_PCI_ACCEPTABLE 0x00000020
+#define NOUVEAU_MEM_PINNED 0x00000040
+#define NOUVEAU_MEM_USER_BACKED 0x00000080
+#define NOUVEAU_MEM_MAPPED 0x00000100
+#define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */
+#define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */
+
+typedef struct drm_nouveau_mem_alloc {
+struct drm_nouveau_mem_alloc {
+ int flags;
+ int alignment;
+ uint64_t size; // in bytes
+ uint64_t region_offset;
+}
+drm_nouveau_mem_alloc_t;
+ uint64_t offset;
+ drm_handle_t map_handle;
+};
+
+typedef struct drm_nouveau_mem_free {
+ uint64_t region_offset;
+struct drm_nouveau_mem_free {
+ uint64_t offset;
+ int flags;
+}
+drm_nouveau_mem_free_t;
+};
+
+/* FIXME : maybe unify {GET,SET}PARAMs */
+#define NOUVEAU_GETPARAM_PCI_VENDOR 3
@ -94,30 +107,28 @@
+#define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
+#define NOUVEAU_GETPARAM_FB_SIZE 8
+#define NOUVEAU_GETPARAM_AGP_SIZE 9
+typedef struct drm_nouveau_getparam {
+#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
+#define NOUVEAU_GETPARAM_CHIPSET_ID 11
+struct drm_nouveau_getparam {
+ uint64_t param;
+ uint64_t value;
+}
+drm_nouveau_getparam_t;
+};
+
+#define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
+#define NOUVEAU_SETPARAM_CMDBUF_SIZE 2
+typedef struct drm_nouveau_setparam {
+struct drm_nouveau_setparam {
+ uint64_t param;
+ uint64_t value;
+}
+drm_nouveau_setparam_t;
+};
+
+enum nouveau_card_type {
+ NV_UNKNOWN =0,
+ NV_01 =1,
+ NV_03 =3,
+ NV_04 =4,
+ NV_05 =5,
+ NV_10 =10,
+ NV_11 =10,
+ NV_15 =10,
+ NV_17 =10,
+ NV_11 =11,
+ NV_15 =11,
+ NV_17 =17,
+ NV_20 =20,
+ NV_25 =20,
+ NV_30 =30,
@ -136,30 +147,33 @@
+
+#define NOUVEAU_MAX_SAREA_CLIPRECTS 16
+
+typedef struct drm_nouveau_sarea {
+struct drm_nouveau_sarea {
+ /* the cliprects */
+ drm_clip_rect_t boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
+ struct drm_clip_rect boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
+ unsigned int nbox;
+}
+drm_nouveau_sarea_t;
+};
+
+#define DRM_NOUVEAU_FIFO_ALLOC 0x00
+#define DRM_NOUVEAU_OBJECT_INIT 0x01
+#define DRM_NOUVEAU_DMA_OBJECT_INIT 0x02
+#define DRM_NOUVEAU_MEM_ALLOC 0x03
+#define DRM_NOUVEAU_MEM_FREE 0x04
+#define DRM_NOUVEAU_GETPARAM 0x05
+#define DRM_NOUVEAU_SETPARAM 0x06
+#define DRM_NOUVEAU_CARD_INIT 0x00
+#define DRM_NOUVEAU_GETPARAM 0x01
+#define DRM_NOUVEAU_SETPARAM 0x02
+#define DRM_NOUVEAU_CHANNEL_ALLOC 0x03
+#define DRM_NOUVEAU_CHANNEL_FREE 0x04
+#define DRM_NOUVEAU_GROBJ_ALLOC 0x05
+#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x06
+#define DRM_NOUVEAU_GPUOBJ_FREE 0x07
+#define DRM_NOUVEAU_MEM_ALLOC 0x08
+#define DRM_NOUVEAU_MEM_FREE 0x09
+
+#endif /* __NOUVEAU_DRM_H__ */
+
--- libdrm-2.3.0/shared-core/Makefile.am.nouveau 2006-11-07 23:03:26.000000000 -0500
+++ libdrm-2.3.0/shared-core/Makefile.am 2007-03-29 19:00:35.000000000 -0400
@@ -27,6 +27,7 @@
drm.h \
drm_sarea.h \
diff -up libdrm-2.3.0/shared-core/Makefile.am.nouveau libdrm-2.3.0/shared-core/Makefile.am
--- libdrm-2.3.0/shared-core/Makefile.am.nouveau 2006-11-08 14:03:26.000000000 +1000
+++ libdrm-2.3.0/shared-core/Makefile.am 2007-07-27 13:09:08.000000000 +1000
@@ -29,6 +29,7 @@ klibdrminclude_HEADERS = \
i915_drm.h \
+ nouveau_drm.h \
mach64_drm.h \
mga_drm.h \
+ nouveau_drm.h \
r128_drm.h \
radeon_drm.h \
savage_drm.h \