fdc2316c60
Use AlmaLinux OS secure boot cert
Enable Btrfs support for all kernel variants
KVM: x86: check for invalid/obsolete root after making MMU pages available {CVE-2026-64561}
hpsa: bring back deprecated PCI ids #CFHack #CFHack2024
mptsas: bring back deprecated PCI ids #CFHack #CFHack2024
megaraid_sas: bring back deprecated PCI ids #CFHack #CFHack2024
qla2xxx: bring back deprecated PCI ids #CFHack #CFHack2024
qla4xxx: bring back deprecated PCI ids
be2iscsi: bring back deprecated PCI ids
kernel/rh_messages.h: enable all disabled pci devices by moving to unmaintained
gve: update QPL page registration logic to honor max_registered_pages (backport from upstream)
gve: enable reading max ring size from the device in DQO-QPL mode (backport from upstream)
85 lines
3.2 KiB
Diff
85 lines
3.2 KiB
Diff
From 07f57ff127cd39789c0c0ad8f964e84de6b8065f Mon Sep 17 00:00:00 2001
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From: Michal Schmidt <mschmidt@redhat.com>
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Date: Mon, 22 Jun 2026 17:14:03 +0200
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Subject: [PATCH] dpll: add generic DPLL type
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JIRA: https://redhat.atlassian.net/browse/RHEL-186631
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commit 9375487c0c78817b3651e2621d648c6198757c41
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Author: Grzegorz Nitka <grzegorz.nitka@intel.com>
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Date: Sun Jun 7 20:30:33 2026 +0200
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dpll: add generic DPLL type
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Add DPLL_TYPE_GENERIC to represent DPLL devices which do not fit the
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existing PPS or EEC classes.
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The UAPI type is intentionally generic. During netdev discussion,
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maintainers pointed out that introducing identifiers tied to a specific
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placement or single design does not scale across ASICs and vendors.
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The role of a DPLL is already inferable from the spawning driver,
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bus device, and pin topology, without encoding additional
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purpose-specific taxonomy in the type name.
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Using a generic type keeps the UAPI extensible and avoids premature
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naming that may become incorrect as new hardware topologies are
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exposed through the DPLL subsystem.
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Expose the new type through UAPI and netlink specification as "generic".
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Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
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Reviewed-by: Jiri Pirko <jiri@nvidia.com>
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Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
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Link: https://patch.msgid.link/20260607183045.1213735-2-grzegorz.nitka@intel.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Signed-off-by: Michal Schmidt <mschmidt@redhat.com>
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diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml
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index 4ba8adc..9c5f985 100644
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--- a/Documentation/netlink/specs/dpll.yaml
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+++ b/Documentation/netlink/specs/dpll.yaml
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@@ -138,6 +138,9 @@ definitions:
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-
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name: eec
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doc: dpll drives the Ethernet Equipment Clock
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+ -
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+ name: generic
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+ doc: generic dpll type for devices outside PPS/EEC classes
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render-max: true
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-
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type: enum
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diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c
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index 268999d..ad63db3 100644
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--- a/drivers/dpll/dpll_nl.c
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+++ b/drivers/dpll/dpll_nl.c
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@@ -36,7 +36,7 @@ const struct nla_policy dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {
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static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {
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[DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },
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[DPLL_A_CLOCK_ID] = { .type = NLA_U64, },
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- [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
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+ [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
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};
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/* DPLL_CMD_DEVICE_GET - do */
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diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h
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index aa45b79..7cc709c 100644
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--- a/include/uapi/linux/dpll.h
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+++ b/include/uapi/linux/dpll.h
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@@ -108,11 +108,14 @@ enum dpll_clock_quality_level {
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* enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute
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* @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal
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* @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock
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+ * @DPLL_TYPE_GENERIC: generic dpll type for devices outside PPS/EEC classes
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*/
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enum dpll_type {
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DPLL_TYPE_PPS = 1,
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DPLL_TYPE_EEC,
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-
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+#ifndef __GENKSYMS__
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+ DPLL_TYPE_GENERIC,
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+#endif
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/* private: */
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__DPLL_TYPE_MAX,
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DPLL_TYPE_MAX = (__DPLL_TYPE_MAX - 1)
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