125 lines
5.9 KiB
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125 lines
5.9 KiB
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From patchwork Wed Feb 26 16:46:00 2020
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Wed, 26 Feb 2020 16:46:05 +0000 (UTC)
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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To: Rob Herring <robh+dt@kernel.org>,
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Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
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Florian Fainelli <f.fainelli@gmail.com>
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Subject: [PATCH] ARM: dts: bcm2711: Add pcie0 alias
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Date: Wed, 26 Feb 2020 17:46:00 +0100
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Cc: devicetree@vger.kernel.org, phil@raspberrypi.org,
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Some bcm2711 revisions have different DMA constraints on the their PCIE
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bus. The lower common denominator, being able to access the lower 3GB of
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memory, is the default setting for now. Newer SoC revisions are able to
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access the whole memory space.
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Raspberry Pi 4's firmware is aware of this limitation and will correct
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the PCIE's dma-ranges property if a pcie0 alias is available. So add
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it.
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Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Reviewed-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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index cb3385262705..479f6828d73f 100644
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--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
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@@ -21,6 +21,7 @@ memory@0 {
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aliases {
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ethernet0 = &genet;
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+ pcie0 = &pcie0;
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};
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leds {
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