71 lines
3.2 KiB
Diff
71 lines
3.2 KiB
Diff
From f43194c1447c9536efb0859c2f3f46f6bf2b9154 Mon Sep 17 00:00:00 2001
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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
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Date: Wed, 25 Apr 2018 20:19:47 +0200
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Subject: ARM64: dts: marvell: armada-cp110: Add mg_core_clk for ethernet node
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Marvell PPv2.2 controller present on CP-110 need the extra "mg_core_clk"
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clock to avoid system hangs when powering some network interfaces up.
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This issue appeared after a recent clock rework on Armada 7K/8K platforms.
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This commit adds the new clock and updates the documentation accordingly.
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[gregory.clement: use the real first commit to fix and add the cc:stable
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flag]
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Fixes: e3af9f7c6ece ("RM64: dts: marvell: armada-cp110: Fix clock resources for various node")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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---
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Documentation/devicetree/bindings/net/marvell-pp2.txt | 9 +++++----
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arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 5 +++--
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2 files changed, 8 insertions(+), 6 deletions(-)
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diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt
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index 1814fa1..fc019df 100644
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--- a/Documentation/devicetree/bindings/net/marvell-pp2.txt
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+++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt
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@@ -21,9 +21,10 @@ Required properties:
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- main controller clock (for both armada-375-pp2 and armada-7k-pp2)
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- GOP clock (for both armada-375-pp2 and armada-7k-pp2)
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- MG clock (only for armada-7k-pp2)
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+ - MG Core clock (only for armada-7k-pp2)
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- AXI clock (only for armada-7k-pp2)
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-- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk"
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- and "axi_clk" (the 2 latter only for armada-7k-pp2).
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+- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
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+ "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
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The ethernet ports are represented by subnodes. At least one port is
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required.
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@@ -80,8 +81,8 @@ cpm_ethernet: ethernet@0 {
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compatible = "marvell,armada-7k-pp22";
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reg = <0x0 0x100000>, <0x129000 0xb000>;
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clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
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- <&cpm_syscon0 1 5>, <&cpm_syscon0 1 18>;
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- clock-names = "pp_clk", "gop_clk", "gp_clk", "axi_clk";
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+ <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
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+ clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
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eth0: eth0 {
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interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
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diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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index ca22f9d..ed2f123 100644
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--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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@@ -38,9 +38,10 @@
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compatible = "marvell,armada-7k-pp22";
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reg = <0x0 0x100000>, <0x129000 0xb000>;
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clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>,
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- <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 18>;
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+ <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>,
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+ <&CP110_LABEL(clk) 1 18>;
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clock-names = "pp_clk", "gop_clk",
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- "mg_clk", "axi_clk";
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+ "mg_clk", "mg_core_clk", "axi_clk";
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marvell,system-controller = <&CP110_LABEL(syscon0)>;
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status = "disabled";
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dma-coherent;
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--
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cgit v1.1
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