149 lines
4.6 KiB
Diff
149 lines
4.6 KiB
Diff
From e167d6613aef8356261f97e2b50489142f8e1406 Mon Sep 17 00:00:00 2001
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From: Alexey Kardashevskiy <aik@amd.com>
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Date: Fri, 20 Jan 2023 14:10:45 +1100
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Subject: [PATCH 16/36] x86/amd: Cache debug register values in percpu
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variables
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Reading DR[0-3]_ADDR_MASK MSRs takes about 250 cycles which is going to
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be noticeable with the AMD KVM SEV-ES DebugSwap feature enabled. KVM is
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going to store host's DR[0-3] and DR[0-3]_ADDR_MASK before switching to
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a guest; the hardware is going to swap these on VMRUN and VMEXIT.
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Store MSR values passed to set_dr_addr_mask() in percpu variables
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(when changed) and return them via new amd_get_dr_addr_mask().
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The gain here is about 10x.
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As set_dr_addr_mask() uses the array too, change the @dr type to
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unsigned to avoid checking for <0. And give it the amd_ prefix to match
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the new helper as the whole DR_ADDR_MASK feature is AMD-specific anyway.
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While at it, replace deprecated boot_cpu_has() with cpu_feature_enabled()
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in set_dr_addr_mask().
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Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
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Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
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Link: https://lore.kernel.org/r/20230120031047.628097-2-aik@amd.com
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(cherry picked from commit 7914695743d598b189d549f2f57af24aa5633705)
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The conflict is due to patch 84b6a34 which is not present
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in this repo. This is an optimization/not a bug fix. Hence
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not porting it.
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CVE: CVE-2023-20593
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Signed-off-by: Mridula Shastry <mridula.c.shastry@oracle.com>
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Reviewed-by: Todd Vierling <todd.vierling@oracle.com>
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---
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arch/x86/include/asm/debugreg.h | 9 +++++--
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arch/x86/kernel/cpu/amd.c | 47 +++++++++++++++++++++++----------
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arch/x86/kernel/hw_breakpoint.c | 4 +--
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3 files changed, 42 insertions(+), 18 deletions(-)
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diff --git a/arch/x86/include/asm/debugreg.h b/arch/x86/include/asm/debugreg.h
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index 1c964123f2dd..ccf6639c8df9 100644
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--- a/arch/x86/include/asm/debugreg.h
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+++ b/arch/x86/include/asm/debugreg.h
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@@ -144,9 +144,14 @@ static __always_inline void local_db_restore(unsigned long dr7)
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}
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#ifdef CONFIG_CPU_SUP_AMD
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-extern void set_dr_addr_mask(unsigned long mask, int dr);
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+extern void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr);
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+extern unsigned long amd_get_dr_addr_mask(unsigned int dr);
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#else
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-static inline void set_dr_addr_mask(unsigned long mask, int dr) { }
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+static inline void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr) { }
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+static inline unsigned long amd_get_dr_addr_mask(unsigned int dr)
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+{
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+ return 0;
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+}
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#endif
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#endif /* _ASM_X86_DEBUGREG_H */
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diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
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index efa49b3f87b9..6eb7923f5f08 100644
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -1146,24 +1146,43 @@ static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
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return false;
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}
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-void set_dr_addr_mask(unsigned long mask, int dr)
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+static DEFINE_PER_CPU_READ_MOSTLY(unsigned long[4], amd_dr_addr_mask);
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+
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+static unsigned int amd_msr_dr_addr_masks[] = {
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+ MSR_F16H_DR0_ADDR_MASK,
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+ MSR_F16H_DR1_ADDR_MASK,
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+ MSR_F16H_DR1_ADDR_MASK + 1,
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+ MSR_F16H_DR1_ADDR_MASK + 2
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+};
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+
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+void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr)
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{
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- if (!boot_cpu_has(X86_FEATURE_BPEXT))
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+ int cpu = smp_processor_id();
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+
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+ if (!cpu_feature_enabled(X86_FEATURE_BPEXT))
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return;
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- switch (dr) {
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- case 0:
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- wrmsr(MSR_F16H_DR0_ADDR_MASK, mask, 0);
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- break;
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- case 1:
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- case 2:
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- case 3:
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- wrmsr(MSR_F16H_DR1_ADDR_MASK - 1 + dr, mask, 0);
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- break;
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- default:
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- break;
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- }
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+ if (WARN_ON_ONCE(dr >= ARRAY_SIZE(amd_msr_dr_addr_masks)))
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+ return;
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+
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+ if (per_cpu(amd_dr_addr_mask, cpu)[dr] == mask)
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+ return;
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+
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+ wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);
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+ per_cpu(amd_dr_addr_mask, cpu)[dr] = mask;
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+}
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+
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+unsigned long amd_get_dr_addr_mask(unsigned int dr)
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+{
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+ if (!cpu_feature_enabled(X86_FEATURE_BPEXT))
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+ return 0;
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+
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+ if (WARN_ON_ONCE(dr >= ARRAY_SIZE(amd_msr_dr_addr_masks)))
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+ return 0;
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+
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+ return per_cpu(amd_dr_addr_mask[dr], smp_processor_id());
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}
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+EXPORT_SYMBOL_GPL(amd_get_dr_addr_mask);
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u32 amd_get_highest_perf(void)
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{
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diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
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index 3871950432d6..d38d4648512d 100644
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--- a/arch/x86/kernel/hw_breakpoint.c
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+++ b/arch/x86/kernel/hw_breakpoint.c
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@@ -129,7 +129,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
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set_debugreg(*dr7, 7);
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if (info->mask)
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- set_dr_addr_mask(info->mask, i);
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+ amd_set_dr_addr_mask(info->mask, i);
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return 0;
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}
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@@ -166,7 +166,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp)
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set_debugreg(*dr7, 7);
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if (info->mask)
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- set_dr_addr_mask(0, i);
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+ amd_set_dr_addr_mask(0, i);
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}
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static int arch_bp_generic_len(int x86_len)
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--
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2.39.3
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