397 lines
12 KiB
Diff
397 lines
12 KiB
Diff
From patchwork Wed Jan 29 13:28:17 2020
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id <B5e3188740004>; Wed, 29 Jan 2020 05:28:21 -0800
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From: Jon Hunter <jonathanh@nvidia.com>
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To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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Jiri Slaby <jslaby@suse.com>, Thierry Reding <thierry.reding@gmail.com>
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CC: <linux-serial@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
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<linux-tegra@vger.kernel.org>, Jeff Brasen <jbrasen@nvidia.com>,
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Jon Hunter <jonathanh@nvidia.com>
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Subject: [PATCH V3] serial: 8250_tegra: Create Tegra specific 8250 driver
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Date: Wed, 29 Jan 2020 13:28:17 +0000
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Message-ID: <20200129132817.26343-1-jonathanh@nvidia.com>
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Sender: linux-tegra-owner@vger.kernel.org
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List-ID: <linux-tegra.vger.kernel.org>
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X-Mailing-List: linux-tegra@vger.kernel.org
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From: Jeff Brasen <jbrasen@nvidia.com>
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To support booting NVIDIA Tegra platforms with either Device-Tree or
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ACPI, create a Tegra specific 8250 serial driver that supports both
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firmware types. Another benefit from doing this, is that the Tegra
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specific codec in the generic Open Firmware 8250 driver can now be
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removed.
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Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
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Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
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---
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Changes since V2:
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- Added missing header for devm_ioremap (reported by kbuild test robot)
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Changes since V1:
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- Added support for COMPILE_TEST
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drivers/tty/serial/8250/8250_of.c | 28 ----
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drivers/tty/serial/8250/8250_tegra.c | 198 +++++++++++++++++++++++++++
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drivers/tty/serial/8250/Kconfig | 9 ++
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drivers/tty/serial/8250/Makefile | 1 +
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4 files changed, 208 insertions(+), 28 deletions(-)
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create mode 100644 drivers/tty/serial/8250/8250_tegra.c
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diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
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index 531ad67395e0..5e45cf8dbc6e 100644
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--- a/drivers/tty/serial/8250/8250_of.c
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+++ b/drivers/tty/serial/8250/8250_of.c
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@@ -7,7 +7,6 @@
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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-#include <linux/delay.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/of_address.h>
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@@ -26,28 +25,6 @@ struct of_serial_info {
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int line;
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};
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-#ifdef CONFIG_ARCH_TEGRA
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-static void tegra_serial_handle_break(struct uart_port *p)
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-{
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- unsigned int status, tmout = 10000;
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-
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- do {
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- status = p->serial_in(p, UART_LSR);
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- if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
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- status = p->serial_in(p, UART_RX);
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- else
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- break;
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- if (--tmout == 0)
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- break;
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- udelay(1);
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- } while (1);
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-}
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-#else
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-static inline void tegra_serial_handle_break(struct uart_port *port)
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-{
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-}
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-#endif
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-
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static int of_8250_rs485_config(struct uart_port *port,
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struct serial_rs485 *rs485)
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{
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@@ -211,10 +188,6 @@ static int of_platform_serial_setup(struct platform_device *ofdev,
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port->rs485_config = of_8250_rs485_config;
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switch (type) {
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- case PORT_TEGRA:
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- port->handle_break = tegra_serial_handle_break;
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- break;
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-
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case PORT_RT2880:
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port->iotype = UPIO_AU;
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break;
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@@ -359,7 +332,6 @@ static const struct of_device_id of_platform_serial_table[] = {
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{ .compatible = "ns16550", .data = (void *)PORT_16550, },
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{ .compatible = "ns16750", .data = (void *)PORT_16750, },
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{ .compatible = "ns16850", .data = (void *)PORT_16850, },
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- { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
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{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
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{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
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{ .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
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diff --git a/drivers/tty/serial/8250/8250_tegra.c b/drivers/tty/serial/8250/8250_tegra.c
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new file mode 100644
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index 000000000000..c0ffad1572c6
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--- /dev/null
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+++ b/drivers/tty/serial/8250/8250_tegra.c
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@@ -0,0 +1,198 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Serial Port driver for Tegra devices
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+ *
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+ * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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+ */
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+
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+#include <linux/acpi.h>
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+#include <linux/clk.h>
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+#include <linux/console.h>
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+#include <linux/delay.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/reset.h>
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+#include <linux/slab.h>
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+
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+#include "8250.h"
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+
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+struct tegra_uart {
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+ struct clk *clk;
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+ struct reset_control *rst;
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+ int line;
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+};
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+
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+static void tegra_uart_handle_break(struct uart_port *p)
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+{
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+ unsigned int status, tmout = 10000;
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+
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+ do {
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+ status = p->serial_in(p, UART_LSR);
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+ if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
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+ status = p->serial_in(p, UART_RX);
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+ else
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+ break;
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+ if (--tmout == 0)
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+ break;
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+ udelay(1);
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+ } while (1);
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+}
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+
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+static int tegra_uart_probe(struct platform_device *pdev)
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+{
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+ struct uart_8250_port port8250;
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+ struct tegra_uart *uart;
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+ struct uart_port *port;
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+ struct resource *res;
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+ int ret;
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+
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+ uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
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+ if (!uart)
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+ return -ENOMEM;
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+
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+ memset(&port8250, 0, sizeof(port8250));
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+
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+ port = &port8250.port;
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+ spin_lock_init(&port->lock);
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+
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+ port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
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+ UPF_FIXED_TYPE;
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+ port->iotype = UPIO_MEM32;
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+ port->regshift = 2;
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+ port->type = PORT_TEGRA;
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+ port->irqflags |= IRQF_SHARED;
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+ port->dev = &pdev->dev;
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+ port->handle_break = tegra_uart_handle_break;
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+
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+ ret = of_alias_get_id(pdev->dev.of_node, "serial");
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+ if (ret >= 0)
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+ port->line = ret;
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+
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+ ret = platform_get_irq(pdev, 0);
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+ if (ret < 0)
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+ return ret;
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+
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+ port->irq = ret;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res)
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+ return -ENODEV;
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+
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+ port->membase = devm_ioremap(&pdev->dev, res->start,
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+ resource_size(res));
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+ if (!port->membase)
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+ return -ENOMEM;
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+
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+ port->mapbase = res->start;
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+ port->mapsize = resource_size(res);
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+
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+ uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
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+ if (IS_ERR(uart->rst))
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+ return PTR_ERR(uart->rst);
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+
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+ if (device_property_read_u32(&pdev->dev, "clock-frequency",
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+ &port->uartclk)) {
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+ uart->clk = devm_clk_get(&pdev->dev, NULL);
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+ if (IS_ERR(uart->clk)) {
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+ dev_err(&pdev->dev, "failed to get clock!\n");
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+ return -ENODEV;
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+ }
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+
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+ ret = clk_prepare_enable(uart->clk);
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+ if (ret < 0)
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+ return ret;
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+
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+ port->uartclk = clk_get_rate(uart->clk);
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+ }
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+
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+ ret = reset_control_deassert(uart->rst);
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+ if (ret)
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+ goto err_clkdisable;
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+
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+ ret = serial8250_register_8250_port(&port8250);
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+ if (ret < 0)
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+ goto err_clkdisable;
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+
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+ platform_set_drvdata(pdev, uart);
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+ uart->line = ret;
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+
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+ return 0;
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+
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+err_clkdisable:
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+ clk_disable_unprepare(uart->clk);
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+
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+ return ret;
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+}
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+
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+static int tegra_uart_remove(struct platform_device *pdev)
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+{
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+ struct tegra_uart *uart = platform_get_drvdata(pdev);
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+
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+ serial8250_unregister_port(uart->line);
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+ reset_control_assert(uart->rst);
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+ clk_disable_unprepare(uart->clk);
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+
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+ return 0;
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+}
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+
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+#ifdef CONFIG_PM_SLEEP
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+static int tegra_uart_suspend(struct device *dev)
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+{
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+ struct tegra_uart *uart = dev_get_drvdata(dev);
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+ struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
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+ struct uart_port *port = &port8250->port;
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+
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+ serial8250_suspend_port(uart->line);
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+
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+ if (!uart_console(port) || console_suspend_enabled)
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+ clk_disable_unprepare(uart->clk);
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+
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+ return 0;
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+}
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+
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+static int tegra_uart_resume(struct device *dev)
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+{
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+ struct tegra_uart *uart = dev_get_drvdata(dev);
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+ struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
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+ struct uart_port *port = &port8250->port;
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+
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+ if (!uart_console(port) || console_suspend_enabled)
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+ clk_prepare_enable(uart->clk);
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+
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+ serial8250_resume_port(uart->line);
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+
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+ return 0;
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+}
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+#endif
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+
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+static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend,
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+ tegra_uart_resume);
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+
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+static const struct of_device_id tegra_uart_of_match[] = {
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+ { .compatible = "nvidia,tegra20-uart", },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(of, tegra_uart_of_match);
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+
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+static const struct acpi_device_id tegra_uart_acpi_match[] = {
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+ { "NVDA0100", 0 },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match);
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+
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+static struct platform_driver tegra_uart_driver = {
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+ .driver = {
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+ .name = "tegra-uart",
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+ .pm = &tegra_uart_pm_ops,
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+ .of_match_table = tegra_uart_of_match,
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+ .acpi_match_table = ACPI_PTR(tegra_uart_acpi_match),
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+ },
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+ .probe = tegra_uart_probe,
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+ .remove = tegra_uart_remove,
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+};
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+
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+module_platform_driver(tegra_uart_driver);
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+
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+MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
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+MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
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+MODULE_LICENSE("GPL v2");
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diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
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index f16824bbb573..af0688156dd0 100644
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--- a/drivers/tty/serial/8250/Kconfig
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+++ b/drivers/tty/serial/8250/Kconfig
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@@ -500,6 +500,15 @@ config SERIAL_8250_PXA
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applicable to both devicetree and legacy boards, and early console is
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part of its support.
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+config SERIAL_8250_TEGRA
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+ tristate "8250 support for Tegra serial ports"
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+ default SERIAL_8250
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+ depends on SERIAL_8250
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+ depends on ARCH_TEGRA || COMPILE_TEST
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+ help
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+ Select this option if you have machine with an NVIDIA Tegra SoC and
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+ wish to enable 8250 serial driver for the Tegra serial interfaces.
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+
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config SERIAL_OF_PLATFORM
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tristate "Devicetree based probing for 8250 ports"
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depends on SERIAL_8250 && OF
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diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
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index 51a6079d3f1f..a8bfb654d490 100644
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--- a/drivers/tty/serial/8250/Makefile
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+++ b/drivers/tty/serial/8250/Makefile
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@@ -37,6 +37,7 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o
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obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
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obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
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obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o
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+obj-$(CONFIG_SERIAL_8250_TEGRA) += 8250_tegra.o
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obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o
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CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt
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