54 lines
1.8 KiB
Diff
54 lines
1.8 KiB
Diff
From 2ad01780bf59b3a785975bf48a066645e5b6f7f5 Mon Sep 17 00:00:00 2001
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From: Matt Roper <matthew.d.roper@intel.com>
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Date: Thu, 12 May 2016 07:06:10 -0700
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Subject: [PATCH 16/17] drm/i915/gen9: Reject display updates that exceed wm
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limitations (v2)
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If we can't find any valid level 0 watermark values for the requested
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atomic transaction, reject the configuration before we try to start
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programming the hardware.
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v2:
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- Add extra debugging output when we reject level 0 watermarks so that
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we can more easily debug how/why they were rejected.
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Cc: Lyude Paul <cpaul@redhat.com>
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Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com
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---
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drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++-
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1 file changed, 16 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
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index b072417..f764d28 100644
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--- a/drivers/gpu/drm/i915/intel_pm.c
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+++ b/drivers/gpu/drm/i915/intel_pm.c
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@@ -3306,7 +3306,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
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if (res_blocks >= ddb_allocation || res_lines > 31) {
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*enabled = false;
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- return 0;
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+
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+ /*
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+ * If there are no valid level 0 watermarks, then we can't
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+ * support this display configuration.
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+ */
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+ if (level) {
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+ return 0;
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+ } else {
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+ DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n");
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+ DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n",
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+ to_intel_crtc(cstate->base.crtc)->pipe,
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+ skl_wm_plane_id(to_intel_plane(pstate->plane)),
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+ res_blocks, ddb_allocation, res_lines);
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+
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+ return -EINVAL;
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+ }
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}
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*out_blocks = res_blocks;
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--
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2.7.4
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