71 lines
2.4 KiB
Diff
71 lines
2.4 KiB
Diff
Fix a bug that causes CPU hangs due to missing timer interrupts,
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introduced by these three patches:
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(1) commit d78d671db478eb8b14c78501c0cee1cc7baf6967
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"x86, cpu: AMD errata checking framework"
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(2) commit 9d8888c2a214aece2494a49e699a097c2ba9498b
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"x86, cpu: Clean up AMD erratum 400 workaround"
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(3) commit b87cf80af3ba4b4c008b4face3c68d604e1715c6
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"x86, AMD: Set ARAT feature on AMD processors"
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Patch (1) introduced a new framework that allowed checking for errata
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using AMD's OSVW (OS visible workaround) feature combined with
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explicit lists of models. It checked OSVW first, and completely
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relied on that if it was present and usable.
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Patch (2) switched the checking for erratum 400 to use the new
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framework. But the original code checked for an explicit model range
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first, then used OSVW if the CPU was not within that range. Patch (2)
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also inexplicably added a second model range (for Family 10h) that
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was never in the original code.
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Then patch (3) used the new erratum 400 checks to decide whether
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to enable the ARAT feature (always running APIC timer.) However,
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this causes notebooks using the Sempron processor (Family 10h
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Model 6 Stepping 2) to enable ARAT when they shouldn't because the
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explicit check for that model gets skipped.
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The fix is to check the model list first, then use OSVW if the CPU
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is not in that list.
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Signed-off-by: Chuck Ebbert <cebbert@redhat.com>
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -723,6 +723,17 @@ bool cpu_has_amd_erratum(const int *erra
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if (cpu->x86_vendor != X86_VENDOR_AMD)
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return false;
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+ /*
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+ * Must match family-model-stepping range first so that the
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+ * range checks will override OSVW checking.
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+ */
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+ ms = (cpu->x86_model << 4) | cpu->x86_mask;
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+ while ((range = *erratum++))
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+ if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
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+ (ms >= AMD_MODEL_RANGE_START(range)) &&
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+ (ms <= AMD_MODEL_RANGE_END(range)))
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+ return true;
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+
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if (osvw_id >= 0 && osvw_id < 65536 &&
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cpu_has(cpu, X86_FEATURE_OSVW)) {
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u64 osvw_len;
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@@ -737,15 +748,6 @@ bool cpu_has_amd_erratum(const int *erra
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}
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}
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- /* OSVW unavailable or ID unknown, match family-model-stepping range */
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- ms = (cpu->x86_model << 4) | cpu->x86_mask;
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- while ((range = *erratum++))
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- if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
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- (ms >= AMD_MODEL_RANGE_START(range)) &&
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- (ms <= AMD_MODEL_RANGE_END(range)))
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- return true;
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-
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return false;
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}
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-
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EXPORT_SYMBOL_GPL(cpu_has_amd_erratum);
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