Linux v4.15-rc3-86-g032b4cc8ff84
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From 91990a4f966e1862f9747072c4f46946169e2d8b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
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Date: Tue, 21 Nov 2017 11:20:00 +0100
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Subject: [PATCH 1/3] x86/PCI: fix infinity loop in search for 64bit BAR
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placement
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Break the loop if we can't find some address space for a 64bit BAR.
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Signed-off-by: Christian König <christian.koenig@amd.com>
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---
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arch/x86/pci/fixup.c | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
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index e59378bf37d9..e857b3ac5755 100644
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--- a/arch/x86/pci/fixup.c
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+++ b/arch/x86/pci/fixup.c
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@@ -695,8 +695,13 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
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res->end = 0xfd00000000ull - 1;
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/* Just grab the free area behind system memory for this */
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- while ((conflict = request_resource_conflict(&iomem_resource, res)))
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+ while ((conflict = request_resource_conflict(&iomem_resource, res))) {
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+ if (conflict->end >= res->end) {
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+ kfree(res);
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+ return;
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+ }
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res->start = conflict->end + 1;
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+ }
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dev_info(&dev->dev, "adding root bus resource %pR\n", res);
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--
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2.11.0
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@ -1,58 +0,0 @@
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From 21ae889eaa7330b57f17cc86b6d0239300eb3f95 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
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Date: Tue, 21 Nov 2017 11:08:33 +0100
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Subject: [PATCH 2/3] x86/PCI: only enable a 64bit BAR on single socket AMD
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Family 15h systems
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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When we have a multi socket system each CPU core needs the same setup. Since
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this is tricky to do in the fixup code disable enabling a 64bit BAR on multi
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socket systems for now.
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Signed-off-by: Christian König <christian.koenig@amd.com>
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---
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arch/x86/pci/fixup.c | 20 +++++++++++++++-----
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1 file changed, 15 insertions(+), 5 deletions(-)
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diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
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index e857b3ac5755..c817ab85dc82 100644
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--- a/arch/x86/pci/fixup.c
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+++ b/arch/x86/pci/fixup.c
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@@ -664,6 +664,16 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
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unsigned i;
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u32 base, limit, high;
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struct resource *res, *conflict;
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+ struct pci_dev *other;
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+
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+ /* Check that we are the only device of that type */
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+ other = pci_get_device(dev->vendor, dev->device, NULL);
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+ if (other != dev ||
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+ (other = pci_get_device(dev->vendor, dev->device, other))) {
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+ /* This is a multi socket system, don't touch it for now */
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+ pci_dev_put(other);
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+ return;
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+ }
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for (i = 0; i < 8; i++) {
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pci_read_config_dword(dev, AMD_141b_MMIO_BASE(i), &base);
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@@ -718,10 +728,10 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
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pci_bus_add_resource(dev->bus, res, 0);
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}
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-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar);
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-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar);
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-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar);
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-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar);
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-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar);
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1401, pci_amd_enable_64bit_bar);
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar);
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1571, pci_amd_enable_64bit_bar);
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15b1, pci_amd_enable_64bit_bar);
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar);
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#endif
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--
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2.11.0
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2
gitrev
2
gitrev
@ -1 +1 @@
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7c5cac1bc7170bfc726a69eb64947c55658d16ad
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032b4cc8ff84490c4bc7c4ef8c91e6d83a637538
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@ -69,7 +69,7 @@ Summary: The Linux kernel
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# The rc snapshot level
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%global rcrev 3
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# The git snapshot level
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%define gitrev 3
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%define gitrev 4
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# Set rpm version accordingly
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%define rpmversion 4.%{upstream_sublevel}.0
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%endif
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@ -637,8 +637,6 @@ Patch631: 0002-HID-multitouch-Only-look-at-non-touch-fields-in-firs.patch
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Patch632: 0003-HID-multitouch-Combine-all-left-button-events-in-a-f.patch
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# Reported upstream
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Patch633: 0001-x86-PCI-fix-infinity-loop-in-search-for-64bit-BAR-pl.patch
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Patch634: 0002-x86-PCI-only-enable-a-64bit-BAR-on-single-socket-AMD.patch
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Patch635: 0003-x86-PCI-limit-the-size-of-the-64bit-BAR-to-256GB.patch
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# END OF PATCH DEFINITIONS
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@ -2192,6 +2190,9 @@ fi
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#
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#
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%changelog
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* Fri Dec 15 2017 Laura Abbott <labbott@redhat.com> - 4.15.0-0.rc3.git4.1
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- Linux v4.15-rc3-86-g032b4cc8ff84
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* Fri Dec 15 2017 Hans de Goede <jwrdegoede@fedoraproject.org>
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- Enable CONFIG_REGULATOR on x86_64, fixing USB PD charging on some devices
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2
sources
2
sources
@ -1,4 +1,4 @@
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SHA512 (linux-4.14.tar.xz) = 77e43a02d766c3d73b7e25c4aafb2e931d6b16e870510c22cef0cdb05c3acb7952b8908ebad12b10ef982c6efbe286364b1544586e715cf38390e483927904d8
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SHA512 (perf-man-4.14.tar.gz) = 76a9d8adc284cdffd4b3fbb060e7f9a14109267707ce1d03f4c3239cd70d8d164f697da3a0f90a363fbcac42a61d3c378afbcc2a86f112c501b9cb5ce74ef9f8
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SHA512 (patch-4.15-rc3.xz) = a29fbd30eebad701232aecb078a84591850702a95a66d5900c02ee95bae234e6a38b9d62029a4cb5aa286c326bce0ee47cce01bdafcaf2bc4e02b82ec046bcdd
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SHA512 (patch-4.15-rc3-git3.xz) = 0f21c77528eaaed1672daca4bf9e8c007e7055da37adc239d29f369e36201ccd5925d98277bc3f9e9297e310f828f23b480b49b732cc097467e4169159b2953e
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SHA512 (patch-4.15-rc3-git4.xz) = 5bca8ece2c1b2492203e60b537bb4de2fd509d87c7b9ea58370b555ed2049986d15ed0290a73971dd21720e9c579e12206bf8d38333f420baae3b240dc6d0c26
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