suck in edp-fixes too
This commit is contained in:
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f1aeb30fcc
commit
8077b629b4
@ -57,6 +57,19 @@ index f7af91c..7ca5935 100644
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changed = true;
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changed = true;
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}
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}
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index f737960..b1f8164 100644
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--- a/drivers/gpu/drm/i915/i915_drv.c
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+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -509,6 +509,8 @@ i915_pci_remove(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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+ pci_disable_device(pdev); /* core did previous enable */
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+
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drm_put_dev(dev);
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}
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diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
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diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
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index 17b1cba..5e54821 100644
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index 17b1cba..5e54821 100644
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--- a/drivers/gpu/drm/i915/i915_gem.c
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--- a/drivers/gpu/drm/i915/i915_gem.c
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@ -798,7 +811,7 @@ index bee24b1..255b52e 100644
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if (HAS_PCH_SPLIT(dev)) {
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if (HAS_PCH_SPLIT(dev)) {
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dpd_is_edp = intel_dpd_is_edp(dev);
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dpd_is_edp = intel_dpd_is_edp(dev);
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diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
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diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
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index c8e0055..300f64b 100644
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index c8e0055..2e3db37 100644
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--- a/drivers/gpu/drm/i915/intel_dp.c
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--- a/drivers/gpu/drm/i915/intel_dp.c
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+++ b/drivers/gpu/drm/i915/intel_dp.c
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+++ b/drivers/gpu/drm/i915/intel_dp.c
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@@ -584,17 +584,6 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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@@ -584,17 +584,6 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
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@ -839,7 +852,34 @@ index c8e0055..300f64b 100644
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return false;
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return false;
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}
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}
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@@ -1087,21 +1089,11 @@ intel_get_adjust_train(struct intel_dp *intel_dp)
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@@ -793,7 +795,8 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp)
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{
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struct drm_device *dev = intel_dp->base.base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE;
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+ u32 pp, idle_on = PP_ON | PP_SEQUENCE_STATE_ON_IDLE;
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+ u32 idle_on_mask = PP_ON | PP_SEQUENCE_STATE_MASK;
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if (I915_READ(PCH_PP_STATUS) & PP_ON)
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return true;
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@@ -814,7 +817,7 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp)
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*/
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msleep(300);
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- if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on_mask,
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+ if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on,
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5000))
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DRM_ERROR("panel on wait timed out: 0x%08x\n",
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I915_READ(PCH_PP_STATUS));
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@@ -920,6 +923,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
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if (is_edp(intel_dp)) {
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ironlake_edp_backlight_off(dev);
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+ ironlake_edp_panel_off(dev);
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ironlake_edp_panel_on(intel_dp);
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if (!is_pch_edp(intel_dp))
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ironlake_edp_pll_on(encoder);
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@@ -1087,21 +1091,11 @@ intel_get_adjust_train(struct intel_dp *intel_dp)
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}
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}
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static uint32_t
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static uint32_t
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@ -864,7 +904,7 @@ index c8e0055..300f64b 100644
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case DP_TRAIN_VOLTAGE_SWING_400:
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case DP_TRAIN_VOLTAGE_SWING_400:
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default:
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default:
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signal_levels |= DP_VOLTAGE_0_4;
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signal_levels |= DP_VOLTAGE_0_4;
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@@ -1116,7 +1108,7 @@ intel_dp_signal_levels(struct intel_dp *intel_dp)
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@@ -1116,7 +1110,7 @@ intel_dp_signal_levels(struct intel_dp *intel_dp)
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signal_levels |= DP_VOLTAGE_1_2;
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signal_levels |= DP_VOLTAGE_1_2;
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break;
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break;
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}
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}
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@ -873,7 +913,7 @@ index c8e0055..300f64b 100644
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case DP_TRAIN_PRE_EMPHASIS_0:
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case DP_TRAIN_PRE_EMPHASIS_0:
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default:
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default:
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signal_levels |= DP_PRE_EMPHASIS_0;
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signal_levels |= DP_PRE_EMPHASIS_0;
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@@ -1203,18 +1195,6 @@ intel_channel_eq_ok(struct intel_dp *intel_dp)
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@@ -1203,18 +1197,6 @@ intel_channel_eq_ok(struct intel_dp *intel_dp)
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}
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}
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static bool
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static bool
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@ -892,7 +932,7 @@ index c8e0055..300f64b 100644
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intel_dp_set_link_train(struct intel_dp *intel_dp,
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intel_dp_set_link_train(struct intel_dp *intel_dp,
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uint32_t dp_reg_value,
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uint32_t dp_reg_value,
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uint8_t dp_train_pat)
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uint8_t dp_train_pat)
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@@ -1226,9 +1206,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
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@@ -1226,9 +1208,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
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I915_WRITE(intel_dp->output_reg, dp_reg_value);
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I915_WRITE(intel_dp->output_reg, dp_reg_value);
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POSTING_READ(intel_dp->output_reg);
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POSTING_READ(intel_dp->output_reg);
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@ -902,7 +942,7 @@ index c8e0055..300f64b 100644
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intel_dp_aux_native_write_1(intel_dp,
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intel_dp_aux_native_write_1(intel_dp,
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DP_TRAINING_PATTERN_SET,
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DP_TRAINING_PATTERN_SET,
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dp_train_pat);
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dp_train_pat);
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@@ -1261,11 +1238,10 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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@@ -1261,11 +1240,10 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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POSTING_READ(intel_dp->output_reg);
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POSTING_READ(intel_dp->output_reg);
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intel_wait_for_vblank(dev, intel_crtc->pipe);
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intel_wait_for_vblank(dev, intel_crtc->pipe);
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@ -918,7 +958,7 @@ index c8e0055..300f64b 100644
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DP |= DP_PORT_EN;
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DP |= DP_PORT_EN;
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if (HAS_PCH_CPT(dev) && !is_edp(intel_dp))
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if (HAS_PCH_CPT(dev) && !is_edp(intel_dp))
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@@ -1283,7 +1259,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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@@ -1283,7 +1261,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
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signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
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DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
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DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
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} else {
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} else {
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@ -927,7 +967,7 @@ index c8e0055..300f64b 100644
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DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
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DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
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}
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}
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@@ -1297,37 +1273,33 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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@@ -1297,37 +1275,33 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
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break;
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break;
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/* Set training pattern 1 */
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/* Set training pattern 1 */
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@ -986,7 +1026,7 @@ index c8e0055..300f64b 100644
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}
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}
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intel_dp->DP = DP;
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intel_dp->DP = DP;
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@@ -1354,7 +1326,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
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@@ -1354,7 +1328,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
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signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
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signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
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DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
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DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
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} else {
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} else {
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@ -995,7 +1035,7 @@ index c8e0055..300f64b 100644
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DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
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DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
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}
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}
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@@ -1368,28 +1340,24 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
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@@ -1368,28 +1342,24 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
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DP_TRAINING_PATTERN_2))
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DP_TRAINING_PATTERN_2))
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break;
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break;
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@ -1915,6 +1915,7 @@ fi
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* Wed Dec 01 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git1.1
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* Wed Dec 01 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git1.1
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- Linux 2.6.37-rc4-git1
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- Linux 2.6.37-rc4-git1
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- Pull in DRM fixes that are queued for -rc5 [3074adc8]
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- Pull in DRM fixes that are queued for -rc5 [3074adc8]
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+ edp-fixes on top
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* Tue Nov 30 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git0.1
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* Tue Nov 30 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git0.1
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- Linux 2.6.37-rc4
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- Linux 2.6.37-rc4
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