fix graphics on hp 2530p which were broken due to pci crs fixes from upstream (korg#23542)

This commit is contained in:
Kyle McMartin 2010-11-24 06:54:32 -05:00
parent 18241e1172
commit 28f88fd957
2 changed files with 69 additions and 0 deletions

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@ -715,6 +715,7 @@ Patch12204: linux-2.6-enable-more-pci-autosuspend.patch
Patch12205: runtime_pm_fixups.patch
Patch12225: pci-crs-fixes.patch
Patch12226: x86-never-alloc-pci-from-the-last-1M-below-4G.patch
Patch12300: btusb-macbookpro-7-1.patch
Patch12301: btusb-macbookpro-6-2.patch
@ -1344,6 +1345,7 @@ ApplyPatch runtime_pm_fixups.patch
# PCI patches to fix problems with _CRS
# ( from linux-pci list )
ApplyPatch pci-crs-fixes.patch
ApplyPatch x86-never-alloc-pci-from-the-last-1M-below-4G.patch
ApplyPatch btusb-macbookpro-7-1.patch
ApplyPatch btusb-macbookpro-6-2.patch
@ -1986,6 +1988,9 @@ fi
# || ||
%changelog
* Wed Nov 24 2010 Kyle McMartin <kyle@redhat.com>
- Fix graphics on HP 2530p (korg#23542)
* Tue Nov 23 2010 Kyle McMartin <kyle@redhat.com>
- zero struct memory in ipc compat (CVE-2010-4073) (#648658)
- zero struct memory in ipc shm (CVE-2010-4072) (#648656)

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@ -0,0 +1,64 @@
commit 0dda4d7a8d071c58aa22268fd784869b28b5381b
Author: Bjorn Helgaas <bjorn.helgaas@hp.com>
Date: Fri Nov 19 16:25:39 2010 -0700
x86/PCI: never allocate PCI space from the last 1M below 4G
The last 1M before 4G contains the processor restart vector and usually
the system ROM. We don't know the actual ROM size; I chose 1M because
that's how much Windows 7 appears to avoid.
Without this check, we can allocate PCI space that will never work. On
Matthew's HP 2530p, we put the Intel GTT "Flush Page" at the very last
page, which causes a spontaneous power-off:
pci_root PNP0A08:00: host bridge window [mem 0xfee01000-0xffffffff]
fffff000-ffffffff : Intel Flush Page (assigned by intel-gtt)
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=23542
Reported-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 5be1542..c1e908f 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -72,6 +72,9 @@ struct e820map {
#define BIOS_BEGIN 0x000a0000
#define BIOS_END 0x00100000
+#define BIOS_ROM_BASE 0xfff00000
+#define BIOS_ROM_END 0x100000000ULL
+
#ifdef __KERNEL__
/* see comment in arch/x86/kernel/e820.c */
extern struct e820map e820;
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index c4bb261..6890241 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -65,8 +65,14 @@ pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
struct pci_dev *dev = data;
- resource_size_t start = round_down(res->end - size + 1, align);
+ resource_size_t start, end = res->end;
+ /* Make sure we don't allocate from the last 1M before 4G */
+ if (res->flags & IORESOURCE_MEM) {
+ if (end >= BIOS_ROM_BASE && end < BIOS_ROM_END)
+ end = BIOS_ROM_BASE - 1;
+ }
+ start = round_down(end - size + 1, align);
if (res->flags & IORESOURCE_IO) {
/*
@@ -80,6 +86,8 @@ pcibios_align_resource(void *data, const struct resource *res,
} else if (res->flags & IORESOURCE_MEM) {
if (start < BIOS_END)
start = res->end; /* fail; no space */
+ if (start >= BIOS_ROM_BASE && start < BIOS_ROM_END)
+ start = ALIGN(BIOS_ROM_END, align);
}
return start;
}