Linux v4.13-11197-gf007cad159e9
This commit is contained in:
parent
3a0a8f607a
commit
21e4b83380
@ -1,78 +0,0 @@
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From 075bb90dbb4d894938c5859e3850987238db9cd8 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Fri, 11 Aug 2017 22:30:55 +0200
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Subject: [PATCH 1/2] power: supply: max17042_battery: Add support for ACPI
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enumeration
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Some x86 devices enumerate a max17047 fuel-gauge through a MAX17047
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ACPI firmware-node, add support for this.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/power/supply/max17042_battery.c | 22 +++++++++++++++++++++-
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1 file changed, 21 insertions(+), 1 deletion(-)
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diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
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index aecaaa2b0586..b2ddb7eb69c6 100644
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--- a/drivers/power/supply/max17042_battery.c
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+++ b/drivers/power/supply/max17042_battery.c
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@@ -22,6 +22,7 @@
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* This driver is based on max17040_battery.c
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*/
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+#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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@@ -982,6 +983,8 @@ static int max17042_probe(struct i2c_client *client,
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struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
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const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
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struct power_supply_config psy_cfg = {};
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+ const struct acpi_device_id *acpi_id;
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+ struct device *dev = &client->dev;
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struct max17042_chip *chip;
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int ret;
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int i;
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@@ -995,7 +998,15 @@ static int max17042_probe(struct i2c_client *client,
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return -ENOMEM;
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chip->client = client;
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- chip->chip_type = id->driver_data;
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+ if (id) {
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+ chip->chip_type = id->driver_data;
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+ } else {
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+ acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
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+ if (!acpi_id)
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+ return -ENODEV;
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+
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+ chip->chip_type = acpi_id->driver_data;
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+ }
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chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config);
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if (IS_ERR(chip->regmap)) {
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dev_err(&client->dev, "Failed to initialize regmap\n");
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@@ -1104,6 +1115,14 @@ static int max17042_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
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max17042_resume);
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+#ifdef CONFIG_ACPI
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+static const struct acpi_device_id max17042_acpi_match[] = {
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+ { "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(acpi, max17042_acpi_match);
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+#endif
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+
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#ifdef CONFIG_OF
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static const struct of_device_id max17042_dt_match[] = {
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{ .compatible = "maxim,max17042" },
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@@ -1125,6 +1144,7 @@ MODULE_DEVICE_TABLE(i2c, max17042_id);
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static struct i2c_driver max17042_i2c_driver = {
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.driver = {
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.name = "max17042",
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+ .acpi_match_table = ACPI_PTR(max17042_acpi_match),
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.of_match_table = of_match_ptr(max17042_dt_match),
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.pm = &max17042_pm_ops,
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},
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--
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2.13.4
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@ -1,80 +0,0 @@
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From 27b9d46d25c873b351757c44ce523bf0ede1d08e Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 14 Aug 2017 11:02:59 +0200
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Subject: [PATCH 2/2] power: supply: max17042_battery: Fix ACPI interrupt
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issues
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On some x86/ACPI boards the DSDT defines an ACPI event handler for
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the max17047 IRQ, this causes several problems:
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1) We need to share the IRQ to avoid an error getting it
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2) Even of we are willing to share, we may fail to share because some
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DSDTs claim it exclusivly
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3) If we are unable to share the IRQ, or the IRQ is only listed as an
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ACPI event source and not in the max1704 firmware node, then the
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charge threshold IRQ (which is used to give an IRQ every 1 percent
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charge change) becomes a problem, the ACPI event handler will not
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update this to the next 1 percent threshold, so the IRQ keeps firing
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and we get an IRQ storm pegging 1 CPU core.
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This happens despite the max17042 driver not setting the charge
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threshold because Windows uses it and leaves it set on reboot.
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So if we are unable to get the IRQ we need to reprogram the
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charge threshold to its disabled setting.
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This commit fixes al of the above, while at it it also makes the error
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msg when being unable to get the IRQ consistent with other messages.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/power/supply/max17042_battery.c | 20 +++++++++++++++-----
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1 file changed, 15 insertions(+), 5 deletions(-)
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diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
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index b2ddb7eb69c6..18a44e4ed6ff 100644
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--- a/drivers/power/supply/max17042_battery.c
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+++ b/drivers/power/supply/max17042_battery.c
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@@ -1050,11 +1050,18 @@ static int max17042_probe(struct i2c_client *client,
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}
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if (client->irq) {
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+ unsigned int flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
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+
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+ /*
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+ * On ACPI systems the IRQ may be handled by ACPI-event code,
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+ * so we need to share (if the ACPI code is willing to share).
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+ */
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+ if (acpi_id)
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+ flags |= IRQF_SHARED | IRQF_PROBE_SHARED;
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+
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ret = devm_request_threaded_irq(&client->dev, client->irq,
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NULL,
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- max17042_thread_handler,
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- IRQF_TRIGGER_FALLING |
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- IRQF_ONESHOT,
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+ max17042_thread_handler, flags,
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chip->battery->desc->name,
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chip);
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if (!ret) {
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@@ -1064,10 +1071,13 @@ static int max17042_probe(struct i2c_client *client,
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max17042_set_soc_threshold(chip, 1);
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} else {
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client->irq = 0;
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- dev_err(&client->dev, "%s(): cannot get IRQ\n",
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- __func__);
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+ if (ret != -EBUSY)
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+ dev_err(&client->dev, "Failed to get IRQ\n");
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}
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}
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+ /* Not able to update the charge threshold when exceeded? -> disable */
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+ if (!client->irq)
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+ regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00);
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regmap_read(chip->regmap, MAX17042_STATUS, &val);
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if (val & STATUS_POR_BIT) {
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--
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2.13.4
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@ -1,410 +0,0 @@
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From bd0d7169342e47919f68e75d659968f02b62f84b Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Fri, 3 Mar 2017 23:48:50 +0100
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Subject: [PATCH 15/16] i2c-cht-wc: Add Intel Cherry Trail Whiskey Cove SMBUS
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controller driver
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The Intel Cherry Trail Whiskey Cove PMIC does not contain a builtin
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battery charger, instead boards with this PMIC use an external TI
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bq24292i charger IC, which is connected to a SMBUS controller built into
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the PMIC.
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This commit adds an i2c-bus driver for the PMIC's builtin SMBUS
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controller. The probe function for this i2c-bus will also register an
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i2c-client for the TI bq24292i charger after the i2c-bus has been
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registered.
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Note that several device-properties are set on the client-device to
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tell the bq24190 power-supply driver to integrate the Whiskey Cove PMIC
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and e.g. use the PMIC's BC1.2 detection (through extcon) to determine
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the maximum input current.
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Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v2:
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-Various style (mostly captialization and variable name) fixes
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-Use device-properties instead of platform_data for the i2c_board_info
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---
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drivers/i2c/busses/Kconfig | 8 +
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drivers/i2c/busses/Makefile | 1 +
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drivers/i2c/busses/i2c-cht-wc.c | 336 ++++++++++++++++++++++++++++++++++++++++
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3 files changed, 345 insertions(+)
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create mode 100644 drivers/i2c/busses/i2c-cht-wc.c
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diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
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index 144cbadc7c72..18c96178b177 100644
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--- a/drivers/i2c/busses/Kconfig
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+++ b/drivers/i2c/busses/Kconfig
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@@ -187,6 +187,14 @@ config I2C_PIIX4
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This driver can also be built as a module. If so, the module
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will be called i2c-piix4.
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+config I2C_CHT_WC
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+ tristate "Intel Cherry Trail Whiskey Cove PMIC smbus controller"
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+ depends on INTEL_SOC_PMIC_CHTWC
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+ help
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+ If you say yes to this option, support will be included for the
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+ SMBus controller found in the Intel Cherry Trail Whiskey Cove PMIC
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+ found on some Intel Cherry Trail systems.
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+
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config I2C_NFORCE2
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tristate "Nvidia nForce2, nForce3 and nForce4"
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depends on PCI
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diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
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index 30b60855fbcd..f6443fa44f61 100644
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--- a/drivers/i2c/busses/Makefile
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+++ b/drivers/i2c/busses/Makefile
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@@ -12,6 +12,7 @@ obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
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obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
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obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
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obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
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+obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
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obj-$(CONFIG_I2C_I801) += i2c-i801.o
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obj-$(CONFIG_I2C_ISCH) += i2c-isch.o
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obj-$(CONFIG_I2C_ISMT) += i2c-ismt.o
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diff --git a/drivers/i2c/busses/i2c-cht-wc.c b/drivers/i2c/busses/i2c-cht-wc.c
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new file mode 100644
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index 000000000000..ccf0785bcb75
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--- /dev/null
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+++ b/drivers/i2c/busses/i2c-cht-wc.c
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@@ -0,0 +1,336 @@
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+/*
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+ * Intel CHT Whiskey Cove PMIC I2C Master driver
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+ * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
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+ *
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+ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
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+ * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License version
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+ * 2 as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/completion.h>
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+#include <linux/delay.h>
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+#include <linux/i2c.h>
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+#include <linux/interrupt.h>
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+#include <linux/irq.h>
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+#include <linux/irqdomain.h>
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+#include <linux/mfd/intel_soc_pmic.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+
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+#define CHT_WC_I2C_CTRL 0x5e24
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+#define CHT_WC_I2C_CTRL_WR BIT(0)
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+#define CHT_WC_I2C_CTRL_RD BIT(1)
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+#define CHT_WC_I2C_CLIENT_ADDR 0x5e25
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+#define CHT_WC_I2C_REG_OFFSET 0x5e26
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+#define CHT_WC_I2C_WRDATA 0x5e27
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+#define CHT_WC_I2C_RDDATA 0x5e28
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+
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+#define CHT_WC_EXTCHGRIRQ 0x6e0a
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+#define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ BIT(0)
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+#define CHT_WC_EXTCHGRIRQ_WRITE_IRQ BIT(1)
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+#define CHT_WC_EXTCHGRIRQ_READ_IRQ BIT(2)
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+#define CHT_WC_EXTCHGRIRQ_NACK_IRQ BIT(3)
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+#define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK ((u8)GENMASK(3, 1))
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+#define CHT_WC_EXTCHGRIRQ_MSK 0x6e17
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+
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+struct cht_wc_i2c_adap {
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+ struct i2c_adapter adapter;
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+ wait_queue_head_t wait;
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+ struct irq_chip irqchip;
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+ struct mutex irqchip_lock;
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+ struct regmap *regmap;
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+ struct irq_domain *irq_domain;
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+ struct i2c_client *client;
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+ int client_irq;
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+ u8 irq_mask;
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+ u8 old_irq_mask;
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+ bool nack;
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+ bool done;
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+};
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+
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+static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
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+{
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+ struct cht_wc_i2c_adap *adap = data;
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+ int ret, reg;
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+
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+ /* Read IRQs */
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+ ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, ®);
|
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+ if (ret) {
|
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+ dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n");
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+ return IRQ_NONE;
|
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+ }
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+
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+ reg &= ~adap->irq_mask;
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+
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+ /*
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+ * Immediately ack IRQs, so that if new IRQs arrives while we're
|
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+ * handling the previous ones our irq will re-trigger when we're done.
|
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+ */
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+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg);
|
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+ if (ret)
|
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+ dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n");
|
||||
+
|
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+ /*
|
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+ * Do NOT use handle_nested_irq here, the client irq handler will
|
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+ * likely want to do i2c transfers and the i2c controller uses this
|
||||
+ * interrupt handler as well, so running the client irq handler from
|
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+ * this thread will cause things to lock up.
|
||||
+ */
|
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+ if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) {
|
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+ /*
|
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+ * generic_handle_irq expects local IRQs to be disabled
|
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+ * as normally it is called from interrupt context.
|
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+ */
|
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+ local_irq_disable();
|
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+ generic_handle_irq(adap->client_irq);
|
||||
+ local_irq_enable();
|
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+ }
|
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+
|
||||
+ if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) {
|
||||
+ adap->nack = !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ);
|
||||
+ adap->done = true;
|
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+ wake_up(&adap->wait);
|
||||
+ }
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
+
|
||||
+static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
|
||||
+{
|
||||
+ /* This i2c adapter only supports SMBUS byte transfers */
|
||||
+ return I2C_FUNC_SMBUS_BYTE_DATA;
|
||||
+}
|
||||
+
|
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+static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
|
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+ unsigned short flags, char read_write,
|
||||
+ u8 command, int size,
|
||||
+ union i2c_smbus_data *data)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap);
|
||||
+ int ret, reg;
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||||
+
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+ adap->nack = false;
|
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+ adap->done = false;
|
||||
+
|
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+ ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ if (read_write == I2C_SMBUS_WRITE) {
|
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+ ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte);
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||||
+ if (ret)
|
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+ return ret;
|
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+ }
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+
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+ ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command);
|
||||
+ if (ret)
|
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+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL,
|
||||
+ (read_write == I2C_SMBUS_WRITE) ?
|
||||
+ CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* 3 second timeout, during cable plug the PMIC responds quite slow */
|
||||
+ ret = wait_event_timeout(adap->wait, adap->done, 3 * HZ);
|
||||
+ if (ret == 0)
|
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+ return -ETIMEDOUT;
|
||||
+ if (adap->nack)
|
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+ return -EIO;
|
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+
|
||||
+ if (read_write == I2C_SMBUS_READ) {
|
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+ ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, ®);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ data->byte = reg;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
|
||||
+ .functionality = cht_wc_i2c_adap_master_func,
|
||||
+ .smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
|
||||
+};
|
||||
+
|
||||
+/**** irqchip for the client connected to the extchgr i2c adapter ****/
|
||||
+static void cht_wc_i2c_irq_lock(struct irq_data *data)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
|
||||
+
|
||||
+ mutex_lock(&adap->irqchip_lock);
|
||||
+}
|
||||
+
|
||||
+static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
|
||||
+ int ret;
|
||||
+
|
||||
+ if (adap->irq_mask != adap->old_irq_mask) {
|
||||
+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK,
|
||||
+ adap->irq_mask);
|
||||
+ if (ret == 0)
|
||||
+ adap->old_irq_mask = adap->irq_mask;
|
||||
+ else
|
||||
+ dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n");
|
||||
+ }
|
||||
+
|
||||
+ mutex_unlock(&adap->irqchip_lock);
|
||||
+}
|
||||
+
|
||||
+static void cht_wc_i2c_irq_enable(struct irq_data *data)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
|
||||
+
|
||||
+ adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
|
||||
+}
|
||||
+
|
||||
+static void cht_wc_i2c_irq_disable(struct irq_data *data)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
|
||||
+
|
||||
+ adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
|
||||
+}
|
||||
+
|
||||
+static const struct irq_chip cht_wc_i2c_irq_chip = {
|
||||
+ .irq_bus_lock = cht_wc_i2c_irq_lock,
|
||||
+ .irq_bus_sync_unlock = cht_wc_i2c_irq_sync_unlock,
|
||||
+ .irq_disable = cht_wc_i2c_irq_disable,
|
||||
+ .irq_enable = cht_wc_i2c_irq_enable,
|
||||
+ .name = "cht_wc_ext_chrg_irq_chip",
|
||||
+};
|
||||
+
|
||||
+static const struct property_entry bq24190_props[] = {
|
||||
+ PROPERTY_ENTRY_STRING("extcon-name", "cht_wcove_pwrsrc"),
|
||||
+ PROPERTY_ENTRY_BOOL("omit-battery-class"),
|
||||
+ PROPERTY_ENTRY_BOOL("disable-reset"),
|
||||
+ { }
|
||||
+};
|
||||
+
|
||||
+static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
|
||||
+ struct cht_wc_i2c_adap *adap;
|
||||
+ struct i2c_board_info board_info = {
|
||||
+ .type = "bq24190",
|
||||
+ .addr = 0x6b,
|
||||
+ .properties = bq24190_props,
|
||||
+ };
|
||||
+ int ret, irq;
|
||||
+
|
||||
+ irq = platform_get_irq(pdev, 0);
|
||||
+ if (irq < 0) {
|
||||
+ dev_err(&pdev->dev, "Error missing irq resource\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL);
|
||||
+ if (!adap)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ init_waitqueue_head(&adap->wait);
|
||||
+ mutex_init(&adap->irqchip_lock);
|
||||
+ adap->irqchip = cht_wc_i2c_irq_chip;
|
||||
+ adap->regmap = pmic->regmap;
|
||||
+ adap->adapter.owner = THIS_MODULE;
|
||||
+ adap->adapter.class = I2C_CLASS_HWMON;
|
||||
+ adap->adapter.algo = &cht_wc_i2c_adap_algo;
|
||||
+ strlcpy(adap->adapter.name, "PMIC I2C Adapter",
|
||||
+ sizeof(adap->adapter.name));
|
||||
+ adap->adapter.dev.parent = &pdev->dev;
|
||||
+
|
||||
+ /* Clear and activate i2c-adapter interrupts, disable client IRQ */
|
||||
+ adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK;
|
||||
+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* Alloc and register client IRQ */
|
||||
+ adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1,
|
||||
+ &irq_domain_simple_ops, NULL);
|
||||
+ if (!adap->irq_domain)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ adap->client_irq = irq_create_mapping(adap->irq_domain, 0);
|
||||
+ if (!adap->client_irq) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto remove_irq_domain;
|
||||
+ }
|
||||
+
|
||||
+ irq_set_chip_data(adap->client_irq, adap);
|
||||
+ irq_set_chip_and_handler(adap->client_irq, &adap->irqchip,
|
||||
+ handle_simple_irq);
|
||||
+
|
||||
+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
||||
+ cht_wc_i2c_adap_thread_handler,
|
||||
+ IRQF_ONESHOT, "PMIC I2C Adapter", adap);
|
||||
+ if (ret)
|
||||
+ goto remove_irq_domain;
|
||||
+
|
||||
+ i2c_set_adapdata(&adap->adapter, adap);
|
||||
+ ret = i2c_add_adapter(&adap->adapter);
|
||||
+ if (ret)
|
||||
+ goto remove_irq_domain;
|
||||
+
|
||||
+ board_info.irq = adap->client_irq;
|
||||
+ adap->client = i2c_new_device(&adap->adapter, &board_info);
|
||||
+ if (!adap->client) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto del_adapter;
|
||||
+ }
|
||||
+
|
||||
+ platform_set_drvdata(pdev, adap);
|
||||
+ return 0;
|
||||
+
|
||||
+del_adapter:
|
||||
+ i2c_del_adapter(&adap->adapter);
|
||||
+remove_irq_domain:
|
||||
+ irq_domain_remove(adap->irq_domain);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ i2c_unregister_device(adap->client);
|
||||
+ i2c_del_adapter(&adap->adapter);
|
||||
+ irq_domain_remove(adap->irq_domain);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static struct platform_device_id cht_wc_i2c_adap_id_table[] = {
|
||||
+ { .name = "cht_wcove_ext_chgr" },
|
||||
+ {},
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table);
|
||||
+
|
||||
+struct platform_driver cht_wc_i2c_adap_driver = {
|
||||
+ .probe = cht_wc_i2c_adap_i2c_probe,
|
||||
+ .remove = cht_wc_i2c_adap_i2c_remove,
|
||||
+ .driver = {
|
||||
+ .name = "cht_wcove_ext_chgr",
|
||||
+ },
|
||||
+ .id_table = cht_wc_i2c_adap_id_table,
|
||||
+};
|
||||
+module_platform_driver(cht_wc_i2c_adap_driver);
|
||||
+
|
||||
+MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
|
||||
+MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
|
||||
+MODULE_LICENSE("GPL");
|
||||
--
|
||||
2.13.0
|
||||
|
@ -332,314 +332,6 @@ index 11240a8313c2..d38282b9e5d4 100644
|
||||
--
|
||||
2.13.5
|
||||
|
||||
From 4aba5ca95496899165ee7ceef5d9c60a6e7b15dd Mon Sep 17 00:00:00 2001
|
||||
From: Peter Robinson <pbrobinson@gmail.com>
|
||||
Date: Mon, 4 Sep 2017 13:04:47 +0100
|
||||
Subject: [PATCH 3/4] Revert "arm64: dts: allwinner: Revert EMAC changes"
|
||||
|
||||
This reverts commit 87e1f5e8bb4bd584de0a8f3b1e42196dca221d02.
|
||||
---
|
||||
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++
|
||||
.../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++
|
||||
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++
|
||||
.../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++
|
||||
.../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++
|
||||
.../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++
|
||||
8 files changed, 135 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
index 6872135d7f84..ba2fde2909f9 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
|
||||
@@ -51,6 +51,7 @@
|
||||
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
};
|
||||
@@ -67,6 +68,14 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii_pins>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
@@ -77,6 +86,13 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
|
||||
index f82ccf332c0f..24f1aac366d6 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
|
||||
@@ -48,3 +48,18 @@
|
||||
|
||||
/* TODO: Camera, touchscreen, etc. */
|
||||
};
|
||||
+
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii_pins>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
index 7c533b6d4ba9..827168bc22ed 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
@@ -51,6 +51,7 @@
|
||||
compatible = "pine64,pine64", "allwinner,sun50i-a64";
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
@@ -78,6 +79,15 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rmii_pins>;
|
||||
+ phy-mode = "rmii";
|
||||
+ phy-handle = <&ext_rmii_phy1>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+};
|
||||
+
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
@@ -88,6 +98,13 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
+&mdio {
|
||||
+ ext_rmii_phy1: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
|
||||
index d891a1a27f6c..216e3a5dafae 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
|
||||
@@ -53,6 +53,7 @@
|
||||
"allwinner,sun50i-a64";
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
@@ -76,6 +77,21 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmii_pins>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
index 68aadc9b96dc..bd0f33b77f57 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
|
||||
@@ -449,6 +449,26 @@
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
+ emac: ethernet@1c30000 {
|
||||
+ compatible = "allwinner,sun50i-a64-emac";
|
||||
+ syscon = <&syscon>;
|
||||
+ reg = <0x01c30000 0x10000>;
|
||||
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "macirq";
|
||||
+ resets = <&ccu RST_BUS_EMAC>;
|
||||
+ reset-names = "stmmaceth";
|
||||
+ clocks = <&ccu CLK_BUS_EMAC>;
|
||||
+ clock-names = "stmmaceth";
|
||||
+ status = "disabled";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ mdio: mdio {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
gic: interrupt-controller@1c81000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0x01c81000 0x1000>,
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
|
||||
index 1c2387bd5df6..968908761194 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
|
||||
@@ -50,6 +50,7 @@
|
||||
compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
@@ -108,6 +109,22 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emac_rgmii_pins>;
|
||||
+ phy-supply = <®_gmac_3v3>;
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@7 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <7>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
|
||||
index 4f77c8470f6c..a8296feee884 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
|
||||
@@ -59,6 +59,7 @@
|
||||
};
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
@@ -136,12 +137,28 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emac_rgmii_pins>;
|
||||
+ phy-supply = <®_gmac_3v3>;
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&ir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ir_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
index 6be06873e5af..d906b302cbcd 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
|
||||
@@ -54,6 +54,7 @@
|
||||
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
|
||||
|
||||
aliases {
|
||||
+ ethernet0 = &emac;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
@@ -143,12 +144,28 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&emac {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emac_rgmii_pins>;
|
||||
+ phy-supply = <®_gmac_3v3>;
|
||||
+ phy-handle = <&ext_rgmii_phy>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&ir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ir_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&mdio {
|
||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||
--
|
||||
2.13.5
|
||||
|
||||
From 11190f020b948ccdf15061b6df8cc2836a2afcb1 Mon Sep 17 00:00:00 2001
|
||||
From: Peter Robinson <pbrobinson@gmail.com>
|
||||
Date: Mon, 4 Sep 2017 13:04:55 +0100
|
||||
|
@ -1,39 +0,0 @@
|
||||
From patchwork Sun Jul 9 16:36:14 2017
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: ARM: tegra: Register host1x node with iommu binding on tegra124
|
||||
From: Paul Kocialkowski <contact@paulk.fr>
|
||||
X-Patchwork-Id: 9831825
|
||||
Message-Id: <20170709163614.6746-1-contact@paulk.fr>
|
||||
To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org,
|
||||
linux-kernel@vger.kernel.org
|
||||
Cc: Thierry Reding <thierry.reding@gmail.com>,
|
||||
Stephen Warren <swarren@wwwdotorg.org>,
|
||||
Mikko Perttunen <mperttunen@nvidia.com>,
|
||||
Paul Kocialkowski <contact@paulk.fr>,
|
||||
Jonathan Hunter <jonathanh@nvidia.com>
|
||||
Date: Sun, 9 Jul 2017 19:36:14 +0300
|
||||
|
||||
This registers the host1x node with the SMMU (as HC swgroup) to allow
|
||||
the host1x code to attach to it. It avoid failing the probe sequence,
|
||||
which resulted in the tegra drm driver not probing and thus nothing
|
||||
being displayed on-screen.
|
||||
|
||||
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
|
||||
---
|
||||
arch/arm/boot/dts/tegra124.dtsi | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
|
||||
index 187a36c6d0fc..b3b89befffeb 100644
|
||||
--- a/arch/arm/boot/dts/tegra124.dtsi
|
||||
+++ b/arch/arm/boot/dts/tegra124.dtsi
|
||||
@@ -85,6 +85,7 @@
|
||||
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
|
||||
resets = <&tegra_car 28>;
|
||||
reset-names = "host1x";
|
||||
+ iommus = <&mc TEGRA_SWGROUP_HC>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
1
baseconfig/CONFIG_BATTERY_MAX1721X
Normal file
1
baseconfig/CONFIG_BATTERY_MAX1721X
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_BATTERY_MAX1721X=m
|
1
baseconfig/CONFIG_QCOM_GLINK_SSR
Normal file
1
baseconfig/CONFIG_QCOM_GLINK_SSR
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
1
baseconfig/CONFIG_RESET_HSDK_V1
Normal file
1
baseconfig/CONFIG_RESET_HSDK_V1
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
1
baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM
Normal file
1
baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
1
baseconfig/CONFIG_STRING_SELFTEST
Normal file
1
baseconfig/CONFIG_STRING_SELFTEST
Normal file
@ -0,0 +1 @@
|
||||
# CONFIG_STRING_SELFTEST is not set
|
1
baseconfig/arm/CONFIG_MESON_GX_SOCINFO
Normal file
1
baseconfig/arm/CONFIG_MESON_GX_SOCINFO
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
1
baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ
Normal file
1
baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_BATTERY_BQ27XXX_HDQ=m
|
1
baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC
Normal file
1
baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_IMX_REMOTEPROC=m
|
1
baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE
Normal file
1
baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_DEVICE_PRIVATE=y
|
1
baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC
Normal file
1
baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_DEVICE_PUBLIC=y
|
1
baseconfig/x86/x86_64/CONFIG_HMM_MIRROR
Normal file
1
baseconfig/x86/x86_64/CONFIG_HMM_MIRROR
Normal file
@ -0,0 +1 @@
|
||||
CONFIG_HMM_MIRROR=y
|
@ -1021,7 +1021,7 @@ index 43cb680..9be3e08 100644
|
||||
+ return -EPERM;
|
||||
+
|
||||
status = wmi_evaluate_method(ASUS_WMI_MGMT_GUID,
|
||||
1, asus->debug.method_id,
|
||||
0, asus->debug.method_id,
|
||||
&input, &output);
|
||||
--
|
||||
2.7.4
|
||||
|
2
gitrev
2
gitrev
@ -1 +1 @@
|
||||
015a9e66b9b8c1f28097ed09bf9350708e26249a
|
||||
f007cad159e99fa2acd3b2e9364fbb32ad28b971
|
||||
|
@ -472,6 +472,7 @@ CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -2950,6 +2951,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
CONFIG_MESON_GXBB_WATCHDOG=m
|
||||
CONFIG_MESON_GXL_PHY=m
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
# CONFIG_MESON_WATCHDOG is not set
|
||||
@ -4224,6 +4226,7 @@ CONFIG_QCOM_COINCELL=m
|
||||
CONFIG_QCOM_EMAC=m
|
||||
# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
CONFIG_QCOM_GSBI=y
|
||||
CONFIG_QCOM_HIDMA=m
|
||||
CONFIG_QCOM_HIDMA_MGMT=m
|
||||
@ -4409,6 +4412,7 @@ CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
CONFIG_RESET_HISI=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4451,6 +4455,7 @@ CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
CONFIG_RPMSG=m
|
||||
CONFIG_RPMSG_QCOM_GLINK_RPM=m
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPMSG_QCOM_SMD=m
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
@ -5487,6 +5492,7 @@ CONFIG_STMMAC_ETH=m
|
||||
CONFIG_STMMAC_PLATFORM=m
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_STUB_CLK_HI6220=y
|
||||
|
@ -472,6 +472,7 @@ CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -2930,6 +2931,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
CONFIG_MESON_GXBB_WATCHDOG=m
|
||||
CONFIG_MESON_GXL_PHY=m
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
# CONFIG_MESON_WATCHDOG is not set
|
||||
@ -4202,6 +4204,7 @@ CONFIG_QCOM_COINCELL=m
|
||||
CONFIG_QCOM_EMAC=m
|
||||
# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
CONFIG_QCOM_GSBI=y
|
||||
CONFIG_QCOM_HIDMA=m
|
||||
CONFIG_QCOM_HIDMA_MGMT=m
|
||||
@ -4387,6 +4390,7 @@ CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
CONFIG_RESET_HISI=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4429,6 +4433,7 @@ CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
CONFIG_RPMSG=m
|
||||
CONFIG_RPMSG_QCOM_GLINK_RPM=m
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPMSG_QCOM_SMD=m
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
@ -5464,6 +5469,7 @@ CONFIG_STMMAC_ETH=m
|
||||
CONFIG_STMMAC_PLATFORM=m
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_STUB_CLK_HI6220=y
|
||||
|
@ -502,6 +502,7 @@ CONFIG_BATMAN_ADV_MCAST=y
|
||||
CONFIG_BATMAN_ADV_NC=y
|
||||
CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set
|
||||
CONFIG_BATTERY_BQ27XXX_HDQ=m
|
||||
CONFIG_BATTERY_BQ27XXX_I2C=m
|
||||
CONFIG_BATTERY_BQ27XXX=m
|
||||
CONFIG_BATTERY_DA9052=m
|
||||
@ -513,6 +514,7 @@ CONFIG_BATTERY_DA9052=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_RX51=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
CONFIG_BATTERY_TWL4030_MADC=m
|
||||
@ -2293,6 +2295,7 @@ CONFIG_IMX7_PM_DOMAINS=y
|
||||
CONFIG_IMX_DMA=m
|
||||
CONFIG_IMX_GPCV2=y
|
||||
CONFIG_IMX_IPUV3_CORE=m
|
||||
CONFIG_IMX_REMOTEPROC=m
|
||||
CONFIG_IMX_SDMA=m
|
||||
CONFIG_IMX_THERMAL=m
|
||||
CONFIG_IMX_WEIM=y
|
||||
@ -3148,6 +3151,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
# CONFIG_MESON_GXBB_WATCHDOG is not set
|
||||
# CONFIG_MESON_GXL_PHY is not set
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_WATCHDOG=m
|
||||
@ -4542,6 +4546,7 @@ CONFIG_QCOM_CLK_SMD_RPM=m
|
||||
CONFIG_QCOM_COINCELL=m
|
||||
# CONFIG_QCOM_EBI2 is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
CONFIG_QCOM_GSBI=m
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
@ -4747,6 +4752,7 @@ CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4789,6 +4795,7 @@ CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
CONFIG_RPMSG=m
|
||||
CONFIG_RPMSG_QCOM_GLINK_RPM=m
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPMSG_QCOM_SMD=m
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
@ -5964,6 +5971,7 @@ CONFIG_ST_REMOTEPROC=m
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_STRICT_MODULE_RWX=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_ST_THERMAL=m
|
||||
|
@ -492,6 +492,7 @@ CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3004,6 +3005,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
# CONFIG_MESON_GXBB_WATCHDOG is not set
|
||||
# CONFIG_MESON_GXL_PHY is not set
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_WATCHDOG=m
|
||||
@ -4286,6 +4288,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EBI2 is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QCOM_PM8XXX_XOADC=m
|
||||
@ -4459,6 +4462,7 @@ CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4500,6 +4504,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5570,6 +5575,7 @@ CONFIG_STMMAC_PLATFORM=m
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_STRICT_MODULE_RWX=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUN4I_EMAC=m
|
||||
|
@ -491,6 +491,7 @@ CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -2984,6 +2985,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
# CONFIG_MESON_GXBB_WATCHDOG is not set
|
||||
# CONFIG_MESON_GXL_PHY is not set
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_WATCHDOG=m
|
||||
@ -4264,6 +4266,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EBI2 is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QCOM_PM8XXX_XOADC=m
|
||||
@ -4437,6 +4440,7 @@ CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4478,6 +4482,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5547,6 +5552,7 @@ CONFIG_STMMAC_PLATFORM=m
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_STRICT_MODULE_RWX=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUN4I_EMAC=m
|
||||
|
@ -501,6 +501,7 @@ CONFIG_BATMAN_ADV_MCAST=y
|
||||
CONFIG_BATMAN_ADV_NC=y
|
||||
CONFIG_BATTERY_AXP20X=m
|
||||
# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set
|
||||
CONFIG_BATTERY_BQ27XXX_HDQ=m
|
||||
CONFIG_BATTERY_BQ27XXX_I2C=m
|
||||
CONFIG_BATTERY_BQ27XXX=m
|
||||
CONFIG_BATTERY_DA9052=m
|
||||
@ -512,6 +513,7 @@ CONFIG_BATTERY_DA9052=m
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_RX51=m
|
||||
CONFIG_BATTERY_SBS=m
|
||||
CONFIG_BATTERY_TWL4030_MADC=m
|
||||
@ -2276,6 +2278,7 @@ CONFIG_IMX7_PM_DOMAINS=y
|
||||
CONFIG_IMX_DMA=m
|
||||
CONFIG_IMX_GPCV2=y
|
||||
CONFIG_IMX_IPUV3_CORE=m
|
||||
CONFIG_IMX_REMOTEPROC=m
|
||||
CONFIG_IMX_SDMA=m
|
||||
CONFIG_IMX_THERMAL=m
|
||||
CONFIG_IMX_WEIM=y
|
||||
@ -3128,6 +3131,7 @@ CONFIG_MEMSTICK_TIFM_MS=m
|
||||
CONFIG_MESON_EFUSE=m
|
||||
# CONFIG_MESON_GXBB_WATCHDOG is not set
|
||||
# CONFIG_MESON_GXL_PHY is not set
|
||||
CONFIG_MESON_GX_SOCINFO=y
|
||||
CONFIG_MESON_SARADC=m
|
||||
CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_WATCHDOG=m
|
||||
@ -4520,6 +4524,7 @@ CONFIG_QCOM_CLK_SMD_RPM=m
|
||||
CONFIG_QCOM_COINCELL=m
|
||||
# CONFIG_QCOM_EBI2 is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
CONFIG_QCOM_GSBI=m
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
@ -4725,6 +4730,7 @@ CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RESET_GPIO=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SCI is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
@ -4767,6 +4773,7 @@ CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
CONFIG_RPMSG=m
|
||||
CONFIG_RPMSG_QCOM_GLINK_RPM=m
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPMSG_QCOM_SMD=m
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
@ -5941,6 +5948,7 @@ CONFIG_ST_REMOTEPROC=m
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_STRICT_MODULE_RWX=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_ST_THERMAL=m
|
||||
|
@ -390,6 +390,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_OLPC=y
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
@ -4040,6 +4041,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4154,6 +4156,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4182,6 +4185,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5177,6 +5181,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -391,6 +391,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_OLPC=y
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
@ -4061,6 +4062,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4175,6 +4177,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4203,6 +4206,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5199,6 +5203,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -391,6 +391,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_OLPC=y
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
@ -4061,6 +4062,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4175,6 +4177,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4203,6 +4206,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5199,6 +5203,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -390,6 +390,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
CONFIG_BATTERY_OLPC=y
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
@ -4040,6 +4041,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4154,6 +4156,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4182,6 +4185,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5177,6 +5181,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -339,6 +339,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3875,6 +3876,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3988,6 +3990,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4016,6 +4019,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4985,6 +4989,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -338,6 +338,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3852,6 +3853,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3965,6 +3967,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3993,6 +3996,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4961,6 +4965,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -333,6 +333,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3815,6 +3816,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3928,6 +3930,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3956,6 +3959,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4914,6 +4918,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -332,6 +332,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3792,6 +3793,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3905,6 +3907,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3933,6 +3936,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4890,6 +4894,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -333,6 +333,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3814,6 +3815,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3927,6 +3929,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3955,6 +3958,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4913,6 +4917,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -332,6 +332,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3791,6 +3792,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -3904,6 +3906,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3932,6 +3935,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4889,6 +4893,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -334,6 +334,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3704,6 +3705,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QDIO=m
|
||||
@ -3821,6 +3823,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_CONTROLLER is not set
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3849,6 +3852,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4810,6 +4814,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -333,6 +333,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
# CONFIG_BATTERY_MAX17042 is not set
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -3681,6 +3682,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QDIO=m
|
||||
@ -3798,6 +3800,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_CONTROLLER is not set
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -3826,6 +3829,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -4786,6 +4790,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -398,6 +398,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
CONFIG_BATTERY_MAX17042=m
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -1087,6 +1088,8 @@ CONFIG_DEV_DAX_PMEM=m
|
||||
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m
|
||||
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
|
||||
# CONFIG_DEVFREQ_THERMAL is not set
|
||||
CONFIG_DEVICE_PRIVATE=y
|
||||
CONFIG_DEVICE_PUBLIC=y
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_DEVMEM=y
|
||||
CONFIG_DEVPORT=y
|
||||
@ -1867,6 +1870,7 @@ CONFIG_HISAX_W6692=y
|
||||
CONFIG_HIST_TRIGGERS=y
|
||||
# CONFIG_HMC6352 is not set
|
||||
# CONFIG_HMC_DRV is not set
|
||||
CONFIG_HMM_MIRROR=y
|
||||
CONFIG_HOLTEK_FF=y
|
||||
# CONFIG_HOSTAP is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
@ -4099,6 +4103,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4214,6 +4219,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4242,6 +4248,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5247,6 +5254,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
@ -397,6 +397,7 @@ CONFIG_BATMAN_ADV_NC=y
|
||||
# CONFIG_BATTERY_LEGO_EV3 is not set
|
||||
# CONFIG_BATTERY_MAX17040 is not set
|
||||
CONFIG_BATTERY_MAX17042=m
|
||||
CONFIG_BATTERY_MAX1721X=m
|
||||
# CONFIG_BATTERY_SBS is not set
|
||||
CONFIG_BAYCOM_EPP=m
|
||||
CONFIG_BAYCOM_PAR=m
|
||||
@ -1077,6 +1078,8 @@ CONFIG_DEV_DAX_PMEM=m
|
||||
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m
|
||||
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
|
||||
# CONFIG_DEVFREQ_THERMAL is not set
|
||||
CONFIG_DEVICE_PRIVATE=y
|
||||
CONFIG_DEVICE_PUBLIC=y
|
||||
# CONFIG_DEVKMEM is not set
|
||||
CONFIG_DEVMEM=y
|
||||
CONFIG_DEVPORT=y
|
||||
@ -1849,6 +1852,7 @@ CONFIG_HISAX_W6692=y
|
||||
CONFIG_HIST_TRIGGERS=y
|
||||
# CONFIG_HMC6352 is not set
|
||||
# CONFIG_HMC_DRV is not set
|
||||
CONFIG_HMM_MIRROR=y
|
||||
CONFIG_HOLTEK_FF=y
|
||||
# CONFIG_HOSTAP is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
@ -4078,6 +4082,7 @@ CONFIG_PWRSEQ_SIMPLE=m
|
||||
# CONFIG_QCA7000_SPI is not set
|
||||
# CONFIG_QCA7000_UART is not set
|
||||
# CONFIG_QCOM_EMAC is not set
|
||||
# CONFIG_QCOM_GLINK_SSR is not set
|
||||
# CONFIG_QCOM_HIDMA is not set
|
||||
# CONFIG_QCOM_HIDMA_MGMT is not set
|
||||
CONFIG_QEDE=m
|
||||
@ -4193,6 +4198,7 @@ CONFIG_RELAY=y
|
||||
CONFIG_RELOCATABLE=y
|
||||
CONFIG_REMOTEPROC=m
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
# CONFIG_RESET_HSDK_V1 is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
CONFIG_RFKILL_GPIO=m
|
||||
@ -4221,6 +4227,7 @@ CONFIG_ROSE=m
|
||||
CONFIG_RPCSEC_GSS_KRB5=m
|
||||
# CONFIG_RPMSG_CHAR is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
|
||||
# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set
|
||||
CONFIG_RPR0521=m
|
||||
CONFIG_RSI_91X=m
|
||||
CONFIG_RSI_DEBUGFS=y
|
||||
@ -5225,6 +5232,7 @@ CONFIG_STMMAC_ETH=m
|
||||
# CONFIG_STMMAC_PLATFORM is not set
|
||||
# CONFIG_STM_SOURCE_CONSOLE is not set
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
# CONFIG_STRING_SELFTEST is not set
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
# CONFIG_STRIP is not set
|
||||
CONFIG_SUNDANCE=m
|
||||
|
25
kernel.spec
25
kernel.spec
@ -69,7 +69,7 @@ Summary: The Linux kernel
|
||||
# The rc snapshot level
|
||||
%global rcrev 0
|
||||
# The git snapshot level
|
||||
%define gitrev 3
|
||||
%define gitrev 4
|
||||
# Set rpm version accordingly
|
||||
%define rpmversion 4.%{upstream_sublevel}.0
|
||||
%endif
|
||||
@ -187,8 +187,10 @@ Summary: The Linux kernel
|
||||
# and debuginfo generation. Currently we rely on the old alldebug setting.
|
||||
%global _build_id_links alldebug
|
||||
|
||||
# kernel PAE is only built on i686 and ARMv7.
|
||||
%ifnarch i686 armv7hl
|
||||
# kernel PAE is only built on ARMv7 in rawhide.
|
||||
# Fedora 27 and earlier still support PAE, so change this on rebases.
|
||||
# %ifnarch i686 armv7hl
|
||||
%ifnarch armv7hl
|
||||
%define with_pae 0
|
||||
%endif
|
||||
|
||||
@ -605,13 +607,6 @@ Patch310: qcom-msm89xx-fixes.patch
|
||||
|
||||
# https://patchwork.kernel.org/patch/9831825/
|
||||
# https://patchwork.kernel.org/patch/9833721/
|
||||
Patch311: arm-tegra-fix-gpu-iommu.patch
|
||||
|
||||
# https://www.spinics.net/lists/linux-arm-msm/msg28203.html
|
||||
Patch312: qcom-display-iommu.patch
|
||||
|
||||
# https://patchwork.kernel.org/patch/9839803/
|
||||
Patch313: qcom-Force-host-mode-for-USB-on-apq8016-sbc.patch
|
||||
|
||||
# http://www.spinics.net/lists/dri-devel/msg132235.html
|
||||
Patch320: bcm283x-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch
|
||||
@ -636,17 +631,10 @@ Patch601: 0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch
|
||||
Patch602: 0002-Input-soc_button_array-Suppress-power-button-presses.patch
|
||||
Patch610: 0010-Input-silead-Add-support-for-capactive-home-button-f.patch
|
||||
Patch611: 0011-Input-goodix-Add-support-for-capacitive-home-button.patch
|
||||
# These patches are queued for 4.14 and can be dropped on rebase to 4.14-rc1
|
||||
Patch603: 0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch
|
||||
Patch604: 0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch
|
||||
Patch615: 0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch
|
||||
|
||||
# rhbz 1476467
|
||||
Patch617: Fix-for-module-sig-verification.patch
|
||||
|
||||
# rhbz 1485086
|
||||
Patch619: pci-mark-amd-stoney-gpu-ats-as-broken.patch
|
||||
|
||||
# END OF PATCH DEFINITIONS
|
||||
|
||||
%endif
|
||||
@ -2201,6 +2189,9 @@ fi
|
||||
#
|
||||
#
|
||||
%changelog
|
||||
* Mon Sep 11 2017 Justin M. Forbes <jforbes@fedoraproject.org> - 4.14.0-0.rc0.git4.1
|
||||
- Linux v4.13-11197-gf007cad159e9
|
||||
|
||||
* Sat Sep 9 2017 Peter Robinson <pbrobinson@fedoraproject.org>
|
||||
- Only build ParPort support on x86
|
||||
|
||||
|
@ -1,47 +0,0 @@
|
||||
From 9b44b0b09decfbe388131a345ba780c57240a7a9 Mon Sep 17 00:00:00 2001
|
||||
From: Joerg Roedel <jroedel@suse.de>
|
||||
Date: Tue, 11 Jul 2017 15:48:00 -0500
|
||||
Subject: PCI: Mark AMD Stoney GPU ATS as broken
|
||||
|
||||
ATS is broken on this hardware and causes IOMMU stalls and system failure.
|
||||
Disable ATS on these devices to make them usable again with IOMMU enabled.
|
||||
|
||||
Note that the commit in the Fixes tag is not buggy; it just uncovers the
|
||||
problem in the hardware by increasing the ATS flush rate.
|
||||
|
||||
Link: https://lists.linuxfoundation.org/pipermail/iommu/2017-March/020836.html
|
||||
Link: https://bugzilla.redhat.com/show_bug.cgi?id=1409201
|
||||
Fixes: b1516a14657a ("iommu/amd: Implement flush queue")
|
||||
Signed-off-by: Joerg Roedel <jroedel@suse.de>
|
||||
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
|
||||
Acked-by: Alex Deucher <alexander.deucher@amd.com>
|
||||
---
|
||||
drivers/pci/quirks.c | 15 +++++++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
|
||||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
|
||||
index 6967c6b..15ee4e9 100644
|
||||
--- a/drivers/pci/quirks.c
|
||||
+++ b/drivers/pci/quirks.c
|
||||
@@ -4681,3 +4681,18 @@ static void quirk_intel_no_flr(struct pci_dev *dev)
|
||||
}
|
||||
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr);
|
||||
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr);
|
||||
+
|
||||
+#ifdef CONFIG_PCI_ATS
|
||||
+/*
|
||||
+ * Some devices have a broken ATS implementation causing IOMMU stalls.
|
||||
+ * Don't use ATS for those devices.
|
||||
+ */
|
||||
+static void quirk_no_ats(struct pci_dev *pdev)
|
||||
+{
|
||||
+ dev_info(&pdev->dev, "disabling ATS (broken on this device)\n");
|
||||
+ pdev->ats_cap = 0;
|
||||
+}
|
||||
+
|
||||
+/* AMD Stoney platform GPU */
|
||||
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_no_ats);
|
||||
+#endif /* CONFIG_PCI_ATS */
|
||||
--
|
||||
cgit v1.1
|
||||
|
@ -1,93 +0,0 @@
|
||||
From patchwork Fri Jul 14 02:20:42 2017
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: [v2] arm64: dts: qcom: Force host mode for USB on apq8016-sbc
|
||||
From: Stephen Boyd <sboyd@codeaurora.org>
|
||||
X-Patchwork-Id: 9839803
|
||||
Message-Id: <20170714022042.13886-1-sboyd@codeaurora.org>
|
||||
To: Andy Gross <andy.gross@linaro.org>
|
||||
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
|
||||
linux-arm-kernel@lists.infradead.org, Rob Clark <robdclark@gmail.com>
|
||||
Date: Thu, 13 Jul 2017 19:20:42 -0700
|
||||
|
||||
Commit ed75d6a96905 ("arm64: dts: qcom: Collapse usb support into
|
||||
one node") breaks host mode support on apq8016-sbc boards. This
|
||||
is because the mux driver (tc7usb40mu) hasn't been merged.
|
||||
Without that driver, we can't toggle the GPIO going to the mux to
|
||||
route out the D+/D- lines to the USB hub that's on the board.
|
||||
|
||||
One solution would be to totally revert this change, but that
|
||||
opens us up to other problems when two USB drivers are operating
|
||||
the same hardware block at the same time. Let's modify the DT so
|
||||
that the USB controller is always in host mode and connected to
|
||||
the hub so that things like USB keyboards and mouses work. This
|
||||
is the mode that most people prefer anyway with these devices. We
|
||||
also delete the usb-switch node because the binding was never
|
||||
accepted upstream.
|
||||
|
||||
In the future, we can add muxing support and then update the DT
|
||||
to support both modes at runtime. Patches to support this are
|
||||
already on the mailing list.
|
||||
|
||||
Fixes: ed75d6a96905 ("arm64: dts: qcom: Collapse usb support into one node")
|
||||
Reported-by: Rob Clark <robdclark@gmail.com>
|
||||
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
||||
---
|
||||
|
||||
I noticed that I accidently removed the vbus notifier part of the phy.
|
||||
Without it, we'll change settings that shouldn't changed. The thing
|
||||
that we don't have is the ID pin on this board, not the vbus. That's
|
||||
the only difference from v1.
|
||||
|
||||
arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 1 +
|
||||
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 13 ++++---------
|
||||
2 files changed, 5 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
|
||||
index d94640812194..790b7775b901 100644
|
||||
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
|
||||
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
|
||||
@@ -17,6 +17,7 @@
|
||||
function = PMIC_GPIO_FUNC_NORMAL;
|
||||
power-source = <PM8916_GPIO_VPH>;
|
||||
input-disable;
|
||||
+ output-high;
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
|
||||
index bd310ac1967a..bb9e29e6b164 100644
|
||||
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
|
||||
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
|
||||
@@ -213,11 +213,14 @@
|
||||
};
|
||||
|
||||
usb@78d9000 {
|
||||
- extcon = <&usb_id>, <&usb_id>;
|
||||
+ extcon = <&usb_id>;
|
||||
status = "okay";
|
||||
adp-disable;
|
||||
hnp-disable;
|
||||
srp-disable;
|
||||
+ dr_mode = "host";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb_sw_sel_pm>;
|
||||
ulpi {
|
||||
phy {
|
||||
v1p8-supply = <&pm8916_l7>;
|
||||
@@ -342,14 +345,6 @@
|
||||
pinctrl-0 = <&usb_id_default>;
|
||||
};
|
||||
|
||||
- usb-switch {
|
||||
- compatible = "toshiba,tc7usb40mu";
|
||||
- switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
|
||||
- extcon = <&usb_id>;
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <&usb_sw_sel_pm>;
|
||||
- };
|
||||
-
|
||||
hdmi-out {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
File diff suppressed because it is too large
Load Diff
@ -1,81 +1,3 @@
|
||||
From 283d0e00a18b294ec56f1fb904896a546704faaf Mon Sep 17 00:00:00 2001
|
||||
From: Rob Clark <robdclark@gmail.com>
|
||||
Date: Fri, 30 Jun 2017 11:47:21 -0400
|
||||
Subject: [PATCH 3/6] soc: qcom: smsm: fix of_node refcnting problem
|
||||
|
||||
of_find_node_with_property() drops the reference to the 'from' node,
|
||||
which eventually (after enough -EPROBE_DEFERs) drops the last reference
|
||||
to the node causing all sorts of fun problems, and this nice splat.
|
||||
|
||||
BUG: sleeping function called from invalid context at ../kernel/locking/mutex.c:747
|
||||
in_atomic(): 1, irqs_disabled(): 128, pid: 33, name: kworker/0:1
|
||||
4 locks held by kworker/0:1/33:
|
||||
#0: ("events"){.+.+.+}, at: [<ffff0000080fa91c>] process_one_work+0x1a4/0x728
|
||||
#1: (deferred_probe_work){+.+.+.}, at: [<ffff0000080fa91c>] process_one_work+0x1a4/0x728
|
||||
#2: (&dev->mutex){......}, at: [<ffff000008676078>] __device_attach+0x30/0x168
|
||||
#3: (devtree_lock){......}, at: [<ffff000008828fd0>] of_find_node_with_property+0x30/0xe0
|
||||
irq event stamp: 18976
|
||||
hardirqs last enabled at (18975): [<ffff00000815794c>] __down_trylock_console_sem+0x74/0xb8
|
||||
hardirqs last disabled at (18976): [<ffff0000089e26d4>] _raw_spin_lock_irqsave+0x2c/0x78
|
||||
softirqs last enabled at (16880): [<ffff0000080e0f00>] __do_softirq+0x580/0x640
|
||||
softirqs last disabled at (16871): [<ffff0000080e13a4>] irq_exit+0xe4/0x138
|
||||
CPU: 0 PID: 33 Comm: kworker/0:1 Tainted: G E 4.12.0-rc5+ #1455
|
||||
Hardware name: qualcomm dragonboard410c/dragonboard410c, BIOS 2017.07-rc1-00234-g22fa70a-dirty 06/26/2017
|
||||
Workqueue: events deferred_probe_work_func
|
||||
Call trace:
|
||||
[<ffff000008089ee0>] dump_backtrace+0x0/0x230
|
||||
[<ffff00000808a134>] show_stack+0x24/0x30
|
||||
[<ffff0000084e1944>] dump_stack+0xac/0xe8
|
||||
[<ffff00000810d7e0>] ___might_sleep+0x150/0x230
|
||||
[<ffff00000810d918>] __might_sleep+0x58/0x90
|
||||
[<ffff0000089dde18>] __mutex_lock+0x50/0x870
|
||||
[<ffff0000089de674>] mutex_lock_nested+0x3c/0x50
|
||||
[<ffff000008388ae0>] kernfs_remove+0x30/0x50
|
||||
[<ffff00000838b720>] sysfs_remove_dir+0x58/0x70
|
||||
[<ffff0000084e393c>] kobject_del+0x1c/0x58
|
||||
[<ffff0000084e374c>] kobject_put+0xb4/0x208
|
||||
[<ffff00000882c364>] of_node_put+0x24/0x30
|
||||
[<ffff000008829018>] of_find_node_with_property+0x78/0xe0
|
||||
[<ffff000000aff5f4>] qcom_smsm_probe+0x194/0x720 [smsm]
|
||||
[<ffff0000086793b4>] platform_drv_probe+0x74/0x110
|
||||
[<ffff0000086765bc>] driver_probe_device+0x2b4/0x420
|
||||
[<ffff000008676920>] __device_attach_driver+0xd0/0x150
|
||||
[<ffff000008673e78>] bus_for_each_drv+0x68/0xa8
|
||||
[<ffff00000867611c>] __device_attach+0xd4/0x168
|
||||
[<ffff000008676a1c>] device_initial_probe+0x24/0x30
|
||||
[<ffff000008675380>] bus_probe_device+0xa0/0xa8
|
||||
[<ffff000008675948>] deferred_probe_work_func+0xb8/0xf8
|
||||
[<ffff0000080fa9d4>] process_one_work+0x25c/0x728
|
||||
[<ffff0000080faef4>] worker_thread+0x54/0x3d8
|
||||
[<ffff0000081031d8>] kthread+0x110/0x140
|
||||
[<ffff000008082d90>] ret_from_fork+0x10/0x40
|
||||
OF: ERROR: Bad of_node_put() on /smsm
|
||||
CPU: 0 PID: 33 Comm: kworker/0:1 Tainted: G W E 4.12.0-rc5+ #1455
|
||||
Hardware name: qualcomm dragonboard410c/dragonboard410c, BIOS 2017.07-rc1-00234-g22fa70a-dirty 06/26/2017
|
||||
Workqueue: events deferred_probe_work_func
|
||||
|
||||
Signed-off-by: Rob Clark <robdclark@gmail.com>
|
||||
---
|
||||
drivers/soc/qcom/smsm.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/soc/qcom/smsm.c b/drivers/soc/qcom/smsm.c
|
||||
index d0337b2a71c8..a64ecd597a22 100644
|
||||
--- a/drivers/soc/qcom/smsm.c
|
||||
+++ b/drivers/soc/qcom/smsm.c
|
||||
@@ -495,7 +495,8 @@ static int qcom_smsm_probe(struct platform_device *pdev)
|
||||
if (!smsm->hosts)
|
||||
return -ENOMEM;
|
||||
|
||||
- local_node = of_find_node_with_property(pdev->dev.of_node, "#qcom,smem-state-cells");
|
||||
+ local_node = of_find_node_with_property(of_node_get(pdev->dev.of_node),
|
||||
+ "#qcom,smem-state-cells");
|
||||
if (!local_node) {
|
||||
dev_err(&pdev->dev, "no state entry\n");
|
||||
return -EINVAL;
|
||||
--
|
||||
2.13.0
|
||||
|
||||
From 40cb129048e5d2456da8d9d6468f292da3071b91 Mon Sep 17 00:00:00 2001
|
||||
From: Rob Clark <robdclark@gmail.com>
|
||||
Date: Fri, 30 Jun 2017 16:40:23 -0400
|
||||
@ -107,32 +29,3 @@ index b1449ad67fc0..22ad37c9808c 100644
|
||||
|
||||
--
|
||||
2.13.0
|
||||
|
||||
From ae9b4fa55748cc9ce3c8ac039e46feab7257eff9 Mon Sep 17 00:00:00 2001
|
||||
From: Rob Clark <robdclark@gmail.com>
|
||||
Date: Sun, 2 Jul 2017 09:23:36 -0400
|
||||
Subject: [PATCH 5/6] soc: qcom: wcnss_ctrl: add missing MODULE_DEVICE_TABLE()
|
||||
|
||||
This fixes a problem of wifi module not loading on db410c.
|
||||
|
||||
Signed-off-by: Rob Clark <robdclark@gmail.com>
|
||||
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
---
|
||||
drivers/soc/qcom/wcnss_ctrl.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/drivers/soc/qcom/wcnss_ctrl.c b/drivers/soc/qcom/wcnss_ctrl.c
|
||||
index b9069184df19..d008e5b82db4 100644
|
||||
--- a/drivers/soc/qcom/wcnss_ctrl.c
|
||||
+++ b/drivers/soc/qcom/wcnss_ctrl.c
|
||||
@@ -347,6 +347,7 @@ static const struct of_device_id wcnss_ctrl_of_match[] = {
|
||||
{ .compatible = "qcom,wcnss", },
|
||||
{}
|
||||
};
|
||||
+MODULE_DEVICE_TABLE(of, wcnss_ctrl_of_match);
|
||||
|
||||
static struct rpmsg_driver wcnss_ctrl_driver = {
|
||||
.probe = wcnss_ctrl_probe,
|
||||
--
|
||||
2.13.0
|
||||
|
||||
|
2
sources
2
sources
@ -1,3 +1,3 @@
|
||||
SHA512 (linux-4.13.tar.xz) = a557c2f0303ae618910b7106ff63d9978afddf470f03cb72aa748213e099a0ecd5f3119aea6cbd7b61df30ca6ef3ec57044d524b7babbaabddf8b08b8bafa7d2
|
||||
SHA512 (perf-man-4.13.tar.gz) = 9bcc2cd8e56ec583ed2d8e0b0c88e7a94035a1915e40b3177bb02d6c0f10ddd4df9b097b1f5af59efc624226b613e240ddba8ddc2156f3682f992d5455fc5c03
|
||||
SHA512 (patch-4.13-git3.xz) = ca51994da2a499037f331d554450ace9409c62ac799f1296775ec2466d22660927b9299a65657e8843ee452626cc7da85c691570308c10e847a5a6632ad30a99
|
||||
SHA512 (patch-4.13-git4.xz) = 7047893f6d929a03c0ed7c40286c349442d4ec3039876d90750e3f27e4b29413869cb379b8b6e4ec98dc4e41258fdea231c0650fa24a632a715507e979e141cb
|
||||
|
Loading…
Reference in New Issue
Block a user