49 lines
1.7 KiB
Diff
49 lines
1.7 KiB
Diff
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From e1e06db0fb0ae8cfc2b3dc9c08b3237a050e2789 Mon Sep 17 00:00:00 2001
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From: Matt Porter <mporter@ti.com>
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Date: Thu, 7 Mar 2013 04:16:38 +0000
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Subject: [PATCH 04/13] mmc: omap_hsmmc: set max_segs based on dma engine
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limits
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The EDMA DMAC has a hardware limitation that prevents supporting
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scatter gather lists with any number of segments. The DMA Engine
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API reports the maximum number of segments a channel can support
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via the optional dma_get_slave_sg_limits() API. If the max_nr_segs
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limit is present, the value is used to configure mmc->max_segs
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appropriately.
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Signed-off-by: Matt Porter <mporter@ti.com>
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Acked-by: Tony Lindgren <tony@atomide.com>
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---
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drivers/mmc/host/omap_hsmmc.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
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index 1865321..1f9ff97 100644
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--- a/drivers/mmc/host/omap_hsmmc.c
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+++ b/drivers/mmc/host/omap_hsmmc.c
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@@ -1776,6 +1776,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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const struct of_device_id *match;
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dma_cap_mask_t mask;
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unsigned tx_req, rx_req;
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+ struct dma_slave_sg_limits *dma_sg_limits;
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struct pinctrl *pinctrl;
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match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
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@@ -1952,6 +1953,13 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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goto err_irq;
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}
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+ /* Some DMA Engines only handle a limited number of SG segments */
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+ dma_sg_limits = dma_get_slave_sg_limits(host->rx_chan,
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+ DMA_SLAVE_BUSWIDTH_4_BYTES,
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+ mmc->max_blk_size / 4);
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+ if (dma_sg_limits && dma_sg_limits->max_seg_nr)
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+ mmc->max_segs = dma_sg_limits->max_seg_nr;
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+
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/* Request IRQ for MMC operations */
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ret = request_irq(host->irq, omap_hsmmc_irq, 0,
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mmc_hostname(mmc), host);
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--
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1.8.2.1
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