624 lines
17 KiB
Diff
624 lines
17 KiB
Diff
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From patchwork Thu Sep 5 14:51:12 2019
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Thu, 05 Sep 2019 07:51:14 -0700 (PDT)
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From: Lee Jones <lee.jones@linaro.org>
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To: agross@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
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bjorn.andersson@linaro.org, arnd@arndb.de
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Subject: [PATCH v4 1/1] arm64: dts: qcom: Add Lenovo Yoga C630
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Date: Thu, 5 Sep 2019 15:51:12 +0100
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From: Bjorn Andersson <bjorn.andersson@linaro.org>
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The Lenovo Yoga C630 is built on the SDM850 from Qualcomm, but this seem
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to be similar enough to the SDM845 that we can reuse the sdm845.dtsi.
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Supported by this patch is: keyboard, battery monitoring, UFS storage,
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USB host and Bluetooth.
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Reviewed-by: Vinod Koul <vkoul@kernel.org>
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Acked-by: Sudeep Holla <sudeep.holla@arm.com>
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[Lee] Reorder, change licence, remove non-upstream device node
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Signed-off-by: Lee Jones <lee.jones@linaro.org>
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---
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Changelog:
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* Reorder nodes alphabetically
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* Remove superfluous node for driver not yet upstream
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* Add (then remove) 'no-dma' property
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* Change licence to BSD
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arch/arm64/boot/dts/qcom/Makefile | 1 +
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.../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 446 ++++++++++++++++++
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2 files changed, 447 insertions(+)
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create mode 100644 arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
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diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
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index 0a7e5dfce6f7..670c6c65f9e9 100644
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--- a/arch/arm64/boot/dts/qcom/Makefile
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+++ b/arch/arm64/boot/dts/qcom/Makefile
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@@ -12,5 +12,6 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
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+dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
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dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
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dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
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diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
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new file mode 100644
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index 000000000000..ded120d3aef5
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--- /dev/null
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+++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
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@@ -0,0 +1,446 @@
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+// SPDX-License-Identifier: BSD-3-Clause
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+/*
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+ * Lenovo Yoga C630
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+ *
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+ * Copyright (c) 2019, Linaro Ltd.
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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+#include "sdm845.dtsi"
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+#include "pm8998.dtsi"
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+
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+/ {
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+ model = "Lenovo Yoga C630";
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+ compatible = "lenovo,yoga-c630", "qcom,sdm845";
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+
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+ aliases {
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+ hsuart0 = &uart6;
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+ };
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+};
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+
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+&apps_rsc {
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+ pm8998-rpmh-regulators {
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+ compatible = "qcom,pm8998-rpmh-regulators";
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+ qcom,pmic-id = "a";
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+
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+ vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
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+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
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+
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+ vreg_s2a_1p125: smps2 {
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+ };
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+
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+ vreg_s3a_1p35: smps3 {
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+ regulator-min-microvolt = <1352000>;
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+ regulator-max-microvolt = <1352000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vreg_s4a_1p8: smps4 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vreg_s5a_2p04: smps5 {
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+ regulator-min-microvolt = <2040000>;
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+ regulator-max-microvolt = <2040000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vreg_s7a_1p025: smps7 {
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+ };
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+
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+ vdd_qusb_hs0:
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+ vdda_hp_pcie_core:
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+ vdda_mipi_csi0_0p9:
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+ vdda_mipi_csi1_0p9:
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+ vdda_mipi_csi2_0p9:
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+ vdda_mipi_dsi0_pll:
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+ vdda_mipi_dsi1_pll:
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+ vdda_qlink_lv:
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+ vdda_qlink_lv_ck:
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+ vdda_qrefs_0p875:
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+ vdda_pcie_core:
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+ vdda_pll_cc_ebi01:
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+ vdda_pll_cc_ebi23:
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+ vdda_sp_sensor:
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+ vdda_ufs1_core:
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+ vdda_ufs2_core:
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+ vdda_usb1_ss_core:
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+ vdda_usb2_ss_core:
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+ vreg_l1a_0p875: ldo1 {
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+ regulator-min-microvolt = <880000>;
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+ regulator-max-microvolt = <880000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vddpx_10:
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+ vreg_l2a_1p2: ldo2 {
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+ regulator-min-microvolt = <1200000>;
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+ regulator-max-microvolt = <1200000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ regulator-always-on;
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+ };
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+
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+ vreg_l3a_1p0: ldo3 {
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+ };
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+
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+ vdd_wcss_cx:
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+ vdd_wcss_mx:
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+ vdda_wcss_pll:
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+ vreg_l5a_0p8: ldo5 {
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <800000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vddpx_13:
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+ vreg_l6a_1p8: ldo6 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vreg_l7a_1p8: ldo7 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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+ };
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+
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+ vreg_l8a_1p2: ldo8 {
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+ };
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+
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||
|
+ vreg_l9a_1p8: ldo9 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l10a_1p8: ldo10 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l11a_1p0: ldo11 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vdd_qfprom:
|
||
|
+ vdd_qfprom_sp:
|
||
|
+ vdda_apc1_cs_1p8:
|
||
|
+ vdda_gfx_cs_1p8:
|
||
|
+ vdda_qrefs_1p8:
|
||
|
+ vdda_qusb_hs0_1p8:
|
||
|
+ vddpx_11:
|
||
|
+ vreg_l12a_1p8: ldo12 {
|
||
|
+ regulator-min-microvolt = <1800000>;
|
||
|
+ regulator-max-microvolt = <1800000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vddpx_2:
|
||
|
+ vreg_l13a_2p95: ldo13 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l14a_1p88: ldo14 {
|
||
|
+ regulator-min-microvolt = <1880000>;
|
||
|
+ regulator-max-microvolt = <1880000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ regulator-always-on;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l15a_1p8: ldo15 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l16a_2p7: ldo16 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l17a_1p3: ldo17 {
|
||
|
+ regulator-min-microvolt = <1304000>;
|
||
|
+ regulator-max-microvolt = <1304000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l18a_2p7: ldo18 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l19a_3p0: ldo19 {
|
||
|
+ regulator-min-microvolt = <3100000>;
|
||
|
+ regulator-max-microvolt = <3108000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l20a_2p95: ldo20 {
|
||
|
+ regulator-min-microvolt = <2960000>;
|
||
|
+ regulator-max-microvolt = <2960000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l21a_2p95: ldo21 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l22a_2p85: ldo22 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l23a_3p3: ldo23 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vdda_qusb_hs0_3p1:
|
||
|
+ vreg_l24a_3p075: ldo24 {
|
||
|
+ regulator-min-microvolt = <3075000>;
|
||
|
+ regulator-max-microvolt = <3083000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l25a_3p3: ldo25 {
|
||
|
+ regulator-min-microvolt = <3104000>;
|
||
|
+ regulator-max-microvolt = <3112000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vdda_hp_pcie_1p2:
|
||
|
+ vdda_hv_ebi0:
|
||
|
+ vdda_hv_ebi1:
|
||
|
+ vdda_hv_ebi2:
|
||
|
+ vdda_hv_ebi3:
|
||
|
+ vdda_mipi_csi_1p25:
|
||
|
+ vdda_mipi_dsi0_1p2:
|
||
|
+ vdda_mipi_dsi1_1p2:
|
||
|
+ vdda_pcie_1p2:
|
||
|
+ vdda_ufs1_1p2:
|
||
|
+ vdda_ufs2_1p2:
|
||
|
+ vdda_usb1_ss_1p2:
|
||
|
+ vdda_usb2_ss_1p2:
|
||
|
+ vreg_l26a_1p2: ldo26 {
|
||
|
+ regulator-min-microvolt = <1200000>;
|
||
|
+ regulator-max-microvolt = <1208000>;
|
||
|
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_l28a_3p0: ldo28 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_lvs1a_1p8: lvs1 {
|
||
|
+ };
|
||
|
+
|
||
|
+ vreg_lvs2a_1p8: lvs2 {
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&apps_smmu {
|
||
|
+ /* TODO: Figure out how to survive booting with this enabled */
|
||
|
+ status = "disabled";
|
||
|
+};
|
||
|
+
|
||
|
+&gcc {
|
||
|
+ protected-clocks = <GCC_QSPI_CORE_CLK>,
|
||
|
+ <GCC_QSPI_CORE_CLK_SRC>,
|
||
|
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
|
||
|
+};
|
||
|
+
|
||
|
+&i2c1 {
|
||
|
+ status = "okay";
|
||
|
+ clock-frequency = <400000>;
|
||
|
+};
|
||
|
+
|
||
|
+&i2c3 {
|
||
|
+ status = "okay";
|
||
|
+ clock-frequency = <400000>;
|
||
|
+
|
||
|
+ hid@15 {
|
||
|
+ compatible = "hid-over-i2c";
|
||
|
+ reg = <0x15>;
|
||
|
+ hid-descr-addr = <0x1>;
|
||
|
+
|
||
|
+ interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
|
||
|
+ };
|
||
|
+
|
||
|
+ hid@2c {
|
||
|
+ compatible = "hid-over-i2c";
|
||
|
+ reg = <0x2c>;
|
||
|
+ hid-descr-addr = <0x20>;
|
||
|
+
|
||
|
+ interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&i2c2_hid_active>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&i2c5 {
|
||
|
+ status = "okay";
|
||
|
+ clock-frequency = <400000>;
|
||
|
+
|
||
|
+ hid@10 {
|
||
|
+ compatible = "hid-over-i2c";
|
||
|
+ reg = <0x10>;
|
||
|
+ hid-descr-addr = <0x1>;
|
||
|
+
|
||
|
+ interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&i2c6_hid_active>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&i2c11 {
|
||
|
+ status = "okay";
|
||
|
+ clock-frequency = <400000>;
|
||
|
+
|
||
|
+ hid@5c {
|
||
|
+ compatible = "hid-over-i2c";
|
||
|
+ reg = <0x5c>;
|
||
|
+ hid-descr-addr = <0x1>;
|
||
|
+
|
||
|
+ interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&i2c12_hid_active>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&qup_i2c12_default {
|
||
|
+ drive-strength = <2>;
|
||
|
+ bias-disable;
|
||
|
+};
|
||
|
+
|
||
|
+&qup_uart6_default {
|
||
|
+ pinmux {
|
||
|
+ pins = "gpio45", "gpio46", "gpio47", "gpio48";
|
||
|
+ function = "qup6";
|
||
|
+ };
|
||
|
+
|
||
|
+ cts {
|
||
|
+ pins = "gpio45";
|
||
|
+ bias-pull-down;
|
||
|
+ };
|
||
|
+
|
||
|
+ rts-tx {
|
||
|
+ pins = "gpio46", "gpio47";
|
||
|
+ drive-strength = <2>;
|
||
|
+ bias-disable;
|
||
|
+ };
|
||
|
+
|
||
|
+ rx {
|
||
|
+ pins = "gpio48";
|
||
|
+ bias-pull-up;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&qupv3_id_0 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&qupv3_id_1 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&tlmm {
|
||
|
+ gpio-reserved-ranges = <0 4>, <81 4>;
|
||
|
+
|
||
|
+ i2c2_hid_active: i2c2-hid-active {
|
||
|
+ pins = <37>;
|
||
|
+ function = "gpio";
|
||
|
+
|
||
|
+ input-enable;
|
||
|
+ bias-pull-up;
|
||
|
+ drive-strength = <2>;
|
||
|
+ };
|
||
|
+
|
||
|
+ i2c6_hid_active: i2c6-hid-active {
|
||
|
+ pins = <125>;
|
||
|
+ function = "gpio";
|
||
|
+
|
||
|
+ input-enable;
|
||
|
+ bias-pull-up;
|
||
|
+ drive-strength = <2>;
|
||
|
+ };
|
||
|
+
|
||
|
+ i2c12_hid_active: i2c12-hid-active {
|
||
|
+ pins = <92>;
|
||
|
+ function = "gpio";
|
||
|
+
|
||
|
+ input-enable;
|
||
|
+ bias-pull-up;
|
||
|
+ drive-strength = <2>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&uart6 {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ bluetooth {
|
||
|
+ compatible = "qcom,wcn3990-bt";
|
||
|
+
|
||
|
+ vddio-supply = <&vreg_s4a_1p8>;
|
||
|
+ vddxo-supply = <&vreg_l7a_1p8>;
|
||
|
+ vddrf-supply = <&vreg_l17a_1p3>;
|
||
|
+ vddch0-supply = <&vreg_l25a_3p3>;
|
||
|
+ max-speed = <3200000>;
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&ufs_mem_hc {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vcc-supply = <&vreg_l20a_2p95>;
|
||
|
+ vcc-max-microamp = <600000>;
|
||
|
+};
|
||
|
+
|
||
|
+&ufs_mem_phy {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vdda-phy-supply = <&vdda_ufs1_core>;
|
||
|
+ vdda-pll-supply = <&vdda_ufs1_1p2>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_1 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_1_dwc3 {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_1_hsphy {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vdd-supply = <&vdda_usb1_ss_core>;
|
||
|
+ vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
|
||
|
+ vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
|
||
|
+
|
||
|
+ qcom,imp-res-offset-value = <8>;
|
||
|
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
|
||
|
+ qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
|
||
|
+ qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_1_qmpphy {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vdda-phy-supply = <&vdda_usb1_ss_1p2>;
|
||
|
+ vdda-pll-supply = <&vdda_usb1_ss_core>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_2 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_2_dwc3 {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_2_hsphy {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vdd-supply = <&vdda_usb2_ss_core>;
|
||
|
+ vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
|
||
|
+ vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
|
||
|
+
|
||
|
+ qcom,imp-res-offset-value = <8>;
|
||
|
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_2_qmpphy {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ vdda-phy-supply = <&vdda_usb2_ss_1p2>;
|
||
|
+ vdda-pll-supply = <&vdda_usb2_ss_core>;
|
||
|
+};
|