Fix incorrect inline feraiseexcept on i686, x86-64 (#2183081)
Resolves: #2183081
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35
glibc-rh2183081-1.patch
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35
glibc-rh2183081-1.patch
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commit 5d1ccdda7b0c625751661d50977f3dfbc73f8eae
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Author: Florian Weimer <fweimer@redhat.com>
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Date: Mon Apr 3 17:23:11 2023 +0200
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x86_64: Fix asm constraints in feraiseexcept (bug 30305)
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The divss instruction clobbers its first argument, and the constraints
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need to reflect that. Fortunately, with GCC 12, generated code does
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not actually change, so there is no externally visible bug.
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Suggested-by: Jakub Jelinek <jakub@redhat.com>
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Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
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diff --git a/sysdeps/x86_64/fpu/fraiseexcpt.c b/sysdeps/x86_64/fpu/fraiseexcpt.c
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index ca1c223053bf016b..fb886ed540b52100 100644
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--- a/sysdeps/x86_64/fpu/fraiseexcpt.c
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+++ b/sysdeps/x86_64/fpu/fraiseexcpt.c
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@@ -33,7 +33,7 @@ __feraiseexcept (int excepts)
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/* One example of an invalid operation is 0.0 / 0.0. */
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float f = 0.0;
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- __asm__ __volatile__ ("divss %0, %0 " : : "x" (f));
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+ __asm__ __volatile__ ("divss %0, %0 " : "+x" (f));
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(void) &f;
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}
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@@ -43,7 +43,7 @@ __feraiseexcept (int excepts)
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float f = 1.0;
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float g = 0.0;
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- __asm__ __volatile__ ("divss %1, %0" : : "x" (f), "x" (g));
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+ __asm__ __volatile__ ("divss %1, %0" : "+x" (f) : "x" (g));
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(void) &f;
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}
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28
glibc-rh2183081-2.patch
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glibc-rh2183081-2.patch
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Apply a fix similar to upstream commit 5d1ccdda7b0c625751661d50977f3dfbc73f8eae
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to the installed header file. Upstream, the header file has been removed
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in its uncorrected state, so there is no upstream fix to backport.
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Suggested by Jakub Jelinek.
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diff --git a/sysdeps/x86/fpu/bits/fenv.h b/sysdeps/x86/fpu/bits/fenv.h
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index 4103982d8c8ae014..4ae2d2a04c6754bd 100644
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--- a/sysdeps/x86/fpu/bits/fenv.h
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+++ b/sysdeps/x86/fpu/bits/fenv.h
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@@ -132,7 +132,7 @@ __NTH (__feraiseexcept_invalid_divbyzero (int __excepts))
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float __f = 0.0;
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# ifdef __SSE_MATH__
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- __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f));
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+ __asm__ __volatile__ ("divss %0, %0 " : "+x" (__f));
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# else
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__asm__ __volatile__ ("fdiv %%st, %%st(0); fwait"
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: "=t" (__f) : "0" (__f));
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@@ -145,7 +145,7 @@ __NTH (__feraiseexcept_invalid_divbyzero (int __excepts))
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float __g = 0.0;
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# ifdef __SSE_MATH__
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- __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g));
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+ __asm__ __volatile__ ("divss %1, %0" : "+x" (__f) : "x" (__g));
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# else
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__asm__ __volatile__ ("fdivp %%st, %%st(1); fwait"
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: "=t" (__f) : "0" (__f), "u" (__g) : "st(1)");
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@ -1,6 +1,6 @@
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%define glibcsrcdir glibc-2.28
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%define glibcversion 2.28
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%define glibcrelease 225%{?dist}
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%define glibcrelease 226%{?dist}
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# Pre-release tarballs are pulled in from git using a command that is
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# effectively:
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#
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@ -1031,6 +1031,8 @@ Patch838: glibc-rh2142937-3.patch
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Patch839: glibc-rh2144568.patch
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Patch840: glibc-rh2154914-1.patch
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Patch841: glibc-rh2154914-2.patch
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Patch842: glibc-rh2183081-1.patch
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Patch843: glibc-rh2183081-2.patch
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##############################################################################
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# Continued list of core "glibc" package information:
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@ -2861,6 +2863,9 @@ fi
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%files -f compat-libpthread-nonshared.filelist -n compat-libpthread-nonshared
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%changelog
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* Wed May 3 2023 Florian Weimer <fweimer@redhat.com> - 2.28-226
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- Fix incorrect inline feraiseexcept on i686, x86-64 (#2183081)
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* Fri Jan 20 2023 Florian Weimer <fweimer@redhat.com> - 2.28-225
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- Enforce a specififc internal ordering for tunables (#2154914)
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