7db944e3bd
- Fix build on non-standard rpm-devel includes (Robert Scheck, BZ 442449).
- Do not run the PIE mode for the testsuite during `--with upstream'.
- Fix test of the crash on a sw watchpoint condition getting out of the
scope.
155 lines
5.7 KiB
Diff
155 lines
5.7 KiB
Diff
2005-07-08 Jeff Johnston <jjohnstn@redhat.com>
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* ia64-tdep.c (ia64_sigtramp_frame_prev_register): Build
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pseudo-registers the same as ia64_pseudo_register_read.
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2008-04-16 Yi Zhan <yi.zhan@intel.com>
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* ia64-tdep.c (ia64_sigtramp_frame_prev_register): Fix an
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ISO C compliance compilation error.
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--- gdb-6.3/gdb/ia64-tdep.c.fix 2005-07-08 20:26:37.000000000 -0400
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+++ gdb-6.3/gdb/ia64-tdep.c 2005-07-08 20:27:41.000000000 -0400
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@@ -2037,7 +2037,100 @@ ia64_sigtramp_frame_prev_register (struc
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pc &= ~0xf;
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store_unsigned_integer (valuep, 8, pc);
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}
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- else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
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+ else if (IA64_NAT0_REGNUM <= regnum && regnum <= IA64_NAT31_REGNUM)
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+ {
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+ /* NAT pseudo registers 0-31: get them from UNAT.
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+ * "copied" from ia64_pseudo_register_read() */
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+ CORE_ADDR addr = 0;
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+ ULONGEST unatN_val;
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+ ULONGEST unat;
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+ read_memory (cache->saved_regs[IA64_UNAT_REGNUM], (char *) &unat,
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+ register_size (current_gdbarch, IA64_UNAT_REGNUM));
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+ unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0;
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+ store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
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+ unatN_val);
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+ *lvalp = lval_memory;
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+ *addrp = cache->saved_regs[IA64_UNAT_REGNUM];
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+ }
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+ else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM)
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+ {
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+ /* NAT pseudo registers 32-127.
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+ * "copied" from ia64_pseudo_register_read()
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+ * FIXME: Not currently tested -- cannot get the frame to include
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+ * NAT32-NAT127. */
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+ ULONGEST bsp;
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+ ULONGEST cfm;
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+ ULONGEST natN_val = 0;
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+ CORE_ADDR gr_addr = 0, nat_addr = 0;
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+
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+ read_memory (cache->saved_regs[IA64_BSP_REGNUM], (char *) &bsp,
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+ register_size (current_gdbarch, IA64_BSP_REGNUM));
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+ read_memory (cache->saved_regs[IA64_CFM_REGNUM], (char *) &cfm,
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+ register_size (current_gdbarch, IA64_CFM_REGNUM));
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+
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+ /* The bsp points at the end of the register frame so we
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+ subtract the size of frame from it to get start of register frame. */
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+ bsp = rse_address_add (bsp, -(cfm & 0x7f));
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+
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+ if ((cfm & 0x7f) > regnum - V32_REGNUM)
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+ gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
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+
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+ if (gr_addr != 0)
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+ {
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+ /* Compute address of nat collection bits */
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+ CORE_ADDR nat_collection;
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+ int nat_bit;
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+ nat_addr = gr_addr | 0x1f8;
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+ /* If our nat collection address is bigger than bsp, we have to get
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+ the nat collection from rnat. Otherwise, we fetch the nat
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+ collection from the computed address. FIXME: Do not know if
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+ RNAT can be not stored in the frame--being extra cautious. */
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+ if (nat_addr >= bsp)
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+ {
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+ nat_addr = cache->saved_regs[IA64_RNAT_REGNUM];
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+ if (nat_addr != 0)
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+ read_memory (nat_addr, (char *) &nat_collection,
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+ register_size (current_gdbarch, IA64_RNAT_REGNUM));
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+ }
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+ else
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+ nat_collection = read_memory_integer (nat_addr, 8);
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+ if (nat_addr != 0)
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+ {
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+ nat_bit = (gr_addr >> 3) & 0x3f;
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+ natN_val = (nat_collection >> nat_bit) & 1;
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+ *lvalp = lval_memory;
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+ *addrp = nat_addr;
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+ store_unsigned_integer (valuep,
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+ register_size (current_gdbarch, regnum),
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+ natN_val);
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+ }
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+ }
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+ }
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+ else if (regnum == VBOF_REGNUM)
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+ {
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+ /* BOF pseudo register.
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+ * "copied" from ia64_pseudo_register_read()
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+ *
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+ * A virtual register frame start is provided for user convenience.
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+ * It can be calculated as the bsp - sof (sizeof frame). */
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+ ULONGEST bsp;
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+ ULONGEST cfm;
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+ ULONGEST bof;
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+
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+ read_memory (cache->saved_regs[IA64_BSP_REGNUM], (char *) &bsp,
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+ register_size (current_gdbarch, IA64_BSP_REGNUM));
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+ read_memory (cache->saved_regs[IA64_CFM_REGNUM], (char *) &cfm,
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+ register_size (current_gdbarch, IA64_CFM_REGNUM));
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+
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+ /* The bsp points at the end of the register frame so we
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+ subtract the size of frame from it to get beginning of frame. */
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+ bof = rse_address_add (bsp, -(cfm & 0x7f));
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+
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+ store_unsigned_integer (valuep, register_size (current_gdbarch, regnum), bof);
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+ *lvalp = lval_memory;
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+ *addrp = 0; // NOTE: pseudo reg not a anywhere really...
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+ }
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+ else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM) ||
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(regnum >= V32_REGNUM && regnum <= V127_REGNUM))
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{
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CORE_ADDR addr = 0;
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@@ -2051,6 +2144,39 @@ ia64_sigtramp_frame_prev_register (struc
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read_memory (addr, valuep, register_size (current_gdbarch, regnum));
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}
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}
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+ else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM)
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+ {
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+ /* VP 0-63.
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+ * "copied" from ia64_pseudo_register_read()
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+ *
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+ * FIXME: Not currently tested--cannot get the frame to include PR. */
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+ CORE_ADDR pr_addr = 0;
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+
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+ pr_addr = cache->saved_regs[IA64_PR_REGNUM];
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+ if (pr_addr != 0)
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+ {
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+ ULONGEST pr;
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+ ULONGEST cfm;
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+ ULONGEST prN_val;
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+ read_memory (pr_addr, (char *) &pr,
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+ register_size (current_gdbarch, IA64_PR_REGNUM));
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+ read_memory (cache->saved_regs[IA64_CFM_REGNUM], (char *) &cfm,
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+ register_size (current_gdbarch, IA64_CFM_REGNUM));
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+
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+ /* Get the register rename base for this frame and adjust the
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+ * register name to take rotation into account. */
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+ if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
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+ {
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+ int rrb_pr = (cfm >> 32) & 0x3f;
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+ regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
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+ }
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+ prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
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+ store_unsigned_integer (valuep, register_size (current_gdbarch, regnum),
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+ prN_val);
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+ *lvalp = lval_memory;
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+ *addrp = pr_addr;
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+ }
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+ }
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else
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{
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/* All other registers not listed above. */
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