232 lines
8.5 KiB
Diff
232 lines
8.5 KiB
Diff
2015-04-17 Jakub Jelinek <jakub@redhat.com>
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PR target/65689
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* genpreds.c (struct constraint_data): Add maybe_allows_reg and
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maybe_allows_mem bitfields.
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(maybe_allows_none_start, maybe_allows_none_end,
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maybe_allows_reg_start, maybe_allows_reg_end, maybe_allows_mem_start,
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maybe_allows_mem_end): New variables.
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(compute_maybe_allows): New function.
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(add_constraint): Use it to initialize maybe_allows_reg and
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maybe_allows_mem fields.
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(choose_enum_order): Sort the non-is_register/is_const_int/is_memory/
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is_address constraints such that those that allow neither mem nor
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reg come first, then those that only allow reg but not mem, then
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those that only allow mem but not reg, then the rest.
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(write_allows_reg_mem_function): New function.
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(write_tm_preds_h): Call it.
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* stmt.c (parse_output_constraint, parse_input_constraint): Use
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the generated insn_extra_constraint_allows_reg_mem function
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instead of always setting *allows_reg = true; *allows_mem = true;
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for unknown extra constraints.
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* gcc.target/aarch64/c-output-template-4.c: New test.
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--- gcc/genpreds.c.jj 2015-04-08 18:23:50.643556230 +0200
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+++ gcc/genpreds.c 2015-04-17 17:44:23.097650110 +0200
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@@ -640,12 +640,14 @@ struct constraint_data
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const char *regclass; /* for register constraints */
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rtx exp; /* for other constraints */
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unsigned int lineno; /* line of definition */
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- unsigned int is_register : 1;
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- unsigned int is_const_int : 1;
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- unsigned int is_const_dbl : 1;
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- unsigned int is_extra : 1;
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- unsigned int is_memory : 1;
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- unsigned int is_address : 1;
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+ unsigned int is_register : 1;
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+ unsigned int is_const_int : 1;
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+ unsigned int is_const_dbl : 1;
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+ unsigned int is_extra : 1;
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+ unsigned int is_memory : 1;
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+ unsigned int is_address : 1;
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+ unsigned int maybe_allows_reg : 1;
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+ unsigned int maybe_allows_mem : 1;
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};
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/* Overview of all constraints beginning with a given letter. */
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@@ -691,6 +693,9 @@ static unsigned int satisfied_start;
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static unsigned int const_int_start, const_int_end;
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static unsigned int memory_start, memory_end;
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static unsigned int address_start, address_end;
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+static unsigned int maybe_allows_none_start, maybe_allows_none_end;
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+static unsigned int maybe_allows_reg_start, maybe_allows_reg_end;
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+static unsigned int maybe_allows_mem_start, maybe_allows_mem_end;
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/* Convert NAME, which contains angle brackets and/or underscores, to
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a string that can be used as part of a C identifier. The string
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@@ -711,6 +716,34 @@ mangle (const char *name)
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return XOBFINISH (rtl_obstack, const char *);
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}
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+/* Return a bitmask, bit 1 if EXP maybe allows a REG/SUBREG, 2 if EXP
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+ maybe allows a MEM. Bits should be clear only when we are sure it
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+ will not allow a REG/SUBREG or a MEM. */
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+static int
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+compute_maybe_allows (rtx exp)
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+{
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+ switch (GET_CODE (exp))
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+ {
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+ case IF_THEN_ELSE:
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+ /* Conservative answer is like IOR, of the THEN and ELSE branches. */
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+ return compute_maybe_allows (XEXP (exp, 1))
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+ | compute_maybe_allows (XEXP (exp, 2));
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+ case AND:
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+ return compute_maybe_allows (XEXP (exp, 0))
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+ & compute_maybe_allows (XEXP (exp, 1));
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+ case IOR:
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+ return compute_maybe_allows (XEXP (exp, 0))
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+ | compute_maybe_allows (XEXP (exp, 1));
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+ case MATCH_CODE:
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+ if (*XSTR (exp, 1) == '\0')
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+ return (strstr (XSTR (exp, 0), "reg") != NULL ? 1 : 0)
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+ | (strstr (XSTR (exp, 0), "mem") != NULL ? 2 : 0);
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+ /* FALLTHRU */
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+ default:
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+ return 3;
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+ }
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+}
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+
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/* Add one constraint, of any sort, to the tables. NAME is its name;
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REGCLASS is the register class, if any; EXP is the expression to
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test, if any; IS_MEMORY and IS_ADDRESS indicate memory and address
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@@ -866,6 +899,11 @@ add_constraint (const char *name, const
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c->is_extra = !(regclass || is_const_int || is_const_dbl);
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c->is_memory = is_memory;
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c->is_address = is_address;
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+ int maybe_allows = 3;
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+ if (exp)
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+ maybe_allows = compute_maybe_allows (exp);
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+ c->maybe_allows_reg = (maybe_allows & 1) != 0;
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+ c->maybe_allows_mem = (maybe_allows & 2) != 0;
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c->next_this_letter = *slot;
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*slot = c;
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@@ -940,8 +978,30 @@ choose_enum_order (void)
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enum_order[next++] = c;
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address_end = next;
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+ maybe_allows_none_start = next;
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+ FOR_ALL_CONSTRAINTS (c)
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+ if (!c->is_register && !c->is_const_int && !c->is_memory && !c->is_address
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+ && !c->maybe_allows_reg && !c->maybe_allows_mem)
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+ enum_order[next++] = c;
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+ maybe_allows_none_end = next;
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+
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+ maybe_allows_reg_start = next;
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+ FOR_ALL_CONSTRAINTS (c)
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+ if (!c->is_register && !c->is_const_int && !c->is_memory && !c->is_address
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+ && c->maybe_allows_reg && !c->maybe_allows_mem)
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+ enum_order[next++] = c;
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+ maybe_allows_reg_end = next;
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+
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+ maybe_allows_mem_start = next;
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+ FOR_ALL_CONSTRAINTS (c)
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+ if (!c->is_register && !c->is_const_int && !c->is_memory && !c->is_address
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+ && !c->maybe_allows_reg && c->maybe_allows_mem)
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+ enum_order[next++] = c;
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+ maybe_allows_mem_end = next;
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+
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FOR_ALL_CONSTRAINTS (c)
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- if (!c->is_register && !c->is_const_int && !c->is_memory && !c->is_address)
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+ if (!c->is_register && !c->is_const_int && !c->is_memory && !c->is_address
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+ && c->maybe_allows_reg && c->maybe_allows_mem)
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enum_order[next++] = c;
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gcc_assert (next == num_constraints);
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}
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@@ -1229,6 +1289,41 @@ write_range_function (const char *name,
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"}\n\n", name);
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}
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+/* Write a definition for insn_extra_constraint_allows_reg_mem function. */
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+static void
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+write_allows_reg_mem_function (void)
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+{
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+ printf ("static inline void\n"
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+ "insn_extra_constraint_allows_reg_mem (enum constraint_num c,\n"
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+ "\t\t\t\t bool *allows_reg, bool *allows_mem)\n"
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+ "{\n");
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+ if (maybe_allows_none_start != maybe_allows_none_end)
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+ printf (" if (c >= CONSTRAINT_%s && c <= CONSTRAINT_%s)\n"
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+ " return;\n",
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+ enum_order[maybe_allows_none_start]->c_name,
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+ enum_order[maybe_allows_none_end - 1]->c_name);
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+ if (maybe_allows_reg_start != maybe_allows_reg_end)
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+ printf (" if (c >= CONSTRAINT_%s && c <= CONSTRAINT_%s)\n"
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+ " {\n"
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+ " *allows_reg = true;\n"
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+ " return;\n"
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+ " }\n",
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+ enum_order[maybe_allows_reg_start]->c_name,
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+ enum_order[maybe_allows_reg_end - 1]->c_name);
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+ if (maybe_allows_mem_start != maybe_allows_mem_end)
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+ printf (" if (c >= CONSTRAINT_%s && c <= CONSTRAINT_%s)\n"
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+ " {\n"
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+ " *allows_mem = true;\n"
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+ " return;\n"
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+ " }\n",
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+ enum_order[maybe_allows_mem_start]->c_name,
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+ enum_order[maybe_allows_mem_end - 1]->c_name);
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+ printf (" (void) c;\n"
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+ " *allows_reg = true;\n"
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+ " *allows_mem = true;\n"
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+ "}\n\n");
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+}
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+
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/* VEC is a list of key/value pairs, with the keys being lower bounds
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of a range. Output a decision tree that handles the keys covered by
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[VEC[START], VEC[END]), returning FALLBACK for keys lower then VEC[START]'s.
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@@ -1326,6 +1421,7 @@ write_tm_preds_h (void)
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memory_start, memory_end);
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write_range_function ("insn_extra_address_constraint",
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address_start, address_end);
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+ write_allows_reg_mem_function ();
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if (constraint_max_namelen > 1)
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{
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--- gcc/stmt.c.jj 2015-04-08 18:23:50.660555956 +0200
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+++ gcc/stmt.c 2015-04-17 17:36:50.623044548 +0200
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@@ -342,13 +342,7 @@ parse_output_constraint (const char **co
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else if (insn_extra_memory_constraint (cn))
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*allows_mem = true;
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else
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- {
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- /* Otherwise we can't assume anything about the nature of
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- the constraint except that it isn't purely registers.
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- Treat it like "g" and hope for the best. */
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- *allows_reg = true;
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- *allows_mem = true;
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- }
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+ insn_extra_constraint_allows_reg_mem (cn, allows_reg, allows_mem);
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break;
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}
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@@ -465,13 +459,7 @@ parse_input_constraint (const char **con
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else if (insn_extra_memory_constraint (cn))
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*allows_mem = true;
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else
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- {
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- /* Otherwise we can't assume anything about the nature of
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- the constraint except that it isn't purely registers.
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- Treat it like "g" and hope for the best. */
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- *allows_reg = true;
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- *allows_mem = true;
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- }
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+ insn_extra_constraint_allows_reg_mem (cn, allows_reg, allows_mem);
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break;
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}
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--- gcc/testsuite/gcc.target/aarch64/c-output-template-4.c.jj 2015-04-17 17:48:27.588654584 +0200
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+++ gcc/testsuite/gcc.target/aarch64/c-output-template-4.c 2015-04-17 17:48:22.149743468 +0200
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@@ -0,0 +1,10 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O0" } */
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+
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+void
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+test (void)
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+{
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+ __asm__ ("@ %c0" : : "S" (&test + 4));
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+}
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+
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+/* { dg-final { scan-assembler "@ test\\+4" } } */
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