9.0.1-0.9
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6
gcc.spec
6
gcc.spec
@ -258,7 +258,7 @@ Patch12: gcc9-pr89014.patch
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Patch13: gcc9-pr89093.patch
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Patch13: gcc9-pr89093.patch
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Patch14: gcc9-pr70341.patch
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Patch14: gcc9-pr70341.patch
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Patch15: gcc9-pr89490.patch
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Patch15: gcc9-pr89490.patch
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Patch16: gcc9-pr89506.patch
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Patch16: gcc9-pr89434.patch
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Patch1000: nvptx-tools-no-ptxas.patch
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Patch1000: nvptx-tools-no-ptxas.patch
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Patch1001: nvptx-tools-build.patch
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Patch1001: nvptx-tools-build.patch
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@ -773,7 +773,7 @@ to NVidia PTX capable devices if available.
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%patch13 -p0 -b .pr89093~
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%patch13 -p0 -b .pr89093~
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%patch14 -p0 -b .pr70341~
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%patch14 -p0 -b .pr70341~
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%patch15 -p0 -b .pr89490~
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%patch15 -p0 -b .pr89490~
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%patch16 -p0 -b .pr89506~
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%patch16 -p0 -b .pr89434~
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cd nvptx-tools-%{nvptx_tools_gitrev}
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cd nvptx-tools-%{nvptx_tools_gitrev}
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%patch1000 -p1 -b .nvptx-tools-no-ptxas~
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%patch1000 -p1 -b .nvptx-tools-no-ptxas~
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@ -2984,8 +2984,6 @@ end
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- improve arm and aarch64 casesi (PR target/70341)
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- improve arm and aarch64 casesi (PR target/70341)
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- don't use section anchors block infrastructure for mergeable section
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- don't use section anchors block infrastructure for mergeable section
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data (PR rtl-optimization/89490)
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data (PR rtl-optimization/89490)
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- fix arm cmpsi2_addneg and subsi3_carryin_compare_const patterns
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and corresponding splitters (PR target/89506)
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* Thu Feb 21 2019 Jakub Jelinek <jakub@redhat.com> 9.0.1-0.7
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* Thu Feb 21 2019 Jakub Jelinek <jakub@redhat.com> 9.0.1-0.7
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- update from trunk
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- update from trunk
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20
gcc9-pr89434.patch
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20
gcc9-pr89434.patch
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@ -0,0 +1,20 @@
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2019-02-27 Jakub Jelinek <jakub@redhat.com>
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PR target/89434
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* config/arm/arm.md (*subsi3_carryin_compare_const): Use
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trunc_int_for_mode (-INTVAL (...), SImode), just instead of
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-UINTVAL (...).
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--- gcc/config/arm/arm.md.jj 2019-02-25 11:32:02.914684615 +0100
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+++ gcc/config/arm/arm.md 2019-02-26 14:41:41.128767480 +0100
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@@ -1185,7 +1187,9 @@ (define_insn "*subsi3_carryin_compare_co
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(minus:SI (plus:SI (match_dup 1)
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(match_operand:SI 3 "arm_neg_immediate_operand" "L"))
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(ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
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- "TARGET_32BIT && UINTVAL (operands[2]) == -UINTVAL (operands[3])"
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+ "TARGET_32BIT
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+ && (INTVAL (operands[2])
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+ == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
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"sbcs\\t%0, %1, #%n3"
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[(set_attr "conds" "set")
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(set_attr "type" "adcs_imm")]
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@ -1,71 +0,0 @@
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2019-02-26 Jakub Jelinek <jakub@redhat.com>
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PR target/89506
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* config/arm/arm.md (cmpsi2_addneg): Use
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trunc_int_for_mode (-INTVAL (...), SImode) instead of -INTVAL (...).
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(*subsi3_carryin_compare_const): Similarly, just instead of -UINTVAL.
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(*compare_scc splitter): Use gen_int_mode.
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(*negscc): Likewise.
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* gcc.dg/pr89506.c: New test.
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--- gcc/config/arm/arm.md.jj 2019-02-25 11:32:02.914684615 +0100
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+++ gcc/config/arm/arm.md 2019-02-26 14:41:41.128767480 +0100
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@@ -867,7 +867,9 @@ (define_insn "cmpsi2_addneg"
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(set (match_operand:SI 0 "s_register_operand" "=r,r")
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(plus:SI (match_dup 1)
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(match_operand:SI 3 "arm_addimm_operand" "I,L")))]
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- "TARGET_32BIT && INTVAL (operands[2]) == -INTVAL (operands[3])"
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+ "TARGET_32BIT
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+ && (INTVAL (operands[2])
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+ == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
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"@
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adds%?\\t%0, %1, %3
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subs%?\\t%0, %1, #%n3"
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@@ -1185,7 +1187,9 @@ (define_insn "*subsi3_carryin_compare_co
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(minus:SI (plus:SI (match_dup 1)
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(match_operand:SI 3 "arm_neg_immediate_operand" "L"))
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(ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
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- "TARGET_32BIT && UINTVAL (operands[2]) == -UINTVAL (operands[3])"
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+ "TARGET_32BIT
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+ && (INTVAL (operands[2])
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+ == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
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"sbcs\\t%0, %1, #%n3"
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[(set_attr "conds" "set")
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(set_attr "type" "adcs_imm")]
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@@ -9281,7 +9285,7 @@ (define_split
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(cond_exec (ne:CC (reg:CC CC_REGNUM) (const_int 0))
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(set (match_dup 0) (const_int 1)))]
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{
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- operands[3] = GEN_INT (-INTVAL (operands[2]));
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+ operands[3] = gen_int_mode (-INTVAL (operands[2]), SImode);
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})
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(define_split
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@@ -10061,7 +10065,8 @@ (define_insn_and_split "*negscc"
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/* Emit subs\\t%0, %1, %2\;mvnne\\t%0, #0 */
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if (CONST_INT_P (operands[2]))
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emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
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- GEN_INT (- INTVAL (operands[2]))));
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+ gen_int_mode (-INTVAL (operands[2]),
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+ SImode)));
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else
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emit_insn (gen_subsi3_compare (operands[0], operands[1], operands[2]));
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--- gcc/testsuite/gcc.dg/pr89506.c.jj 2019-02-26 14:45:29.662027068 +0100
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+++ gcc/testsuite/gcc.dg/pr89506.c 2019-02-26 14:45:06.570405009 +0100
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@@ -0,0 +1,14 @@
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+/* PR target/89506 */
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+/* { dg-do compile } */
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+/* { dg-options "-Og -g -w" } */
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+
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+long long a;
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+int c;
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+
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+int
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+foo (long long d, short e)
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+{
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+ __builtin_sub_overflow (0xffffffff, c, &a);
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+ e >>= ~2147483647 != (int) a;
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+ return d + e;
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+}
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