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import CS gcc-11.4.1-2.1.el9

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This commit is contained in:
eabdullin 2023-09-21 18:29:05 +00:00
parent b8e924d6bb
commit 4ed62614ff
12 changed files with 1022 additions and 23 deletions
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2
.gcc.metadata
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@ -1,4 +1,4 @@
d190549fcae9ea175ede566a512187c8ff36671b SOURCES/gcc-11.3.1-20221121.tar.xz
510b05103d9ea05aaf9ae26709c55af0cc21b32f SOURCES/gcc-11.4.1-20230605.tar.xz
bbffc5a2b05e4f0c97e882f96c448504491dc4ed SOURCES/isl-0.18.tar.bz2
6ec33952e824e837fef0e829c93d39d6a507082f SOURCES/newlib-cygwin-50e2a63b04bdd018484605fbb954fd1bd5147fa0.tar.xz
0e0c6f8d68ab0878f02287ac082c1077c831cd81 SOURCES/nvptx-tools-5f6f343a302d620b0868edab376c00b15741e39e.tar.xz

2
.gitignore vendored
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@ -1,4 +1,4 @@
SOURCES/gcc-11.3.1-20221121.tar.xz
SOURCES/gcc-11.4.1-20230605.tar.xz
SOURCES/isl-0.18.tar.bz2
SOURCES/newlib-cygwin-50e2a63b04bdd018484605fbb954fd1bd5147fa0.tar.xz
SOURCES/nvptx-tools-5f6f343a302d620b0868edab376c00b15741e39e.tar.xz

10
SOURCES/gcc11-bind-now.patch
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@ -47,15 +47,15 @@ index c1aceb8404a..25432b5040d 100755
--- a/c++tools/configure
+++ b/c++tools/configure
@@ -631,6 +631,7 @@ ac_ct_CC
CFLAGS
CC
GREP
CXXCPP
LD_PICFLAG
+enable_host_bind_now
PICFLAG
MAINTAINER
CXX_AUX_TOOLS
@@ -704,6 +705,7 @@ enable_c___tools
enable_maintainer_mode
enable_checking
enable_default_pie
enable_host_pie
+enable_host_bind_now
@ -63,7 +63,7 @@ index c1aceb8404a..25432b5040d 100755
'
ac_precious_vars='build_alias
@@ -1336,6 +1338,7 @@ Optional Features:
configurey bits
yes,no,all,none,release.
--enable-default-pie enable Position Independent Executable as default
--enable-host-pie build host code as PIE
+ --enable-host-bind-now link host code as BIND_NOW
@ -84,7 +84,7 @@ index c1aceb8404a..25432b5040d 100755
+
# Check if O_CLOEXEC is defined by fcntl
ac_ext=c
diff --git a/c++tools/configure.ac b/c++tools/configure.ac
index 1e42689f2eb..d3f23f66f00 100644
--- a/c++tools/configure.ac

4
SOURCES/gcc11-libstdc++-docs.patch
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@ -4,7 +4,7 @@
<a class="link" href="https://www.fsf.org" target="_top">FSF
</a>
</p><p>
+ Release 11.3.1
+ Release 11.4.1
+ </p><p>
Permission is granted to copy, distribute and/or modify this
document under the terms of the GNU Free Documentation
@ -17,7 +17,7 @@
</p><p>
- The API documentation, rendered into HTML, can be viewed online
+ The API documentation, rendered into HTML, can be viewed locally
+ <a class="link" href="api/index.html" target="_top">for the 11.3.1 release</a>,
+ <a class="link" href="api/index.html" target="_top">for the 11.4.1 release</a>,
+ online
<a class="link" href="http://gcc.gnu.org/onlinedocs/" target="_top">for each GCC release</a>
and

18
SOURCES/gcc11-pie.patch
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@ -121,32 +121,32 @@ index 742816e4253..88087009383 100755
--- a/c++tools/configure
+++ b/c++tools/configure
@@ -630,7 +630,8 @@ CPP
ac_ct_CC
CFLAGS
CC
EGREP
GREP
CXXCPP
-PIEFLAG
+LD_PICFLAG
+PICFLAG
MAINTAINER
CXX_AUX_TOOLS
AUTOHEADER
@@ -702,6 +703,7 @@ enable_option_checking
enable_c___tools
@@ -700,6 +701,7 @@ enable_c___tools
enable_maintainer_mode
enable_checking
enable_default_pie
+enable_host_pie
with_gcc_major_version_only
'
ac_precious_vars='build_alias
@@ -1333,6 +1335,7 @@ Optional Features:
enable maintainer mode. Add rules to rebuild
configurey bits
only specific categories of checks. Categories are:
yes,no,all,none,release.
--enable-default-pie enable Position Independent Executable as default
+ --enable-host-pie build host code as PIE
Optional Packages:
--with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
@@ -2992,12 +2995,20 @@ test "$maintainer_mode" = yes && MAINTAI
@@ -2990,12 +2993,20 @@ fi
# Check whether --enable-default-pie was given.
# Check whether --enable-default-pie was given.
if test "${enable_default_pie+set}" = set; then :
@ -168,7 +168,7 @@ index 742816e4253..88087009383 100755
+
# Check if O_CLOEXEC is defined by fcntl
ac_ext=c
diff --git a/c++tools/configure.ac b/c++tools/configure.ac
index 6662b5ad7c9..1e42689f2eb 100644
--- a/c++tools/configure.ac

40
SOURCES/gcc11-pr96024.patch Normal file
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@ -0,0 +1,40 @@
commit 7f875e435b23dfb439bc7784cade4aebbd5d4a69
Author: Jakub Jelinek <jakub@redhat.com>
Date: Fri Jun 9 09:10:29 2023 +0200
fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR96024]
The pr96024.f90 testcase ICEs on big-endian hosts. The problem is
that length->val.integer is accessed after checking
length->expr_type == EXPR_CONSTANT, but it is a CHARACTER constant
which uses length->val.character union member instead and on big-endian
we end up reading constant 0x100000000 rather than some small number
on little-endian and if target doesn't have enough memory for 4 times
that (i.e. 16GB allocation), it ICEs.
2023-06-09 Jakub Jelinek <jakub@redhat.com>
PR fortran/96024
* primary.c (gfc_convert_to_structure_constructor): Only do
constant string ctor length verification and truncation/padding
if constant length has INTEGER type.
(cherry picked from commit 4cf6e322adc19f927859e0a5edfa93cec4b8c844)
diff --git a/gcc/fortran/primary.c b/gcc/fortran/primary.c
index 1b93f96367f..5cad2d2682b 100644
--- a/gcc/fortran/primary.c
+++ b/gcc/fortran/primary.c
@@ -3188,10 +3188,11 @@ gfc_convert_to_structure_constructor (gfc_expr *e, gfc_symbol *sym, gfc_expr **c
goto cleanup;
/* For a constant string constructor, make sure the length is
- correct; truncate of fill with blanks if needed. */
+ correct; truncate or fill with blanks if needed. */
if (this_comp->ts.type == BT_CHARACTER && !this_comp->attr.allocatable
&& this_comp->ts.u.cl && this_comp->ts.u.cl->length
&& this_comp->ts.u.cl->length->expr_type == EXPR_CONSTANT
+ && this_comp->ts.u.cl->length->ts.type == BT_INTEGER
&& actual->expr->ts.type == BT_CHARACTER
&& actual->expr->expr_type == EXPR_CONSTANT)
{

91
SOURCES/gcc11-s390x-regarg-1.patch Normal file
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@ -0,0 +1,91 @@
commit ef5f7b89bbc352255595069eb870d6f30f1f9134
Author: Andreas Krebbel <krebbel@linux.ibm.com>
Date: Wed Feb 1 08:59:41 2023 +0100
New reg note REG_CFA_NORESTORE
This patch introduces a new reg note which can be used to tell the CFI
verification in dwarf2cfi that a register is stored without intending
to restore from it.
This is useful when storing e.g. register contents to the stack and
generate CFI for it although the register is not really supposed to be
restored.
gcc/ChangeLog:
* dwarf2cfi.c (dwarf2out_frame_debug_cfa_restore): Add
EMIT_CFI parameter.
(dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
* reg-notes.def (REG_CFA_NOTE): New reg note definition.
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -1496,10 +1496,12 @@ dwarf2out_frame_debug_cfa_val_expression (rtx set)
update_row_reg_save (cur_row, dwf_regno (dest), cfi);
}
-/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
+/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE
+ note. When called with EMIT_CFI set to false emitting a CFI
+ statement is suppressed. */
static void
-dwarf2out_frame_debug_cfa_restore (rtx reg)
+dwarf2out_frame_debug_cfa_restore (rtx reg, bool emit_cfi)
{
gcc_assert (REG_P (reg));
@@ -1507,7 +1509,8 @@ dwarf2out_frame_debug_cfa_restore (rtx reg)
if (!span)
{
unsigned int regno = dwf_regno (reg);
- add_cfi_restore (regno);
+ if (emit_cfi)
+ add_cfi_restore (regno);
update_row_reg_save (cur_row, regno, NULL);
}
else
@@ -1522,7 +1525,8 @@ dwarf2out_frame_debug_cfa_restore (rtx reg)
reg = XVECEXP (span, 0, par_index);
gcc_assert (REG_P (reg));
unsigned int regno = dwf_regno (reg);
- add_cfi_restore (regno);
+ if (emit_cfi)
+ add_cfi_restore (regno);
update_row_reg_save (cur_row, regno, NULL);
}
}
@@ -2309,6 +2313,7 @@ dwarf2out_frame_debug (rtx_insn *insn)
break;
case REG_CFA_RESTORE:
+ case REG_CFA_NO_RESTORE:
n = XEXP (note, 0);
if (n == NULL)
{
@@ -2317,7 +2322,7 @@ dwarf2out_frame_debug (rtx_insn *insn)
n = XVECEXP (n, 0, 0);
n = XEXP (n, 0);
}
- dwarf2out_frame_debug_cfa_restore (n);
+ dwarf2out_frame_debug_cfa_restore (n, REG_NOTE_KIND (note) == REG_CFA_RESTORE);
handled_one = true;
break;
diff --git a/gcc/reg-notes.def b/gcc/reg-notes.def
index 23de1f13ee9..1f74a605b3e 100644
--- a/gcc/reg-notes.def
+++ b/gcc/reg-notes.def
@@ -157,6 +157,11 @@ REG_CFA_NOTE (CFA_VAL_EXPRESSION)
first pattern is the register to be restored. */
REG_CFA_NOTE (CFA_RESTORE)
+/* Like CFA_RESTORE but without actually emitting CFI. This can be
+ used to tell the verification infrastructure that a register is
+ saved without intending to restore it. */
+REG_CFA_NOTE (CFA_NO_RESTORE)
+
/* Attached to insns that are RTX_FRAME_RELATED_P, marks insn that sets
vDRAP from DRAP. If vDRAP is a register, vdrap_reg is initalized
to the argument, if it is a MEM, it is ignored. */

92
SOURCES/gcc11-s390x-regarg-2.patch Normal file
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@ -0,0 +1,92 @@
commit 36ffb2e0293d1bbef30e3553a431679de00549b9
Author: Andreas Krebbel <krebbel@linux.ibm.com>
Date: Wed Feb 1 08:59:42 2023 +0100
IBM zSystems: Make stack_tie to work with hard frame pointer
With this patch a scheduling barrier is created to prevent the insn
setting up the frame-pointer and instructions which save GPRs to the
stack to be swapped. Otherwise broken CFI information would be
generated since the stack save insns would use a base register which
is not currently declared as holding the CFA.
Without -mpreserve-args this did not happen because the store multiple
we used for saving the GPRs would also cover the frame-pointer
register and therefore creates a dependency on the frame-pointer
hardreg. However, with this patch the stack_tie is emitted regardless
of -mpreserve-args since this in general appears to be the safer
approach.
* config/s390/s390.c (save_gprs): Use gen_frame_mem.
(restore_gprs): Likewise.
(s390_emit_stack_tie): Make the stack_tie to be dependent on the
frame pointer if a frame-pointer is used.
(s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
* config/s390/s390.md (stack_tie): Add a register operand and
rename to ...
(@stack_tie<mode>): ... this.
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -10898,9 +10898,7 @@ save_gprs (rtx base, int offset, int first, int last)
int i;
addr = plus_constant (Pmode, base, offset);
- addr = gen_rtx_MEM (Pmode, addr);
-
- set_mem_alias_set (addr, get_frame_alias_set ());
+ addr = gen_frame_mem (Pmode, addr);
/* Special-case single register. */
if (first == last)
@@ -11012,8 +11010,7 @@ restore_gprs (rtx base, int offset, int first, int last)
rtx addr, insn;
addr = plus_constant (Pmode, base, offset);
- addr = gen_rtx_MEM (Pmode, addr);
- set_mem_alias_set (addr, get_frame_alias_set ());
+ addr = gen_frame_mem (Pmode, addr);
/* Special-case single register. */
if (first == last)
@@ -11062,10 +11059,11 @@ s390_load_got (void)
static void
s390_emit_stack_tie (void)
{
- rtx mem = gen_frame_mem (BLKmode,
- gen_rtx_REG (Pmode, STACK_POINTER_REGNUM));
-
- emit_insn (gen_stack_tie (mem));
+ rtx mem = gen_frame_mem (BLKmode, stack_pointer_rtx);
+ if (frame_pointer_needed)
+ emit_insn (gen_stack_tie (Pmode, mem, hard_frame_pointer_rtx));
+ else
+ emit_insn (gen_stack_tie (Pmode, mem, stack_pointer_rtx));
}
/* Copy GPRS into FPR save slots. */
@@ -11676,6 +11674,7 @@ s390_emit_prologue (void)
if (frame_pointer_needed)
{
+ s390_emit_stack_tie ();
insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
}
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 4828aa08be6..00d39608e1d 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -11590,9 +11590,10 @@ (define_insn "stack_protect_test<mode>"
; This is used in s390_emit_prologue in order to prevent insns
; adjusting the stack pointer to be moved over insns writing stack
; slots using a copy of the stack pointer in a different register.
-(define_insn "stack_tie"
+(define_insn "@stack_tie<mode>"
[(set (match_operand:BLK 0 "memory_operand" "+m")
- (unspec:BLK [(match_dup 0)] UNSPEC_TIE))]
+ (unspec:BLK [(match_dup 0)
+ (match_operand:P 1 "register_operand" "r")] UNSPEC_TIE))]
""
""
[(set_attr "length" "0")])

545
SOURCES/gcc11-s390x-regarg-3.patch Normal file
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@ -0,0 +1,545 @@
commit 8091199cdf4d0aa9c28e4526548ddc25d02898ca
Author: Andreas Krebbel <krebbel@linux.ibm.com>
Date: Wed Feb 1 08:59:42 2023 +0100
IBM zSystems: Save argument registers to the stack -mpreserve-args
This adds support for preserving the content of parameter registers to
the stack and emit CFI for it. This useful for applications which want
to implement their own stack unwinding and need access to function
arguments.
With the -mpreserve-args option GPRs and FPRs are save to the stack
slots which are reserved for stdargs in the register save area.
gcc/ChangeLog:
* config/s390/s390.c (s390_restore_gpr_p): New function.
(s390_preserve_gpr_arg_in_range_p): New function.
(s390_preserve_gpr_arg_p): New function.
(s390_preserve_fpr_arg_p): New function.
(s390_register_info_stdarg_fpr): Rename to ...
(s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
(s390_register_info_stdarg_gpr): Rename to ...
(s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
(s390_register_info): Use the renamed functions above.
(s390_optimize_register_info): Likewise.
(save_fpr): Generate CFI for -mpreserve-args.
(save_gprs): Generate CFI for -mpreserve-args. Drop return value.
(s390_emit_prologue): Adjust to changed calling convention of save_gprs.
(s390_optimize_prologue): Likewise.
* config/s390/s390.opt: New option -mpreserve-args
gcc/testsuite/ChangeLog:
* gcc.target/s390/preserve-args-1.c: New test.
* gcc.target/s390/preserve-args-2.c: New test.
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -411,6 +411,45 @@ struct s390_address
#define FP_ARG_NUM_REG (TARGET_64BIT? 4 : 2)
#define VEC_ARG_NUM_REG 8
+/* Return TRUE if GPR REGNO is supposed to be restored in the function
+ epilogue. */
+static inline bool
+s390_restore_gpr_p (int regno)
+{
+ return (cfun_frame_layout.first_restore_gpr != -1
+ && regno >= cfun_frame_layout.first_restore_gpr
+ && regno <= cfun_frame_layout.last_restore_gpr);
+}
+
+/* Return TRUE if any of the registers in range [FIRST, LAST] is saved
+ because of -mpreserve-args. */
+static inline bool
+s390_preserve_gpr_arg_in_range_p (int first, int last)
+{
+ int num_arg_regs = MIN (crtl->args.info.gprs + cfun->va_list_gpr_size,
+ GP_ARG_NUM_REG);
+ return (num_arg_regs
+ && s390_preserve_args_p
+ && first <= GPR2_REGNUM + num_arg_regs - 1
+ && last >= GPR2_REGNUM);
+}
+
+static inline bool
+s390_preserve_gpr_arg_p (int regno)
+{
+ return s390_preserve_gpr_arg_in_range_p (regno, regno);
+}
+
+static inline bool
+s390_preserve_fpr_arg_p (int regno)
+{
+ int num_arg_regs = MIN (crtl->args.info.fprs + cfun->va_list_fpr_size,
+ FP_ARG_NUM_REG);
+ return (s390_preserve_args_p
+ && regno <= FPR0_REGNUM + num_arg_regs - 1
+ && regno >= FPR0_REGNUM);
+}
+
/* A couple of shortcuts. */
#define CONST_OK_FOR_J(x) \
CONST_OK_FOR_CONSTRAINT_P((x), 'J', "J")
@@ -9893,61 +9932,89 @@ s390_register_info_gprtofpr ()
}
/* Set the bits in fpr_bitmap for FPRs which need to be saved due to
- stdarg.
+ stdarg or -mpreserve-args.
This is a helper routine for s390_register_info. */
-
static void
-s390_register_info_stdarg_fpr ()
+s390_register_info_arg_fpr ()
{
int i;
- int min_fpr;
- int max_fpr;
+ int min_stdarg_fpr = INT_MAX, max_stdarg_fpr = -1;
+ int min_preserve_fpr = INT_MAX, max_preserve_fpr = -1;
+ int min_fpr, max_fpr;
/* Save the FP argument regs for stdarg. f0, f2 for 31 bit and
f0-f4 for 64 bit. */
- if (!cfun->stdarg
- || !TARGET_HARD_FLOAT
- || !cfun->va_list_fpr_size
- || crtl->args.info.fprs >= FP_ARG_NUM_REG)
- return;
+ if (cfun->stdarg
+ && TARGET_HARD_FLOAT
+ && cfun->va_list_fpr_size
+ && crtl->args.info.fprs < FP_ARG_NUM_REG)
+ {
+ min_stdarg_fpr = crtl->args.info.fprs;
+ max_stdarg_fpr = min_stdarg_fpr + cfun->va_list_fpr_size - 1;
+ if (max_stdarg_fpr >= FP_ARG_NUM_REG)
+ max_stdarg_fpr = FP_ARG_NUM_REG - 1;
+
+ /* FPR argument regs start at f0. */
+ min_stdarg_fpr += FPR0_REGNUM;
+ max_stdarg_fpr += FPR0_REGNUM;
+ }
- min_fpr = crtl->args.info.fprs;
- max_fpr = min_fpr + cfun->va_list_fpr_size - 1;
- if (max_fpr >= FP_ARG_NUM_REG)
- max_fpr = FP_ARG_NUM_REG - 1;
+ if (s390_preserve_args_p && crtl->args.info.fprs)
+ {
+ min_preserve_fpr = FPR0_REGNUM;
+ max_preserve_fpr = MIN (FPR0_REGNUM + FP_ARG_NUM_REG - 1,
+ FPR0_REGNUM + crtl->args.info.fprs - 1);
+ }
- /* FPR argument regs start at f0. */
- min_fpr += FPR0_REGNUM;
- max_fpr += FPR0_REGNUM;
+ min_fpr = MIN (min_stdarg_fpr, min_preserve_fpr);
+ max_fpr = MAX (max_stdarg_fpr, max_preserve_fpr);
+
+ if (max_fpr == -1)
+ return;
for (i = min_fpr; i <= max_fpr; i++)
cfun_set_fpr_save (i);
}
+
/* Reserve the GPR save slots for GPRs which need to be saved due to
- stdarg.
+ stdarg or -mpreserve-args.
This is a helper routine for s390_register_info. */
static void
-s390_register_info_stdarg_gpr ()
+s390_register_info_arg_gpr ()
{
int i;
- int min_gpr;
- int max_gpr;
+ int min_stdarg_gpr = INT_MAX, max_stdarg_gpr = -1;
+ int min_preserve_gpr = INT_MAX, max_preserve_gpr = -1;
+ int min_gpr, max_gpr;
- if (!cfun->stdarg
- || !cfun->va_list_gpr_size
- || crtl->args.info.gprs >= GP_ARG_NUM_REG)
- return;
+ if (cfun->stdarg
+ && cfun->va_list_gpr_size
+ && crtl->args.info.gprs < GP_ARG_NUM_REG)
+ {
+ min_stdarg_gpr = crtl->args.info.gprs;
+ max_stdarg_gpr = min_stdarg_gpr + cfun->va_list_gpr_size - 1;
+ if (max_stdarg_gpr >= GP_ARG_NUM_REG)
+ max_stdarg_gpr = GP_ARG_NUM_REG - 1;
+
+ /* GPR argument regs start at r2. */
+ min_stdarg_gpr += GPR2_REGNUM;
+ max_stdarg_gpr += GPR2_REGNUM;
+ }
+
+ if (s390_preserve_args_p && crtl->args.info.gprs)
+ {
+ min_preserve_gpr = GPR2_REGNUM;
+ max_preserve_gpr = MIN (GPR6_REGNUM,
+ GPR2_REGNUM + crtl->args.info.gprs - 1);
+ }
- min_gpr = crtl->args.info.gprs;
- max_gpr = min_gpr + cfun->va_list_gpr_size - 1;
- if (max_gpr >= GP_ARG_NUM_REG)
- max_gpr = GP_ARG_NUM_REG - 1;
+ min_gpr = MIN (min_stdarg_gpr, min_preserve_gpr);
+ max_gpr = MAX (max_stdarg_gpr, max_preserve_gpr);
- /* GPR argument regs start at r2. */
- min_gpr += GPR2_REGNUM;
- max_gpr += GPR2_REGNUM;
+ if (max_gpr == -1)
+ return;
/* If r6 was supposed to be saved into an FPR and now needs to go to
the stack for vararg we have to adjust the restore range to make
@@ -10079,14 +10146,14 @@ s390_register_info ()
if (clobbered_regs[i])
cfun_gpr_save_slot (i) = SAVE_SLOT_STACK;
- s390_register_info_stdarg_fpr ();
+ s390_register_info_arg_fpr ();
s390_register_info_gprtofpr ();
s390_register_info_set_ranges ();
- /* stdarg functions might need to save GPRs 2 to 6. This might
- override the GPR->FPR save decision made by
- s390_register_info_gprtofpr for r6 since vararg regs must go to
- the stack. */
- s390_register_info_stdarg_gpr ();
+
+ /* Forcing argument registers to be saved on the stack might
+ override the GPR->FPR save decision for r6 so this must come
+ last. */
+ s390_register_info_arg_gpr ();
}
/* Return true if REGNO is a global register, but not one
@@ -10141,7 +10208,7 @@ s390_optimize_register_info ()
cfun_gpr_save_slot (i) = SAVE_SLOT_NONE;
s390_register_info_set_ranges ();
- s390_register_info_stdarg_gpr ();
+ s390_register_info_arg_gpr ();
}
/* Fill cfun->machine with info about frame of current function. */
@@ -10864,14 +10931,28 @@ static rtx
save_fpr (rtx base, int offset, int regnum)
{
rtx addr;
+ rtx insn;
+
addr = gen_rtx_MEM (DFmode, plus_constant (Pmode, base, offset));
- if (regnum >= 16 && regnum <= (16 + FP_ARG_NUM_REG))
+ if (regnum >= FPR0_REGNUM && regnum <= (FPR0_REGNUM + FP_ARG_NUM_REG))
set_mem_alias_set (addr, get_varargs_alias_set ());
else
set_mem_alias_set (addr, get_frame_alias_set ());
- return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
+ insn = emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
+
+ if (!call_used_regs[regnum] || s390_preserve_fpr_arg_p (regnum))
+ RTX_FRAME_RELATED_P (insn) = 1;
+
+ if (s390_preserve_fpr_arg_p (regnum) && !cfun_fpr_save_p (regnum))
+ {
+ rtx reg = gen_rtx_REG (DFmode, regnum);
+ add_reg_note (insn, REG_CFA_NO_RESTORE, reg);
+ add_reg_note (insn, REG_CFA_OFFSET, gen_rtx_SET (addr, reg));
+ }
+
+ return insn;
}
/* Emit insn to restore fpr REGNUM from offset OFFSET relative
@@ -10891,10 +10972,11 @@ restore_fpr (rtx base, int offset, int regnum)
the register save area located at offset OFFSET
relative to register BASE. */
-static rtx
-save_gprs (rtx base, int offset, int first, int last)
+static void
+save_gprs (rtx base, int offset, int first, int last, rtx_insn *before = NULL)
{
rtx addr, insn, note;
+ rtx_insn *out_insn;
int i;
addr = plus_constant (Pmode, base, offset);
@@ -10910,7 +10992,15 @@ save_gprs (rtx base, int offset, int first, int last)
if (!global_not_special_regno_p (first))
RTX_FRAME_RELATED_P (insn) = 1;
- return insn;
+
+ if (s390_preserve_gpr_arg_p (first) && !s390_restore_gpr_p (first))
+ {
+ rtx reg = gen_rtx_REG (Pmode, first);
+ add_reg_note (insn, REG_CFA_NO_RESTORE, reg);
+ add_reg_note (insn, REG_CFA_OFFSET, gen_rtx_SET (addr, reg));
+ }
+
+ goto emit;
}
@@ -10939,7 +11029,12 @@ save_gprs (rtx base, int offset, int first, int last)
set, even if it does not. Therefore we emit a new pattern
without those registers as REG_FRAME_RELATED_EXPR note. */
- if (first >= 6 && !global_not_special_regno_p (first))
+ /* In these cases all of the sets are marked as frame related:
+ 1. call-save GPR saved and restored
+ 2. argument GPR saved because of -mpreserve-args */
+ if ((first >= GPR6_REGNUM && !global_not_special_regno_p (first))
+ || s390_preserve_gpr_arg_in_range_p (first, last))
+
{
rtx pat = PATTERN (insn);
@@ -10950,6 +11045,24 @@ save_gprs (rtx base, int offset, int first, int last)
RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
RTX_FRAME_RELATED_P (insn) = 1;
+
+ /* For the -mpreserve-args register saves no restore operations
+ will be emitted. CFI checking would complain about this. We
+ manually generate the REG_CFA notes here to be able to mark
+ those operations with REG_CFA_NO_RESTORE. */
+ if (s390_preserve_gpr_arg_in_range_p (first, last))
+ {
+ for (int regno = first; regno <= last; regno++)
+ {
+ rtx reg = gen_rtx_REG (Pmode, regno);
+ rtx reg_addr = plus_constant (Pmode, base,
+ offset + (regno - first) * UNITS_PER_LONG);
+ if (!s390_restore_gpr_p (regno))
+ add_reg_note (insn, REG_CFA_NO_RESTORE, reg);
+ add_reg_note (insn, REG_CFA_OFFSET,
+ gen_rtx_SET (gen_frame_mem (Pmode, reg_addr), reg));
+ }
+ }
}
else if (last >= 6)
{
@@ -10960,7 +11073,7 @@ save_gprs (rtx base, int offset, int first, int last)
break;
if (start > last)
- return insn;
+ goto emit;
addr = plus_constant (Pmode, base,
offset + (start - first) * UNITS_PER_LONG);
@@ -10978,7 +11091,7 @@ save_gprs (rtx base, int offset, int first, int last)
add_reg_note (insn, REG_FRAME_RELATED_EXPR, note);
RTX_FRAME_RELATED_P (insn) = 1;
- return insn;
+ goto emit;
}
note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
@@ -10997,9 +11110,15 @@ save_gprs (rtx base, int offset, int first, int last)
RTX_FRAME_RELATED_P (insn) = 1;
}
- return insn;
+ emit:
+ if (before != NULL_RTX)
+ out_insn = emit_insn_before (insn, before);
+ else
+ out_insn = emit_insn (insn);
+ INSN_ADDRESSES_NEW (out_insn, -1);
}
+
/* Generate insn to restore registers FIRST to LAST from
the register save area located at offset OFFSET
relative to register BASE. */
@@ -11423,12 +11542,12 @@ s390_emit_prologue (void)
/* Save call saved gprs. */
if (cfun_frame_layout.first_save_gpr != -1)
{
- insn = save_gprs (stack_pointer_rtx,
- cfun_frame_layout.gprs_offset +
- UNITS_PER_LONG * (cfun_frame_layout.first_save_gpr
- - cfun_frame_layout.first_save_gpr_slot),
- cfun_frame_layout.first_save_gpr,
- cfun_frame_layout.last_save_gpr);
+ save_gprs (stack_pointer_rtx,
+ cfun_frame_layout.gprs_offset +
+ UNITS_PER_LONG * (cfun_frame_layout.first_save_gpr
+ - cfun_frame_layout.first_save_gpr_slot),
+ cfun_frame_layout.first_save_gpr,
+ cfun_frame_layout.last_save_gpr);
/* This is not 100% correct. If we have more than one register saved,
then LAST_PROBE_OFFSET can move even closer to sp. */
@@ -11436,8 +11555,6 @@ s390_emit_prologue (void)
= (cfun_frame_layout.gprs_offset +
UNITS_PER_LONG * (cfun_frame_layout.first_save_gpr
- cfun_frame_layout.first_save_gpr_slot));
-
- emit_insn (insn);
}
/* Dummy insn to mark literal pool slot. */
@@ -11467,15 +11584,10 @@ s390_emit_prologue (void)
{
if (cfun_fpr_save_p (i))
{
- insn = save_fpr (stack_pointer_rtx, offset, i);
+ save_fpr (stack_pointer_rtx, offset, i);
if (offset < last_probe_offset)
last_probe_offset = offset;
offset += 8;
-
- /* If f4 and f6 are call clobbered they are saved due to
- stdargs and therefore are not frame related. */
- if (!call_used_regs[i])
- RTX_FRAME_RELATED_P (insn) = 1;
}
else if (!TARGET_PACKED_STACK || call_used_regs[i])
offset += 8;
@@ -11491,11 +11603,10 @@ s390_emit_prologue (void)
for (i = FPR15_REGNUM; i >= FPR8_REGNUM && offset >= 0; i--)
if (cfun_fpr_save_p (i))
{
- insn = save_fpr (stack_pointer_rtx, offset, i);
+ save_fpr (stack_pointer_rtx, offset, i);
if (offset < last_probe_offset)
last_probe_offset = offset;
- RTX_FRAME_RELATED_P (insn) = 1;
offset -= 8;
}
if (offset >= cfun_frame_layout.f8_offset)
@@ -11663,7 +11774,6 @@ s390_emit_prologue (void)
insn = save_fpr (temp_reg, offset, i);
offset += 8;
- RTX_FRAME_RELATED_P (insn) = 1;
add_reg_note (insn, REG_FRAME_RELATED_EXPR,
gen_rtx_SET (gen_rtx_MEM (DFmode, addr),
gen_rtx_REG (DFmode, i)));
@@ -14158,15 +14268,11 @@ s390_optimize_prologue (void)
continue;
if (cfun_frame_layout.first_save_gpr != -1)
- {
- rtx s_pat = save_gprs (base,
- off + (cfun_frame_layout.first_save_gpr
- - first) * UNITS_PER_LONG,
- cfun_frame_layout.first_save_gpr,
- cfun_frame_layout.last_save_gpr);
- new_insn = emit_insn_before (s_pat, insn);
- INSN_ADDRESSES_NEW (new_insn, -1);
- }
+ save_gprs (base,
+ off + (cfun_frame_layout.first_save_gpr
+ - first) * UNITS_PER_LONG,
+ cfun_frame_layout.first_save_gpr,
+ cfun_frame_layout.last_save_gpr, insn);
remove_insn (insn);
continue;
diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt
index 57d1b95bd65..344aa551f44 100644
--- a/gcc/config/s390/s390.opt
+++ b/gcc/config/s390/s390.opt
@@ -321,3 +321,7 @@ and the default behavior is to emit separate multiplication and addition
instructions for long doubles in vector registers, because measurements show
that this improves performance. This option allows overriding it for testing
purposes.
+
+mpreserve-args
+Target Var(s390_preserve_args_p) Init(0)
+Store all argument registers on the stack.
diff --git a/gcc/testsuite/gcc.target/s390/preserve-args-1.c b/gcc/testsuite/gcc.target/s390/preserve-args-1.c
new file mode 100644
index 00000000000..24dcf547432
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/preserve-args-1.c
@@ -0,0 +1,17 @@
+/* Functional tests for the -mpreserve-args cmdline option. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z900 -mpreserve-args" } */
+
+
+int
+foo (int a, int b, int c, double d, double e)
+{
+ return a + c + (int)d + (int)e;
+}
+
+/* { dg-final { scan-assembler "stmg\t%r2,%r4,\[0-9\]*\\(%r15\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "stm\t%r2,%r4,\[0-9\]*\\(%r15\\)" { target { ! lp64 } } } } */
+
+/* { dg-final { scan-assembler "std\t%f0,\[0-9\]*\\(%r15\\)" } } */
+/* { dg-final { scan-assembler "std\t%f2,\[0-9\]*\\(%r15\\)" } } */
diff --git a/gcc/testsuite/gcc.target/s390/preserve-args-2.c b/gcc/testsuite/gcc.target/s390/preserve-args-2.c
new file mode 100644
index 00000000000..006aad9c371
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/preserve-args-2.c
@@ -0,0 +1,19 @@
+/* This test requires special handling of a GPR which is saved because
+ of -mpreserve-args but not restored. dwarf2cfi used to ICE for
+ this in maybe_record_trace_start. The solution was to introduce a
+ REG_CFA_NORESTORE reg note. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=z900 -mpreserve-args" } */
+
+void *foo (void *);
+void bar ();
+int x;
+void *
+baz (void *y)
+{
+ if (__builtin_expect (x, 0))
+ return foo (y);
+ bar ();
+ return foo (y);
+}
diff --git a/gcc/testsuite/gcc.target/s390/preserve-args-3.c b/gcc/testsuite/gcc.target/s390/preserve-args-3.c
new file mode 100644
index 00000000000..f4b135ab8e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/preserve-args-3.c
@@ -0,0 +1,19 @@
+/* Functional tests for the -mpreserve-args cmdline option. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z900 -mpreserve-args" } */
+
+#include <stdarg.h>
+int
+foo (int a, int, int c, double d, ...)
+{
+ va_list argp;
+ va_start(argp, d);
+ return a + c + va_arg(argp, int) + va_arg(argp, int) + (int)va_arg(argp, double);
+}
+
+/* { dg-final { scan-assembler "stmg\t%r2,%r15,\[0-9\]*\\(%r15\\)" { target lp64 } } } */
+/* { dg-final { scan-assembler "stm\t%r2,%r15,\[0-9\]*\\(%r15\\)" { target { ! lp64 } } } } */
+
+/* { dg-final { scan-assembler "std\t%f0,\[0-9\]*\\(%r15\\)" } } */
+/* { dg-final { scan-assembler "std\t%f2,\[0-9\]*\\(%r15\\)" } } */

134
SOURCES/gcc11-testsuite-fixes-2.patch Normal file
View File

@ -0,0 +1,134 @@
commit 74833b3165865a9373506f447720cf20f29c20c8
Author: Christophe Lyon <christophe.lyon@arm.com>
Date: Tue Jan 17 13:10:10 2023 +0000
aarch64: add -fno-stack-protector to some tests [PR108411]
As discussed in the PR, these recently added tests fail when the
testsuite is executed with -fstack-protector-strong. To avoid this,
this patch adds -fno-stack-protector to dg-options.
PR target/108411
gcc/testsuite
* g++.target/aarch64/bitfield-abi-warning-align16-O2-extra.C: Add
-fno-stack-protector.
* g++.target/aarch64/bitfield-abi-warning-align16-O2.C: Likewise.
* g++.target/aarch64/bitfield-abi-warning-align32-O2-extra.C: Likewise.
* g++.target/aarch64/bitfield-abi-warning-align32-O2.C: Likewise.
* g++.target/aarch64/bitfield-abi-warning-align8-O2.C: Likewise.
* gcc.target/aarch64/bitfield-abi-warning-align16-O2-extra.c: Likewise.
* gcc.target/aarch64/bitfield-abi-warning-align16-O2.c: Likewise.
* gcc.target/aarch64/bitfield-abi-warning-align32-O2-extra.c: Likewise.
* gcc.target/aarch64/bitfield-abi-warning-align32-O2.c: Likewise.
* gcc.target/aarch64/bitfield-abi-warning-align8-O2.c: Likewise.
diff --git a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2-extra.C b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2-extra.C
index 443cd458b4c..52f9cdd1ee9 100644
--- a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2-extra.C
+++ b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2-extra.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps -Wno-narrowing" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps -Wno-narrowing" } */
#define ALIGN 16
//#define EXTRA
diff --git a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2.C b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2.C
index 76a7e3d0ad4..9ff4e46645b 100644
--- a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2.C
+++ b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align16-O2.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps -Wno-narrowing" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps -Wno-narrowing" } */
#define ALIGN 16
#define EXTRA
diff --git a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2-extra.C b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2-extra.C
index 6f8f54f41ff..55dcbfe4b7c 100644
--- a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2-extra.C
+++ b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2-extra.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps -Wno-narrowing" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps -Wno-narrowing" } */
#define ALIGN 32
//#define EXTRA
diff --git a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2.C b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2.C
index 6b8ad5fbea1..6bb8778ee90 100644
--- a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2.C
+++ b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align32-O2.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps -Wno-narrowing" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps -Wno-narrowing" } */
#define ALIGN 32
#define EXTRA
diff --git a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align8-O2.C b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align8-O2.C
index b1764d97ea0..41bcc894a2b 100644
--- a/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align8-O2.C
+++ b/gcc/testsuite/g++.target/aarch64/bitfield-abi-warning-align8-O2.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps -Wno-narrowing" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps -Wno-narrowing" } */
#define ALIGN 8
#define EXTRA
diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2-extra.c b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2-extra.c
index f248a129509..3b2c932ac23 100644
--- a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2-extra.c
+++ b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2-extra.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps" } */
#define ALIGN 16
//#define EXTRA
diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2.c b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2.c
index 22ee5ec4c92..ee5d6faa428 100644
--- a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2.c
+++ b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align16-O2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps" } */
#define ALIGN 16
#define EXTRA
diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2-extra.c b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2-extra.c
index a8a50b35e8e..6d4a883a96e 100644
--- a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2-extra.c
+++ b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2-extra.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps" } */
#define ALIGN 32
//#define EXTRA
diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2.c b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2.c
index e872de3dbe0..331daba354c 100644
--- a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2.c
+++ b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align32-O2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps" } */
#define ALIGN 32
#define EXTRA
diff --git a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align8-O2.c b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align8-O2.c
index cb2a945a819..e6d45f5dd5c 100644
--- a/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align8-O2.c
+++ b/gcc/testsuite/gcc.target/aarch64/bitfield-abi-warning-align8-O2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -save-temps" } */
+/* { dg-options "-O2 -fno-stack-protector -save-temps" } */
#define ALIGN 8
#define EXTRA

22
SOURCES/gcc11-testsuite-fixes.patch Normal file
View File

@ -0,0 +1,22 @@
diff --git a/libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc b/libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc
index b0277b3f4d1..425daff317a 100644
--- a/libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc
+++ b/libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc
@@ -53,3 +53,6 @@ test01()
// { dg-prune-output "does not have integral type" }
// { dg-prune-output "non-integral type" }
// { dg-prune-output "invalid specialization" }
+// These show up with -Wp,-D_GLIBCXX_ASSERTIONS.
+// { dg-prune-output "invalid operands" }
+// { dg-prune-output "wrong type argument" }
diff --git a/libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc b/libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc
index 8cabfe2ea2f..a14d373c461 100644
--- a/libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc
+++ b/libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc
@@ -53,3 +53,6 @@ test01()
// { dg-prune-output "does not have integral type" }
// { dg-prune-output "non-integral type" }
// { dg-prune-output "invalid specialization" }
+// These show up with -Wp,-D_GLIBCXX_ASSERTIONS.
+// { dg-prune-output "invalid operands" }
+// { dg-prune-output "wrong type argument" }

85
SPECS/gcc.spec
View File

@ -1,10 +1,10 @@
%global DATE 20221121
%global gitrev 643e61c61b308f9c572da4ccd5f730fb
%global gcc_version 11.3.1
%global DATE 20230605
%global gitrev 2c7f17ca0b642790d74cca6c798196e9053a4bcf
%global gcc_version 11.4.1
%global gcc_major 11
# Note, gcc_release must be integer, if you want to add suffixes to
# %%{release}, append them after %%{gcc_release} on Release: line.
%global gcc_release 4
%global gcc_release 2
%global nvptx_tools_gitrev 5f6f343a302d620b0868edab376c00b15741e39e
%global newlib_cygwin_gitrev 50e2a63b04bdd018484605fbb954fd1bd5147fa0
%global _unpackaged_files_terminate_build 0
@ -128,7 +128,7 @@
Summary: Various compilers (C, C++, Objective-C, ...)
Name: gcc
Version: %{gcc_version}
Release: %{gcc_release}.3%{?dist}
Release: %{gcc_release}.1%{?dist}
# libgcc, libgfortran, libgomp, libstdc++ and crtstuff have
# GCC Runtime Exception.
License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions and LGPLv2+ and BSD
@ -287,6 +287,12 @@ Patch23: gcc11-pie.patch
Patch24: gcc11-bind-now.patch
Patch25: gcc11-detect-sapphirerapids.patch
Patch26: gcc11-Wmismatched-dealloc-doc.patch
Patch27: gcc11-s390x-regarg-1.patch
Patch28: gcc11-s390x-regarg-2.patch
Patch29: gcc11-s390x-regarg-3.patch
Patch30: gcc11-testsuite-fixes.patch
Patch31: gcc11-pr96024.patch
Patch32: gcc11-testsuite-fixes-2.patch
Patch100: gcc11-fortran-fdec-duplicates.patch
Patch101: gcc11-fortran-flogical-as-integer.patch
@ -879,6 +885,12 @@ mark them as cross compiled.
%patch24 -p1 -b .now~
%patch25 -p1 -b .detect-spr~
%patch26 -p1 -b .Wmismatched-dealloc-doc~
%patch27 -p1 -b .s390x-regarg-1~
%patch28 -p1 -b .s390x-regarg-2~
%patch29 -p1 -b .s390x-regarg-3~
%patch30 -p1 -b .testsuite~
%patch31 -p1 -b .pr96024~
%patch32 -p1 -b .testsuite2~
%if 0%{?rhel} >= 9
%patch100 -p1 -b .fortran-fdec-duplicates~
@ -3572,6 +3584,69 @@ end
%endif
%changelog
* Fri Jun 9 2023 Marek Polacek <polacek@redhat.com> 11.4.1-2.1
- fix ICE on pr96024.f90 on big-endian hosts (PR fortran/96024, #2213211)
- use -fno-stack-protector to fix bit-field aarch64 tests (#2213221)
* Mon Jun 5 2023 Marek Polacek <polacek@redhat.com> 11.4.1-2
- update from releases/gcc-11-branch (#2193180)
- GCC 11.4 release
- PRs bootstrap/90543, c++/53932, c++/69410, c++/92752, c++/98056,
c++/98821, c++/100295, c++/100474, c++/101118, c++/101869,
c++/102780, c++/103871, c++/104527, c++/105406, c++/105996,
c++/106188, c++/106675, c++/106713, c++/106740, c++/107065,
c++/107163, c++/107179, c++/107558, c++/107579, c++/107864,
c++/108138, c++/108180, c++/108365, c++/108468, c++/108474,
c++/108607, c++/108975, c++/108998, c++/109096, c++/109164, c/107127,
c/107465, c/109151, d/107592, d/108050, d/108877, d/109108,
debug/106719, debug/108573, debug/108716, debug/108967, driver/106624,
fortran/85877, fortran/95107, fortran/96024, fortran/96025,
fortran/99036, fortran/103259, fortran/104332, fortran/106209,
fortran/106945, fortran/107576, fortran/107872, fortran/108131,
fortran/108349, fortran/108420, fortran/108421, fortran/108451,
fortran/108453, fortran/108501, fortran/108502, fortran/108527,
fortran/108529, fortran/108609, fortran/108937, fortran/109186,
fortran/109511, fortran/109846, ipa/105685, ipa/106124, ipa/107944,
libquadmath/87204, libquadmath/94756, libstdc++/91456,
libstdc++/103934, libstdc++/104866, libstdc++/104875,
libstdc++/105844, libstdc++/106183, libstdc++/107801,
libstdc++/107814, libstdc++/108030, libstdc++/108118,
libstdc++/108265, libstdc++/108636, libstdc++/108856,
libstdc++/108952, libstdc++/109064, libstdc++/109261,
libstdc++/109949, lto/109263, middle-end/104450, middle-end/104464,
middle-end/106190, middle-end/107317, middle-end/108237,
middle-end/108264, middle-end/108435, middle-end/108459,
middle-end/108546, middle-end/108625, middle-end/108685,
middle-end/108854, other/108560, other/109306,
rtl-optimization/106751, rtl-optimization/107482,
rtl-optimization/108193, rtl-optimization/108596,
rtl-optimization/109585, target/70243, target/90458, target/96373,
target/98776, target/100758, target/104871, target/104921,
target/105554, target/105599, target/106736, target/106875,
target/107568, target/107714, target/107863, target/108272,
target/108348, target/108589, target/108699, target/108807,
target/108812, target/108881, target/109067, target/109140,
target/109276, testsuite/47334, testsuite/103823, testsuite/108151,
testsuite/108973, testsuite/108985, tree-optimization/105484,
tree-optimization/106809, tree-optimization/107107,
tree-optimization/107212, tree-optimization/107254,
tree-optimization/107323, tree-optimization/107451,
tree-optimization/107554, tree-optimization/107898,
tree-optimization/107997, tree-optimization/108068,
tree-optimization/108076, tree-optimization/108095,
tree-optimization/108199, tree-optimization/108498,
tree-optimization/108688, tree-optimization/108692,
tree-optimization/108821, tree-optimization/108950,
tree-optimization/109176, tree-optimization/109410,
tree-optimization/109473, tree-optimization/109491,
tree-optimization/109502, tree-optimization/109573,
tree-optimization/109724, tree-optimization/109778
- PRs fortran/100607, libstdc++/109822, target/109954,
tree-optimization/109505
* Wed Mar 29 2023 Marek Polacek <polacek@redhat.com> 11.3.1-4.4
- s390x: add support for register arguments preserving (#2168204)
* Wed Dec 21 2022 Marek Polacek <polacek@redhat.com> 11.3.1-4.3
- compile the cross binaries as PIE/-z now (#2155452)