4.4.4-10

.cvsignore

@@ -1,2 +1,2 @@
 fastjar-0.97.tar.gz
-gcc-4.4.4-20100624.tar.bz2
+gcc-4.4.4-20100630.tar.bz2

gcc.spec

@@ -1,9 +1,9 @@
-%global DATE 20100624
+%global DATE 20100630
-%global SVNREV 161335
+%global SVNREV 161589
 %global gcc_version 4.4.4
 # Note, gcc_release must be integer, if you want to add suffixes to
 # %{release}, append them after %{gcc_release} on Release: line.
-%global gcc_release 9
+%global gcc_release 10
 %global _unpackaged_files_terminate_build 0
 %global multilib_64_archs sparc64 ppc64 s390x x86_64
 %if 0%{?fedora} >= 13 || 0%{?rhel} >= 6
@@ -174,9 +174,7 @@ Patch14: gcc44-pr38757.patch
 Patch15: gcc44-libstdc++-docs.patch
 Patch16: gcc44-ppc64-aixdesc.patch
 Patch17: gcc44-no-add-needed.patch
-Patch18: gcc44-pr44492.patch
+Patch18: gcc44-pr44542.patch
-Patch19: gcc44-pr44542.patch
-Patch20: gcc44-pr44610.patch
 
 Patch1000: fastjar-0.97-segfault.patch
 Patch1001: fastjar-0.97-len1.patch
@@ -515,9 +513,7 @@ GNAT is a GNU Ada 95 front-end to GCC. This package includes static libraries.
 %if 0%{?fedora} >= 13
 %patch17 -p0 -b .no-add-needed~
 %endif
-%patch18 -p0 -b .pr44492~
+%patch18 -p0 -b .pr44542~
-%patch19 -p0 -b .pr44542~
-%patch20 -p0 -b .pr44610~
 
 # This testcase doesn't compile.
 rm libjava/testsuite/libjava.lang/PR35020*
@@ -1914,7 +1910,6 @@ fi
 %exclude %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/adalib/libgnarl.a
 %endif
 %endif
-%endif
 
 %if 0%{?fedora} >= 14
 %files -n libgnat-static
@@ -1940,6 +1935,7 @@ fi
 %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/adalib/libgnarl.a
 %endif
 %endif
+%endif
 
 %files -n libgomp
 %defattr(-,root,root,-)
@@ -2004,6 +2000,15 @@ fi
 %endif
 
 %changelog
+* Wed Jun 30 2010 Jakub Jelinek <jakub@redhat.com> 4.4.4-10
+- update from gcc-4_4-branch
+  - PRs fortran/43841, fortran/43843, tree-optimization/44683
+  - fix qualified-id as template argument handling (#605761, PR c++/44587)
+- -Wunused-but-set-* static_cast fix (PR c++/44682)
+- VTA backports
+  - PRs debug/44610, debug/44668, debug/44694
+- unswitching fixes (PR middle-end/43866)
+
 * Thu Jun 24 2010 Jakub Jelinek <jakub@redhat.com> 4.4.4-9
 - update from gcc-4_4-branch
   - PRs bootstrap/44426, bootstrap/44544, c++/44627, fortran/44536,

gcc44-pr44492.patch

@@ -1,207 +0,0 @@
-2010-06-24  Jakub Jelinek  <jakub@redhat.com>
-
-	PR middle-end/44492
-	* recog.h (struct recog_data): Add is_asm field.
-	* recog.c (asm_operand_ok, constrain_operands): If neither < nor > is
-	present in constraints of inline-asm operand and memory operand
-	contains {PRE,POST}_{INC,DEC,MODIFY}, return 0.
-	(extract_insn): Initialize recog_data.is_asm.
-	* doc/md.texi (Constraints): Document operand side-effect rules.
-
-	* g++.dg/torture/pr44492.C: New test.
-
---- gcc/doc/md.texi	(revision 161327)
-+++ gcc/doc/md.texi	(revision 161328)
-@@ -1052,6 +1052,10 @@ an operand may be in a register, and whi
- operand can be a memory reference, and which kinds of address; whether the
- operand may be an immediate constant, and which possible values it may
- have.  Constraints can also require two operands to match.
-+Side-effects aren't allowed in operands of inline @code{asm}, unless
-+@samp{<} or @samp{>} constraints are used, because there is no guarantee
-+that the side-effects will happen exactly once in an instruction that can update
-+the addressing register.
- 
- @ifset INTERNALS
- @menu
-@@ -1129,12 +1133,21 @@ would fit the @samp{m} constraint but no
- @cindex @samp{<} in constraint
- @item @samp{<}
- A memory operand with autodecrement addressing (either predecrement or
--postdecrement) is allowed.
-+postdecrement) is allowed.  In inline @code{asm} this constraint is only
-+allowed if the operand is used exactly once in an instruction that can
-+handle the side-effects.  Not using an operand with @samp{<} in constraint
-+string in the inline @code{asm} pattern at all or using it in multiple
-+instructions isn't valid, because the side-effects wouldn't be performed
-+or would be performed more than once.  Furthermore, on some targets
-+the operand with @samp{<} in constraint string must be accompanied by
-+special instruction suffixes like @code{%U0} instruction suffix on PowerPC
-+or @code{%P0} on IA-64.
- 
- @cindex @samp{>} in constraint
- @item @samp{>}
- A memory operand with autoincrement addressing (either preincrement or
--postincrement) is allowed.
-+postincrement) is allowed.  In inline @code{asm} the same restrictions
-+as for @samp{<} apply.
- 
- @cindex @samp{r} in constraint
- @cindex registers in constraints
---- gcc/recog.c	(revision 161327)
-+++ gcc/recog.c	(revision 161328)
-@@ -1601,6 +1601,9 @@ int
- asm_operand_ok (rtx op, const char *constraint, const char **constraints)
- {
-   int result = 0;
-+#ifdef AUTO_INC_DEC
-+  bool incdec_ok = false;
-+#endif
- 
-   /* Use constrain_operands after reload.  */
-   gcc_assert (!reload_completed);
-@@ -1608,7 +1611,7 @@ asm_operand_ok (rtx op, const char *cons
-   /* Empty constraint string is the same as "X,...,X", i.e. X for as
-      many alternatives as required to match the other operands.  */
-   if (*constraint == '\0')
--    return 1;
-+    result = 1;
- 
-   while (*constraint)
-     {
-@@ -1685,6 +1688,9 @@ asm_operand_ok (rtx op, const char *cons
- 		  || GET_CODE (XEXP (op, 0)) == PRE_DEC
- 		  || GET_CODE (XEXP (op, 0)) == POST_DEC))
- 	    result = 1;
-+#ifdef AUTO_INC_DEC
-+	  incdec_ok = true;
-+#endif
- 	  break;
- 
- 	case '>':
-@@ -1693,6 +1699,9 @@ asm_operand_ok (rtx op, const char *cons
- 		  || GET_CODE (XEXP (op, 0)) == PRE_INC
- 		  || GET_CODE (XEXP (op, 0)) == POST_INC))
- 	    result = 1;
-+#ifdef AUTO_INC_DEC
-+	  incdec_ok = true;
-+#endif
- 	  break;
- 
- 	case 'E':
-@@ -1814,6 +1823,23 @@ asm_operand_ok (rtx op, const char *cons
- 	return 0;
-     }
- 
-+#ifdef AUTO_INC_DEC
-+  /* For operands without < or > constraints reject side-effects.  */
-+  if (!incdec_ok && result && MEM_P (op))
-+    switch (GET_CODE (XEXP (op, 0)))
-+      {
-+      case PRE_INC:
-+      case POST_INC:
-+      case PRE_DEC:
-+      case POST_DEC:
-+      case PRE_MODIFY:
-+      case POST_MODIFY:
-+	return 0;
-+      default:
-+	break;
-+      }
-+#endif
-+
-   return result;
- }
- 
-@@ -2039,6 +2065,7 @@ extract_insn (rtx insn)
-   recog_data.n_operands = 0;
-   recog_data.n_alternatives = 0;
-   recog_data.n_dups = 0;
-+  recog_data.is_asm = false;
- 
-   switch (GET_CODE (body))
-     {
-@@ -2085,6 +2112,7 @@ extract_insn (rtx insn)
- 	      while (*p)
- 		recog_data.n_alternatives += (*p++ == ',');
- 	    }
-+	  recog_data.is_asm = true;
- 	  break;
- 	}
-       fatal_insn_not_found (insn);
-@@ -2699,6 +2727,30 @@ constrain_operands (int strict)
- 		    = recog_data.operand[funny_match[funny_match_index].this_op];
- 		}
- 
-+#ifdef AUTO_INC_DEC
-+	      /* For operands without < or > constraints reject side-effects.  */
-+	      if (recog_data.is_asm)
-+		{
-+		  for (opno = 0; opno < recog_data.n_operands; opno++)
-+		    if (MEM_P (recog_data.operand[opno]))
-+		      switch (GET_CODE (XEXP (recog_data.operand[opno], 0)))
-+			{
-+			case PRE_INC:
-+			case POST_INC:
-+			case PRE_DEC:
-+			case POST_DEC:
-+			case PRE_MODIFY:
-+			case POST_MODIFY:
-+			  if (strchr (recog_data.constraints[opno], '<') == NULL
-+			      || strchr (recog_data.constraints[opno], '>')
-+				 == NULL)
-+			    return 0;
-+			  break;
-+			default:
-+			  break;
-+			}
-+		}
-+#endif
- 	      return 1;
- 	    }
- 	}
---- gcc/recog.h	(revision 161327)
-+++ gcc/recog.h	(revision 161328)
-@@ -230,6 +230,9 @@ struct recog_data
-   /* The number of alternatives in the constraints for the insn.  */
-   char n_alternatives;
- 
-+  /* True if insn is ASM_OPERANDS.  */
-+  bool is_asm;
-+
-   /* Specifies whether an insn alternative is enabled using the
-      `enabled' attribute in the insn pattern definition.  For back
-      ends not using the `enabled' attribute the array fields are
---- gcc/testsuite/g++.dg/torture/pr44492.C	(revision 0)
-+++ gcc/testsuite/g++.dg/torture/pr44492.C	(revision 161328)
-@@ -0,0 +1,31 @@
-+// PR middle-end/44492
-+// { dg-do run }
-+
-+struct T { unsigned long p; };
-+struct S { T a, b, c; unsigned d; };
-+
-+__attribute__((noinline))
-+void
-+bar (const T &x, const T &y)
-+{
-+  if (x.p != 0x2348 || y.p != 0x2346)
-+    __builtin_abort ();
-+}
-+
-+__attribute__((noinline))
-+void
-+foo (S &s, T e)
-+{
-+  unsigned long a = e.p;
-+  unsigned long b = s.b.p;
-+  __asm__ volatile ("" : : "rm" (a), "rm" (b));
-+  bar (e, s.b);
-+}
-+
-+int
-+main ()
-+{
-+  S s = { { 0x2345 }, { 0x2346 }, { 0x2347 }, 6 };
-+  T t = { 0x2348 };
-+  foo (s, t);
-+}

gcc44-pr44610.patch

@@ -1,32 +0,0 @@
-2010-06-23  Alexandre Oliva  <aoliva@redhat.com>
-
-	PR debug/44610
-	* simplify-rtx.c (delegitimize_mem_from_attrs): Don't use a base
-	address if the offset is unknown.
-
---- gcc/simplify-rtx.c.orig	2010-06-23 01:15:14.000000000 -0300
-+++ gcc/simplify-rtx.c	2010-06-23 01:20:21.000000000 -0300
-@@ -208,10 +208,11 @@ avoid_constant_pool_reference (rtx x)
- rtx
- delegitimize_mem_from_attrs (rtx x)
- {
-+  /* MEMs without MEM_OFFSETs may have been offset, so we can't just
-+     use their base addresses as equivalent.  */
-   if (MEM_P (x)
-       && MEM_EXPR (x)
--      && (!MEM_OFFSET (x)
--	  || GET_CODE (MEM_OFFSET (x)) == CONST_INT))
-+      && MEM_OFFSET (x))
-     {
-       tree decl = MEM_EXPR (x);
-       enum machine_mode mode = GET_MODE (x);
-@@ -264,8 +265,7 @@ delegitimize_mem_from_attrs (rtx x)
- 	{
- 	  rtx newx;
- 
--	  if (MEM_OFFSET (x))
--	    offset += INTVAL (MEM_OFFSET (x));
-+	  offset += INTVAL (MEM_OFFSET (x));
- 
- 	  newx = DECL_RTL (decl);
- 

import.log

@@ -21,3 +21,4 @@ gcc-4_4_4-5_fc14:HEAD:gcc-4.4.4-5.fc14.src.rpm:1274827803
 gcc-4_4_4-7_fc14:HEAD:gcc-4.4.4-7.fc14.src.rpm:1275991256
 gcc-4_4_4-8_fc14:HEAD:gcc-4.4.4-8.fc14.src.rpm:1276244517
 gcc-4_4_4-9_fc14:HEAD:gcc-4.4.4-9.fc14.src.rpm:1277410688
+gcc-4_4_4-10_fc14:HEAD:gcc-4.4.4-10.fc14.src.rpm:1277882958

sources

@@ -1,2 +1,2 @@
 2659f09c2e43ef8b7d4406321753f1b2  fastjar-0.97.tar.gz
-32d385c34788faa23d93cd8b55fecd32  gcc-4.4.4-20100624.tar.bz2
+1e5a3dc8063ea17ed92939cd01d244d0  gcc-4.4.4-20100630.tar.bz2