4.8.2-15
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39f49505ef
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33
gcc.spec
33
gcc.spec
@ -3,7 +3,7 @@
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%global gcc_version 4.8.2
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# Note, gcc_release must be integer, if you want to add suffixes to
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# %{release}, append them after %{gcc_release} on Release: line.
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%global gcc_release 14
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%global gcc_release 15
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%global _unpackaged_files_terminate_build 0
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%global _performance_build 1
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%global multilib_64_archs sparc64 ppc64 ppc64p7 s390x x86_64
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@ -49,6 +49,11 @@
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%endif
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%global build_cloog 1
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%global build_libstdcxx_docs 1
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%ifarch %{ix86} x86_64 ppc ppc64 ppc64p7 s390 s390x %{arm} aarch64
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%global attr_ifunc 1
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%else
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%global attr_ifunc 0
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%endif
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# If you don't have already a usable gcc-java and libgcj for your arch,
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# do on some arch which has it rpmbuild -bc --with java_tar gcc.spec
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# which creates libjava-classes-%{version}-%{release}.tar.bz2
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@ -198,7 +203,10 @@ Patch13: gcc48-pr56564.patch
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Patch14: gcc48-pr56493.patch
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Patch15: gcc48-color-auto.patch
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Patch16: gcc48-pr28865.patch
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Patch17: gcc48-pr60010.patch
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Patch17: gcc48-libgo-p224.patch
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Patch18: gcc48-pr60137.patch
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Patch19: gcc48-pr60010.patch
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Patch20: gcc48-pr60046.patch
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Patch1000: fastjar-0.97-segfault.patch
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Patch1001: fastjar-0.97-len1.patch
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@ -759,7 +767,11 @@ package or when debugging this package.
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%patch15 -p0 -b .color-auto~
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%endif
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%patch16 -p0 -b .pr28865~
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%patch17 -p0 -b .pr60010~
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%patch17 -p0 -b .libgo-p224~
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rm -f libgo/go/crypto/elliptic/p224{,_test}.go
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%patch18 -p0 -b .pr60137~
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%patch19 -p0 -b .pr60010~
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%patch20 -p0 -b .pr60046~
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%if 0%{?_enable_debug_packages}
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cat > split-debuginfo.sh <<\EOF
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@ -1042,6 +1054,11 @@ CC="$CC" CFLAGS="$OPT_FLAGS" \
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%else
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--without-isl --without-cloog \
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%endif
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%if 0%{?fedora} >= 21 || 0%{?rhel} >= 7
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%if %{attr_ifunc}
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--enable-gnu-indirect-function \
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%endif
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%endif
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%ifarch %{arm}
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--disable-sjlj-exceptions \
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%endif
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@ -3027,8 +3044,16 @@ fi
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%{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin
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%changelog
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* Fri Jan 31 2014 Kyle McMartin <kyle@redhat.com> 4.8.2-14
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* Thu Feb 20 2014 Jakub Jelinek <jakub@redhat.com> 4.8.2-15
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- fix exception spec instantiation ICE (#1067398, PR c++/60046)
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- fix pch on aarch64 (#1058991, PR pch/60010)
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- configure with --enable-gnu-indirect-function on architectures
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and distros that support it and don't support it by default
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yet (#1067245)
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* Wed Feb 19 2014 Jakub Jelinek <jakub@redhat.com> 4.8.2-14
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- remove libgo P.224 elliptic curve (#1066539)
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- fix -mcpu=power8 ICE (#1064242, PR target/60137)
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* Tue Jan 21 2014 Jakub Jelinek <jakub@redhat.com> 4.8.2-13
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- when removing -Wall from CXXFLAGS, if -Werror=format-security
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1302
gcc48-libgo-p224.patch
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1302
gcc48-libgo-p224.patch
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File diff suppressed because it is too large
Load Diff
43
gcc48-pr60046.patch
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43
gcc48-pr60046.patch
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@ -0,0 +1,43 @@
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2014-02-19 Jason Merrill <jason@redhat.com>
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PR c++/60046
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* pt.c (maybe_instantiate_noexcept): Don't instantiate exception
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spec from template context.
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--- gcc/cp/pt.c (revision 207920)
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+++ gcc/cp/pt.c (revision 207921)
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@@ -18567,6 +18567,10 @@ maybe_instantiate_noexcept (tree fn)
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{
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tree fntype, spec, noex, clone;
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+ /* Don't instantiate a noexcept-specification from template context. */
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+ if (processing_template_decl)
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+ return;
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+
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if (DECL_CLONED_FUNCTION_P (fn))
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fn = DECL_CLONED_FUNCTION (fn);
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fntype = TREE_TYPE (fn);
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--- gcc/testsuite/g++.dg/cpp0x/noexcept22.C (revision 0)
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+++ gcc/testsuite/g++.dg/cpp0x/noexcept22.C (revision 207921)
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@@ -0,0 +1,21 @@
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+// PR c++/60046
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+// { dg-require-effective-target c++11 }
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+
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+constexpr bool foo () { return noexcept (true); }
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+template <typename T>
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+struct V
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+{
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+ void bar (V &) noexcept (foo ()) {}
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+};
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+template <typename T>
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+struct W : public V <int>
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+{
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+ void bar (W &x) { V <int>::bar (x); }
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+};
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+
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+int
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+main ()
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+{
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+ W <int> a, b;
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+ a.bar (b);
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+}
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46
gcc48-pr60137.patch
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46
gcc48-pr60137.patch
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@ -0,0 +1,46 @@
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2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>
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PR target/60137
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* config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter
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for VSX/Altivec vectors that land in GPR registers.
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* gcc.target/powerpc/pr60137.c: New file.
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--- gcc/config/rs6000/rs6000.md (revision 207698)
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+++ gcc/config/rs6000/rs6000.md (revision 207699)
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@@ -9963,6 +9963,15 @@ (define_insn_and_split "reload_vsx_from_
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[(set_attr "length" "12")
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(set_attr "type" "three")])
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+(define_split
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+ [(set (match_operand:FMOVE128_GPR 0 "nonimmediate_operand" "")
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+ (match_operand:FMOVE128_GPR 1 "input_operand" ""))]
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+ "reload_completed
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+ && (int_reg_operand (operands[0], <MODE>mode)
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+ || int_reg_operand (operands[1], <MODE>mode))"
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+ [(pc)]
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+{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; })
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+
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;; Move SFmode to a VSX from a GPR register. Because scalar floating point
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;; type is stored internally as double precision in the VSX registers, we have
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;; to convert it from the vector format.
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--- gcc/testsuite/gcc.target/powerpc/pr60137.c (revision 0)
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+++ gcc/testsuite/gcc.target/powerpc/pr60137.c (revision 207699)
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@@ -0,0 +1,17 @@
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+/* { dg-do compile { target { powerpc*-*-* } } } */
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+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
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+/* { dg-require-effective-target powerpc_p8vector_ok } */
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+/* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */
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+
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+/* target/60137, compiler got a 'could not split insn error'. */
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+
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+extern int target_flags;
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+extern char fixed_regs[53];
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+extern char call_used_regs[53];
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+
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+void init_reg_sets_1(void)
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+{
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+ int i;
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+ for (i = 0; i < 53; i++)
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+ fixed_regs[i] = call_used_regs[i] = (call_used_regs[i] &((target_flags & 0x02000000) ? 2 : 1)) != 0;
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+}
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