4.7.0-0.8.fc17
This commit is contained in:
parent
8529466512
commit
15d1c7249f
1
.gitignore
vendored
1
.gitignore
vendored
@ -13,3 +13,4 @@
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/gcc-4.7.0-20120106.tar.bz2
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/gcc-4.7.0-20120106.tar.bz2
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/gcc-4.7.0-20120112.tar.bz2
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/gcc-4.7.0-20120112.tar.bz2
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/gcc-4.7.0-20120117.tar.bz2
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/gcc-4.7.0-20120117.tar.bz2
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/gcc-4.7.0-20120119.tar.bz2
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21
gcc.spec
21
gcc.spec
@ -1,9 +1,9 @@
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%global DATE 20120117
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%global DATE 20120119
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%global SVNREV 183258
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%global SVNREV 183308
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%global gcc_version 4.7.0
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%global gcc_version 4.7.0
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# Note, gcc_release must be integer, if you want to add suffixes to
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# Note, gcc_release must be integer, if you want to add suffixes to
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# %{release}, append them after %{gcc_release} on Release: line.
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# %{release}, append them after %{gcc_release} on Release: line.
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%global gcc_release 0.7
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%global gcc_release 0.8
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%global _unpackaged_files_terminate_build 0
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%global _unpackaged_files_terminate_build 0
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%global multilib_64_archs sparc64 ppc64 s390x x86_64
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%global multilib_64_archs sparc64 ppc64 s390x x86_64
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%ifarch %{ix86} x86_64 ia64 ppc ppc64 alpha
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%ifarch %{ix86} x86_64 ia64 ppc ppc64 alpha
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@ -174,8 +174,7 @@ Patch12: gcc47-libstdc++-docs.patch
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Patch13: gcc47-no-add-needed.patch
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Patch13: gcc47-no-add-needed.patch
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Patch14: gcc47-ppl-0.10.patch
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Patch14: gcc47-ppl-0.10.patch
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Patch15: gcc47-libitm-fno-exceptions.patch
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Patch15: gcc47-libitm-fno-exceptions.patch
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Patch16: gcc47-pr50325.patch
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Patch16: gcc47-pr51856.patch
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Patch17: gcc47-pr51876.patch
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Patch1000: fastjar-0.97-segfault.patch
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Patch1000: fastjar-0.97-segfault.patch
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Patch1001: fastjar-0.97-len1.patch
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Patch1001: fastjar-0.97-len1.patch
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@ -675,8 +674,7 @@ package or when debugging this package.
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%patch14 -p0 -b .ppl-0.10~
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%patch14 -p0 -b .ppl-0.10~
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%endif
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%endif
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%patch15 -p0 -b .libitm-fno-exceptions~
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%patch15 -p0 -b .libitm-fno-exceptions~
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%patch16 -p0 -b .pr50325~
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%patch16 -p0 -b .pr51856~
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%patch17 -p0 -b .pr51876~
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%if 0%{?_enable_debug_packages}
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%if 0%{?_enable_debug_packages}
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cat > split-debuginfo.sh <<\EOF
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cat > split-debuginfo.sh <<\EOF
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@ -2637,6 +2635,15 @@ fi
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%{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin
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%{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin
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%changelog
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%changelog
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* Thu Jan 19 2012 Jakub Jelinek <jakub@redhat.com> 4.7.0-0.8
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- update from trunk
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- PRs bootstrap/50237, c++/51225, c++/51889, fortran/48426, fortran/51634,
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go/50656, libmudflap/40778, libstdc++/51845, libstdc++/51866,
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lto/51280, middle-end/51192, rtl-optimization/48496,
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rtl-optimization/51505, tree-optimization/37997,
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tree-optimization/46590
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- fix a reload bug on s390 (#773565, PR rtl-optimization/51856)
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* Tue Jan 17 2012 Jakub Jelinek <jakub@redhat.com> 4.7.0-0.7
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* Tue Jan 17 2012 Jakub Jelinek <jakub@redhat.com> 4.7.0-0.7
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- update from trunk
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- update from trunk
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- PRs bootstrap/51860, c++/14179, c++/20681, c++/50012, c++/51403,
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- PRs bootstrap/51860, c++/14179, c++/20681, c++/50012, c++/51403,
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@ -1,62 +0,0 @@
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diff -up ../_clean/gcc/expmed.c gcc/expmed.c
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--- ../_clean/gcc/expmed.c 2011-12-09 15:20:36.000000000 +0100
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+++ gcc/expmed.c 2011-12-09 15:23:01.000000000 +0100
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@@ -543,7 +543,8 @@ store_bit_field_1 (rtx str_rtx, unsigned
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is not allowed. */
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fieldmode = GET_MODE (value);
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if (fieldmode == VOIDmode)
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- fieldmode = smallest_mode_for_size (nwords * BITS_PER_WORD, MODE_INT);
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+ fieldmode = smallest_mode_for_size (nwords *
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+ BITS_PER_WORD, MODE_INT);
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last = get_last_insn ();
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for (i = 0; i < nwords; i++)
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@@ -557,9 +558,21 @@ store_bit_field_1 (rtx str_rtx, unsigned
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0)
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: (int) i * BITS_PER_WORD);
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rtx value_word = operand_subword_force (value, wordnum, fieldmode);
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+ unsigned HOST_WIDE_INT new_bitsize =
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+ MIN (BITS_PER_WORD, bitsize - i * BITS_PER_WORD);
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- if (!store_bit_field_1 (op0, MIN (BITS_PER_WORD,
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- bitsize - i * BITS_PER_WORD),
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+ /* If the remaining chunk doesn't have full wordsize we have
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+ to make sure that for big endian machines the higher order
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+ bits are used. */
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+ if (new_bitsize < BITS_PER_WORD && BYTES_BIG_ENDIAN && !backwards)
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+ value_word = simplify_expand_binop (word_mode, lshr_optab,
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+ value_word,
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+ GEN_INT (BITS_PER_WORD
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+ - new_bitsize),
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+ NULL_RTX, true,
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+ OPTAB_LIB_WIDEN);
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+
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+ if (!store_bit_field_1 (op0, new_bitsize,
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bitnum + bit_offset,
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bitregion_start, bitregion_end,
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word_mode,
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--- ../_clean/gcc/optabs.c 2011-12-23 23:39:30.000000000 +0100
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+++ gcc/optabs.c 2011-12-24 18:40:01.000000000 +0100
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@@ -659,7 +659,7 @@ expand_ternary_op (enum machine_mode mod
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calculated at compile time. The arguments and return value are
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otherwise the same as for expand_binop. */
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-static rtx
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+rtx
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simplify_expand_binop (enum machine_mode mode, optab binoptab,
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rtx op0, rtx op1, rtx target, int unsignedp,
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enum optab_methods methods)
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diff -up ../_clean/gcc/optabs.h gcc/optabs.h
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--- ../_clean/gcc/optabs.h 2011-12-23 23:39:30.000000000 +0100
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+++ gcc/optabs.h 2011-12-24 18:40:01.000000000 +0100
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@@ -859,6 +859,10 @@ extern rtx expand_ternary_op (enum machi
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extern rtx expand_binop (enum machine_mode, optab, rtx, rtx, rtx, int,
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enum optab_methods);
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+extern rtx simplify_expand_binop (enum machine_mode mode, optab binoptab,
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+ rtx op0, rtx op1, rtx target, int unsignedp,
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+ enum optab_methods methods);
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+
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extern bool force_expand_binop (enum machine_mode, optab, rtx, rtx, rtx, int,
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enum optab_methods);
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45
gcc47-pr51856.patch
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45
gcc47-pr51856.patch
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2012-01-19 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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PR rtl-optimization/51856
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* reload.c (find_reloads_subreg_address): Set the address_reloaded
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flag to reloaded.
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* gcc.c-torture/compile/pr51856.c: New testcase.
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--- gcc/reload.c.jj 2012-01-05 21:54:36.000000000 +0100
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+++ gcc/reload.c 2012-01-19 20:17:26.151735687 +0100
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@@ -6232,7 +6232,7 @@ find_reloads_subreg_address (rtx x, int
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}
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}
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if (reloaded && address_reloaded)
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- *address_reloaded = 1;
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+ *address_reloaded = reloaded;
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return x;
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}
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--- gcc/testsuite/gcc.c-torture/compile/pr51856.c.jj 2012-01-19 20:17:26.151735687 +0100
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+++ gcc/testsuite/gcc.c-torture/compile/pr51856.c 2012-01-19 20:17:26.151735687 +0100
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@@ -0,0 +1,23 @@
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+struct B { int b1; long long b2, b3; int b4; };
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+struct C { char c1[40], c2, c3[96]; long long c4[5], c5; char c6[596]; };
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+void fn1 (long long), fn2 (char *, int), fn4 (void);
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+int r, fn3 (int, const char *, int, char *, int, int);
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+
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+void
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+foo (int t, int u, int v, int w, int x, int y, struct B *z)
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+{
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+ char c[512], d[512], e;
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+ struct C g;
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+ long long f, h[255];
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+ struct B j;
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+ __builtin_bzero (&j, sizeof j);
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+ if (y > w)
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+ fn4 ();
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+ __builtin_bzero (&g, sizeof g);
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+ g.c5 = h[0];
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+ fn1 (z ? z->b3 : f);
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+ g.c2 = y;
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+ fn2 (d, 256);
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+ if (fn3 (r, "", e, c, 0, 16))
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+ fn4 ();
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+}
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@ -1,17 +0,0 @@
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2012-01-17 Jakub Jelinek <jakub@redhat.com>
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PR target/51876
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* config/arm/neon.md (*neon_vswp<mode>): Fix up operand
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numbers in the insn pattern.
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--- gcc/config/arm/neon.md.jj 2012-01-13 21:47:35.000000000 +0100
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+++ gcc/config/arm/neon.md 2012-01-17 12:46:14.419950640 +0100
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@@ -2869,7 +2869,7 @@ (define_insn "*neon_vswp<mode>"
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(match_operand:VDQX 1 "s_register_operand" "+w"))
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(set (match_dup 1) (match_dup 0))]
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"TARGET_NEON && reload_completed"
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- "vswp\t%<V_reg>1, %<V_reg>2"
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+ "vswp\t%<V_reg>0, %<V_reg>1"
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[(set (attr "neon_type")
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(if_then_else (match_test "<Is_d_reg>")
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(const_string "neon_bp_simple")
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