73 lines
2.0 KiB
Diff
73 lines
2.0 KiB
Diff
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Fix PR92950: Wrong code emitted for movv1qi
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The backend emits 16 bit memory loads for single element character
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vector. As a result the character will not be right justified in the
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GPR.
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2019-12-17 Andreas Krebbel <krebbel@linux.ibm.com>
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Backport from mainline
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2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com>
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PR target/92950
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* config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy,
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and lhrl with llc.
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--- gcc/config/s390/vector.md
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+++ gcc/config/s390/vector.md
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@@ -289,9 +289,9 @@
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; However, this would probably be slower.
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(define_insn "mov<mode>"
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- [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,d,d,R,T")
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- (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,R,T,b,d,d"))]
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- ""
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+ [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,R,T")
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+ (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,T,d,d"))]
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+ "TARGET_VX"
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"@
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vlr\t%v0,%v1
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vlvgb\t%v0,%1,0
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@@ -309,12 +309,10 @@
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mviy\t%0,-1
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lhi\t%0,0
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lhi\t%0,-1
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- lh\t%0,%1
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- lhy\t%0,%1
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- lhrl\t%0,%1
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+ llc\t%0,%1
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stc\t%1,%0
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stcy\t%1,%0"
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- [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RX,RXY,RIL,RX,RXY")])
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+ [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RXY,RX,RXY")])
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(define_insn "mov<mode>"
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[(set (match_operand:V_16 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, Q, d, d,d,d,d,R,T,b")
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--- /dev/null
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+++ gcc/testsuite/gcc.target/s390/vector/pr92950.c
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@@ -0,0 +1,24 @@
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+/* { dg-do run } */
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+/* { dg-options "-O3 -mzarch -march=z13" } */
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+
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+struct a {
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+ int b;
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+ char c;
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+};
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+struct a d = {1, 16};
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+struct a *e = &d;
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+
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+int f = 0;
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+
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+int main() {
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+ struct a g = {0, 0 };
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+ f = 0;
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+
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+ for (; f <= 1; f++) {
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+ g = d;
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+ *e = g;
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+ }
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+
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+ if (d.c != 16)
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+ __builtin_abort();
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+}
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