77 lines
2.9 KiB
Diff
77 lines
2.9 KiB
Diff
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From bb0be5e283a5c995990846b6dad998ba1de235f2 Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Tue, 10 Oct 2023 12:54:58 +0200
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Subject: [PATCH 22/22] [debug] add logging, try handle extended topology v2
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failure
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https://bugzilla.redhat.com/show_bug.cgi?id=2241388
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---
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.../Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
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index aa4eb11181f6..1867c3e236a8 100644
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--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
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+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
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@@ -1264,6 +1264,7 @@ GetProcessorLocationByApicId (
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*Package = 0;
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}
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+ DEBUG ((DEBUG_INFO, "%a: no SMP\n", __func__));
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return;
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}
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@@ -1300,6 +1301,7 @@ GetProcessorLocationByApicId (
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//
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if (ExtendedTopologyEbx.Uint32 != 0) {
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TopologyLeafSupported = TRUE;
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+ DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v1\n", __func__));
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//
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// Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
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@@ -1351,6 +1353,7 @@ GetProcessorLocationByApicId (
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//
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if (StandardSignatureIsAuthenticAMD ()) {
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if (MaxExtendedCpuIdIndex >= CPUID_AMD_PROCESSOR_TOPOLOGY) {
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+ DEBUG ((DEBUG_INFO, "%a: AMD Topology\n", __func__));
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AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, &AmdExtendedCpuSigEcx.Uint32, NULL);
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if (AmdExtendedCpuSigEcx.Bits.TopologyExtensions != 0) {
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//
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@@ -1440,6 +1443,7 @@ GetProcessorLocation2ByApicId (
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//
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AsmCpuid (CPUID_SIGNATURE, &MaxStandardCpuIdIndex, NULL, NULL, NULL);
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if (MaxStandardCpuIdIndex < CPUID_V2_EXTENDED_TOPOLOGY) {
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+ fallback_v1:
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if (Die != NULL) {
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*Die = 0;
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}
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@@ -1460,6 +1464,7 @@ GetProcessorLocation2ByApicId (
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// If the V2 extended topology enumeration leaf is available, it
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// is the preferred mechanism for enumerating topology.
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//
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+ DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v2\n", __func__));
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for (Index = 0; ; Index++) {
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AsmCpuidEx (
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CPUID_V2_EXTENDED_TOPOLOGY,
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@@ -1471,10 +1476,17 @@ GetProcessorLocation2ByApicId (
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);
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LevelType = ExtendedTopologyEcx.Bits.LevelType;
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+ DEBUG ((DEBUG_INFO, "%a: %d: type %x, shift %x\n", __func__, Index,
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+ ExtendedTopologyEcx.Bits.LevelType,
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+ ExtendedTopologyEax.Bits.ApicIdShift));
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//
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// first level reported should be SMT.
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//
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+ if (!((Index != 0) || (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT))) {
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+ DEBUG ((DEBUG_INFO, "%a: ASSERT hack\n", __func__));
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+ goto fallback_v1;
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+ }
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ASSERT ((Index != 0) || (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT));
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if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID) {
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break;
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--
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2.41.0
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