From bb0be5e283a5c995990846b6dad998ba1de235f2 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 10 Oct 2023 12:54:58 +0200
Subject: [PATCH 22/22] [debug] add logging, try handle extended topology v2
 failure

https://bugzilla.redhat.com/show_bug.cgi?id=2241388
---
 .../Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c  | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index aa4eb11181f6..1867c3e236a8 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -1264,6 +1264,7 @@ GetProcessorLocationByApicId (
       *Package = 0;
     }
 
+    DEBUG ((DEBUG_INFO, "%a: no SMP\n", __func__));
     return;
   }
 
@@ -1300,6 +1301,7 @@ GetProcessorLocationByApicId (
     //
     if (ExtendedTopologyEbx.Uint32 != 0) {
       TopologyLeafSupported = TRUE;
+      DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v1\n", __func__));
 
       //
       // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
@@ -1351,6 +1353,7 @@ GetProcessorLocationByApicId (
     //
     if (StandardSignatureIsAuthenticAMD ()) {
       if (MaxExtendedCpuIdIndex >= CPUID_AMD_PROCESSOR_TOPOLOGY) {
+        DEBUG ((DEBUG_INFO, "%a: AMD Topology\n", __func__));
         AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, &AmdExtendedCpuSigEcx.Uint32, NULL);
         if (AmdExtendedCpuSigEcx.Bits.TopologyExtensions != 0) {
           //
@@ -1440,6 +1443,7 @@ GetProcessorLocation2ByApicId (
   //
   AsmCpuid (CPUID_SIGNATURE, &MaxStandardCpuIdIndex, NULL, NULL, NULL);
   if (MaxStandardCpuIdIndex < CPUID_V2_EXTENDED_TOPOLOGY) {
+  fallback_v1:
     if (Die != NULL) {
       *Die = 0;
     }
@@ -1460,6 +1464,7 @@ GetProcessorLocation2ByApicId (
   // If the V2 extended topology enumeration leaf is available, it
   // is the preferred mechanism for enumerating topology.
   //
+  DEBUG ((DEBUG_INFO, "%a: ExtendedTopology, v2\n", __func__));
   for (Index = 0; ; Index++) {
     AsmCpuidEx (
       CPUID_V2_EXTENDED_TOPOLOGY,
@@ -1471,10 +1476,17 @@ GetProcessorLocation2ByApicId (
       );
 
     LevelType = ExtendedTopologyEcx.Bits.LevelType;
+    DEBUG ((DEBUG_INFO, "%a:   %d: type %x, shift %x\n", __func__, Index,
+            ExtendedTopologyEcx.Bits.LevelType,
+            ExtendedTopologyEax.Bits.ApicIdShift));
 
     //
     // first level reported should be SMT.
     //
+    if (!((Index != 0) || (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT))) {
+      DEBUG ((DEBUG_INFO, "%a: ASSERT hack\n", __func__));
+      goto fallback_v1;
+    }
     ASSERT ((Index != 0) || (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT));
     if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID) {
       break;
-- 
2.41.0