dpdk/SOURCES/arm64-armv8a-linuxapp-gcc-config

# -*- cfg-sha: fedc4fc78a46e35070ea61c62f51c1cb9283062b4bad46fb91f6c2eb9ec536c5
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2015 Cavium, Inc
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Cavium, Inc
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2016 Intel Corporation
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2017 Intel Corporation
# String that appears before the version number
CONFIG_RTE_VER_PREFIX="DPDK"
# Version information completed when this file is processed for a build
CONFIG_RTE_VER_YEAR=19
CONFIG_RTE_VER_MONTH=11
CONFIG_RTE_VER_MINOR=2
CONFIG_RTE_VER_SUFFIX=""
CONFIG_RTE_VER_RELEASE=99
 # RTE_EXEC_ENV values are the directories in mk/exec-env/
CONFIG_RTE_EXEC_ENV="linuxapp"
# RTE_ARCH values are architecture we compile for. directories in mk/arch/
CONFIG_RTE_ARCH="arm64"
# machine can define specific variables or action for a specific board
# RTE_MACHINE values are architecture we compile for. directories in mk/machine/
CONFIG_RTE_MACHINE="armv8a"
# The compiler we use.
# RTE_TOOLCHAIN values are architecture we compile for. directories in mk/toolchain/
CONFIG_RTE_TOOLCHAIN="gcc"
# Use intrinsics or assembly code for key routines
CONFIG_RTE_FORCE_INTRINSICS=y
# Machine forces strict alignment constraints.
CONFIG_RTE_ARCH_STRICT_ALIGN=n
# Enable link time optimization
CONFIG_RTE_ENABLE_LTO=n
# Compile to share library
CONFIG_RTE_BUILD_SHARED_LIB=y
# Use newest code breaking previous ABI
CONFIG_RTE_NEXT_ABI=n
# Machine's cache line size
CONFIG_RTE_CACHE_LINE_SIZE=128
# Memory model
CONFIG_RTE_USE_C11_MEM_MODEL=y
# Compile Environment Abstraction Layer
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=256
CONFIG_RTE_MAX_NUMA_NODES=8
CONFIG_RTE_MAX_HEAPS=32
CONFIG_RTE_MAX_MEMSEG_LISTS=64
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192
CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768
# a "type" is a combination of page size and NUMA node. total number of memseg
# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split
# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or
# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of
# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller
CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768
CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072
# global maximum usable amount of VA, in megabytes
CONFIG_RTE_MAX_MEM_MB=524288
CONFIG_RTE_MAX_MEMZONE=2560
CONFIG_RTE_MAX_TAILQ=32
CONFIG_RTE_ENABLE_ASSERT=n
CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
CONFIG_RTE_LOG_HISTORY=256
CONFIG_RTE_BACKTRACE=y
CONFIG_RTE_LIBEAL_USE_HPET=n
CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=y
CONFIG_RTE_MAX_VFIO_GROUPS=64
CONFIG_RTE_MAX_VFIO_CONTAINERS=64
CONFIG_RTE_MALLOC_DEBUG=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=y
CONFIG_RTE_USE_LIBBSD=n
# Recognize/ignore architecture we compile for. AVX/AVX512 CPU flags for performance/power testing.
# AVX512 is marked as experimental for now, will enable it after enough
# field test and possible optimization.
CONFIG_RTE_ENABLE_AVX=y
CONFIG_RTE_ENABLE_AVX512=n
# Use ARM LSE ATOMIC instructions
CONFIG_RTE_ARM_FEATURE_ATOMICS=n
# Default driver path (or "" to disable)
CONFIG_RTE_EAL_PMD_PATH="/usr/lib64/dpdk-pmds"
# Compile Environment Abstraction Layer to support Vmware TSC map
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
# Compile architecture we compile for. PCI library
CONFIG_RTE_LIBRTE_PCI=y
# Compile architecture we compile for. argument parser library
CONFIG_RTE_LIBRTE_KVARGS=y
# Compile generic ethernet library
CONFIG_RTE_LIBRTE_ETHER=y
CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
CONFIG_RTE_MAX_ETHPORTS=32
CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n
# Turn off Tx preparation stage
# Warning: rte_eth_tx_prepare() can be safely disabled only if using a
# driver which do not implement any Tx preparation.
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
# Common libraries, before Bus/PMDs
CONFIG_RTE_LIBRTE_COMMON_DPAAX=n
# Compile architecture we compile for. Intel FPGA bus
CONFIG_RTE_LIBRTE_IFPGA_BUS=n
# Compile PCI bus driver
CONFIG_RTE_LIBRTE_PCI_BUS=y
# Compile architecture we compile for. vdev bus
CONFIG_RTE_LIBRTE_VDEV_BUS=y
# Compile ARK PMD
CONFIG_RTE_LIBRTE_ARK_PMD=n
CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
# Compile Aquantia Atlantic PMD driver
CONFIG_RTE_LIBRTE_ATLANTIC_PMD=n
# Compile AMD PMD
CONFIG_RTE_LIBRTE_AXGBE_PMD=n
CONFIG_RTE_LIBRTE_AXGBE_PMD_DEBUG=n
# Compile burst-oriented Broadcom PMD driver
CONFIG_RTE_LIBRTE_BNX2X_PMD=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
# Compile burst-oriented Broadcom BNXT PMD driver
CONFIG_RTE_LIBRTE_BNXT_PMD=n
# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
CONFIG_RTE_LIBRTE_CXGBE_PMD=n
# Compile burst-oriented NXP PFE PMD driver
CONFIG_RTE_LIBRTE_PFE_PMD=n
# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=n
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
CONFIG_RTE_LIBRTE_DPAA_PMD=n
CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
# Compile NXP DPAA2 FSL-MC Bus
CONFIG_RTE_LIBRTE_FSLMC_BUS=n
# Compile Support Libraries for NXP DPAA2
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
# Compile burst-oriented NXP DPAA2 PMD driver
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
# Compile NXP ENETC PMD Driver
CONFIG_RTE_LIBRTE_ENETC_PMD=n
# Compile burst-oriented Amazon ENA PMD driver
CONFIG_RTE_LIBRTE_ENA_PMD=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
# Compile burst-oriented Cisco ENIC PMD driver
CONFIG_RTE_LIBRTE_ENIC_PMD=n
# Compile burst-oriented IGB & EM PMD drivers
CONFIG_RTE_LIBRTE_EM_PMD=n
CONFIG_RTE_LIBRTE_IGB_PMD=y
CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
# Compile burst-oriented HINIC PMD driver
CONFIG_RTE_LIBRTE_HINIC_PMD=n
# Compile burst-oriented HNS3 PMD driver
CONFIG_RTE_LIBRTE_HNS3_PMD=n
# Compile burst-oriented IXGBE PMD driver
CONFIG_RTE_LIBRTE_IXGBE_PMD=y
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
CONFIG_RTE_IXGBE_INC_VECTOR=y
CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
# Compile burst-oriented I40E PMD driver
CONFIG_RTE_LIBRTE_I40E_PMD=y
CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
# Compile burst-oriented FM10K PMD
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
# Compile burst-oriented ICE PMD driver
CONFIG_RTE_LIBRTE_ICE_PMD=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC=y
CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n
# Compile burst-oriented IAVF PMD driver
CONFIG_RTE_LIBRTE_IAVF_PMD=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC=n
CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC=n
# Compile burst-oriented IPN3KE PMD driver
CONFIG_RTE_LIBRTE_IPN3KE_PMD=n
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
CONFIG_RTE_LIBRTE_MLX4_PMD=n
CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5,
# ConnectX-6 & BlueField (MLX5) PMD
CONFIG_RTE_LIBRTE_MLX5_PMD=n
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
# Linking method for mlx4/5 dependency on ibverbs and related libraries
# Default linking is dynamic by linker.
# Other options are: dynamic by dlopen at run-time, or statically embedded.
CONFIG_RTE_IBVERBS_LINK_DLOPEN=n
CONFIG_RTE_IBVERBS_LINK_STATIC=n
# Compile burst-oriented Netronome NFP PMD driver
CONFIG_RTE_LIBRTE_NFP_PMD=n
CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n
# QLogic 10G/25G/40G/50G/100G PMD
CONFIG_RTE_LIBRTE_QEDE_PMD=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
#Provides abs path/name of architecture we compile for. firmware file.
#Empty string denotes driver will use default firmware
CONFIG_RTE_LIBRTE_QEDE_FW=""
# Compile burst-oriented Solarflare libefx-based PMD
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
# Compile software PMD backed by SZEDATA2 device
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
# Compile software PMD backed by NFB device
CONFIG_RTE_LIBRTE_NFB_PMD=n
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
# Compile burst-oriented Cavium LiquidIO PMD driver
CONFIG_RTE_LIBRTE_LIO_PMD=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
# Compile burst-oriented Cavium OCTEONTX network PMD driver
CONFIG_RTE_LIBRTE_OCTEONTX_PMD=n
# Compile burst-oriented Marvell OCTEON TX2 network PMD driver
CONFIG_RTE_LIBRTE_OCTEONTX2_PMD=n
# Compile WRS accelerated virtual port (AVP) guest PMD driver
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
# Compile burst-oriented VIRTIO PMD driver
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
# Compile virtio device emulation inside virtio PMD driver
CONFIG_RTE_VIRTIO_USER=n
# Compile burst-oriented VMXNET3 PMD driver
CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
# Compile software PMD backed by AF_PACKET sockets (Linux only)
CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
# Compile software PMD backed by AF_XDP sockets (Linux only)
CONFIG_RTE_LIBRTE_PMD_AF_XDP=n
# Compile Memory Interface PMD driver (Linux only)
CONFIG_RTE_LIBRTE_PMD_MEMIF=n
# Compile link bonding PMD library
CONFIG_RTE_LIBRTE_PMD_BOND=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
# Compile fail-safe PMD
CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
# Compile Marvell PMD driver
CONFIG_RTE_LIBRTE_MVPP2_PMD=n
# Compile Marvell MVNETA PMD driver
CONFIG_RTE_LIBRTE_MVNETA_PMD=n
# Compile support for VMBus library
CONFIG_RTE_LIBRTE_VMBUS=n
# Compile native PMD for Hyper-V/Azure
CONFIG_RTE_LIBRTE_NETVSC_PMD=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n
CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n
# Compile virtual device driver for NetVSC on Hyper-V/Azure
CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=n
# Compile null PMD
CONFIG_RTE_LIBRTE_PMD_NULL=n
# Compile software PMD backed by PCAP files
CONFIG_RTE_LIBRTE_PMD_PCAP=n
# Compile example software rings based PMD
CONFIG_RTE_LIBRTE_PMD_RING=y
CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
# Compile SOFTNIC PMD
CONFIG_RTE_LIBRTE_PMD_SOFTNIC=n
# Compile architecture we compile for. TAP PMD
# It is enabled by default for Linux only.
CONFIG_RTE_LIBRTE_PMD_TAP=y
# Do prefetch of packet data within PMD driver receive function
CONFIG_RTE_PMD_PACKET_PREFETCH=y
# Compile generic wireless base band device library
# EXPERIMENTAL: API may change without prior notice
CONFIG_RTE_LIBRTE_BBDEV=n
CONFIG_RTE_LIBRTE_BBDEV_DEBUG=n
CONFIG_RTE_BBDEV_MAX_DEVS=128
CONFIG_RTE_BBDEV_OFFLOAD_COST=y
CONFIG_RTE_BBDEV_SDK_AVX2=n
CONFIG_RTE_BBDEV_SDK_AVX512=n
# Compile PMD for NULL bbdev device
CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=n
# Compile PMD for turbo software bbdev device
CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n
# Compile PMD for Intel FPGA LTE FEC bbdev device
CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC=n
# Compile generic crypto device library
CONFIG_RTE_LIBRTE_CRYPTODEV=n
CONFIG_RTE_CRYPTO_MAX_DEVS=64
# Compile PMD for ARMv8 Crypto device
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
# Compile NXP CAAM JR crypto Driver
CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n
# Compile NXP DPAA2 crypto sec driver for CAAM HW
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
# NXP DPAA caam - crypto driver
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
# Compile PMD for Cavium OCTEON TX crypto device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=n
# Compile PMD for Marvell OCTEON TX2 crypto device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=n
# Compile PMD for QuickAssist based devices - see docs for details
CONFIG_RTE_LIBRTE_PMD_QAT=n
CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n
# Max. number of QuickAssist devices, which can be detected and attached
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
# Compile PMD for virtio crypto devices
CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO=n
# Number of maximum virtio crypto devices
CONFIG_RTE_MAX_VIRTIO_CRYPTO=32
# Compile PMD for AESNI backed device
CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
# Compile PMD for Software backed device
CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
# Compile PMD for AESNI GCM device
CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
# Compile PMD for SNOW 3G device
CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
# Compile PMD for KASUMI device
CONFIG_RTE_LIBRTE_PMD_KASUMI=n
# Compile PMD for ZUC device
CONFIG_RTE_LIBRTE_PMD_ZUC=n
# Compile PMD for Crypto Scheduler device
CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=n
# Compile PMD for NULL Crypto device
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=n
# Compile PMD for AMD CCP crypto device
CONFIG_RTE_LIBRTE_PMD_CCP=n
# Compile PMD for Marvell Crypto device
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
# Compile PMD for NITROX crypto device
CONFIG_RTE_LIBRTE_PMD_NITROX=n
# Compile generic security library
CONFIG_RTE_LIBRTE_SECURITY=n
# Compile generic compression device library
CONFIG_RTE_LIBRTE_COMPRESSDEV=n
CONFIG_RTE_COMPRESS_MAX_DEVS=64
# Compile compressdev unit test
CONFIG_RTE_COMPRESSDEV_TEST=n
# Compile PMD for Octeontx ZIPVF compression device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=n
# Compile PMD for ISA-L compression device
CONFIG_RTE_LIBRTE_PMD_ISAL=n
# Compile PMD for ZLIB compression device
CONFIG_RTE_LIBRTE_PMD_ZLIB=n
# Compile generic event device library
CONFIG_RTE_LIBRTE_EVENTDEV=n
CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
CONFIG_RTE_EVENT_MAX_DEVS=16
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32
# Compile PMD for skeleton event device
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=n
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
# Compile PMD for software event device
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=n
# Compile PMD for distributed software event device
CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=n
# Compile PMD for octeontx sso event device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=n
# Compile PMD for octeontx2 sso event device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV=n
# Compile PMD for OPDL event device
CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV=n
# Compile PMD for NXP DPAA event device
CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n
# Compile PMD for NXP DPAA2 event device
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n
# Compile raw device support
# EXPERIMENTAL: API may change without prior notice
CONFIG_RTE_LIBRTE_RAWDEV=n
CONFIG_RTE_RAWDEV_MAX_DEVS=64
CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=n
# Compile PMD for NXP DPAA2 CMDIF raw device
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=n
# Compile PMD for NXP DPAA2 QDMA raw device
CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n
# Compile PMD for Intel FPGA raw device
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n
# Compile PMD for Intel IOAT raw device
CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=n
# Compile PMD for octeontx2 DMA raw device
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=n
# Compile PMD for NTB raw device
CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=n
# Compile librte_ring
CONFIG_RTE_LIBRTE_RING=y
# Compile librte_stack
CONFIG_RTE_LIBRTE_STACK=y
# Compile librte_mempool
CONFIG_RTE_LIBRTE_MEMPOOL=y
CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
# Compile Mempool drivers
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=y
CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=64
CONFIG_RTE_DRIVER_MEMPOOL_RING=y
CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
# Compile PMD for octeontx fpa mempool device
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=n
# Compile PMD for octeontx2 npa mempool device
CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL=n
# Compile librte_mbuf
CONFIG_RTE_LIBRTE_MBUF=y
CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
CONFIG_RTE_PKTMBUF_HEADROOM=128
# Compile librte_timer
CONFIG_RTE_LIBRTE_TIMER=n
CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
# Compile librte_cfgfile
CONFIG_RTE_LIBRTE_CFGFILE=n
# Compile librte_cmdline
CONFIG_RTE_LIBRTE_CMDLINE=y
CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
# Compile librte_hash
CONFIG_RTE_LIBRTE_HASH=y
CONFIG_RTE_LIBRTE_HASH_DEBUG=n
# Compile librte_efd
CONFIG_RTE_LIBRTE_EFD=n
# Compile librte_member
CONFIG_RTE_LIBRTE_MEMBER=y
# Compile librte_jobstats
CONFIG_RTE_LIBRTE_JOBSTATS=n
# Compile architecture we compile for. device metrics library
CONFIG_RTE_LIBRTE_METRICS=y
# Compile architecture we compile for. bitrate statistics library
CONFIG_RTE_LIBRTE_BITRATE=y
# Compile architecture we compile for. latency statistics library
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
# Compile librte_telemetry
CONFIG_RTE_LIBRTE_TELEMETRY=n
# Compile librte_rcu
CONFIG_RTE_LIBRTE_RCU=n
CONFIG_RTE_LIBRTE_RCU_DEBUG=n
# Compile librte_rib
CONFIG_RTE_LIBRTE_RIB=n
# Compile librte_fib
CONFIG_RTE_LIBRTE_FIB=n
CONFIG_RTE_LIBRTE_FIB_DEBUG=n
# Compile librte_lpm
CONFIG_RTE_LIBRTE_LPM=n
CONFIG_RTE_LIBRTE_LPM_DEBUG=n
# Compile librte_acl
CONFIG_RTE_LIBRTE_ACL=n
CONFIG_RTE_LIBRTE_ACL_DEBUG=n
# Compile librte_power
CONFIG_RTE_LIBRTE_POWER=n
CONFIG_RTE_LIBRTE_POWER_DEBUG=n
CONFIG_RTE_MAX_LCORE_FREQS=64
# Compile librte_net
CONFIG_RTE_LIBRTE_NET=y
# Compile librte_ip_frag
CONFIG_RTE_LIBRTE_IP_FRAG=y
CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
# Compile GRO library
CONFIG_RTE_LIBRTE_GRO=y
# Compile GSO library
CONFIG_RTE_LIBRTE_GSO=y
# Compile librte_meter
CONFIG_RTE_LIBRTE_METER=y
# Compile librte_classify
CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=n
# Compile librte_sched
CONFIG_RTE_LIBRTE_SCHED=n
CONFIG_RTE_SCHED_DEBUG=n
CONFIG_RTE_SCHED_RED=n
CONFIG_RTE_SCHED_COLLECT_STATS=n
CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
CONFIG_RTE_SCHED_VECTOR=n
# Compile architecture we compile for. distributor library
CONFIG_RTE_LIBRTE_DISTRIBUTOR=n
# Compile architecture we compile for. reorder library
CONFIG_RTE_LIBRTE_REORDER=n
# Compile librte_port
CONFIG_RTE_LIBRTE_PORT=n
CONFIG_RTE_PORT_STATS_COLLECT=n
CONFIG_RTE_PORT_PCAP=n
# Compile librte_table
CONFIG_RTE_LIBRTE_TABLE=n
CONFIG_RTE_TABLE_STATS_COLLECT=n
# Compile librte_pipeline
CONFIG_RTE_LIBRTE_PIPELINE=n
CONFIG_RTE_PIPELINE_STATS_COLLECT=n
# Compile librte_kni
CONFIG_RTE_LIBRTE_KNI=n
CONFIG_RTE_LIBRTE_PMD_KNI=n
CONFIG_RTE_KNI_KMOD=n
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
# Compile architecture we compile for. pdump library
CONFIG_RTE_LIBRTE_PDUMP=y
# Compile vhost user library
CONFIG_RTE_LIBRTE_VHOST=y
CONFIG_RTE_LIBRTE_VHOST_NUMA=y
CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
# Compile vhost PMD
# To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
CONFIG_RTE_LIBRTE_PMD_VHOST=y
# Compile IFC driver
# To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO
# should be enabled.
CONFIG_RTE_LIBRTE_IFC_PMD=n
# Compile librte_bpf
CONFIG_RTE_LIBRTE_BPF=n
# allow load BPF from ELF files (requires libelf)
CONFIG_RTE_LIBRTE_BPF_ELF=n
# Compile librte_ipsec
CONFIG_RTE_LIBRTE_IPSEC=n
# Compile architecture we compile for. test application
CONFIG_RTE_APP_TEST=y
CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
# Compile architecture we compile for. procinfo application
CONFIG_RTE_PROC_INFO=n
# Compile architecture we compile for. PMD test application
CONFIG_RTE_TEST_PMD=y
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
# Compile architecture we compile for. bbdev test application
CONFIG_RTE_TEST_BBDEV=n
# Compile architecture we compile for. compression performance application
CONFIG_RTE_APP_COMPRESS_PERF=n
# Compile architecture we compile for. crypto performance application
CONFIG_RTE_APP_CRYPTO_PERF=n
# Compile architecture we compile for. eventdev application
CONFIG_RTE_APP_EVENTDEV=n
CONFIG_RTE_EXEC_ENV_LINUX=y
CONFIG_RTE_EXEC_ENV_LINUXAPP=y
CONFIG_RTE_LIBRTE_VHOST_POSTCOPY=n
# Common libraries, before Bus/PMDs
# NXP DPAA BUS and drivers
# NXP FSLMC BUS and DPAA2 drivers
# NXP ENETC PMD Driver
# HINIC PMD driver
# Hisilicon HNS3 PMD driver
# Compile PMD for Intel FPGA raw device
# To compile, CONFIG_RTE_EAL_VFIO should be enabled.
CONFIG_RTE_ARCH_ARM64=y
CONFIG_RTE_ARCH_64=y
# Maximum available cache line size in arm64 implementations.
# Setting to maximum available cache line size in generic config
# to address minimum DMA alignment across all arm64 implementations.
# Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
# to determine architecture we compile for. best threshold in code. Refer to notes in source file
# (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
CONFIG_RTE_ARCH_ARM64_MEMCPY=n
#CONFIG_RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD=2048
#CONFIG_RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD=512
# Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
# strong reasons.
#CONFIG_RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK=n
#CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF
#CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n
# NXP PFE PMD Driver
CONFIG_RTE_TOOLCHAIN_GCC=y