RHEL 9.0.0 Alpha bootstrap
The content of this branch was automatically imported from Fedora ELN with the following as its source: https://src.fedoraproject.org/rpms/binutils#13a86b8b666cc3b8d6e16200d89ff7287bb0c189
This commit is contained in:
parent
635b2d3e99
commit
ef0eaed6b5
68
.gitignore
vendored
68
.gitignore
vendored
@ -1,3 +1,67 @@
|
||||
/binutils-2.35.1.tar.xz
|
||||
*.diff
|
||||
*.orig
|
||||
*.rej
|
||||
|
||||
*~
|
||||
.#*
|
||||
*#
|
||||
|
||||
*.flt
|
||||
*.gmo
|
||||
*.info
|
||||
*.la
|
||||
*.lo
|
||||
*.o
|
||||
*.pyc
|
||||
*.tmp
|
||||
*.a
|
||||
|
||||
.deps
|
||||
.libs
|
||||
|
||||
autom4te.cache
|
||||
config.cache
|
||||
config.h
|
||||
config.intl
|
||||
config.log
|
||||
config.status
|
||||
libtool
|
||||
POTFILES
|
||||
*-POTFILES
|
||||
|
||||
TAGS
|
||||
TAGS.sub
|
||||
|
||||
.local.vimrc
|
||||
.lvimrc
|
||||
|
||||
.clang-format
|
||||
|
||||
.gdbinit
|
||||
.gdb_history
|
||||
|
||||
perf.data
|
||||
perf.data.old
|
||||
|
||||
# ignore core files, but not java/net/protocol/core/
|
||||
core
|
||||
!core/
|
||||
|
||||
lost+found
|
||||
|
||||
# ignore ./contrib/gcc_update output
|
||||
LAST_UPDATED
|
||||
REVISION
|
||||
|
||||
stamp-*
|
||||
*.stamp
|
||||
|
||||
# ignore in-tree prerequisites
|
||||
/mpfr*
|
||||
/mpc*
|
||||
/gmp*
|
||||
/isl*
|
||||
/binutils-2.34.0-5dfc0c955dbe912cd328fc2688e5fceb3239ac2a.tar.xz
|
||||
/binutils-2.19.50.0.1-output-format.sed
|
||||
/standards.info.gz
|
||||
/binutils-2.35.tar.xz
|
||||
/binutils-2.35.1.tar.xz
|
||||
|
@ -1,216 +0,0 @@
|
||||
From 1e3b96fd6cf0c7d018083994ad951ccf92aba582 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Fri, 4 Sep 2020 13:54:21 +0930
|
||||
Subject: [PATCH] Allow plugin syms to mark as-needed shared libs needed
|
||||
|
||||
We must tell LTO about symbols in all shared libraries loaded. That
|
||||
means we can't load extra shared libraries after LTO recompilation, at
|
||||
least, not those that affect the set of symbols that LTO cares about,
|
||||
the IR symbols.
|
||||
|
||||
This change will likely result in complaints about --as-needed
|
||||
libraries being loaded unnecessarily, but being correct is more
|
||||
important than being optimal. One of the PR15146 tests regresses, and
|
||||
while that could be hidden by disabling the missing dso message by
|
||||
making it conditional on h->root.non_ir_ref_regular, that would just
|
||||
be sweeping a problem under the rug.
|
||||
|
||||
bfd/
|
||||
PR 15146
|
||||
PR 26314
|
||||
PR 26530
|
||||
* elflink.c (elf_link_add_object_symbols): Do set def_regular
|
||||
and ref_regular for IR symbols. Don't clear dynsym, allowing
|
||||
IR symbols to load --as-needed shared libraries, but prevent
|
||||
IR symbols from becoming dynamic.
|
||||
ld/
|
||||
* testsuite/ld-plugin/lto.exp: Don't run pr15146 tests.
|
||||
* testsuite/ld-plugin/pr15146.d: Delete.
|
||||
* testsuite/ld-plugin/pr15146a.c: Delete.
|
||||
* testsuite/ld-plugin/pr15146b.c: Delete.
|
||||
* testsuite/ld-plugin/pr15146c.c: Delete.
|
||||
* testsuite/ld-plugin/pr15146d.c: Delete.
|
||||
---
|
||||
bfd/ChangeLog | 10 ++++++++++
|
||||
bfd/elflink.c | 12 ++----------
|
||||
ld/ChangeLog | 9 +++++++++
|
||||
ld/testsuite/ld-plugin/lto.exp | 22 ----------------------
|
||||
ld/testsuite/ld-plugin/pr15146.d | 4 ----
|
||||
ld/testsuite/ld-plugin/pr15146a.c | 13 -------------
|
||||
ld/testsuite/ld-plugin/pr15146b.c | 1 -
|
||||
ld/testsuite/ld-plugin/pr15146c.c | 0
|
||||
ld/testsuite/ld-plugin/pr15146d.c | 7 -------
|
||||
9 files changed, 21 insertions(+), 57 deletions(-)
|
||||
delete mode 100644 ld/testsuite/ld-plugin/pr15146.d
|
||||
delete mode 100644 ld/testsuite/ld-plugin/pr15146a.c
|
||||
delete mode 100644 ld/testsuite/ld-plugin/pr15146b.c
|
||||
delete mode 100644 ld/testsuite/ld-plugin/pr15146c.c
|
||||
delete mode 100644 ld/testsuite/ld-plugin/pr15146d.c
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 1b58f9517c..a431f8f14d 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,13 @@
|
||||
+2020-09-04 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ PR 15146
|
||||
+ PR 26314
|
||||
+ PR 26530
|
||||
+ * elflink.c (elf_link_add_object_symbols): Do set def_regular
|
||||
+ and ref_regular for IR symbols. Don't clear dynsym, allowing
|
||||
+ IR symbols to load --as-needed shared libraries, but prevent
|
||||
+ IR symbols from becoming dynamic.
|
||||
+
|
||||
2020-09-03 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR 26521
|
||||
diff --git a/bfd/elflink.c b/bfd/elflink.c
|
||||
index 5c085b14b7..1384c1a46b 100644
|
||||
--- a/bfd/elflink.c
|
||||
+++ b/bfd/elflink.c
|
||||
@@ -4977,11 +4977,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
|
||||
object and a shared object. */
|
||||
bfd_boolean dynsym = FALSE;
|
||||
|
||||
- /* Plugin symbols aren't normal. Don't set def_regular or
|
||||
- ref_regular for them, or make them dynamic. */
|
||||
- if ((abfd->flags & BFD_PLUGIN) != 0)
|
||||
- ;
|
||||
- else if (! dynamic)
|
||||
+ if (! dynamic)
|
||||
{
|
||||
if (! definition)
|
||||
{
|
||||
@@ -5162,10 +5158,6 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
|
||||
&& !bfd_link_relocatable (info))
|
||||
dynsym = FALSE;
|
||||
|
||||
- /* Nor should we make plugin symbols dynamic. */
|
||||
- if ((abfd->flags & BFD_PLUGIN) != 0)
|
||||
- dynsym = FALSE;
|
||||
-
|
||||
if (definition)
|
||||
{
|
||||
h->target_internal = isym->st_target_internal;
|
||||
@@ -5192,7 +5184,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
|
||||
}
|
||||
}
|
||||
|
||||
- if (dynsym && h->dynindx == -1)
|
||||
+ if (dynsym && (abfd->flags & BFD_PLUGIN) == 0 && h->dynindx == -1)
|
||||
{
|
||||
if (! bfd_elf_link_record_dynamic_symbol (info, h))
|
||||
goto error_free_vers;
|
||||
diff --git a/ld/ChangeLog b/ld/ChangeLog
|
||||
index 0fcbf0d6c2..0a11b79c67 100644
|
||||
--- a/ld/ChangeLog
|
||||
+++ b/ld/ChangeLog
|
||||
@@ -1,3 +1,12 @@
|
||||
+2020-09-04 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ * testsuite/ld-plugin/lto.exp: Don't run pr15146 tests.
|
||||
+ * testsuite/ld-plugin/pr15146.d: Delete.
|
||||
+ * testsuite/ld-plugin/pr15146a.c: Delete.
|
||||
+ * testsuite/ld-plugin/pr15146b.c: Delete.
|
||||
+ * testsuite/ld-plugin/pr15146c.c: Delete.
|
||||
+ * testsuite/ld-plugin/pr15146d.c: Delete.
|
||||
+
|
||||
2020-09-03 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* testsuite/config/default.exp: Change NOSANTIZE_CFLAGS to
|
||||
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
|
||||
index adad1e4895..684d1db314 100644
|
||||
--- a/ld/testsuite/ld-plugin/lto.exp
|
||||
+++ b/ld/testsuite/ld-plugin/lto.exp
|
||||
@@ -320,21 +320,6 @@ set lto_link_elf_tests [list \
|
||||
[list "PR ld/13244" \
|
||||
"-shared -O2 -fPIC -flto -fuse-linker-plugin -nostdlib" "-O2 -fno-early-inlining -flto" \
|
||||
{pr13244.c} {{"readelf" {-s --wide} "pr13244.d"}} "pr13244.so" "c"] \
|
||||
- [list "Build libpr15146a.a" \
|
||||
- "$plug_opt" "-flto -O2" \
|
||||
- {pr15146a.c} {} "lib15146a.a"] \
|
||||
- [list "Build pr15146b.so" \
|
||||
- "-shared" "-O2 -fpic" \
|
||||
- {pr15146b.c} {} "pr15146b.so" "c"] \
|
||||
- [list "Build pr15146c.so" \
|
||||
- "-shared -Wl,--no-as-needed tmpdir/pr15146b.so" "-O2 -fpic $no_lto" \
|
||||
- {pr15146c.c} {} "pr15146c.so" "c"] \
|
||||
- [list "PR ld/15146 (1)" \
|
||||
- "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146a.o tmpdir/pr15146c.so" "" \
|
||||
- {dummy.c} {{"readelf" {-d} "pr15146.d"}} "pr15146a.exe"] \
|
||||
- [list "Build libpr15146d.a" \
|
||||
- "$plug_opt" "-flto -O2" \
|
||||
- {pr15146d.c} {} "lib15146d.a"] \
|
||||
[list "Build libpr16746a.a" \
|
||||
"" "" \
|
||||
{pr16746a.c pr16746b.c} {} "lib15146a.a"] \
|
||||
@@ -605,13 +590,6 @@ run_cc_link_tests $lto_compile_elf_tests
|
||||
# Restrict these to ELF targets that support shared libs and PIC.
|
||||
if { [is_elf_format] && [check_lto_shared_available] } {
|
||||
run_cc_link_tests $lto_link_elf_tests
|
||||
- set testname "PR ld/15146 (2)"
|
||||
- set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146d.o tmpdir/pr15146c.so"]
|
||||
- if { [ regexp "undefined reference to symbol '\\.?xxx'" $exec_output ] } {
|
||||
- pass $testname
|
||||
- } {
|
||||
- fail $testname
|
||||
- }
|
||||
set testname "PR ld/16746 (3)"
|
||||
set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin tmpdir/pr16746b.o tmpdir/pr16746d.o"]
|
||||
if { [ regexp "warning: \\.?foobar" $exec_output ] && ![ regexp "symbol from plugin" $exec_output ] } {
|
||||
diff --git a/ld/testsuite/ld-plugin/pr15146.d b/ld/testsuite/ld-plugin/pr15146.d
|
||||
deleted file mode 100644
|
||||
index 48d4b85446..0000000000
|
||||
--- a/ld/testsuite/ld-plugin/pr15146.d
|
||||
+++ /dev/null
|
||||
@@ -1,4 +0,0 @@
|
||||
-#failif
|
||||
-#...
|
||||
- +0x[0-9a-f]+ +\(NEEDED\) +Shared library: +\[.*pr15146b.so\]
|
||||
-#...
|
||||
diff --git a/ld/testsuite/ld-plugin/pr15146a.c b/ld/testsuite/ld-plugin/pr15146a.c
|
||||
deleted file mode 100644
|
||||
index a22860af5b..0000000000
|
||||
--- a/ld/testsuite/ld-plugin/pr15146a.c
|
||||
+++ /dev/null
|
||||
@@ -1,13 +0,0 @@
|
||||
-extern int xxx;
|
||||
-
|
||||
-int
|
||||
-bar (void)
|
||||
-{
|
||||
- return xxx;
|
||||
-}
|
||||
-
|
||||
-int
|
||||
-main ()
|
||||
-{
|
||||
- return 0;
|
||||
-}
|
||||
diff --git a/ld/testsuite/ld-plugin/pr15146b.c b/ld/testsuite/ld-plugin/pr15146b.c
|
||||
deleted file mode 100644
|
||||
index 90eb21ea55..0000000000
|
||||
--- a/ld/testsuite/ld-plugin/pr15146b.c
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-int xxx = 3;
|
||||
diff --git a/ld/testsuite/ld-plugin/pr15146c.c b/ld/testsuite/ld-plugin/pr15146c.c
|
||||
deleted file mode 100644
|
||||
index e69de29bb2..0000000000
|
||||
diff --git a/ld/testsuite/ld-plugin/pr15146d.c b/ld/testsuite/ld-plugin/pr15146d.c
|
||||
deleted file mode 100644
|
||||
index ba1e0abfa6..0000000000
|
||||
--- a/ld/testsuite/ld-plugin/pr15146d.c
|
||||
+++ /dev/null
|
||||
@@ -1,7 +0,0 @@
|
||||
-extern int xxx;
|
||||
-
|
||||
-int
|
||||
-main ()
|
||||
-{
|
||||
- return xxx;
|
||||
-}
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,131 +0,0 @@
|
||||
From 172234e1fab477ba36ec292913b1f13ef6b94783 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Wed, 19 Aug 2020 08:47:35 +0930
|
||||
Subject: [PATCH] Correct vcmpsq, vcmpuq and xvtlsbb BF field
|
||||
|
||||
These shouldn't be optional. The record form of vector instructions
|
||||
set CR6, giving an expectation that omitting BF should be the same as
|
||||
specifying CR6.
|
||||
|
||||
opcodes/
|
||||
* ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
|
||||
vcmpuq and xvtlsbb.
|
||||
gas/
|
||||
* testsuite/gas/ppc/int128.s: Correct vcmpuq.
|
||||
* testsuite/gas/ppc/int128.d: Update.
|
||||
* testsuite/gas/ppc/xvtlsbb.d: Update.
|
||||
|
||||
(cherry picked from commit 18a8a00ebe3159b65798c6132cb5f93ff4ef6c17)
|
||||
---
|
||||
gas/ChangeLog | 5 +++++
|
||||
gas/testsuite/gas/ppc/int128.d | 2 +-
|
||||
gas/testsuite/gas/ppc/int128.s | 2 +-
|
||||
gas/testsuite/gas/ppc/xvtlsbb.d | 2 +-
|
||||
opcodes/ChangeLog | 4 ++++
|
||||
opcodes/ppc-opc.c | 6 +++---
|
||||
6 files changed, 15 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/gas/ChangeLog b/gas/ChangeLog
|
||||
index 3d5376df89..fa9e9d1ff2 100644
|
||||
--- a/gas/ChangeLog
|
||||
+++ b/gas/ChangeLog
|
||||
@@ -1,6 +1,11 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-19 Alan Modra <amodra@gmail.com>
|
||||
+ * testsuite/gas/ppc/int128.s: Correct vcmpuq.
|
||||
+ * testsuite/gas/ppc/int128.d: Update.
|
||||
+ * testsuite/gas/ppc/xvtlsbb.d: Update.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* testsuite/gas/ppc/power8.d,
|
||||
* testsuite/gas/ppc/power8.s: Add miso.
|
||||
diff --git a/gas/testsuite/gas/ppc/int128.d b/gas/testsuite/gas/ppc/int128.d
|
||||
index c9f14d3360..d7410345ad 100644
|
||||
--- a/gas/testsuite/gas/ppc/int128.d
|
||||
+++ b/gas/testsuite/gas/ppc/int128.d
|
||||
@@ -20,7 +20,7 @@ Disassembly of section \.text:
|
||||
.*: (13 9d f7 0b|0b f7 9d 13) vmodsq v28,v29,v30
|
||||
.*: (13 e0 0e 0b|0b 0e e0 13) vmoduq v31,v0,v1
|
||||
.*: (10 5b 1e 02|02 1e 5b 10) vextsd2q v2,v3
|
||||
-.*: (10 04 29 01|01 29 04 10) vcmpuq v4,v5
|
||||
+.*: (10 04 29 01|01 29 04 10) vcmpuq cr0,v4,v5
|
||||
.*: (10 86 39 41|41 39 86 10) vcmpsq cr1,v6,v7
|
||||
.*: (11 09 51 c7|c7 51 09 11) vcmpequq v8,v9,v10
|
||||
.*: (11 6c 6d c7|c7 6d 6c 11) vcmpequq. v11,v12,v13
|
||||
diff --git a/gas/testsuite/gas/ppc/int128.s b/gas/testsuite/gas/ppc/int128.s
|
||||
index 4dce648c36..4561cfe9ee 100644
|
||||
--- a/gas/testsuite/gas/ppc/int128.s
|
||||
+++ b/gas/testsuite/gas/ppc/int128.s
|
||||
@@ -12,7 +12,7 @@ _start:
|
||||
vmodsq 28,29,30
|
||||
vmoduq 31,0,1
|
||||
vextsd2q 2,3
|
||||
- vcmpuq 4,5
|
||||
+ vcmpuq 0,4,5
|
||||
vcmpsq 1,6,7
|
||||
vcmpequq 8,9,10
|
||||
vcmpequq. 11,12,13
|
||||
diff --git a/gas/testsuite/gas/ppc/xvtlsbb.d b/gas/testsuite/gas/ppc/xvtlsbb.d
|
||||
index 1627d7afc6..8aa83dd62c 100644
|
||||
--- a/gas/testsuite/gas/ppc/xvtlsbb.d
|
||||
+++ b/gas/testsuite/gas/ppc/xvtlsbb.d
|
||||
@@ -7,7 +7,7 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+0 <_start>:
|
||||
-.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb vs63
|
||||
+.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb cr0,vs63
|
||||
.*: (f0 82 07 6c|6c 07 82 f0) xvtlsbb cr1,vs0
|
||||
.*: (f1 02 f7 6e|6e f7 02 f1) xvtlsbb cr2,vs62
|
||||
.*: (f1 82 0f 6c|6c 0f 82 f1) xvtlsbb cr3,vs1
|
||||
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
|
||||
index 06d136d480..6e1fb264f9 100644
|
||||
--- a/opcodes/ChangeLog
|
||||
+++ b/opcodes/ChangeLog
|
||||
@@ -1,6 +1,10 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-19 Alan Modra <amodra@gmail.com>
|
||||
+ * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
|
||||
+ vcmpuq and xvtlsbb.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
|
||||
instructions.
|
||||
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
|
||||
index 4471b0f2bc..d15bde1326 100644
|
||||
--- a/opcodes/ppc-opc.c
|
||||
+++ b/opcodes/ppc-opc.c
|
||||
@@ -4441,7 +4441,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
|
||||
{"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
|
||||
{"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
|
||||
-{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
|
||||
+{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
|
||||
{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vslq", VX (4, 261), VX_MASK, POWER10, 0, {VD, VA, VB}},
|
||||
@@ -4459,7 +4459,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
|
||||
{"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
|
||||
{"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
|
||||
-{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
|
||||
+{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
|
||||
{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
|
||||
{"vrlqnm", VX (4, 325), VX_MASK, POWER10, 0, {VD, VA, VB}},
|
||||
@@ -8455,7 +8455,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"xxgenpcvdm", X(60,949), XX1_MASK, POWER10, PPCVLE, {XT6, VB, UIMM}},
|
||||
{"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
-{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {OBF, XB6}},
|
||||
+{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {BF, XB6}},
|
||||
{"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
{"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
|
||||
--
|
||||
2.21.3
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,247 +0,0 @@
|
||||
From 9ac6946e2514e5ec1bb51d1afe9f127807e21067 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Sat, 26 Sep 2020 20:34:55 +0930
|
||||
Subject: [PATCH] [GOLD] PPC64_OPT_LOCALENTRY is incompatible with tail calls
|
||||
|
||||
Gold version of commit 3cd7c7d7ef.
|
||||
|
||||
* powerpc.cc (Target_powerpc): Rename power10_stubs_ to
|
||||
power10_relocs_.
|
||||
(Target_powerpc::set_power10_relocs): New accessor.
|
||||
(Target_powerpc::set_power10_stubs): Delete.
|
||||
(Target_powerpc::power10_stubs): Adjust.
|
||||
(Target_powerpc::has_localentry0): New accessor.
|
||||
(ld_0_11): New constant.
|
||||
(glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
|
||||
(glink_eh_frame_fde_64v2_localentry0): New.
|
||||
(Output_data_glink::pltresolve_size): Update.
|
||||
(Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
|
||||
(Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
|
||||
and only emit for has_localentry0. Don't use r2 in the stub.
|
||||
(Target_powerpc::Scan::local, global): Adjust for
|
||||
set_power10_relocs renaming.
|
||||
(Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
|
||||
|
||||
(cherry picked from commit 63e5eea234c2bd2c7ce7dc921c71b22bc4fd0d6b)
|
||||
---
|
||||
gold/ChangeLog | 19 ++++++++++++
|
||||
gold/powerpc.cc | 82 +++++++++++++++++++++++++++++++++++++------------
|
||||
2 files changed, 81 insertions(+), 20 deletions(-)
|
||||
|
||||
diff --git a/gold/ChangeLog b/gold/ChangeLog
|
||||
index 7734acec35..1f2ee06817 100644
|
||||
--- a/gold/ChangeLog
|
||||
+++ b/gold/ChangeLog
|
||||
@@ -1,3 +1,22 @@
|
||||
+2020-09-26 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ * powerpc.cc (Target_powerpc): Rename power10_stubs_ to
|
||||
+ power10_relocs_.
|
||||
+ (Target_powerpc::set_power10_relocs): New accessor.
|
||||
+ (Target_powerpc::set_power10_stubs): Delete.
|
||||
+ (Target_powerpc::power10_stubs): Adjust.
|
||||
+ (Target_powerpc::has_localentry0): New accessor.
|
||||
+ (ld_0_11): New constant.
|
||||
+ (glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
|
||||
+ (glink_eh_frame_fde_64v2_localentry0): New.
|
||||
+ (Output_data_glink::pltresolve_size): Update.
|
||||
+ (Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
|
||||
+ (Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
|
||||
+ and only emit for has_localentry0. Don't use r2 in the stub.
|
||||
+ (Target_powerpc::Scan::local, global): Adjust for
|
||||
+ set_power10_relocs renaming.
|
||||
+ (Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
|
||||
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
|
||||
index 1020fa42f9..adbc120c14 100644
|
||||
--- a/gold/powerpc.cc
|
||||
+++ b/gold/powerpc.cc
|
||||
@@ -647,7 +647,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
|
||||
glink_(NULL), rela_dyn_(NULL), copy_relocs_(),
|
||||
tlsld_got_offset_(-1U),
|
||||
stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(),
|
||||
- power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false),
|
||||
+ power10_relocs_(false), plt_thread_safe_(false), plt_localentry0_(false),
|
||||
plt_localentry0_init_(false), has_localentry0_(false),
|
||||
has_tls_get_addr_opt_(false),
|
||||
tprel_opt_(parameters->options().tls_optimize()),
|
||||
@@ -1079,16 +1079,18 @@ class Target_powerpc : public Sized_target<size, big_endian>
|
||||
sym->set_dynsym_index(-1U);
|
||||
}
|
||||
|
||||
+ void
|
||||
+ set_power10_relocs()
|
||||
+ {
|
||||
+ this->power10_relocs_ = true;
|
||||
+ }
|
||||
+
|
||||
bool
|
||||
power10_stubs() const
|
||||
- { return this->power10_stubs_; }
|
||||
-
|
||||
- void
|
||||
- set_power10_stubs()
|
||||
{
|
||||
- if (parameters->options().power10_stubs_enum()
|
||||
- != General_options::POWER10_STUBS_NO)
|
||||
- this->power10_stubs_ = true;
|
||||
+ return (this->power10_relocs_
|
||||
+ && (parameters->options().power10_stubs_enum()
|
||||
+ != General_options::POWER10_STUBS_NO));
|
||||
}
|
||||
|
||||
bool
|
||||
@@ -1106,6 +1108,10 @@ class Target_powerpc : public Sized_target<size, big_endian>
|
||||
plt_localentry0() const
|
||||
{ return this->plt_localentry0_; }
|
||||
|
||||
+ bool
|
||||
+ has_localentry0() const
|
||||
+ { return this->has_localentry0_; }
|
||||
+
|
||||
void
|
||||
set_has_localentry0()
|
||||
{
|
||||
@@ -1705,7 +1711,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
|
||||
Branches branch_info_;
|
||||
Tocsave_loc tocsave_loc_;
|
||||
|
||||
- bool power10_stubs_;
|
||||
+ bool power10_relocs_;
|
||||
bool plt_thread_safe_;
|
||||
bool plt_localentry0_;
|
||||
bool plt_localentry0_init_;
|
||||
@@ -4190,6 +4196,7 @@ static const uint32_t cmpwi_11_0 = 0x2c0b0000;
|
||||
static const uint32_t cror_15_15_15 = 0x4def7b82;
|
||||
static const uint32_t cror_31_31_31 = 0x4ffffb82;
|
||||
static const uint32_t ld_0_1 = 0xe8010000;
|
||||
+static const uint32_t ld_0_11 = 0xe80b0000;
|
||||
static const uint32_t ld_0_12 = 0xe80c0000;
|
||||
static const uint32_t ld_2_1 = 0xe8410000;
|
||||
static const uint32_t ld_2_2 = 0xe8420000;
|
||||
@@ -4572,9 +4579,9 @@ static const unsigned char glink_eh_frame_fde_64v1[] =
|
||||
0, 0, 0, 0, // Replaced with offset to .glink.
|
||||
0, 0, 0, 0, // Replaced with size of .glink.
|
||||
0, // Augmentation size.
|
||||
- elfcpp::DW_CFA_advance_loc + 1,
|
||||
+ elfcpp::DW_CFA_advance_loc + 2,
|
||||
elfcpp::DW_CFA_register, 65, 12,
|
||||
- elfcpp::DW_CFA_advance_loc + 5,
|
||||
+ elfcpp::DW_CFA_advance_loc + 4,
|
||||
elfcpp::DW_CFA_restore_extended, 65
|
||||
};
|
||||
|
||||
@@ -4584,9 +4591,20 @@ static const unsigned char glink_eh_frame_fde_64v2[] =
|
||||
0, 0, 0, 0, // Replaced with offset to .glink.
|
||||
0, 0, 0, 0, // Replaced with size of .glink.
|
||||
0, // Augmentation size.
|
||||
- elfcpp::DW_CFA_advance_loc + 1,
|
||||
+ elfcpp::DW_CFA_advance_loc + 2,
|
||||
elfcpp::DW_CFA_register, 65, 0,
|
||||
- elfcpp::DW_CFA_advance_loc + 7,
|
||||
+ elfcpp::DW_CFA_advance_loc + 2,
|
||||
+ elfcpp::DW_CFA_restore_extended, 65
|
||||
+};
|
||||
+
|
||||
+static const unsigned char glink_eh_frame_fde_64v2_localentry0[] =
|
||||
+{
|
||||
+ 0, 0, 0, 0, // Replaced with offset to .glink.
|
||||
+ 0, 0, 0, 0, // Replaced with size of .glink.
|
||||
+ 0, // Augmentation size.
|
||||
+ elfcpp::DW_CFA_advance_loc + 3,
|
||||
+ elfcpp::DW_CFA_register, 65, 0,
|
||||
+ elfcpp::DW_CFA_advance_loc + 2,
|
||||
elfcpp::DW_CFA_restore_extended, 65
|
||||
};
|
||||
|
||||
@@ -5525,7 +5543,8 @@ class Output_data_glink : public Output_section_data
|
||||
{
|
||||
if (size == 64)
|
||||
return (8
|
||||
- + (this->targ_->abiversion() < 2 ? 11 * 4 : 14 * 4));
|
||||
+ + (this->targ_->abiversion() < 2 ? 11 * 4
|
||||
+ : this->targ_->has_localentry0() ? 14 * 4 : 13 * 4));
|
||||
return 16 * 4;
|
||||
}
|
||||
|
||||
@@ -5568,6 +5587,12 @@ Output_data_glink<size, big_endian>::add_eh_frame(Layout* layout)
|
||||
sizeof (Eh_cie<64>::eh_frame_cie),
|
||||
glink_eh_frame_fde_64v1,
|
||||
sizeof (glink_eh_frame_fde_64v1));
|
||||
+ else if (this->targ_->has_localentry0())
|
||||
+ layout->add_eh_frame_for_plt(this,
|
||||
+ Eh_cie<64>::eh_frame_cie,
|
||||
+ sizeof (Eh_cie<64>::eh_frame_cie),
|
||||
+ glink_eh_frame_fde_64v2_localentry0,
|
||||
+ sizeof (glink_eh_frame_fde_64v2));
|
||||
else
|
||||
layout->add_eh_frame_for_plt(this,
|
||||
Eh_cie<64>::eh_frame_cie,
|
||||
@@ -6798,15 +6823,25 @@ Output_data_glink<size, big_endian>::do_write(Output_file* of)
|
||||
}
|
||||
else
|
||||
{
|
||||
+ if (this->targ_->has_localentry0())
|
||||
+ {
|
||||
+ write_insn<big_endian>(p, std_2_1 + 24), p += 4;
|
||||
+ }
|
||||
write_insn<big_endian>(p, mflr_0), p += 4;
|
||||
write_insn<big_endian>(p, bcl_20_31), p += 4;
|
||||
write_insn<big_endian>(p, mflr_11), p += 4;
|
||||
- write_insn<big_endian>(p, std_2_1 + 24), p += 4;
|
||||
- write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
|
||||
write_insn<big_endian>(p, mtlr_0), p += 4;
|
||||
+ if (this->targ_->has_localentry0())
|
||||
+ {
|
||||
+ write_insn<big_endian>(p, ld_0_11 + l(-20)), p += 4;
|
||||
+ }
|
||||
+ else
|
||||
+ {
|
||||
+ write_insn<big_endian>(p, ld_0_11 + l(-16)), p += 4;
|
||||
+ }
|
||||
write_insn<big_endian>(p, sub_12_12_11), p += 4;
|
||||
- write_insn<big_endian>(p, add_11_2_11), p += 4;
|
||||
- write_insn<big_endian>(p, addi_0_12 + l(-48)), p += 4;
|
||||
+ write_insn<big_endian>(p, add_11_0_11), p += 4;
|
||||
+ write_insn<big_endian>(p, addi_0_12 + l(-44)), p += 4;
|
||||
write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
|
||||
write_insn<big_endian>(p, srdi_0_0_2), p += 4;
|
||||
write_insn<big_endian>(p, mtctr_12), p += 4;
|
||||
@@ -8451,7 +8486,7 @@ Target_powerpc<size, big_endian>::Scan::local(
|
||||
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
|
||||
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
|
||||
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
|
||||
- target->set_power10_stubs();
|
||||
+ target->set_power10_relocs();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -9248,7 +9283,7 @@ Target_powerpc<size, big_endian>::Scan::global(
|
||||
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
|
||||
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
|
||||
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
|
||||
- target->set_power10_stubs();
|
||||
+ target->set_power10_relocs();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -9590,6 +9625,13 @@ Target_powerpc<size, big_endian>::scan_relocs(
|
||||
needs_special_offset_handling,
|
||||
local_symbol_count,
|
||||
plocal_symbols);
|
||||
+
|
||||
+ if (this->plt_localentry0_ && this->power10_relocs_)
|
||||
+ {
|
||||
+ gold_warning(_("--plt-localentry is incompatible with "
|
||||
+ "power10 pc-relative code"));
|
||||
+ this->plt_localentry0_ = false;
|
||||
+ }
|
||||
}
|
||||
|
||||
// Functor class for processing the global symbol table.
|
||||
--
|
||||
2.21.3
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,75 +0,0 @@
|
||||
From dc9f426801780e98f6bb81e74d5bb10b663260ac Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Wed, 23 Sep 2020 22:54:01 +0930
|
||||
Subject: [PATCH] [GOLD] PowerPC64 __tls_get_addr_opt stub
|
||||
|
||||
This stub doesn't have the r2 store at the beginning.
|
||||
|
||||
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
|
||||
first insn of __tls_get_addr_opt stub.
|
||||
|
||||
(cherry picked from commit a993d270f8423a8b6faa2ce9d245073bed076bb0)
|
||||
---
|
||||
gold/ChangeLog | 5 +++++
|
||||
gold/powerpc.cc | 31 +++++++++++++++++--------------
|
||||
2 files changed, 22 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/gold/ChangeLog b/gold/ChangeLog
|
||||
index 5c891349c4..7734acec35 100644
|
||||
--- a/gold/ChangeLog
|
||||
+++ b/gold/ChangeLog
|
||||
@@ -1,3 +1,8 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
|
||||
+ first insn of __tls_get_addr_opt stub.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
|
||||
index e35cbcf6c0..1020fa42f9 100644
|
||||
--- a/gold/powerpc.cc
|
||||
+++ b/gold/powerpc.cc
|
||||
@@ -10401,21 +10401,24 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
|
||||
value += ent->tocoff_;
|
||||
if (size == 64
|
||||
&& ent->r2save_
|
||||
- && r_type == elfcpp::R_PPC64_REL24_NOTOC)
|
||||
+ && !(gsym != NULL
|
||||
+ && target->is_tls_get_addr_opt(gsym)))
|
||||
{
|
||||
- if (!(target->power10_stubs()
|
||||
- && target->power10_stubs_auto()))
|
||||
- value += 4;
|
||||
- }
|
||||
- else if (size == 64
|
||||
- && ent->r2save_
|
||||
- && relnum < reloc_count - 1)
|
||||
- {
|
||||
- Reltype next_rela(preloc + reloc_size);
|
||||
- if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
|
||||
- == elfcpp::R_PPC64_TOCSAVE
|
||||
- && next_rela.get_r_offset() == rela.get_r_offset() + 4)
|
||||
- value += 4;
|
||||
+ if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
|
||||
+ {
|
||||
+ if (!(target->power10_stubs()
|
||||
+ && target->power10_stubs_auto()))
|
||||
+ value += 4;
|
||||
+ }
|
||||
+ else if (relnum < reloc_count - 1)
|
||||
+ {
|
||||
+ Reltype next_rela(preloc + reloc_size);
|
||||
+ if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
|
||||
+ == elfcpp::R_PPC64_TOCSAVE
|
||||
+ && (next_rela.get_r_offset()
|
||||
+ == rela.get_r_offset() + 4))
|
||||
+ value += 4;
|
||||
+ }
|
||||
}
|
||||
localentry0 = ent->localentry0_;
|
||||
has_stub_value = true;
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,165 +0,0 @@
|
||||
From f26bb6247b27f9fb81728132949e03f221d1abc4 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Mon, 10 Aug 2020 15:08:27 +0930
|
||||
Subject: [PATCH] Implement missing powerpc extended mnemonics
|
||||
|
||||
gas/
|
||||
* testsuite/gas/ppc/power8.d,
|
||||
* testsuite/gas/ppc/power8.s: Add miso.
|
||||
* testsuite/gas/ppc/power9.d,
|
||||
* testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
|
||||
opcodes/
|
||||
* ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
|
||||
Enable icbt for power5, miso for power8.
|
||||
|
||||
(cherry picked from commit 8b2742a1567273f2ecc9fe6d7df1c9287865f5b6)
|
||||
---
|
||||
gas/ChangeLog | 6 ++++++
|
||||
gas/testsuite/gas/ppc/power8.d | 2 ++
|
||||
gas/testsuite/gas/ppc/power8.s | 2 ++
|
||||
gas/testsuite/gas/ppc/power9.d | 4 ++++
|
||||
gas/testsuite/gas/ppc/power9.s | 4 ++++
|
||||
opcodes/ChangeLog | 4 ++++
|
||||
opcodes/ppc-opc.c | 18 +++++++++++-------
|
||||
7 files changed, 33 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/gas/ChangeLog b/gas/ChangeLog
|
||||
index 0062d877bd..3d5376df89 100644
|
||||
--- a/gas/ChangeLog
|
||||
+++ b/gas/ChangeLog
|
||||
@@ -1,6 +1,12 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
+ * testsuite/gas/ppc/power8.d,
|
||||
+ * testsuite/gas/ppc/power8.s: Add miso.
|
||||
+ * testsuite/gas/ppc/power9.d,
|
||||
+ * testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* testsuite/gas/ppc/power8.d: Update.
|
||||
* testsuite/gas/ppc/vsx2.d: Update.
|
||||
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
|
||||
index 1439496462..df3f5d410d 100644
|
||||
--- a/gas/testsuite/gas/ppc/power8.d
|
||||
+++ b/gas/testsuite/gas/ppc/power8.d
|
||||
@@ -310,4 +310,6 @@ Disassembly of section \.text:
|
||||
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
|
||||
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
|
||||
.*: (4d 89 1c 61|61 1c 89 4d) bctarl 12,4\*cr2\+gt,3
|
||||
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
|
||||
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
|
||||
#pass
|
||||
diff --git a/gas/testsuite/gas/ppc/power8.s b/gas/testsuite/gas/ppc/power8.s
|
||||
index beb1c5e81c..52a3e8ea69 100644
|
||||
--- a/gas/testsuite/gas/ppc/power8.s
|
||||
+++ b/gas/testsuite/gas/ppc/power8.s
|
||||
@@ -302,3 +302,5 @@ power8:
|
||||
bctarl 0b01100,4*cr2+gt
|
||||
bctarl 0b01100,4*cr2+gt,0
|
||||
bctarl 0b01100,4*cr2+gt,3
|
||||
+ or 26,26,26
|
||||
+ miso
|
||||
diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
|
||||
index 4e7156d46d..45a8f495ae 100644
|
||||
--- a/gas/testsuite/gas/ppc/power9.d
|
||||
+++ b/gas/testsuite/gas/ppc/power9.d
|
||||
@@ -399,4 +399,8 @@ Disassembly of section \.text:
|
||||
.*: (7c 20 20 ac|ac 20 20 7c) dcbfl 0,r4
|
||||
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
|
||||
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
|
||||
+.*: (63 ff 00 00|00 00 ff 63) exser
|
||||
+.*: (63 ff 00 00|00 00 ff 63) exser
|
||||
+.*: (7c 00 18 9c|9c 18 00 7c) msgsndu r3
|
||||
+.*: (7c 00 d8 dc|dc d8 00 7c) msgclru r27
|
||||
#pass
|
||||
diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
|
||||
index 69053819ff..2d412b9e66 100644
|
||||
--- a/gas/testsuite/gas/ppc/power9.s
|
||||
+++ b/gas/testsuite/gas/ppc/power9.s
|
||||
@@ -390,3 +390,7 @@ power9:
|
||||
dcbf 0,4,1
|
||||
dcbflp 0,5
|
||||
dcbf 0,5,3
|
||||
+ ori 31,31,0
|
||||
+ exser
|
||||
+ msgsndu 3
|
||||
+ msgclru 27
|
||||
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
|
||||
index 30593769d4..02cbd524f6 100644
|
||||
--- a/opcodes/ChangeLog
|
||||
+++ b/opcodes/ChangeLog
|
||||
@@ -1,6 +1,10 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
+ * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
|
||||
+ Enable icbt for power5, miso for power8.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
|
||||
mtvsrd, and similarly for mfvsrd.
|
||||
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
|
||||
index a830c4c0fd..c4fa6761f4 100644
|
||||
--- a/opcodes/ppc-opc.c
|
||||
+++ b/opcodes/ppc-opc.c
|
||||
@@ -6114,6 +6114,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
|
||||
|
||||
{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}},
|
||||
+{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}},
|
||||
{"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
|
||||
{"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
|
||||
|
||||
@@ -6236,7 +6237,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}},
|
||||
|
||||
-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}},
|
||||
+{"icbt", X(31,22), X_MASK, POWER5|BOOKE|PPCE300, 0, {CT, RA0, RB}},
|
||||
|
||||
{"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
|
||||
{"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}},
|
||||
@@ -6354,6 +6355,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
|
||||
{"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
|
||||
|
||||
+{"msgsndu", XRTRA(31,78,0,0), XRTRA_MASK, POWER9, 0, {RB}},
|
||||
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
|
||||
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
|
||||
|
||||
@@ -6387,6 +6389,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"lxvrdx", X(31,109), XX1_MASK, POWER10, 0, {XT6, RA0, RB}},
|
||||
|
||||
+{"msgclru", XRTRA(31,110,0,0), XRTRA_MASK, POWER9, 0, {RB}},
|
||||
{"mvidsplt", X(31,110), X_MASK, E6500, 0, {VD, RA, RB}},
|
||||
|
||||
{"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
|
||||
@@ -7051,14 +7054,15 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
|
||||
|
||||
-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
|
||||
-
|
||||
-{"miso", 0x7f5ad378, 0xffffffff, E6500, 0, {0}},
|
||||
-
|
||||
-/* The "yield", "mdoio" and "mdoom" instructions are extended mnemonics for
|
||||
- "or rX,rX,rX", with rX being r27, r29 and r30 respectively. */
|
||||
+/* or 26,26,26 */
|
||||
+{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}},
|
||||
+/* or 27,27,27 */
|
||||
{"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}},
|
||||
+/* or 28,28,28 */
|
||||
+{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
|
||||
+/* or 29,29,29 */
|
||||
{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
|
||||
+/* or 30,30,30 */
|
||||
{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
|
||||
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
|
||||
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,369 +0,0 @@
|
||||
From 9030004379d4db633dc84a09f3b45ae0d6caed77 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Mon, 10 Aug 2020 21:41:36 +0930
|
||||
Subject: [PATCH] Implement missing powerpc mtspr and mfspr extended insns
|
||||
|
||||
* ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
|
||||
instructions.
|
||||
|
||||
(cherry picked from commit 3eb651743e06fb360687a26be87bc6b710fc7066)
|
||||
---
|
||||
opcodes/ChangeLog | 4 ++
|
||||
opcodes/ppc-opc.c | 162 ++++++++++++++++++++++++++++++++++++++++++++--
|
||||
2 files changed, 160 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
|
||||
index 02cbd524f6..06d136d480 100644
|
||||
--- a/opcodes/ChangeLog
|
||||
+++ b/opcodes/ChangeLog
|
||||
@@ -1,6 +1,10 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
+ * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
|
||||
+ instructions.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
|
||||
Enable icbt for power5, miso for power8.
|
||||
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
|
||||
index c4fa6761f4..4471b0f2bc 100644
|
||||
--- a/opcodes/ppc-opc.c
|
||||
+++ b/opcodes/ppc-opc.c
|
||||
@@ -6741,11 +6741,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}},
|
||||
{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}},
|
||||
+{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}},
|
||||
{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}},
|
||||
{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}},
|
||||
{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}},
|
||||
{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}},
|
||||
+{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}},
|
||||
{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}},
|
||||
{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}},
|
||||
@@ -6756,9 +6758,12 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}},
|
||||
{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}},
|
||||
{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}},
|
||||
+{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
@@ -6772,16 +6777,28 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}},
|
||||
{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}},
|
||||
+{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}},
|
||||
{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
|
||||
{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
|
||||
{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
|
||||
@@ -6797,20 +6814,37 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}},
|
||||
{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}},
|
||||
+{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
@@ -6827,6 +6861,14 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}},
|
||||
+{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}},
|
||||
{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}},
|
||||
{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}},
|
||||
@@ -6851,18 +6893,36 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
|
||||
+{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}},
|
||||
{"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}},
|
||||
{"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}},
|
||||
{"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}},
|
||||
{"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}},
|
||||
{"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
|
||||
-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
|
||||
+{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}},
|
||||
+{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}},
|
||||
@@ -6876,12 +6936,25 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}},
|
||||
{"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}},
|
||||
+{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}},
|
||||
+{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}},
|
||||
+{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}},
|
||||
{"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}},
|
||||
{"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}},
|
||||
@@ -7128,8 +7201,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}},
|
||||
{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}},
|
||||
+{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}},
|
||||
{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}},
|
||||
+{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}},
|
||||
{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}},
|
||||
{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}},
|
||||
@@ -7142,13 +7217,20 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}},
|
||||
{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}},
|
||||
{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}},
|
||||
+{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}},
|
||||
@@ -7159,13 +7241,24 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}},
|
||||
{"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}},
|
||||
+{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}},
|
||||
+{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}},
|
||||
{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}},
|
||||
+{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}},
|
||||
+{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}},
|
||||
{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}},
|
||||
@@ -7181,20 +7274,38 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}},
|
||||
{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}},
|
||||
{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}},
|
||||
+{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}},
|
||||
{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
@@ -7211,6 +7322,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}},
|
||||
+{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}},
|
||||
{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}},
|
||||
{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}},
|
||||
@@ -7225,12 +7343,44 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}},
|
||||
{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}},
|
||||
{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}},
|
||||
+{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}},
|
||||
{"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}},
|
||||
+{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}},
|
||||
+{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}},
|
||||
+{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}},
|
||||
+{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}},
|
||||
+{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}},
|
||||
{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}},
|
||||
{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}},
|
||||
{"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}},
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,437 +0,0 @@
|
||||
From eec51831f13bbbb57f34def5734bc7b1aedd6675 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Sat, 26 Sep 2020 15:10:09 +0930
|
||||
Subject: [PATCH] PPC64_OPT_LOCALENTRY is incompatible with tail calls
|
||||
|
||||
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
|
||||
unless we know we need it for --plt-localentry. --plt-localentry
|
||||
should not be used with power10 pc-relative code that makes tail
|
||||
calls.
|
||||
|
||||
The patch also removes use of r2 as a scratch reg in the ELFv2
|
||||
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
|
||||
the number of scratch regs.
|
||||
|
||||
bfd/
|
||||
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
|
||||
(LD_R0_0R11, ADD_R11_R0_R11): Define.
|
||||
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
|
||||
code detected.
|
||||
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
|
||||
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
|
||||
and only emit for has_plt_localentry0. Don't use r2 in the stub.
|
||||
ld/
|
||||
* testsuite/ld-powerpc/elfv2so.d,
|
||||
* testsuite/ld-powerpc/notoc2.d,
|
||||
* testsuite/ld-powerpc/tlsdesc.wf,
|
||||
* testsuite/ld-powerpc/tlsdesc2.d,
|
||||
* testsuite/ld-powerpc/tlsdesc2.wf,
|
||||
* testsuite/ld-powerpc/tlsopt5.d,
|
||||
* testsuite/ld-powerpc/tlsopt5.wf,
|
||||
* testsuite/ld-powerpc/tlsopt6.d,
|
||||
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
|
||||
|
||||
(cherry picked from commit 3cd7c7d7ef38ec5dc0a0c137c47d9ad0fc9e2e5f)
|
||||
---
|
||||
bfd/ChangeLog | 10 ++++
|
||||
bfd/elf64-ppc.c | 84 +++++++++++++++++++++++------
|
||||
ld/ChangeLog | 12 +++++
|
||||
ld/testsuite/ld-powerpc/elfv2so.d | 17 +++---
|
||||
ld/testsuite/ld-powerpc/notoc2.d | 4 +-
|
||||
ld/testsuite/ld-powerpc/tlsdesc.wf | 4 +-
|
||||
ld/testsuite/ld-powerpc/tlsdesc2.d | 9 ++--
|
||||
ld/testsuite/ld-powerpc/tlsdesc2.wf | 6 +--
|
||||
ld/testsuite/ld-powerpc/tlsopt5.d | 11 ++--
|
||||
ld/testsuite/ld-powerpc/tlsopt5.wf | 4 +-
|
||||
ld/testsuite/ld-powerpc/tlsopt6.d | 11 ++--
|
||||
ld/testsuite/ld-powerpc/tlsopt6.wf | 4 +-
|
||||
12 files changed, 124 insertions(+), 52 deletions(-)
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 49232b84c5..01ccac443e 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,13 @@
|
||||
+2020-09-26 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
|
||||
+ (LD_R0_0R11, ADD_R11_R0_R11): Define.
|
||||
+ (ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
|
||||
+ code detected.
|
||||
+ (ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
|
||||
+ (ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
|
||||
+ and only emit for has_plt_localentry0. Don't use r2 in the stub.
|
||||
+
|
||||
2020-09-24 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
Import from mainline:
|
||||
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
|
||||
index 7804ea3c14..f4d0c88c7a 100644
|
||||
--- a/bfd/elf64-ppc.c
|
||||
+++ b/bfd/elf64-ppc.c
|
||||
@@ -211,9 +211,10 @@ static bfd_vma opd_entry_value
|
||||
#define PLD_R12_PC 0x04100000e5800000ULL
|
||||
#define PNOP 0x0700000000000000ULL
|
||||
|
||||
-/* __glink_PLTresolve stub instructions. We enter with the index in R0. */
|
||||
+/* __glink_PLTresolve stub instructions. We enter with the index in
|
||||
+ R0 for ELFv1, and the address of a glink branch in R12 for ELFv2. */
|
||||
#define GLINK_PLTRESOLVE_SIZE(htab) \
|
||||
- (8u + (htab->opd_abi ? 11 * 4 : 14 * 4))
|
||||
+ (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4))
|
||||
/* 0: */
|
||||
/* .quad plt0-1f */
|
||||
/* __glink: */
|
||||
@@ -229,11 +230,14 @@ static bfd_vma opd_entry_value
|
||||
/* mtctr %12 */
|
||||
/* ld %11,16(%11) */
|
||||
/* bctr */
|
||||
-#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
|
||||
-#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
|
||||
-#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
|
||||
-#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
|
||||
-#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
|
||||
+
|
||||
+#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
|
||||
+#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
|
||||
+#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
|
||||
+#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
|
||||
+#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
|
||||
+#define LD_R0_0R11 0xe80b0000 /* ld %r0,0(%r11) */
|
||||
+#define ADD_R11_R0_R11 0x7d605a14 /* add %r11,%r0,%r11 */
|
||||
|
||||
/* Pad with this. */
|
||||
#define NOP 0x60000000
|
||||
@@ -7735,6 +7739,19 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
|
||||
--plt-localentry can cause trouble. */
|
||||
if (htab->params->plt_localentry0 < 0)
|
||||
htab->params->plt_localentry0 = 0;
|
||||
+ if (htab->params->plt_localentry0 && htab->has_power10_relocs)
|
||||
+ {
|
||||
+ /* The issue is that __glink_PLTresolve saves r2, which is done
|
||||
+ because glibc ld.so _dl_runtime_resolve restores r2 to support
|
||||
+ a glibc plt call optimisation where global entry code is
|
||||
+ skipped on calls that resolve to the same binary. The
|
||||
+ __glink_PLTresolve save of r2 is incompatible with code
|
||||
+ making tail calls, because the tail call might go via the
|
||||
+ resolver and thus overwrite the proper saved r2. */
|
||||
+ _bfd_error_handler (_("warning: --plt-localentry is incompatible with "
|
||||
+ "power10 pc-relative code"));
|
||||
+ htab->params->plt_localentry0 = 0;
|
||||
+ }
|
||||
if (htab->params->plt_localentry0
|
||||
&& elf_link_hash_lookup (&htab->elf, "GLIBC_2.26",
|
||||
FALSE, FALSE, FALSE) == NULL)
|
||||
@@ -13870,11 +13887,11 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
|
||||
/* Augmentation. */
|
||||
p += 1;
|
||||
|
||||
- *p++ = DW_CFA_advance_loc + 1;
|
||||
+ *p++ = DW_CFA_advance_loc + (htab->has_plt_localentry0 ? 3 : 2);
|
||||
*p++ = DW_CFA_register;
|
||||
*p++ = 65;
|
||||
*p++ = htab->opd_abi ? 12 : 0;
|
||||
- *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 5 : 7);
|
||||
+ *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 4 : 2);
|
||||
*p++ = DW_CFA_restore_extended;
|
||||
*p++ = 65;
|
||||
p += ((24 + align - 1) & -align) - 24;
|
||||
@@ -14470,23 +14487,60 @@ ppc64_elf_build_stubs (struct bfd_link_info *info,
|
||||
}
|
||||
else
|
||||
{
|
||||
+ unsigned int insn;
|
||||
+
|
||||
+ /* 0:
|
||||
+ . .quad plt0-1f # plt0 entry relative to 1:
|
||||
+ #
|
||||
+ # We get here with r12 initially @ a glink branch
|
||||
+ # Load the address of _dl_runtime_resolve from plt0 and
|
||||
+ # jump to it, with r0 set to the index of the PLT entry
|
||||
+ # to be resolved and r11 the link map.
|
||||
+ __glink_PLTresolve:
|
||||
+ . std %r2,24(%r1) # optional
|
||||
+ . mflr %r0
|
||||
+ . bcl 20,31,1f
|
||||
+ 1:
|
||||
+ . mflr %r11
|
||||
+ . mtlr %r0
|
||||
+ . ld %r0,(0b-1b)(%r11)
|
||||
+ . sub %r12,%r12,%r11
|
||||
+ . add %r11,%r0,%r11
|
||||
+ . addi %r0,%r12,1b-2f
|
||||
+ . ld %r12,0(%r11)
|
||||
+ . srdi %r0,%r0,2
|
||||
+ . mtctr %r12
|
||||
+ . ld %r11,8(%r11)
|
||||
+ . bctr
|
||||
+ 2:
|
||||
+ . b __glink_PLTresolve
|
||||
+ . ...
|
||||
+ . b __glink_PLTresolve */
|
||||
+
|
||||
+ if (htab->has_plt_localentry0)
|
||||
+ {
|
||||
+ bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
|
||||
+ p += 4;
|
||||
+ }
|
||||
bfd_put_32 (htab->glink->owner, MFLR_R0, p);
|
||||
p += 4;
|
||||
bfd_put_32 (htab->glink->owner, BCL_20_31, p);
|
||||
p += 4;
|
||||
bfd_put_32 (htab->glink->owner, MFLR_R11, p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
|
||||
- p += 4;
|
||||
- bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p);
|
||||
- p += 4;
|
||||
bfd_put_32 (htab->glink->owner, MTLR_R0, p);
|
||||
p += 4;
|
||||
+ if (htab->has_plt_localentry0)
|
||||
+ insn = LD_R0_0R11 | (-20 & 0xfffc);
|
||||
+ else
|
||||
+ insn = LD_R0_0R11 | (-16 & 0xfffc);
|
||||
+ bfd_put_32 (htab->glink->owner, insn, p);
|
||||
+ p += 4;
|
||||
bfd_put_32 (htab->glink->owner, SUB_R12_R12_R11, p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p);
|
||||
+ bfd_put_32 (htab->glink->owner, ADD_R11_R0_R11, p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-48 & 0xffff), p);
|
||||
+ bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-44 & 0xffff), p);
|
||||
p += 4;
|
||||
bfd_put_32 (htab->glink->owner, LD_R12_0R11, p);
|
||||
p += 4;
|
||||
diff --git a/ld/ChangeLog b/ld/ChangeLog
|
||||
index 3fcbc7e67f..a3acc07689 100644
|
||||
--- a/ld/ChangeLog
|
||||
+++ b/ld/ChangeLog
|
||||
@@ -1,3 +1,15 @@
|
||||
+2020-09-26 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ * testsuite/ld-powerpc/elfv2so.d,
|
||||
+ * testsuite/ld-powerpc/notoc2.d,
|
||||
+ * testsuite/ld-powerpc/tlsdesc.wf,
|
||||
+ * testsuite/ld-powerpc/tlsdesc2.d,
|
||||
+ * testsuite/ld-powerpc/tlsdesc2.wf,
|
||||
+ * testsuite/ld-powerpc/tlsopt5.d,
|
||||
+ * testsuite/ld-powerpc/tlsopt5.wf,
|
||||
+ * testsuite/ld-powerpc/tlsopt6.d,
|
||||
+ * testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
PR 26655
|
||||
diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
|
||||
index 0162bd0880..4018f0536c 100644
|
||||
--- a/ld/testsuite/ld-powerpc/elfv2so.d
|
||||
+++ b/ld/testsuite/ld-powerpc/elfv2so.d
|
||||
@@ -74,12 +74,11 @@ Disassembly of section \.text:
|
||||
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
|
||||
.*: (42 9f 00 05|05 00 9f 42) bcl .*
|
||||
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
|
||||
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
|
||||
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
|
||||
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
|
||||
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
|
||||
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
|
||||
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
|
||||
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
|
||||
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
|
||||
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
|
||||
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
|
||||
@@ -87,16 +86,16 @@ Disassembly of section \.text:
|
||||
.*: (4e 80 04 20|20 04 80 4e) bctr
|
||||
|
||||
.* <f5@plt>:
|
||||
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
|
||||
|
||||
.* <f3@plt>:
|
||||
-.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
|
||||
.* <f2@plt>:
|
||||
-.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
|
||||
.* <f4@plt>:
|
||||
-.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
|
||||
.* <f1@plt>:
|
||||
-.*: (4b ff ff b8|b8 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
|
||||
diff --git a/ld/testsuite/ld-powerpc/notoc2.d b/ld/testsuite/ld-powerpc/notoc2.d
|
||||
index 1e519c0d1b..3448f8b37e 100644
|
||||
--- a/ld/testsuite/ld-powerpc/notoc2.d
|
||||
+++ b/ld/testsuite/ld-powerpc/notoc2.d
|
||||
@@ -22,8 +22,8 @@ Disassembly of section \.text:
|
||||
.*: (39 80 ff ff|ff ff 80 39)
|
||||
.*: (06 10 00 00|00 00 10 06) pla r12,0
|
||||
.*: (39 80 00 00|00 00 80 39)
|
||||
-.*: (06 10 00 00|00 00 10 06) pla r3,92
|
||||
-.*: (38 60 00 5c|5c 00 60 38)
|
||||
+.*: (06 10 00 00|00 00 10 06) pla r3,88
|
||||
+.*: (38 60 00 58|58 00 60 38)
|
||||
.*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
#pass
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsdesc.wf b/ld/testsuite/ld-powerpc/tlsdesc.wf
|
||||
index 09503fa005..e7d4522b50 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsdesc.wf
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsdesc.wf
|
||||
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
|
||||
DW_CFA_nop
|
||||
|
||||
0+4c 0+14 0+50 FDE cie=0+ pc=0+2f8\.\.0+32c
|
||||
- DW_CFA_advance_loc: 4 to 0+2fc
|
||||
+ DW_CFA_advance_loc: 8 to 0+300
|
||||
DW_CFA_register: r65 in r12
|
||||
- DW_CFA_advance_loc: 20 to 0+310
|
||||
+ DW_CFA_advance_loc: 16 to 0+310
|
||||
DW_CFA_restore_extended: r65
|
||||
|
||||
0+64 0+10 0+68 FDE cie=0+ pc=0+2e0\.\.0+2ec
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.d b/ld/testsuite/ld-powerpc/tlsdesc2.d
|
||||
index 47aedbecb8..c271c949b0 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsdesc2.d
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsdesc2.d
|
||||
@@ -53,12 +53,11 @@ Disassembly of section \.text:
|
||||
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
|
||||
.*: (42 9f 00 05|05 00 9f 42) bcl .*
|
||||
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
-.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
|
||||
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
|
||||
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
|
||||
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
|
||||
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
|
||||
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
|
||||
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
|
||||
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
|
||||
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
|
||||
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
|
||||
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
|
||||
@@ -66,4 +65,4 @@ Disassembly of section \.text:
|
||||
.*: (4e 80 04 20|20 04 80 4e) bctr
|
||||
|
||||
.* <__tls_get_addr_opt@plt>:
|
||||
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
|
||||
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.wf b/ld/testsuite/ld-powerpc/tlsdesc2.wf
|
||||
index cb92c294b1..79a417ba06 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsdesc2.wf
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsdesc2.wf
|
||||
@@ -37,10 +37,10 @@ Contents of the \.eh_frame section:
|
||||
DW_CFA_nop
|
||||
DW_CFA_nop
|
||||
|
||||
-0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+354
|
||||
- DW_CFA_advance_loc: 4 to 0+31c
|
||||
+0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+350
|
||||
+ DW_CFA_advance_loc: 8 to 0+320
|
||||
DW_CFA_register: r65 in r0
|
||||
- DW_CFA_advance_loc: 28 to 0+338
|
||||
+ DW_CFA_advance_loc: 8 to 0+328
|
||||
DW_CFA_restore_extended: r65
|
||||
|
||||
0+64 0+10 0+68 FDE cie=0+ pc=0+300\.\.0+30c
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.d b/ld/testsuite/ld-powerpc/tlsopt5.d
|
||||
index 0fcb79821b..efd6debc55 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsopt5.d
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsopt5.d
|
||||
@@ -49,12 +49,11 @@ Disassembly of section \.text:
|
||||
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
|
||||
.*: (05 00 9f 42|42 9f 00 05) bcl .*
|
||||
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
|
||||
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
|
||||
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
|
||||
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
|
||||
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
|
||||
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
|
||||
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
|
||||
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
|
||||
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
|
||||
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
|
||||
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
|
||||
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
|
||||
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
|
||||
@@ -62,7 +61,7 @@ Disassembly of section \.text:
|
||||
.*: (20 04 80 4e|4e 80 04 20) bctr
|
||||
|
||||
.* <__tls_get_addr_opt@plt>:
|
||||
-.* (c8 ff ff 4b|4b ff ff c8) b .*
|
||||
+.* (cc ff ff 4b|4b ff ff cc) b .*
|
||||
|
||||
.* <aaaaa@plt>:
|
||||
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
|
||||
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.wf b/ld/testsuite/ld-powerpc/tlsopt5.wf
|
||||
index f0453610e0..84bd94ed72 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsopt5.wf
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsopt5.wf
|
||||
@@ -16,9 +16,9 @@ Contents of the \.eh_frame section:
|
||||
DW_CFA_restore_extended: r65
|
||||
|
||||
0+2c 0+14 0+30 FDE cie=0+ pc=.*
|
||||
- DW_CFA_advance_loc: 4 to .*
|
||||
+ DW_CFA_advance_loc: 8 to .*
|
||||
DW_CFA_register: r65 in r0
|
||||
- DW_CFA_advance_loc: 28 to .*
|
||||
+ DW_CFA_advance_loc: 8 to .*
|
||||
DW_CFA_restore_extended: r65
|
||||
|
||||
0+44 0+10 0+48 FDE cie=0+ pc=.*
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsopt6.d b/ld/testsuite/ld-powerpc/tlsopt6.d
|
||||
index 4ca64092c1..15def719cb 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsopt6.d
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsopt6.d
|
||||
@@ -67,12 +67,11 @@ Disassembly of section \.text:
|
||||
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
|
||||
.*: (05 00 9f 42|42 9f 00 05) bcl .*
|
||||
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
|
||||
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
|
||||
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
|
||||
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
|
||||
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
|
||||
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
|
||||
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
|
||||
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
|
||||
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
|
||||
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
|
||||
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
|
||||
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
|
||||
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
|
||||
@@ -80,7 +79,7 @@ Disassembly of section \.text:
|
||||
.*: (20 04 80 4e|4e 80 04 20) bctr
|
||||
|
||||
.* <__tls_get_addr_opt@plt>:
|
||||
-.* (c8 ff ff 4b|4b ff ff c8) b .*
|
||||
+.* (cc ff ff 4b|4b ff ff cc) b .*
|
||||
|
||||
.* <aaaaa@plt>:
|
||||
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
|
||||
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
|
||||
diff --git a/ld/testsuite/ld-powerpc/tlsopt6.wf b/ld/testsuite/ld-powerpc/tlsopt6.wf
|
||||
index abb414a633..c2b9616352 100644
|
||||
--- a/ld/testsuite/ld-powerpc/tlsopt6.wf
|
||||
+++ b/ld/testsuite/ld-powerpc/tlsopt6.wf
|
||||
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
|
||||
DW_CFA_nop
|
||||
|
||||
0+4c 0+14 0+50 FDE cie=0+ pc=.*
|
||||
- DW_CFA_advance_loc: 4 to .*
|
||||
+ DW_CFA_advance_loc: 8 to .*
|
||||
DW_CFA_register: r65 in r0
|
||||
- DW_CFA_advance_loc: 28 to .*
|
||||
+ DW_CFA_advance_loc: 8 to .*
|
||||
DW_CFA_restore_extended: r65
|
||||
|
||||
0+64 0+10 0+68 FDE cie=0+ pc=.*
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,229 +0,0 @@
|
||||
From 97c22b122492ab3d2d1fd6237cadc56296ce76d2 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Wed, 23 Sep 2020 14:55:39 +0930
|
||||
Subject: [PATCH] PR26655, Power10 libstdc++.so R_PPC64_NONE dynamic relocs
|
||||
|
||||
Some of the powerpc64 code editing functions are better run after
|
||||
dynamic symbols have stabilised in order to make proper decisions
|
||||
based on SYMBOL_REFERENCES_LOCAL. The dynamic symbols are processed
|
||||
early in bfd_elf_size_dynamic_sections, before the backend
|
||||
always_size_sections function is called.
|
||||
|
||||
One function, ppc64_elf_tls_setup must run before
|
||||
bfd_elf_size_dynamic_sections because it changes dynamic symbols.
|
||||
ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I
|
||||
think. ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run
|
||||
later.
|
||||
|
||||
So this patch arranges to call some edit functions later via
|
||||
always_size_sections.
|
||||
|
||||
PR 26655
|
||||
bfd/
|
||||
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
|
||||
(ppc64_elf_edit): Call params->edit.
|
||||
(ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a
|
||||
bfd_boolean.
|
||||
* elf64-ppc.h (struct ppc64_elf_params): Add "edit".
|
||||
(ppc64_elf_tls_setup): Update declaration.
|
||||
ld/
|
||||
* emultempl/ppc64elf.em (params): Add ppc_edit.
|
||||
(ppc_before_allocation): Split off some edit functions to..
|
||||
(ppc_edit): ..this, new function.
|
||||
|
||||
(cherry picked from commit c94053440e29421dd8846530da73f09c9ede2e0f)
|
||||
---
|
||||
bfd/ChangeLog | 10 ++++++++++
|
||||
bfd/elf64-ppc.c | 27 ++++++++++++++++-----------
|
||||
bfd/elf64-ppc.h | 3 ++-
|
||||
ld/ChangeLog | 7 +++++++
|
||||
ld/emultempl/ppc64elf.em | 18 +++++++++++++++---
|
||||
5 files changed, 50 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 825d5e6d4a..1dabc6ebd6 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,13 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ PR 26655
|
||||
+ * elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
|
||||
+ (ppc64_elf_edit): Call params->edit.
|
||||
+ (ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a
|
||||
+ bfd_boolean.
|
||||
+ * elf64-ppc.h (struct ppc64_elf_params): Add "edit".
|
||||
+ (ppc64_elf_tls_setup): Update declaration.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
|
||||
index faf4989659..bc1302e6ef 100644
|
||||
--- a/bfd/elf64-ppc.c
|
||||
+++ b/bfd/elf64-ppc.c
|
||||
@@ -114,7 +114,7 @@ static bfd_vma opd_entry_value
|
||||
#define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol
|
||||
#define elf_backend_hide_symbol ppc64_elf_hide_symbol
|
||||
#define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym
|
||||
-#define elf_backend_always_size_sections ppc64_elf_func_desc_adjust
|
||||
+#define elf_backend_always_size_sections ppc64_elf_edit
|
||||
#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections
|
||||
#define elf_backend_hash_symbol ppc64_elf_hash_symbol
|
||||
#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
|
||||
@@ -6340,13 +6340,13 @@ static const struct sfpr_def_parms save_res_funcs[] =
|
||||
};
|
||||
|
||||
/* Called near the start of bfd_elf_size_dynamic_sections. We use
|
||||
- this hook to a) provide some gcc support functions, and b) transfer
|
||||
- dynamic linking information gathered so far on function code symbol
|
||||
- entries, to their corresponding function descriptor symbol entries. */
|
||||
+ this hook to a) run the edit functions in this file, b) provide
|
||||
+ some gcc support functions, and c) transfer dynamic linking
|
||||
+ information gathered so far on function code symbol entries, to
|
||||
+ their corresponding function descriptor symbol entries. */
|
||||
|
||||
static bfd_boolean
|
||||
-ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
|
||||
- struct bfd_link_info *info)
|
||||
+ppc64_elf_edit (bfd *obfd ATTRIBUTE_UNUSED, struct bfd_link_info *info)
|
||||
{
|
||||
struct ppc_link_hash_table *htab;
|
||||
|
||||
@@ -6354,6 +6354,9 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
|
||||
if (htab == NULL)
|
||||
return FALSE;
|
||||
|
||||
+ /* Call back into the linker, which then runs the edit functions. */
|
||||
+ htab->params->edit ();
|
||||
+
|
||||
/* Provide any missing _save* and _rest* functions. */
|
||||
if (htab->sfpr != NULL)
|
||||
{
|
||||
@@ -7694,9 +7697,11 @@ ppc64_elf_inline_plt (struct bfd_link_info *info)
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
-/* Set htab->tls_get_addr and call the generic ELF tls_setup function. */
|
||||
+/* Set htab->tls_get_addr and various other info specific to TLS.
|
||||
+ This needs to run before dynamic symbols are processed in
|
||||
+ bfd_elf_size_dynamic_sections. */
|
||||
|
||||
-asection *
|
||||
+bfd_boolean
|
||||
ppc64_elf_tls_setup (struct bfd_link_info *info)
|
||||
{
|
||||
struct ppc_link_hash_table *htab;
|
||||
@@ -7704,7 +7709,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
|
||||
|
||||
htab = ppc_hash_table (info);
|
||||
if (htab == NULL)
|
||||
- return NULL;
|
||||
+ return FALSE;
|
||||
|
||||
if (abiversion (info->output_bfd) == 1)
|
||||
htab->opd_abi = 1;
|
||||
@@ -7826,7 +7831,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
|
||||
_bfd_elf_strtab_delref (elf_hash_table (info)->dynstr,
|
||||
opt_fd->dynstr_index);
|
||||
if (!bfd_elf_link_record_dynamic_symbol (info, opt_fd))
|
||||
- return NULL;
|
||||
+ return FALSE;
|
||||
}
|
||||
if (tga_fd != NULL)
|
||||
{
|
||||
@@ -7885,7 +7890,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
|
||||
&& htab->params->no_tls_get_addr_regsave == -1)
|
||||
htab->params->no_tls_get_addr_regsave = 0;
|
||||
|
||||
- return _bfd_elf_tls_setup (info->output_bfd, info);
|
||||
+ return TRUE;
|
||||
}
|
||||
|
||||
/* Return TRUE iff REL is a branch reloc with a global symbol matching
|
||||
diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h
|
||||
index a7230de81c..0492fd7fad 100644
|
||||
--- a/bfd/elf64-ppc.h
|
||||
+++ b/bfd/elf64-ppc.h
|
||||
@@ -27,6 +27,7 @@ struct ppc64_elf_params
|
||||
/* Linker call-backs. */
|
||||
asection * (*add_stub_section) (const char *, asection *);
|
||||
void (*layout_sections_again) (void);
|
||||
+ void (*edit) (void);
|
||||
|
||||
/* Maximum size of a group of input sections that can be handled by
|
||||
one stub section. A value of +/-1 indicates the bfd back-end
|
||||
@@ -80,7 +81,7 @@ bfd_boolean ppc64_elf_edit_opd
|
||||
(struct bfd_link_info *);
|
||||
bfd_boolean ppc64_elf_inline_plt
|
||||
(struct bfd_link_info *);
|
||||
-asection *ppc64_elf_tls_setup
|
||||
+bfd_boolean ppc64_elf_tls_setup
|
||||
(struct bfd_link_info *);
|
||||
bfd_boolean ppc64_elf_tls_optimize
|
||||
(struct bfd_link_info *);
|
||||
diff --git a/ld/ChangeLog b/ld/ChangeLog
|
||||
index 0ee333a860..3fcbc7e67f 100644
|
||||
--- a/ld/ChangeLog
|
||||
+++ b/ld/ChangeLog
|
||||
@@ -1,3 +1,10 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ PR 26655
|
||||
+ * emultempl/ppc64elf.em (params): Add ppc_edit.
|
||||
+ (ppc_before_allocation): Split off some edit functions to..
|
||||
+ (ppc_edit): ..this, new function.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
|
||||
index 42b9bd48fc..2df5a218e6 100644
|
||||
--- a/ld/emultempl/ppc64elf.em
|
||||
+++ b/ld/emultempl/ppc64elf.em
|
||||
@@ -32,10 +32,12 @@ fragment <<EOF
|
||||
|
||||
static asection *ppc_add_stub_section (const char *, asection *);
|
||||
static void ppc_layout_sections_again (void);
|
||||
+static void ppc_edit (void);
|
||||
|
||||
static struct ppc64_elf_params params = { NULL,
|
||||
&ppc_add_stub_section,
|
||||
&ppc_layout_sections_again,
|
||||
+ &ppc_edit,
|
||||
1, -1, -1, 0,
|
||||
${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5,
|
||||
-1, -1, 0, 0, -1, -1, 0};
|
||||
@@ -294,7 +296,19 @@ ppc_before_allocation (void)
|
||||
einfo (_("%X%P: inline PLT: %E\n"));
|
||||
}
|
||||
|
||||
- if (ppc64_elf_tls_setup (&link_info)
|
||||
+ if (!ppc64_elf_tls_setup (&link_info))
|
||||
+ einfo (_("%X%P: TLS problem %E\n"));
|
||||
+ }
|
||||
+
|
||||
+ gld${EMULATION_NAME}_before_allocation ();
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+ppc_edit (void)
|
||||
+{
|
||||
+ if (stub_file != NULL)
|
||||
+ {
|
||||
+ if (elf_hash_table (&link_info)->tls_sec != NULL
|
||||
&& !no_tls_opt)
|
||||
{
|
||||
/* Size the sections. This is premature, but we want to know the
|
||||
@@ -323,8 +337,6 @@ ppc_before_allocation (void)
|
||||
sort_toc_sections (&toc_os->children, NULL, NULL);
|
||||
}
|
||||
}
|
||||
-
|
||||
- gld${EMULATION_NAME}_before_allocation ();
|
||||
}
|
||||
|
||||
struct hook_stub_info
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,795 +0,0 @@
|
||||
From 6f9a6c28850f6839ff61af22c277b2abbf7895da Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Tue, 22 Sep 2020 22:51:42 +0930
|
||||
Subject: [PATCH] PR26656, power10 libstdc++.so segfault in
|
||||
__cxxabiv1::__cxa_throw
|
||||
|
||||
This adds missing support for a power10 version of the __tls_get_addr
|
||||
call stub implementing DT_PPC64_OPT PPC64_OPT_TLS. Without this,
|
||||
power10 code using __tls_get_addr fails miserably at runtime unless
|
||||
the --no-tls-get-addr-optimize option is given.
|
||||
|
||||
PR 26656
|
||||
* elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
|
||||
size_power10_offset rather than calculating from start of stub.
|
||||
Add size for notoc tls_get_addr_opt stub.
|
||||
(plt_stub_pad): Add "odd" param, pass to plt_stub_size.
|
||||
(build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
|
||||
(build_tls_get_addr_stub): Delete.
|
||||
(ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
|
||||
Emit notoc tls_get_addr_opt stub. Move eh_frame code to
|
||||
suit. Adjust code to use bfd_tls_get_addr_head/tail in place
|
||||
of build_tls_get_addr_stub.
|
||||
(ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
|
||||
Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
|
||||
when padding stub. Size eh_frame for notoc stub too.
|
||||
Correct lr_restore value.
|
||||
(ppc64_elf_relocate_section): Don't skip over first insn of
|
||||
notoc tls_get_addr_opt stub.
|
||||
|
||||
(cherry picked from commit 294338867c268b6da43327b6cbe70e746bff1a04)
|
||||
---
|
||||
bfd/ChangeLog | 20 +++
|
||||
bfd/elf64-ppc.c | 424 +++++++++++++++++++++++++++---------------------
|
||||
2 files changed, 259 insertions(+), 185 deletions(-)
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 1dabc6ebd6..da976cac0f 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,23 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ PR 26656
|
||||
+ * elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
|
||||
+ size_power10_offset rather than calculating from start of stub.
|
||||
+ Add size for notoc tls_get_addr_opt stub.
|
||||
+ (plt_stub_pad): Add "odd" param, pass to plt_stub_size.
|
||||
+ (build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
|
||||
+ (build_tls_get_addr_stub): Delete.
|
||||
+ (ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
|
||||
+ Emit notoc tls_get_addr_opt stub. Move eh_frame code to
|
||||
+ suit. Adjust code to use bfd_tls_get_addr_head/tail in place
|
||||
+ of build_tls_get_addr_stub.
|
||||
+ (ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
|
||||
+ Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
|
||||
+ when padding stub. Size eh_frame for notoc stub too.
|
||||
+ Correct lr_restore value.
|
||||
+ (ppc64_elf_relocate_section): Don't skip over first insn of
|
||||
+ notoc tls_get_addr_opt stub.
|
||||
+
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
PR 26655
|
||||
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
|
||||
index bc1302e6ef..7804ea3c14 100644
|
||||
--- a/bfd/elf64-ppc.c
|
||||
+++ b/bfd/elf64-ppc.c
|
||||
@@ -10839,62 +10839,60 @@ eh_advance_size (unsigned int delta)
|
||||
static inline unsigned int
|
||||
plt_stub_size (struct ppc_link_hash_table *htab,
|
||||
struct ppc_stub_hash_entry *stub_entry,
|
||||
- bfd_vma off)
|
||||
+ bfd_vma off,
|
||||
+ unsigned int odd)
|
||||
{
|
||||
unsigned size;
|
||||
|
||||
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
|
||||
{
|
||||
if (htab->params->power10_stubs != 0)
|
||||
- {
|
||||
- bfd_vma start = (stub_entry->stub_offset
|
||||
- + stub_entry->group->stub_sec->output_offset
|
||||
- + stub_entry->group->stub_sec->output_section->vma);
|
||||
- if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
|
||||
- start += 4;
|
||||
- size = 8 + size_power10_offset (off, start & 4);
|
||||
- }
|
||||
+ size = 8 + size_power10_offset (off, odd);
|
||||
else
|
||||
size = 8 + size_offset (off - 8);
|
||||
if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
|
||||
size += 4;
|
||||
- return size;
|
||||
}
|
||||
-
|
||||
- size = 12;
|
||||
- if (ALWAYS_EMIT_R2SAVE
|
||||
- || stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
- size += 4;
|
||||
- if (PPC_HA (off) != 0)
|
||||
- size += 4;
|
||||
- if (htab->opd_abi)
|
||||
+ else
|
||||
{
|
||||
- size += 4;
|
||||
- if (htab->params->plt_static_chain)
|
||||
+ size = 12;
|
||||
+ if (ALWAYS_EMIT_R2SAVE
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
size += 4;
|
||||
- if (htab->params->plt_thread_safe
|
||||
- && htab->elf.dynamic_sections_created
|
||||
- && stub_entry->h != NULL
|
||||
- && stub_entry->h->elf.dynindx != -1)
|
||||
- size += 8;
|
||||
- if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) != PPC_HA (off))
|
||||
+ if (PPC_HA (off) != 0)
|
||||
size += 4;
|
||||
+ if (htab->opd_abi)
|
||||
+ {
|
||||
+ size += 4;
|
||||
+ if (htab->params->plt_static_chain)
|
||||
+ size += 4;
|
||||
+ if (htab->params->plt_thread_safe
|
||||
+ && htab->elf.dynamic_sections_created
|
||||
+ && stub_entry->h != NULL
|
||||
+ && stub_entry->h->elf.dynindx != -1)
|
||||
+ size += 8;
|
||||
+ if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain)
|
||||
+ != PPC_HA (off))
|
||||
+ size += 4;
|
||||
+ }
|
||||
}
|
||||
if (stub_entry->h != NULL
|
||||
&& is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
&& htab->params->tls_get_addr_opt)
|
||||
{
|
||||
- if (htab->params->no_tls_get_addr_regsave)
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
{
|
||||
- size += 7 * 4;
|
||||
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
- size += 6 * 4;
|
||||
+ size += 30 * 4;
|
||||
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ size += 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
- size += 30 * 4;
|
||||
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
- size += 4;
|
||||
+ size += 7 * 4;
|
||||
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ size += 6 * 4;
|
||||
}
|
||||
}
|
||||
return size;
|
||||
@@ -10909,7 +10907,8 @@ plt_stub_size (struct ppc_link_hash_table *htab,
|
||||
static inline unsigned int
|
||||
plt_stub_pad (struct ppc_link_hash_table *htab,
|
||||
struct ppc_stub_hash_entry *stub_entry,
|
||||
- bfd_vma plt_off)
|
||||
+ bfd_vma plt_off,
|
||||
+ unsigned int odd)
|
||||
{
|
||||
int stub_align;
|
||||
unsigned stub_size;
|
||||
@@ -10924,7 +10923,7 @@ plt_stub_pad (struct ppc_link_hash_table *htab,
|
||||
}
|
||||
|
||||
stub_align = 1 << -htab->params->plt_stub_align;
|
||||
- stub_size = plt_stub_size (htab, stub_entry, plt_off);
|
||||
+ stub_size = plt_stub_size (htab, stub_entry, plt_off, odd);
|
||||
if (((stub_off + stub_size - 1) & -stub_align) - (stub_off & -stub_align)
|
||||
> ((stub_size - 1) & -stub_align))
|
||||
return stub_align - (stub_off & (stub_align - 1));
|
||||
@@ -11119,14 +11118,12 @@ build_plt_stub (struct ppc_link_hash_table *htab,
|
||||
#define MR_R3_R0 0x7c030378
|
||||
#define BCTRL 0x4e800421
|
||||
|
||||
-static inline bfd_byte *
|
||||
-build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
|
||||
+static bfd_byte *
|
||||
+build_tls_get_addr_head (struct ppc_link_hash_table *htab,
|
||||
struct ppc_stub_hash_entry *stub_entry,
|
||||
- bfd_byte *p, bfd_vma offset, Elf_Internal_Rela *r)
|
||||
+ bfd_byte *p)
|
||||
{
|
||||
bfd *obfd = htab->params->stub_bfd;
|
||||
- bfd_byte *loc = p;
|
||||
- unsigned int i;
|
||||
|
||||
bfd_put_32 (obfd, LD_R0_0R3 + 0, p), p += 4;
|
||||
bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4;
|
||||
@@ -11135,21 +11132,43 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
|
||||
bfd_put_32 (obfd, ADD_R3_R12_R13, p), p += 4;
|
||||
bfd_put_32 (obfd, BEQLR, p), p += 4;
|
||||
bfd_put_32 (obfd, MR_R3_R0, p), p += 4;
|
||||
- if (htab->params->no_tls_get_addr_regsave)
|
||||
- {
|
||||
- if (r != NULL)
|
||||
- r[0].r_offset += 7 * 4;
|
||||
- if (stub_entry->stub_type != ppc_stub_plt_call_r2save)
|
||||
- return build_plt_stub (htab, stub_entry, p, offset, r);
|
||||
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
+ p = tls_get_addr_prologue (obfd, p, htab);
|
||||
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ {
|
||||
bfd_put_32 (obfd, MFLR_R0, p);
|
||||
p += 4;
|
||||
bfd_put_32 (obfd, STD_R0_0R1 + STK_LINKER (htab), p);
|
||||
p += 4;
|
||||
+ }
|
||||
+ return p;
|
||||
+}
|
||||
|
||||
- if (r != NULL)
|
||||
- r[0].r_offset += 2 * 4;
|
||||
- p = build_plt_stub (htab, stub_entry, p, offset, r);
|
||||
+static bfd_byte *
|
||||
+build_tls_get_addr_tail (struct ppc_link_hash_table *htab,
|
||||
+ struct ppc_stub_hash_entry *stub_entry,
|
||||
+ bfd_byte *p,
|
||||
+ bfd_byte *loc)
|
||||
+{
|
||||
+ bfd *obfd = htab->params->stub_bfd;
|
||||
+
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
+ {
|
||||
+ bfd_put_32 (obfd, BCTRL, p - 4);
|
||||
+
|
||||
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ {
|
||||
+ bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
|
||||
+ p += 4;
|
||||
+ }
|
||||
+ p = tls_get_addr_epilogue (obfd, p, htab);
|
||||
+ }
|
||||
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ {
|
||||
bfd_put_32 (obfd, BCTRL, p - 4);
|
||||
|
||||
bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
|
||||
@@ -11161,24 +11180,6 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
|
||||
bfd_put_32 (obfd, BLR, p);
|
||||
p += 4;
|
||||
}
|
||||
- else
|
||||
- {
|
||||
- p = tls_get_addr_prologue (obfd, p, htab);
|
||||
-
|
||||
- if (r != NULL)
|
||||
- r[0].r_offset += 18 * 4;
|
||||
-
|
||||
- p = build_plt_stub (htab, stub_entry, p, offset, r);
|
||||
- bfd_put_32 (obfd, BCTRL, p - 4);
|
||||
-
|
||||
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
- {
|
||||
- bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
|
||||
- p += 4;
|
||||
- }
|
||||
-
|
||||
- p = tls_get_addr_epilogue (obfd, p, htab);
|
||||
- }
|
||||
|
||||
if (htab->glink_eh_frame != NULL
|
||||
&& htab->glink_eh_frame->size != 0)
|
||||
@@ -11187,21 +11188,11 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
|
||||
|
||||
base = htab->glink_eh_frame->contents + stub_entry->group->eh_base + 17;
|
||||
eh = base + stub_entry->group->eh_size;
|
||||
- if (htab->params->no_tls_get_addr_regsave)
|
||||
- {
|
||||
- unsigned int lr_used, delta;
|
||||
- lr_used = stub_entry->stub_offset + (p - 20 - loc);
|
||||
- delta = lr_used - stub_entry->group->lr_restore;
|
||||
- stub_entry->group->lr_restore = lr_used + 16;
|
||||
- eh = eh_advance (htab->elf.dynobj, eh, delta);
|
||||
- *eh++ = DW_CFA_offset_extended_sf;
|
||||
- *eh++ = 65;
|
||||
- *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
|
||||
- *eh++ = DW_CFA_advance_loc + 4;
|
||||
- }
|
||||
- else
|
||||
+
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
{
|
||||
- unsigned int cfa_updt, delta;
|
||||
+ unsigned int cfa_updt, delta, i;
|
||||
+
|
||||
/* After the bctrl, lr has been modified so we need to emit
|
||||
.eh_frame info saying the return address is on the stack. In
|
||||
fact we must put the EH info at or before the call rather
|
||||
@@ -11240,10 +11231,27 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
|
||||
for (i = 4; i < 12; i++)
|
||||
*eh++ = DW_CFA_restore + i;
|
||||
*eh++ = DW_CFA_advance_loc + 2;
|
||||
+ *eh++ = DW_CFA_restore_extended;
|
||||
+ *eh++ = 65;
|
||||
+ stub_entry->group->eh_size = eh - base;
|
||||
+ }
|
||||
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ {
|
||||
+ unsigned int lr_used, delta;
|
||||
+
|
||||
+ lr_used = stub_entry->stub_offset + (p - 20 - loc);
|
||||
+ delta = lr_used - stub_entry->group->lr_restore;
|
||||
+ stub_entry->group->lr_restore = lr_used + 16;
|
||||
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
|
||||
+ *eh++ = DW_CFA_offset_extended_sf;
|
||||
+ *eh++ = 65;
|
||||
+ *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
|
||||
+ *eh++ = DW_CFA_advance_loc + 4;
|
||||
+ *eh++ = DW_CFA_restore_extended;
|
||||
+ *eh++ = 65;
|
||||
+ stub_entry->group->eh_size = eh - base;
|
||||
}
|
||||
- *eh++ = DW_CFA_restore_extended;
|
||||
- *eh++ = 65;
|
||||
- stub_entry->group->eh_size = eh - base;
|
||||
}
|
||||
return p;
|
||||
}
|
||||
@@ -11377,6 +11385,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
struct ppc_branch_hash_entry *br_entry;
|
||||
struct bfd_link_info *info;
|
||||
struct ppc_link_hash_table *htab;
|
||||
+ bfd *obfd;
|
||||
bfd_byte *loc;
|
||||
bfd_byte *p, *relp;
|
||||
bfd_vma targ, off;
|
||||
@@ -11384,6 +11393,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
asection *plt;
|
||||
int num_rel;
|
||||
int odd;
|
||||
+ bfd_boolean is_tga;
|
||||
|
||||
/* Massage our args to the form they really have. */
|
||||
stub_entry = (struct ppc_stub_hash_entry *) gen_entry;
|
||||
@@ -11433,6 +11443,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
off = targ - off;
|
||||
|
||||
p = loc;
|
||||
+ obfd = htab->params->stub_bfd;
|
||||
if (stub_entry->stub_type == ppc_stub_long_branch_r2off)
|
||||
{
|
||||
bfd_vma r2off = get_r2off (info, stub_entry);
|
||||
@@ -11442,23 +11453,21 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
htab->stub_error = TRUE;
|
||||
return FALSE;
|
||||
}
|
||||
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
p += 4;
|
||||
if (PPC_HA (r2off) != 0)
|
||||
{
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDIS_R2_R2 | PPC_HA (r2off), p);
|
||||
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
|
||||
p += 4;
|
||||
}
|
||||
if (PPC_LO (r2off) != 0)
|
||||
{
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDI_R2_R2 | PPC_LO (r2off), p);
|
||||
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
|
||||
p += 4;
|
||||
}
|
||||
off -= p - loc;
|
||||
}
|
||||
- bfd_put_32 (htab->params->stub_bfd, B_DOT | (off & 0x3fffffc), p);
|
||||
+ bfd_put_32 (obfd, B_DOT | (off & 0x3fffffc), p);
|
||||
p += 4;
|
||||
|
||||
if (off + (1 << 25) >= (bfd_vma) (1 << 26))
|
||||
@@ -11584,19 +11593,17 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
}
|
||||
|
||||
p = loc;
|
||||
+ obfd = htab->params->stub_bfd;
|
||||
if (stub_entry->stub_type != ppc_stub_plt_branch_r2off)
|
||||
{
|
||||
if (PPC_HA (off) != 0)
|
||||
{
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDIS_R12_R2 | PPC_HA (off), p);
|
||||
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- LD_R12_0R12 | PPC_LO (off), p);
|
||||
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
|
||||
}
|
||||
else
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- LD_R12_0R2 | PPC_LO (off), p);
|
||||
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -11608,36 +11615,32 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
p += 4;
|
||||
if (PPC_HA (off) != 0)
|
||||
{
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDIS_R12_R2 | PPC_HA (off), p);
|
||||
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- LD_R12_0R12 | PPC_LO (off), p);
|
||||
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
|
||||
}
|
||||
else
|
||||
- bfd_put_32 (htab->params->stub_bfd, LD_R12_0R2 | PPC_LO (off), p);
|
||||
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
|
||||
|
||||
if (PPC_HA (r2off) != 0)
|
||||
{
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDIS_R2_R2 | PPC_HA (r2off), p);
|
||||
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
|
||||
}
|
||||
if (PPC_LO (r2off) != 0)
|
||||
{
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- ADDI_R2_R2 | PPC_LO (r2off), p);
|
||||
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
|
||||
}
|
||||
}
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
|
||||
+ bfd_put_32 (obfd, MTCTR_R12, p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
|
||||
+ bfd_put_32 (obfd, BCTR, p);
|
||||
p += 4;
|
||||
break;
|
||||
|
||||
@@ -11651,12 +11654,22 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
off = (stub_entry->stub_offset
|
||||
+ stub_entry->group->stub_sec->output_offset
|
||||
+ stub_entry->group->stub_sec->output_section->vma);
|
||||
+ obfd = htab->params->stub_bfd;
|
||||
+ is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
+ && htab->params->tls_get_addr_opt);
|
||||
+ if (is_tga)
|
||||
+ {
|
||||
+ p = build_tls_get_addr_head (htab, stub_entry, p);
|
||||
+ off += p - loc;
|
||||
+ }
|
||||
if (stub_entry->stub_type == ppc_stub_long_branch_both
|
||||
|| stub_entry->stub_type == ppc_stub_plt_branch_both
|
||||
|| stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
{
|
||||
off += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
|
||||
p += 4;
|
||||
}
|
||||
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
|
||||
@@ -11689,17 +11702,39 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
if (htab->params->power10_stubs != 0)
|
||||
{
|
||||
bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc;
|
||||
- p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load);
|
||||
+ p = build_power10_offset (obfd, p, off, odd, load);
|
||||
}
|
||||
else
|
||||
{
|
||||
+ if (htab->glink_eh_frame != NULL
|
||||
+ && htab->glink_eh_frame->size != 0)
|
||||
+ {
|
||||
+ bfd_byte *base, *eh;
|
||||
+ unsigned int lr_used, delta;
|
||||
+
|
||||
+ base = (htab->glink_eh_frame->contents
|
||||
+ + stub_entry->group->eh_base + 17);
|
||||
+ eh = base + stub_entry->group->eh_size;
|
||||
+ lr_used = stub_entry->stub_offset + (p - loc) + 8;
|
||||
+ delta = lr_used - stub_entry->group->lr_restore;
|
||||
+ stub_entry->group->lr_restore = lr_used + 8;
|
||||
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
|
||||
+ *eh++ = DW_CFA_register;
|
||||
+ *eh++ = 65;
|
||||
+ *eh++ = 12;
|
||||
+ *eh++ = DW_CFA_advance_loc + 2;
|
||||
+ *eh++ = DW_CFA_restore_extended;
|
||||
+ *eh++ = 65;
|
||||
+ stub_entry->group->eh_size = eh - base;
|
||||
+ }
|
||||
+
|
||||
/* The notoc stubs calculate their target (either a PLT entry or
|
||||
the global entry point of a function) relative to the PC
|
||||
returned by the "bcl" two instructions past the start of the
|
||||
sequence emitted by build_offset. The offset is therefore 8
|
||||
less than calculated from the start of the sequence. */
|
||||
off -= 8;
|
||||
- p = build_offset (htab->params->stub_bfd, p, off,
|
||||
+ p = build_offset (obfd, p, off,
|
||||
stub_entry->stub_type >= ppc_stub_plt_call_notoc);
|
||||
}
|
||||
|
||||
@@ -11711,17 +11746,19 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
+ stub_entry->group->stub_sec->output_offset
|
||||
+ stub_entry->group->stub_sec->output_section->vma
|
||||
+ (p - loc));
|
||||
- bfd_put_32 (htab->params->stub_bfd,
|
||||
- B_DOT | ((targ - from) & 0x3fffffc), p);
|
||||
+ bfd_put_32 (obfd, B_DOT | ((targ - from) & 0x3fffffc), p);
|
||||
}
|
||||
else
|
||||
{
|
||||
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
|
||||
+ bfd_put_32 (obfd, MTCTR_R12, p);
|
||||
p += 4;
|
||||
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
|
||||
+ bfd_put_32 (obfd, BCTR, p);
|
||||
}
|
||||
p += 4;
|
||||
|
||||
+ if (is_tga)
|
||||
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
|
||||
+
|
||||
if (info->emitrelocations)
|
||||
{
|
||||
bfd_vma roff = relp - stub_entry->group->stub_sec->contents;
|
||||
@@ -11752,33 +11789,6 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
return FALSE;
|
||||
}
|
||||
}
|
||||
-
|
||||
- if (htab->params->power10_stubs == 0
|
||||
- && htab->glink_eh_frame != NULL
|
||||
- && htab->glink_eh_frame->size != 0)
|
||||
- {
|
||||
- bfd_byte *base, *eh;
|
||||
- unsigned int lr_used, delta;
|
||||
-
|
||||
- base = (htab->glink_eh_frame->contents
|
||||
- + stub_entry->group->eh_base + 17);
|
||||
- eh = base + stub_entry->group->eh_size;
|
||||
- lr_used = stub_entry->stub_offset + 8;
|
||||
- if (stub_entry->stub_type == ppc_stub_long_branch_both
|
||||
- || stub_entry->stub_type == ppc_stub_plt_branch_both
|
||||
- || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
- lr_used += 4;
|
||||
- delta = lr_used - stub_entry->group->lr_restore;
|
||||
- stub_entry->group->lr_restore = lr_used + 8;
|
||||
- eh = eh_advance (htab->elf.dynobj, eh, delta);
|
||||
- *eh++ = DW_CFA_register;
|
||||
- *eh++ = 65;
|
||||
- *eh++ = 12;
|
||||
- *eh++ = DW_CFA_advance_loc + 2;
|
||||
- *eh++ = DW_CFA_restore_extended;
|
||||
- *eh++ = 65;
|
||||
- stub_entry->group->eh_size = eh - base;
|
||||
- }
|
||||
break;
|
||||
|
||||
case ppc_stub_plt_call:
|
||||
@@ -11847,12 +11857,20 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
r[0].r_offset += 2;
|
||||
r[0].r_addend = targ;
|
||||
}
|
||||
- if (stub_entry->h != NULL
|
||||
- && is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
- && htab->params->tls_get_addr_opt)
|
||||
- p = build_tls_get_addr_stub (htab, stub_entry, loc, off, r);
|
||||
- else
|
||||
- p = build_plt_stub (htab, stub_entry, loc, off, r);
|
||||
+ p = loc;
|
||||
+ obfd = htab->params->stub_bfd;
|
||||
+ is_tga = (stub_entry->h != NULL
|
||||
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
+ && htab->params->tls_get_addr_opt);
|
||||
+ if (is_tga)
|
||||
+ {
|
||||
+ p = build_tls_get_addr_head (htab, stub_entry, p);
|
||||
+ if (r != NULL)
|
||||
+ r[0].r_offset += p - loc;
|
||||
+ }
|
||||
+ p = build_plt_stub (htab, stub_entry, p, off, r);
|
||||
+ if (is_tga)
|
||||
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
|
||||
break;
|
||||
|
||||
case ppc_stub_save_res:
|
||||
@@ -12148,11 +12166,18 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
|
||||
case ppc_stub_plt_call_notoc:
|
||||
case ppc_stub_plt_call_both:
|
||||
- off = (stub_entry->stub_offset
|
||||
- + stub_entry->group->stub_sec->output_offset
|
||||
- + stub_entry->group->stub_sec->output_section->vma);
|
||||
+ lr_used = 0;
|
||||
+ if (is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
+ && htab->params->tls_get_addr_opt)
|
||||
+ {
|
||||
+ lr_used += 7 * 4;
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
+ lr_used += 11 * 4;
|
||||
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ lr_used += 2 * 4;
|
||||
+ }
|
||||
if (stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
- off += 4;
|
||||
+ lr_used += 4;
|
||||
targ = stub_entry->plt_ent->plt.offset & ~1;
|
||||
if (targ >= (bfd_vma) -2)
|
||||
abort ();
|
||||
@@ -12168,16 +12193,21 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
plt = htab->pltlocal;
|
||||
}
|
||||
targ += plt->output_offset + plt->output_section->vma;
|
||||
+ off = (stub_entry->stub_offset
|
||||
+ + stub_entry->group->stub_sec->output_offset
|
||||
+ + stub_entry->group->stub_sec->output_section->vma
|
||||
+ + lr_used);
|
||||
odd = off & 4;
|
||||
off = targ - off;
|
||||
|
||||
if (htab->params->plt_stub_align != 0)
|
||||
{
|
||||
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
|
||||
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, odd);
|
||||
|
||||
stub_entry->group->stub_sec->size += pad;
|
||||
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
|
||||
off -= pad;
|
||||
+ odd ^= pad & 4;
|
||||
}
|
||||
|
||||
if (info->emitrelocations)
|
||||
@@ -12191,15 +12221,13 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
stub_entry->group->stub_sec->flags |= SEC_RELOC;
|
||||
}
|
||||
|
||||
- size = plt_stub_size (htab, stub_entry, off);
|
||||
+ size = plt_stub_size (htab, stub_entry, off, odd);
|
||||
|
||||
if (htab->params->power10_stubs == 0)
|
||||
{
|
||||
/* After the bcl, lr has been modified so we need to emit
|
||||
.eh_frame info saying the return address is in r12. */
|
||||
- lr_used = stub_entry->stub_offset + 8;
|
||||
- if (stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
- lr_used += 4;
|
||||
+ lr_used += stub_entry->stub_offset + 8;
|
||||
/* The eh_frame info will consist of a DW_CFA_advance_loc or
|
||||
variant, DW_CFA_register, 65, 12, DW_CFA_advance_loc+2,
|
||||
DW_CFA_restore_extended 65. */
|
||||
@@ -12207,6 +12235,29 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
|
||||
stub_entry->group->lr_restore = lr_used + 8;
|
||||
}
|
||||
+ if ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
+ && htab->params->tls_get_addr_opt)
|
||||
+ {
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
+ {
|
||||
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
|
||||
+ delta = cfa_updt - stub_entry->group->lr_restore;
|
||||
+ stub_entry->group->eh_size += eh_advance_size (delta);
|
||||
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
|
||||
+ stub_entry->group->lr_restore
|
||||
+ = stub_entry->stub_offset + size - 4;
|
||||
+ }
|
||||
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ {
|
||||
+ lr_used = stub_entry->stub_offset + size - 20;
|
||||
+ delta = lr_used - stub_entry->group->lr_restore;
|
||||
+ stub_entry->group->eh_size += eh_advance_size (delta) + 6;
|
||||
+ stub_entry->group->lr_restore
|
||||
+ = stub_entry->stub_offset + size - 4;
|
||||
+ }
|
||||
+ }
|
||||
break;
|
||||
|
||||
case ppc_stub_plt_call:
|
||||
@@ -12232,7 +12283,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
|
||||
if (htab->params->plt_stub_align != 0)
|
||||
{
|
||||
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
|
||||
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, 0);
|
||||
|
||||
stub_entry->group->stub_sec->size += pad;
|
||||
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
|
||||
@@ -12249,14 +12300,22 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
stub_entry->group->stub_sec->flags |= SEC_RELOC;
|
||||
}
|
||||
|
||||
- size = plt_stub_size (htab, stub_entry, off);
|
||||
+ size = plt_stub_size (htab, stub_entry, off, 0);
|
||||
|
||||
if (stub_entry->h != NULL
|
||||
&& is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
&& htab->params->tls_get_addr_opt
|
||||
&& stub_entry->stub_type == ppc_stub_plt_call_r2save)
|
||||
{
|
||||
- if (htab->params->no_tls_get_addr_regsave)
|
||||
+ if (!htab->params->no_tls_get_addr_regsave)
|
||||
+ {
|
||||
+ /* Adjustments to r1 need to be described. */
|
||||
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
|
||||
+ delta = cfa_updt - stub_entry->group->lr_restore;
|
||||
+ stub_entry->group->eh_size += eh_advance_size (delta);
|
||||
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
|
||||
+ }
|
||||
+ else
|
||||
{
|
||||
lr_used = stub_entry->stub_offset + size - 20;
|
||||
/* The eh_frame info will consist of a DW_CFA_advance_loc
|
||||
@@ -12265,15 +12324,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
delta = lr_used - stub_entry->group->lr_restore;
|
||||
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
|
||||
}
|
||||
- else
|
||||
- {
|
||||
- /* Adjustments to r1 need to be described. */
|
||||
- unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
|
||||
- delta = cfa_updt - stub_entry->group->lr_restore;
|
||||
- stub_entry->group->eh_size += eh_advance_size (delta);
|
||||
- stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
|
||||
- }
|
||||
- stub_entry->group->lr_restore = size - 4;
|
||||
+ stub_entry->group->lr_restore = stub_entry->stub_offset + size - 4;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -15885,22 +15936,25 @@ ppc64_elf_relocate_section (bfd *output_bfd,
|
||||
addend = 0;
|
||||
reloc_dest = DEST_STUB;
|
||||
|
||||
- if (((stub_entry->stub_type == ppc_stub_plt_call
|
||||
- && ALWAYS_EMIT_R2SAVE)
|
||||
- || stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
- || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
- && !(h != NULL
|
||||
- && is_tls_get_addr (&h->elf, htab)
|
||||
- && htab->params->tls_get_addr_opt)
|
||||
- && rel + 1 < relend
|
||||
- && rel[1].r_offset == rel->r_offset + 4
|
||||
- && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
|
||||
- relocation += 4;
|
||||
- else if ((stub_entry->stub_type == ppc_stub_long_branch_both
|
||||
- || stub_entry->stub_type == ppc_stub_plt_branch_both
|
||||
- || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
- && r_type == R_PPC64_REL24_NOTOC)
|
||||
- relocation += 4;
|
||||
+ if ((((stub_entry->stub_type == ppc_stub_plt_call
|
||||
+ && ALWAYS_EMIT_R2SAVE)
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && rel + 1 < relend
|
||||
+ && rel[1].r_offset == rel->r_offset + 4
|
||||
+ && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
|
||||
+ || ((stub_entry->stub_type == ppc_stub_long_branch_both
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_branch_both
|
||||
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && r_type == R_PPC64_REL24_NOTOC))
|
||||
+ {
|
||||
+ /* Skip over the r2 store at the start of the stub. */
|
||||
+ if (!(stub_entry->stub_type >= ppc_stub_plt_call
|
||||
+ && htab->params->tls_get_addr_opt
|
||||
+ && h != NULL
|
||||
+ && is_tls_get_addr (&h->elf, htab)))
|
||||
+ relocation += 4;
|
||||
+ }
|
||||
|
||||
if (r_type == R_PPC64_REL24_NOTOC
|
||||
&& (stub_entry->stub_type == ppc_stub_plt_call_notoc
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,296 +0,0 @@
|
||||
From c39dc246d44f9bc6e29bb4b2a0d692d27a0e913a Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Wed, 12 Aug 2020 23:31:28 +0930
|
||||
Subject: [PATCH] PowerPC64 --no-pcrel-optimize
|
||||
|
||||
This new option effectively ignores R_PPC64_PCREL_OPT, disabling the
|
||||
optimization of instructions marked by that relocation. The patch
|
||||
also disables GOT indirect to GOT/TOC pointer relative code editing
|
||||
when --no-toc-optimize.
|
||||
|
||||
bfd/
|
||||
* elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
|
||||
* elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
|
||||
optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT
|
||||
optimization when --no-pcrel-optimize.
|
||||
ld/
|
||||
* emultempl/ppc64elf.em (params): Init new field.
|
||||
(enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
|
||||
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
|
||||
(PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
|
||||
|
||||
(cherry picked from commit 6738c8a7c93cd77a0caa720c6cc21c422561be2c)
|
||||
---
|
||||
bfd/ChangeLog | 9 +++
|
||||
bfd/elf64-ppc.c | 116 +++++++++++++++++++--------------------
|
||||
bfd/elf64-ppc.h | 3 +
|
||||
ld/ChangeLog | 9 +++
|
||||
ld/emultempl/ppc64elf.em | 12 +++-
|
||||
5 files changed, 90 insertions(+), 59 deletions(-)
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 7608f9b0ba..825d5e6d4a 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,12 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ Apply from master
|
||||
+ 2020-08-13 Alan Modra <amodra@gmail.com>
|
||||
+ * elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
|
||||
+ * elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
|
||||
+ optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT
|
||||
+ optimization when --no-pcrel-optimize.
|
||||
+
|
||||
2020-09-19 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* development.sh (development): Set to true.
|
||||
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
|
||||
index 4bf37e1d98..faf4989659 100644
|
||||
--- a/bfd/elf64-ppc.c
|
||||
+++ b/bfd/elf64-ppc.c
|
||||
@@ -15944,7 +15944,8 @@ ppc64_elf_relocate_section (bfd *output_bfd,
|
||||
break;
|
||||
|
||||
case R_PPC64_GOT16_DS:
|
||||
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
|
||||
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
|
||||
+ || !htab->do_toc_opt)
|
||||
break;
|
||||
from = TOCstart + htab->sec_info[input_section->id].toc_off;
|
||||
if (relocation + addend - from + 0x8000 < 0x10000
|
||||
@@ -15963,7 +15964,8 @@ ppc64_elf_relocate_section (bfd *output_bfd,
|
||||
|
||||
case R_PPC64_GOT16_LO_DS:
|
||||
case R_PPC64_GOT16_HA:
|
||||
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
|
||||
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
|
||||
+ || !htab->do_toc_opt)
|
||||
break;
|
||||
from = TOCstart + htab->sec_info[input_section->id].toc_off;
|
||||
if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL
|
||||
@@ -15986,34 +15988,38 @@ ppc64_elf_relocate_section (bfd *output_bfd,
|
||||
break;
|
||||
|
||||
case R_PPC64_GOT_PCREL34:
|
||||
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
|
||||
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
|
||||
+ || !htab->do_toc_opt)
|
||||
break;
|
||||
from = (rel->r_offset
|
||||
+ input_section->output_section->vma
|
||||
+ input_section->output_offset);
|
||||
- if (relocation - from + (1ULL << 33) < 1ULL << 34
|
||||
- && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
|
||||
- {
|
||||
- offset = rel->r_offset;
|
||||
- pinsn = bfd_get_32 (input_bfd, contents + offset);
|
||||
- pinsn <<= 32;
|
||||
- pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
|
||||
- if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
|
||||
- == ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
|
||||
- {
|
||||
- /* Replace with paddi. */
|
||||
- pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
|
||||
- r_type = R_PPC64_PCREL34;
|
||||
- rel->r_info = ELF64_R_INFO (r_symndx, r_type);
|
||||
- bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
|
||||
- bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
|
||||
- goto pcrelopt;
|
||||
- }
|
||||
- }
|
||||
- break;
|
||||
+ if (!(relocation - from + (1ULL << 33) < 1ULL << 34
|
||||
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf)))
|
||||
+ break;
|
||||
+
|
||||
+ offset = rel->r_offset;
|
||||
+ pinsn = bfd_get_32 (input_bfd, contents + offset);
|
||||
+ pinsn <<= 32;
|
||||
+ pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
|
||||
+ if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
|
||||
+ != ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
|
||||
+ break;
|
||||
+
|
||||
+ /* Replace with paddi. */
|
||||
+ pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
|
||||
+ r_type = R_PPC64_PCREL34;
|
||||
+ rel->r_info = ELF64_R_INFO (r_symndx, r_type);
|
||||
+ bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
|
||||
+ bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
|
||||
+ /* Fall through. */
|
||||
|
||||
case R_PPC64_PCREL34:
|
||||
- if (SYMBOL_REFERENCES_LOCAL (info, &h->elf))
|
||||
+ if (!htab->params->no_pcrel_opt
|
||||
+ && rel + 1 < relend
|
||||
+ && rel[1].r_offset == rel->r_offset
|
||||
+ && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT)
|
||||
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
|
||||
{
|
||||
offset = rel->r_offset;
|
||||
pinsn = bfd_get_32 (input_bfd, contents + offset);
|
||||
@@ -16023,43 +16029,37 @@ ppc64_elf_relocate_section (bfd *output_bfd,
|
||||
== ((1ULL << 58) | (2ULL << 56) | (1ULL << 52)
|
||||
| (14ULL << 26) /* paddi */))
|
||||
{
|
||||
- pcrelopt:
|
||||
- if (rel + 1 < relend
|
||||
- && rel[1].r_offset == offset
|
||||
- && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT))
|
||||
+ bfd_vma off2 = rel[1].r_addend;
|
||||
+ if (off2 == 0)
|
||||
+ /* zero means next insn. */
|
||||
+ off2 = 8;
|
||||
+ off2 += offset;
|
||||
+ if (off2 + 4 <= input_section->size)
|
||||
{
|
||||
- bfd_vma off2 = rel[1].r_addend;
|
||||
- if (off2 == 0)
|
||||
- /* zero means next insn. */
|
||||
- off2 = 8;
|
||||
- off2 += offset;
|
||||
- if (off2 + 4 <= input_section->size)
|
||||
+ uint64_t pinsn2;
|
||||
+ bfd_signed_vma addend_off;
|
||||
+ pinsn2 = bfd_get_32 (input_bfd, contents + off2);
|
||||
+ pinsn2 <<= 32;
|
||||
+ if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
|
||||
{
|
||||
- uint64_t pinsn2;
|
||||
- bfd_signed_vma addend_off;
|
||||
- pinsn2 = bfd_get_32 (input_bfd, contents + off2);
|
||||
- pinsn2 <<= 32;
|
||||
+ if (off2 + 8 > input_section->size)
|
||||
+ break;
|
||||
+ pinsn2 |= bfd_get_32 (input_bfd,
|
||||
+ contents + off2 + 4);
|
||||
+ }
|
||||
+ if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
|
||||
+ {
|
||||
+ addend += addend_off;
|
||||
+ rel->r_addend = addend;
|
||||
+ bfd_put_32 (input_bfd, pinsn >> 32,
|
||||
+ contents + offset);
|
||||
+ bfd_put_32 (input_bfd, pinsn,
|
||||
+ contents + offset + 4);
|
||||
+ bfd_put_32 (input_bfd, pinsn2 >> 32,
|
||||
+ contents + off2);
|
||||
if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
|
||||
- {
|
||||
- if (off2 + 8 > input_section->size)
|
||||
- break;
|
||||
- pinsn2 |= bfd_get_32 (input_bfd,
|
||||
- contents + off2 + 4);
|
||||
- }
|
||||
- if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
|
||||
- {
|
||||
- addend += addend_off;
|
||||
- rel->r_addend = addend;
|
||||
- bfd_put_32 (input_bfd, pinsn >> 32,
|
||||
- contents + offset);
|
||||
- bfd_put_32 (input_bfd, pinsn,
|
||||
- contents + offset + 4);
|
||||
- bfd_put_32 (input_bfd, pinsn2 >> 32,
|
||||
- contents + off2);
|
||||
- if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
|
||||
- bfd_put_32 (input_bfd, pinsn2,
|
||||
- contents + off2 + 4);
|
||||
- }
|
||||
+ bfd_put_32 (input_bfd, pinsn2,
|
||||
+ contents + off2 + 4);
|
||||
}
|
||||
}
|
||||
}
|
||||
diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h
|
||||
index 547971f8be..a7230de81c 100644
|
||||
--- a/bfd/elf64-ppc.h
|
||||
+++ b/bfd/elf64-ppc.h
|
||||
@@ -57,6 +57,9 @@ struct ppc64_elf_params
|
||||
/* Whether to use power10 instructions in linkage stubs. */
|
||||
int power10_stubs;
|
||||
|
||||
+ /* Whether R_PPC64_PCREL_OPT should be ignored. */
|
||||
+ int no_pcrel_opt;
|
||||
+
|
||||
/* Whether to canonicalize .opd so that there are no overlapping
|
||||
.opd entries. */
|
||||
int non_overlapping_opd;
|
||||
diff --git a/ld/ChangeLog b/ld/ChangeLog
|
||||
index 4eec7d2977..0ee333a860 100644
|
||||
--- a/ld/ChangeLog
|
||||
+++ b/ld/ChangeLog
|
||||
@@ -1,3 +1,12 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ Apply from master
|
||||
+ 2020-08-13 Alan Modra <amodra@gmail.com>
|
||||
+ * emultempl/ppc64elf.em (params): Init new field.
|
||||
+ (enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
|
||||
+ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
|
||||
+ (PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
|
||||
+
|
||||
2020-09-19 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
This is the 2.35.1 point release.
|
||||
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
|
||||
index 1331d03113..42b9bd48fc 100644
|
||||
--- a/ld/emultempl/ppc64elf.em
|
||||
+++ b/ld/emultempl/ppc64elf.em
|
||||
@@ -38,7 +38,7 @@ static struct ppc64_elf_params params = { NULL,
|
||||
&ppc_layout_sections_again,
|
||||
1, -1, -1, 0,
|
||||
${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5,
|
||||
- -1, -1, 0, -1, -1, 0};
|
||||
+ -1, -1, 0, 0, -1, -1, 0};
|
||||
|
||||
/* Fake input file for stubs. */
|
||||
static lang_input_statement_type *stub_file;
|
||||
@@ -686,6 +686,7 @@ enum ppc64_opt
|
||||
OPTION_NO_PLT_LOCALENTRY,
|
||||
OPTION_POWER10_STUBS,
|
||||
OPTION_NO_POWER10_STUBS,
|
||||
+ OPTION_NO_PCREL_OPT,
|
||||
OPTION_STUBSYMS,
|
||||
OPTION_NO_STUBSYMS,
|
||||
OPTION_SAVRES,
|
||||
@@ -717,6 +718,7 @@ PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
|
||||
{ "plt-localentry", optional_argument, NULL, OPTION_PLT_LOCALENTRY },
|
||||
{ "no-plt-localentry", no_argument, NULL, OPTION_NO_PLT_LOCALENTRY },
|
||||
{ "power10-stubs", optional_argument, NULL, OPTION_POWER10_STUBS },
|
||||
+ { "no-pcrel-optimize", no_argument, NULL, OPTION_NO_PCREL_OPT },
|
||||
{ "no-power10-stubs", no_argument, NULL, OPTION_NO_POWER10_STUBS },
|
||||
{ "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS },
|
||||
{ "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS },
|
||||
@@ -776,6 +778,9 @@ PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
|
||||
--power10-stubs [=auto] Use Power10 PLT call stubs (default auto)\n"
|
||||
));
|
||||
fprintf (file, _("\
|
||||
+ --no-pcrel-optimize Don'\''t perform R_PPC64_PCREL_OPT optimization\n"
|
||||
+ ));
|
||||
+ fprintf (file, _("\
|
||||
--no-power10-stubs Don'\''t use Power10 PLT call stubs\n"
|
||||
));
|
||||
fprintf (file, _("\
|
||||
@@ -909,6 +914,10 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
|
||||
params.power10_stubs = 0;
|
||||
break;
|
||||
|
||||
+ case OPTION_NO_PCREL_OPT:
|
||||
+ params.no_pcrel_opt = 1;
|
||||
+ break;
|
||||
+
|
||||
case OPTION_STUBSYMS:
|
||||
params.emit_stub_syms = 1;
|
||||
break;
|
||||
@@ -985,6 +994,7 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
|
||||
params.no_multi_toc = 1;
|
||||
no_toc_sort = 1;
|
||||
params.plt_static_chain = 1;
|
||||
+ params.no_pcrel_opt = 1;
|
||||
return FALSE;
|
||||
'
|
||||
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,501 +0,0 @@
|
||||
From 904570fe6c56165183b07da6a3625538f56b0ccc Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Mon, 10 Aug 2020 15:07:33 +0930
|
||||
Subject: [PATCH] Prioritise mtfprd and mtvrd over mtvsrd in PowerPC
|
||||
disassembly
|
||||
|
||||
gas/
|
||||
* testsuite/gas/ppc/power8.d: Update.
|
||||
* testsuite/gas/ppc/vsx2.d: Update.
|
||||
opcodes/
|
||||
* ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
|
||||
mtvsrd, and similarly for mfvsrd.
|
||||
|
||||
(cherry picked from commit 5fbec329ec3b21fab7e06cd1e4bf7068332a876c)
|
||||
---
|
||||
gas/ChangeLog | 4 +
|
||||
gas/testsuite/gas/ppc/power8.d | 290 ++++++++++++++++-----------------
|
||||
gas/testsuite/gas/ppc/vsx2.d | 110 ++++++-------
|
||||
opcodes/ChangeLog | 7 +
|
||||
opcodes/ppc-opc.c | 4 +-
|
||||
5 files changed, 213 insertions(+), 202 deletions(-)
|
||||
|
||||
diff --git a/gas/ChangeLog b/gas/ChangeLog
|
||||
index 77b38a1cba..0062d877bd 100644
|
||||
--- a/gas/ChangeLog
|
||||
+++ b/gas/ChangeLog
|
||||
@@ -1,6 +1,10 @@
|
||||
2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
|
||||
Apply from master
|
||||
+ 2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
+ * testsuite/gas/ppc/power8.d: Update.
|
||||
+ * testsuite/gas/ppc/vsx2.d: Update.
|
||||
+
|
||||
2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
* config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx,
|
||||
stswi, or stswx in little-endian mode.
|
||||
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
|
||||
index dfd3345461..1439496462 100644
|
||||
--- a/gas/testsuite/gas/ppc/power8.d
|
||||
+++ b/gas/testsuite/gas/ppc/power8.d
|
||||
@@ -7,151 +7,151 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+00 <power8>:
|
||||
- 0: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
|
||||
- 4: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
|
||||
- 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
|
||||
- c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
|
||||
- 10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
|
||||
- 14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
|
||||
- 18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
|
||||
- 1c: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
- 20: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
- 24: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
- 28: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
- 2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
|
||||
- 30: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
|
||||
- 34: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
|
||||
- 38: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
|
||||
- 3c: (7c 20 05 dd|dd 05 20 7c) tresume\.
|
||||
- 40: (7c 20 05 dd|dd 05 20 7c) tresume\.
|
||||
- 44: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
- 48: (60 00 00 00|00 00 00 60) nop
|
||||
- 4c: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
- 50: (4c 00 01 24|24 01 00 4c) rfebb 0
|
||||
- 54: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
- 58: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
- 5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
|
||||
- 60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
|
||||
- 64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
|
||||
- 68: (4c e2 04 61|61 04 e2 4c) bnetarl\+
|
||||
- 6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
|
||||
- 70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
|
||||
- 74: (7c 00 00 3c|3c 00 00 7c) waitasec
|
||||
- 78: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
|
||||
- 7c: (7c 20 01 26|26 01 20 7c) mtsle 1
|
||||
- 80: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
|
||||
- 84: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
|
||||
- 88: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
|
||||
- 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
|
||||
- 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
|
||||
- 94: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
|
||||
- 98: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
|
||||
- 9c: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
|
||||
- a0: (7c 00 03 5c|5c 03 00 7c) clrbhrb
|
||||
- a4: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
|
||||
- a8: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
|
||||
- ac: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
|
||||
- b0: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
|
||||
- b4: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
|
||||
- b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
|
||||
- bc: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
|
||||
- c0: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
|
||||
- c4: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
|
||||
- c8: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
|
||||
- cc: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
|
||||
- d0: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
|
||||
- d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
|
||||
- d8: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
|
||||
- dc: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
|
||||
- e0: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
|
||||
- e4: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
|
||||
- e8: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
|
||||
- ec: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
|
||||
- f0: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
|
||||
- f4: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
|
||||
- f8: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
|
||||
- fc: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
|
||||
- 100: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
|
||||
- 104: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
|
||||
- 108: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
|
||||
- 10c: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
|
||||
- 110: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
|
||||
- 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
|
||||
- 118: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
|
||||
- 11c: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
|
||||
- 120: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
|
||||
- 124: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
|
||||
- 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
|
||||
- 12c: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
|
||||
- 130: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
|
||||
- 134: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
|
||||
- 138: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
|
||||
- 13c: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
|
||||
- 140: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
|
||||
- 144: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
|
||||
- 148: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
|
||||
- 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
|
||||
- 150: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
|
||||
- 154: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
|
||||
- 158: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
|
||||
- 15c: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
|
||||
- 160: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
|
||||
- 164: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
|
||||
- 168: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
|
||||
- 16c: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
|
||||
- 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
|
||||
- 174: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
|
||||
- 178: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
|
||||
- 17c: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
|
||||
- 180: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
|
||||
- 184: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
|
||||
- 188: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
|
||||
- 18c: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
|
||||
- 190: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
|
||||
- 194: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
|
||||
- 198: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
|
||||
- 19c: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
|
||||
- 1a0: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
|
||||
- 1a4: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
|
||||
- 1a8: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
|
||||
- 1ac: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
|
||||
- 1b0: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
|
||||
- 1b4: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
|
||||
- 1b8: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
|
||||
- 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11
|
||||
- 1c0: (7f f7 01 a7|a7 01 f7 7f) mtvrwa v31,r23
|
||||
- 1c4: (7e 1a 01 e6|e6 01 1a 7e) mtfprwz f16,r26
|
||||
- 1c8: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
|
||||
- 1cc: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
|
||||
- 1d0: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
|
||||
- 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
|
||||
- 1d8: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
|
||||
- 1dc: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
|
||||
- 1e0: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
|
||||
- 1e4: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
|
||||
- 1e8: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
|
||||
- 1ec: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
|
||||
- 1f0: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
|
||||
- 1f4: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
|
||||
- 1f8: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
|
||||
- 1fc: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
|
||||
- 200: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
|
||||
- 204: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
|
||||
- 208: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
|
||||
- 20c: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
|
||||
- 210: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
|
||||
- 214: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
|
||||
- 218: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
|
||||
- 21c: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
|
||||
- 220: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
|
||||
- 224: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
|
||||
- 228: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
|
||||
- 22c: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
|
||||
- 230: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
|
||||
- 234: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
|
||||
- 238: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
|
||||
- 23c: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
|
||||
- 240: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
|
||||
+.*: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
|
||||
+.*: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
|
||||
+.*: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
|
||||
+.*: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
|
||||
+.*: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
|
||||
+.*: (7c 00 05 1d|1d 05 00 7c) tbegin\.
|
||||
+.*: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
|
||||
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
+.*: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
|
||||
+.*: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
|
||||
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
|
||||
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
|
||||
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
|
||||
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
|
||||
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
+.*: (60 00 00 00|00 00 00 60) nop
|
||||
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
+.*: (4c 00 01 24|24 01 00 4c) rfebb 0
|
||||
+.*: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
+.*: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
+.*: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
|
||||
+.*: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
|
||||
+.*: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
|
||||
+.*: (4c e2 04 61|61 04 e2 4c) bnetarl\+
|
||||
+.*: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
|
||||
+.*: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
|
||||
+.*: (7c 00 00 3c|3c 00 00 7c) waitasec
|
||||
+.*: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
|
||||
+.*: (7c 20 01 26|26 01 20 7c) mtsle 1
|
||||
+.*: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
|
||||
+.*: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
|
||||
+.*: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
|
||||
+.*: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
|
||||
+.*: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
|
||||
+.*: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
|
||||
+.*: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
|
||||
+.*: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
|
||||
+.*: (7c 00 03 5c|5c 03 00 7c) clrbhrb
|
||||
+.*: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
|
||||
+.*: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
|
||||
+.*: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
|
||||
+.*: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
|
||||
+.*: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
|
||||
+.*: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
|
||||
+.*: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
|
||||
+.*: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
|
||||
+.*: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
|
||||
+.*: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
|
||||
+.*: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
|
||||
+.*: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
|
||||
+.*: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
|
||||
+.*: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
|
||||
+.*: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
|
||||
+.*: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
|
||||
+.*: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
|
||||
+.*: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
|
||||
+.*: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
|
||||
+.*: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
|
||||
+.*: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
|
||||
+.*: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
|
||||
+.*: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
|
||||
+.*: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
|
||||
+.*: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
|
||||
+.*: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
|
||||
+.*: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
|
||||
+.*: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
|
||||
+.*: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
|
||||
+.*: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
|
||||
+.*: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
|
||||
+.*: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
|
||||
+.*: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
|
||||
+.*: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
|
||||
+.*: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
|
||||
+.*: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
|
||||
+.*: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
|
||||
+.*: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
|
||||
+.*: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
|
||||
+.*: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
|
||||
+.*: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
|
||||
+.*: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
|
||||
+.*: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
|
||||
+.*: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
|
||||
+.*: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
|
||||
+.*: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
|
||||
+.*: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
|
||||
+.*: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
|
||||
+.*: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
|
||||
+.*: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
|
||||
+.*: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
|
||||
+.*: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
|
||||
+.*: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
|
||||
+.*: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
|
||||
+.*: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
|
||||
+.*: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
|
||||
+.*: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
|
||||
+.*: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
|
||||
+.*: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
|
||||
+.*: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
|
||||
+.*: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
|
||||
+.*: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
|
||||
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
|
||||
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
|
||||
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
|
||||
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
|
||||
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
|
||||
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
|
||||
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
|
||||
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
|
||||
+.*: (7e 0b 01 67|67 01 0b 7e) (mtvrd v16,r11|mtvsrd vs48,r11)
|
||||
+.*: (7f f7 01 a7|a7 01 f7 7f) (mtvrwa v31,r23|mtvsrwa vs63,r23)
|
||||
+.*: (7e 1a 01 e6|e6 01 1a 7e) (mtfprwz f16,r26|mtvsrwz vs16,r26)
|
||||
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
|
||||
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
|
||||
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
|
||||
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
|
||||
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
|
||||
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
|
||||
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
|
||||
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
|
||||
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
|
||||
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
|
||||
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
|
||||
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
|
||||
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
|
||||
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
|
||||
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
|
||||
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
|
||||
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
|
||||
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
|
||||
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
|
||||
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
|
||||
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
|
||||
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
|
||||
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
|
||||
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
|
||||
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
|
||||
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
|
||||
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
|
||||
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
|
||||
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
|
||||
+.*: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
|
||||
+.*: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
|
||||
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
|
||||
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
|
||||
.*: (7d 54 36 98|98 36 54 7d) lxvd2x vs10,r20,r6
|
||||
diff --git a/gas/testsuite/gas/ppc/vsx2.d b/gas/testsuite/gas/ppc/vsx2.d
|
||||
index e7ea585262..4f0b25bd47 100644
|
||||
--- a/gas/testsuite/gas/ppc/vsx2.d
|
||||
+++ b/gas/testsuite/gas/ppc/vsx2.d
|
||||
@@ -7,59 +7,59 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+00 <vsx2>:
|
||||
- 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
|
||||
- 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
|
||||
- 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
|
||||
- c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
|
||||
- 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
|
||||
- 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
|
||||
- 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
|
||||
- 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
|
||||
- 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
|
||||
- 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
|
||||
- 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
|
||||
- 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
|
||||
- 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
|
||||
- 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
|
||||
- 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
|
||||
- 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
|
||||
- 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
|
||||
- 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
|
||||
- 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
|
||||
- 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
|
||||
- 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
|
||||
- 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
|
||||
- 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
|
||||
- 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
|
||||
- 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
|
||||
- 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
|
||||
- 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
|
||||
- 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
|
||||
- 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
|
||||
- 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
|
||||
- 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
|
||||
- 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
|
||||
- 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
|
||||
- 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
|
||||
- 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
|
||||
- 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
|
||||
- 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
|
||||
- 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
|
||||
- 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
|
||||
- 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
|
||||
- a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
|
||||
- a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
|
||||
- a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
|
||||
- ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
|
||||
- b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
|
||||
- b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
|
||||
- b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
|
||||
- bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
|
||||
- c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
|
||||
- c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
|
||||
- c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
|
||||
- cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
|
||||
- d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
|
||||
- d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
|
||||
- d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
|
||||
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
|
||||
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
|
||||
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
|
||||
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
|
||||
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
|
||||
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
|
||||
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
|
||||
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
|
||||
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
|
||||
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
|
||||
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
|
||||
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
|
||||
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
|
||||
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
|
||||
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
|
||||
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
|
||||
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
|
||||
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
|
||||
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
|
||||
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
|
||||
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
|
||||
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
|
||||
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
|
||||
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
|
||||
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
|
||||
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
|
||||
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
|
||||
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
|
||||
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
|
||||
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
|
||||
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
|
||||
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
|
||||
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
|
||||
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
|
||||
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
|
||||
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
|
||||
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
|
||||
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
|
||||
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
|
||||
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
|
||||
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
|
||||
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
|
||||
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
|
||||
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
|
||||
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
|
||||
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
|
||||
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
|
||||
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
|
||||
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
|
||||
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
|
||||
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
|
||||
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
|
||||
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
|
||||
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
|
||||
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
|
||||
#pass
|
||||
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
|
||||
index b53a2bba98..30593769d4 100644
|
||||
--- a/opcodes/ChangeLog
|
||||
+++ b/opcodes/ChangeLog
|
||||
@@ -1,3 +1,10 @@
|
||||
+2020-09-24 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ Apply from master
|
||||
+ 2020-08-10 Alan Modra <amodra@gmail.com>
|
||||
+ * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
|
||||
+ mtvsrd, and similarly for mfvsrd.
|
||||
+
|
||||
2020-09-19 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
This is the 2.35.1 point release.
|
||||
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
|
||||
index 6932e4e820..a830c4c0fd 100644
|
||||
--- a/opcodes/ppc-opc.c
|
||||
+++ b/opcodes/ppc-opc.c
|
||||
@@ -6302,9 +6302,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
{"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
|
||||
{"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}},
|
||||
|
||||
-{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
|
||||
{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}},
|
||||
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
|
||||
+{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
|
||||
{"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
|
||||
|
||||
{"lbarx", X(31,52), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}},
|
||||
@@ -6489,9 +6489,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
||||
|
||||
{"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}},
|
||||
|
||||
-{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
|
||||
{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
|
||||
{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
|
||||
+{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
|
||||
{"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
|
||||
|
||||
{"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,66 +0,0 @@
|
||||
From 39f2c1f7b80a30297e93f04c885b444e5a874372 Mon Sep 17 00:00:00 2001
|
||||
From: Alan Modra <amodra@gmail.com>
|
||||
Date: Mon, 28 Sep 2020 09:30:19 +0930
|
||||
Subject: [PATCH] Re: PR26656, power10 libstdc++.so segfault in
|
||||
__cxxabiv1::__cxa_throw
|
||||
|
||||
Some missing NULL checks meant a stub for a local symbol used a stub
|
||||
looking like the __tls_get_addr_opt stub.
|
||||
|
||||
PR 26656
|
||||
* elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
|
||||
NULL stub_entry->h before calling is_tls_get_addr.
|
||||
|
||||
(cherry picked from commit 12cf8b93da0ae155643d262235486fde5af72a80)
|
||||
---
|
||||
bfd/ChangeLog | 6 ++++++
|
||||
bfd/elf64-ppc.c | 5 ++++-
|
||||
2 files changed, 10 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
|
||||
index 01ccac443e..dd6d8fdd03 100644
|
||||
--- a/bfd/ChangeLog
|
||||
+++ b/bfd/ChangeLog
|
||||
@@ -1,3 +1,9 @@
|
||||
+2020-09-28 Alan Modra <amodra@gmail.com>
|
||||
+
|
||||
+ PR 26656
|
||||
+ * elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
|
||||
+ NULL stub_entry->h before calling is_tls_get_addr.
|
||||
+
|
||||
2020-09-26 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
|
||||
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
|
||||
index f4d0c88c7a..0aeda47e57 100644
|
||||
--- a/bfd/elf64-ppc.c
|
||||
+++ b/bfd/elf64-ppc.c
|
||||
@@ -11674,6 +11674,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
obfd = htab->params->stub_bfd;
|
||||
is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|
||||
|| stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && stub_entry->h != NULL
|
||||
&& is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
&& htab->params->tls_get_addr_opt);
|
||||
if (is_tga)
|
||||
@@ -12184,7 +12185,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
case ppc_stub_plt_call_notoc:
|
||||
case ppc_stub_plt_call_both:
|
||||
lr_used = 0;
|
||||
- if (is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
+ if (stub_entry->h != NULL
|
||||
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
&& htab->params->tls_get_addr_opt)
|
||||
{
|
||||
lr_used += 7 * 4;
|
||||
@@ -12254,6 +12256,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
|
||||
}
|
||||
if ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|
||||
|| stub_entry->stub_type == ppc_stub_plt_call_both)
|
||||
+ && stub_entry->h != NULL
|
||||
&& is_tls_get_addr (&stub_entry->h->elf, htab)
|
||||
&& htab->params->tls_get_addr_opt)
|
||||
{
|
||||
--
|
||||
2.21.3
|
||||
|
@ -1,38 +0,0 @@
|
||||
diff -up binutils-2.25.orig/bfd/configure.ac binutils-2.25/bfd/configure.ac
|
||||
--- binutils-2.25.orig/bfd/configure.ac 2014-12-24 10:34:45.590491143 +0000
|
||||
+++ binutils-2.25/bfd/configure.ac 2014-12-24 10:36:12.997981992 +0000
|
||||
@@ -183,11 +183,13 @@ if test "x${ac_cv_sizeof_long}" = "x8";
|
||||
BFD_HOST_64BIT_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
|
||||
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
+fi
|
||||
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
BFD_HOST_64BIT_LONG_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
|
||||
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
|
||||
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
|
||||
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
|
||||
BFD_HOSTPTR_T="unsigned long long"
|
||||
fi
|
||||
fi
|
||||
diff -up ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
|
||||
--- a/bfd/configure 2010-04-08 15:23:58.000000000 +0100
|
||||
+++ b/bfd/configure 2010-04-08 15:24:06.000000000 +0100
|
||||
@@ -12819,11 +12819,13 @@
|
||||
BFD_HOST_64BIT_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
|
||||
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
+fi
|
||||
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
BFD_HOST_64BIT_LONG_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
|
||||
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
|
||||
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
|
||||
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
|
||||
BFD_HOSTPTR_T="unsigned long long"
|
||||
fi
|
||||
fi
|
@ -2,7 +2,7 @@
|
||||
Summary: A GNU collection of binary utilities
|
||||
Name: %{?cross}binutils%{?_with_debug:-debug}
|
||||
Version: 2.35.1
|
||||
Release: 1%{?dist}
|
||||
Release: 5%{?dist}
|
||||
License: GPLv3+
|
||||
URL: https://sourceware.org/binutils
|
||||
|
||||
@ -77,6 +77,7 @@ URL: https://sourceware.org/binutils
|
||||
# Default: support debuginfod.
|
||||
%bcond_without debuginfod
|
||||
|
||||
|
||||
%if %{with bootstrap}
|
||||
%undefine with_docs
|
||||
%undefine with_testsuite
|
||||
@ -96,28 +97,21 @@ URL: https://sourceware.org/binutils
|
||||
%define enable_shared 0
|
||||
%endif
|
||||
|
||||
# The opcodes library needs a few functions defined in the bfd
|
||||
# library, but these symbols are not defined in the stub bfd .so
|
||||
# that is available at link time. (They are present in the real
|
||||
# .so that is used at run time).
|
||||
%undefine _strict_symbol_defs_build
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
# Note - the Linux Kernel binutils releases are too unstable and contain
|
||||
# too many controversial patches so we stick with the official FSF version
|
||||
# instead.
|
||||
|
||||
Source: https://ftp.gnu.org/gnu/binutils/binutils-%{version}.tar.xz
|
||||
Source: https://ftp.gnu.org/gnu/binutils/binutils-%%{version}.tar.xz
|
||||
Source2: binutils-2.19.50.0.1-output-format.sed
|
||||
|
||||
%if %{with docs}
|
||||
# Strictly speaking this next file is not part of the binutils distribution.
|
||||
# But the emacs info system expects it to be present on any system where
|
||||
# emacs is installed, and old binutils distributions used to include it by
|
||||
# mistake. Since there is no suitable documentation files component to
|
||||
# current RHEL releases, it is included here instead. In order to save time
|
||||
# and complexity it is stored as a pre-built, compressed, info file.
|
||||
# The upstream version of the original source file can be found here:
|
||||
# http://git.savannah.gnu.org/gitweb/?p=gnulib.git;a=blob_plain;f=doc/standards.texi;hb=HEAD
|
||||
# For more information see: https://bugzilla.redhat.com/show_bug.cgi?id=1467390
|
||||
Source3: standards.info.gz
|
||||
%endif
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
# Purpose: Use /lib64 and /usr/lib64 instead of /lib and /usr/lib in the
|
||||
@ -159,22 +153,13 @@ Patch04: binutils-2.22.52.0.4-no-config-h-check.patch
|
||||
# patch.
|
||||
Patch05: binutils-2.29-filename-in-error-messages.patch
|
||||
|
||||
# Purpose: Use the "unsigned long long" type for pointers on hosts where
|
||||
# long is a 32-bit type but pointers are a 64-bit type. Necessary
|
||||
# because the rpmdiff tester insists that if both the i686 and
|
||||
# x86_64 versions of binutils-devel are installed on the same
|
||||
# machine, then they will have identical versions of the bfd.h
|
||||
# header file.
|
||||
# Lifetime: Permanent.
|
||||
Patch06: binutils-2.25-set-long-long.patch
|
||||
|
||||
# Purpose: Disable an x86/x86_64 optimization that moves functions from the
|
||||
# PLT into the GOTPLT for faster access. This optimization is
|
||||
# problematic for tools that want to intercept PLT entries, such
|
||||
# as ltrace and LD_AUDIT. See BZs 1452111 and 1333481.
|
||||
# Lifetime: Permanent. But it should not be.
|
||||
# FIXME: Replace with a configure time option.
|
||||
Patch07: binutils-2.29-revert-PLT-elision.patch
|
||||
Patch06: binutils-2.29-revert-PLT-elision.patch
|
||||
|
||||
# Purpose: Changes readelf so that when it displays extra information about
|
||||
# a symbol, this information is placed at the end of the line.
|
||||
@ -182,22 +167,22 @@ Patch07: binutils-2.29-revert-PLT-elision.patch
|
||||
# FIXME: The proper fix would be to update the scripts that are expecting
|
||||
# a fixed output from readelf. But it seems that some of them are
|
||||
# no longer being maintained.
|
||||
Patch08: binutils-readelf-other-sym-info.patch
|
||||
Patch07: binutils-readelf-other-sym-info.patch
|
||||
|
||||
# Purpose: Do not create PLT entries for AARCH64 IFUNC symbols referenced in
|
||||
# debug sections.
|
||||
# Lifetime: Permanent.
|
||||
# FIXME: Find related bug. Decide on permanency.
|
||||
Patch09: binutils-2.27-aarch64-ifunc.patch
|
||||
Patch08: binutils-2.27-aarch64-ifunc.patch
|
||||
|
||||
# Purpose: Stop the binutils from statically linking with libstdc++.
|
||||
# Lifetime: Permanent.
|
||||
Patch10: binutils-do-not-link-with-static-libstdc++.patch
|
||||
Patch09: binutils-do-not-link-with-static-libstdc++.patch
|
||||
|
||||
# Purpose: Add a .attach_to_group pseudo-op to the assembler for
|
||||
# use by the annobin gcc plugin.
|
||||
# Lifetime: Permanent.
|
||||
Patch11: binutils-attach-to-group.patch
|
||||
Patch10: binutils-attach-to-group.patch
|
||||
|
||||
# Purpose: Allow OS specific sections in section groups.
|
||||
# Lifetime: Fixed in 2.36 (maybe)
|
||||
@ -221,49 +206,49 @@ Patch15: binutils-CVE-2019-1010204.patch
|
||||
# unsupported targets. This allows the binutils to be built with
|
||||
# BPF support enabled.
|
||||
# Lifetime: Permanent.
|
||||
Patch16: binutils-gold-warn-unsupported.patch
|
||||
Patch17: binutils-gold-warn-unsupported.patch
|
||||
|
||||
# Purpose: Fix compile time warning messages building s390 target with gcc-10.
|
||||
# Lifetime: Should be fixed in 2.36.
|
||||
Patch17: binutils-s390-build.patch
|
||||
Patch19: binutils-s390-build.patch
|
||||
|
||||
# Purpose: Fix LTO problems running config mini-builds.
|
||||
# Lifetime: Should be fixed in 2.36.
|
||||
Patch18: binutils-config.patch
|
||||
Patch20: binutils-config.patch
|
||||
|
||||
# Purpose: Fix compile time warning messages building with gcc-10.
|
||||
# Lifetime: Should be fixed in 2.36.
|
||||
Patch19: binutils-warnings.patch
|
||||
Patch21: binutils-warnings.patch
|
||||
|
||||
# Purpose: Fix compile time warning messages building with gcc-10. (part 2).
|
||||
# Lifetime: Should be fixed in 2.36.
|
||||
Patch20: binutils-gcc-10-fixes.patch
|
||||
Patch22: binutils-gcc-10-fixes.patch
|
||||
|
||||
# Purpose: Fixes for linking LTO objects.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch21: binutils-add-sym-cache-to-elf-link-hash.patch
|
||||
Patch22: binutils-elf-add-objects.patch
|
||||
Patch23: binutils-add-sym-cache-to-elf-link-hash.patch
|
||||
Patch24: binutils-elf-add-objects.patch
|
||||
|
||||
# Purpose: Fix handling of relocations for AArch64 conditional branches.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch23: binutils-aarch64-condbranch-relocs.patch
|
||||
Patch25: binutils-aarch64-condbranch-relocs.patch
|
||||
|
||||
# Purpose: Fix the PowerPC disassembler so that it ignores annobin symbols.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch24: binutils-ppc-annobin-disassembly.patch
|
||||
Patch26: binutils-ppc-annobin-disassembly.patch
|
||||
|
||||
# Purpose: Fix the strip program to cope when merging multiple same-named
|
||||
# sections.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch25: binutils-strip-merge.patch
|
||||
Patch27: binutils-strip-merge.patch
|
||||
|
||||
# Purpose: Fix various problems with the PowerPC arch10 extensions.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch26: binutils-Power10-fixes.patch
|
||||
Patch28: binutils-Power10-fixes.patch
|
||||
|
||||
# Purpose: Allow plugin syms to mark as-needed shared libs needed.
|
||||
# Lifetime: Fixed in 2.36
|
||||
Patch27: binutils-plugin-as-needed.patch
|
||||
Patch29: binutils-plugin-as-needed.patch
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
|
||||
|
70
binutilscompare
Executable file
70
binutilscompare
Executable file
@ -0,0 +1,70 @@
|
||||
#! /usr/bin/perl
|
||||
# Compare build logs for the testsuite results regressions.
|
||||
# $Id$
|
||||
|
||||
use strict;
|
||||
use warnings;
|
||||
use Data::Dumper;
|
||||
|
||||
my $reverse=shift @ARGV if ($ARGV[0]||"") eq "-r";
|
||||
|
||||
sub readfile($)
|
||||
{
|
||||
my($filename)=@_;
|
||||
|
||||
local *F;
|
||||
open F,$filename or die "open \"$filename\": $!";
|
||||
my $F=do { local $/; <F>; };
|
||||
close F or die "close \"$filename\": $!";
|
||||
return $F;
|
||||
}
|
||||
|
||||
sub writefile($$)
|
||||
{
|
||||
my($filename,$content)=@_;
|
||||
|
||||
local *F;
|
||||
open F,">$filename" or die "create \"$filename\": $!";
|
||||
print F $content or die "write \"$filename\": $!";
|
||||
close F or die "close \"$filename\": $!";
|
||||
}
|
||||
|
||||
local *DIR;
|
||||
opendir DIR,"tests" or die "opendir: $!";
|
||||
my %arch;
|
||||
for my $name (sort readdir(DIR)) {
|
||||
next if $name!~/-([^-]*)[.]log$/o;
|
||||
my $arch=$1;
|
||||
(my $sum=$name)=~s/log$/sum/ or die;
|
||||
my $i=readfile "tests/$name";
|
||||
my $o="";
|
||||
while ($i=~/\n(Native configuration is.*?Summary ===\n.*?\n)make\Q[\E/gs) {
|
||||
$o.=$1;
|
||||
}
|
||||
# Version string differs.
|
||||
$o=~s{/builddir/build/BUILD/binutils-[^/]*/+}{}g;
|
||||
$o=~s{^(Version .*) 20\d{6}$}{$1}mg;
|
||||
$o=~s{^(\Q../as-new\E) 20\d{6}$}{$1}mg;
|
||||
$o=~s{^(build-[^/]*/ld/ld-new) 20\d{6}$}{$1}mg;
|
||||
writefile "tests/$sum",$o;
|
||||
push @{$arch{$arch}},$sum;
|
||||
}
|
||||
closedir DIR or die "closedir: $!";
|
||||
|
||||
for (values(%arch)) {
|
||||
next if 2==@$_;
|
||||
warn "Single element: ".${$_}[0]."\n" if 1==@$_;
|
||||
die "Not 2 elements:\n".Dumper($_) if 1!=@$_;
|
||||
}
|
||||
|
||||
system("rm -f tests/gdbcompare-*.diff") and die;
|
||||
|
||||
for my $arch (sort keys(%arch)) {
|
||||
next if 2!=@{$arch{$arch}};
|
||||
# sub trans { return {"."=>0,"-"=>1}->{($_[0]=~/([-.])[^-.]+[.]\w+$/)[0]}.$_[0]; };
|
||||
sub trans { return $_[0]; };
|
||||
my @sorted=sort { my $a1=trans $a; my $b1=trans $b; ($b1 cmp $a1) * ($reverse ? -1 : +1); } @{$arch{$arch}};
|
||||
do { system $_ and die $_; } for "diff -u tests/'".$sorted[1]."' tests/'".$sorted[0]."' >tests/gdbcompare-'$arch'.sum.diff;true";
|
||||
}
|
||||
|
||||
system("vim tests/gdbcompare-*.sum.diff");
|
1
sources
1
sources
@ -1,3 +1,2 @@
|
||||
SHA512 (binutils-2.35.1.tar.xz) = 94ff72708403413b70b247f3af4099ebaa882b6659249869f1ed9941a0f1912e313f08357d470f9fd2359e7f5e5b0eb86285e5eaf883fa8187789d6b1bd304eb
|
||||
SHA512 (binutils-2.19.50.0.1-output-format.sed) = 2f8686b0c8af13c98cda056824c2820416f6e2d003f70b78ccf5314525b9ee3684d421dfa83e638a2d42d06ea4d4bdaf5226b64d6ec26f7ff59c44ffb2a23dd2
|
||||
SHA512 (standards.info.gz) = 52452ec58c9b0045abeb1f7fb29d56a62cd4042edbb5e1685dad5f6932731ace2bf05ec238b2e8d3d851114a2718b511dfc721c996bee8721a873314de7c7358
|
||||
|
Loading…
Reference in New Issue
Block a user