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Nick Clifton 2020-10-14 10:26:27 +01:00
parent a62b98bc8d
commit 635b2d3e99
45 changed files with 23367 additions and 0 deletions
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.gitignore vendored
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@ -0,0 +1,3 @@
/binutils-2.35.1.tar.xz
/binutils-2.19.50.0.1-output-format.sed
/standards.info.gz

216
0001-Allow-plugin-syms-to-mark-as-needed-shared-libs-need.patch Normal file
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@ -0,0 +1,216 @@
From 1e3b96fd6cf0c7d018083994ad951ccf92aba582 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Fri, 4 Sep 2020 13:54:21 +0930
Subject: [PATCH] Allow plugin syms to mark as-needed shared libs needed
We must tell LTO about symbols in all shared libraries loaded. That
means we can't load extra shared libraries after LTO recompilation, at
least, not those that affect the set of symbols that LTO cares about,
the IR symbols.
This change will likely result in complaints about --as-needed
libraries being loaded unnecessarily, but being correct is more
important than being optimal. One of the PR15146 tests regresses, and
while that could be hidden by disabling the missing dso message by
making it conditional on h->root.non_ir_ref_regular, that would just
be sweeping a problem under the rug.
bfd/
PR 15146
PR 26314
PR 26530
* elflink.c (elf_link_add_object_symbols): Do set def_regular
and ref_regular for IR symbols. Don't clear dynsym, allowing
IR symbols to load --as-needed shared libraries, but prevent
IR symbols from becoming dynamic.
ld/
* testsuite/ld-plugin/lto.exp: Don't run pr15146 tests.
* testsuite/ld-plugin/pr15146.d: Delete.
* testsuite/ld-plugin/pr15146a.c: Delete.
* testsuite/ld-plugin/pr15146b.c: Delete.
* testsuite/ld-plugin/pr15146c.c: Delete.
* testsuite/ld-plugin/pr15146d.c: Delete.
---
bfd/ChangeLog | 10 ++++++++++
bfd/elflink.c | 12 ++----------
ld/ChangeLog | 9 +++++++++
ld/testsuite/ld-plugin/lto.exp | 22 ----------------------
ld/testsuite/ld-plugin/pr15146.d | 4 ----
ld/testsuite/ld-plugin/pr15146a.c | 13 -------------
ld/testsuite/ld-plugin/pr15146b.c | 1 -
ld/testsuite/ld-plugin/pr15146c.c | 0
ld/testsuite/ld-plugin/pr15146d.c | 7 -------
9 files changed, 21 insertions(+), 57 deletions(-)
delete mode 100644 ld/testsuite/ld-plugin/pr15146.d
delete mode 100644 ld/testsuite/ld-plugin/pr15146a.c
delete mode 100644 ld/testsuite/ld-plugin/pr15146b.c
delete mode 100644 ld/testsuite/ld-plugin/pr15146c.c
delete mode 100644 ld/testsuite/ld-plugin/pr15146d.c
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 1b58f9517c..a431f8f14d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,13 @@
+2020-09-04 Alan Modra <amodra@gmail.com>
+
+ PR 15146
+ PR 26314
+ PR 26530
+ * elflink.c (elf_link_add_object_symbols): Do set def_regular
+ and ref_regular for IR symbols. Don't clear dynsym, allowing
+ IR symbols to load --as-needed shared libraries, but prevent
+ IR symbols from becoming dynamic.
+
2020-09-03 Nick Clifton <nickc@redhat.com>
PR 26521
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 5c085b14b7..1384c1a46b 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -4977,11 +4977,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
object and a shared object. */
bfd_boolean dynsym = FALSE;
- /* Plugin symbols aren't normal. Don't set def_regular or
- ref_regular for them, or make them dynamic. */
- if ((abfd->flags & BFD_PLUGIN) != 0)
- ;
- else if (! dynamic)
+ if (! dynamic)
{
if (! definition)
{
@@ -5162,10 +5158,6 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
&& !bfd_link_relocatable (info))
dynsym = FALSE;
- /* Nor should we make plugin symbols dynamic. */
- if ((abfd->flags & BFD_PLUGIN) != 0)
- dynsym = FALSE;
-
if (definition)
{
h->target_internal = isym->st_target_internal;
@@ -5192,7 +5184,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
}
}
- if (dynsym && h->dynindx == -1)
+ if (dynsym && (abfd->flags & BFD_PLUGIN) == 0 && h->dynindx == -1)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
goto error_free_vers;
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 0fcbf0d6c2..0a11b79c67 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,12 @@
+2020-09-04 Alan Modra <amodra@gmail.com>
+
+ * testsuite/ld-plugin/lto.exp: Don't run pr15146 tests.
+ * testsuite/ld-plugin/pr15146.d: Delete.
+ * testsuite/ld-plugin/pr15146a.c: Delete.
+ * testsuite/ld-plugin/pr15146b.c: Delete.
+ * testsuite/ld-plugin/pr15146c.c: Delete.
+ * testsuite/ld-plugin/pr15146d.c: Delete.
+
2020-09-03 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/config/default.exp: Change NOSANTIZE_CFLAGS to
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
index adad1e4895..684d1db314 100644
--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
@@ -320,21 +320,6 @@ set lto_link_elf_tests [list \
[list "PR ld/13244" \
"-shared -O2 -fPIC -flto -fuse-linker-plugin -nostdlib" "-O2 -fno-early-inlining -flto" \
{pr13244.c} {{"readelf" {-s --wide} "pr13244.d"}} "pr13244.so" "c"] \
- [list "Build libpr15146a.a" \
- "$plug_opt" "-flto -O2" \
- {pr15146a.c} {} "lib15146a.a"] \
- [list "Build pr15146b.so" \
- "-shared" "-O2 -fpic" \
- {pr15146b.c} {} "pr15146b.so" "c"] \
- [list "Build pr15146c.so" \
- "-shared -Wl,--no-as-needed tmpdir/pr15146b.so" "-O2 -fpic $no_lto" \
- {pr15146c.c} {} "pr15146c.so" "c"] \
- [list "PR ld/15146 (1)" \
- "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146a.o tmpdir/pr15146c.so" "" \
- {dummy.c} {{"readelf" {-d} "pr15146.d"}} "pr15146a.exe"] \
- [list "Build libpr15146d.a" \
- "$plug_opt" "-flto -O2" \
- {pr15146d.c} {} "lib15146d.a"] \
[list "Build libpr16746a.a" \
"" "" \
{pr16746a.c pr16746b.c} {} "lib15146a.a"] \
@@ -605,13 +590,6 @@ run_cc_link_tests $lto_compile_elf_tests
# Restrict these to ELF targets that support shared libs and PIC.
if { [is_elf_format] && [check_lto_shared_available] } {
run_cc_link_tests $lto_link_elf_tests
- set testname "PR ld/15146 (2)"
- set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146d.o tmpdir/pr15146c.so"]
- if { [ regexp "undefined reference to symbol '\\.?xxx'" $exec_output ] } {
- pass $testname
- } {
- fail $testname
- }
set testname "PR ld/16746 (3)"
set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin tmpdir/pr16746b.o tmpdir/pr16746d.o"]
if { [ regexp "warning: \\.?foobar" $exec_output ] && ![ regexp "symbol from plugin" $exec_output ] } {
diff --git a/ld/testsuite/ld-plugin/pr15146.d b/ld/testsuite/ld-plugin/pr15146.d
deleted file mode 100644
index 48d4b85446..0000000000
--- a/ld/testsuite/ld-plugin/pr15146.d
+++ /dev/null
@@ -1,4 +0,0 @@
-#failif
-#...
- +0x[0-9a-f]+ +\(NEEDED\) +Shared library: +\[.*pr15146b.so\]
-#...
diff --git a/ld/testsuite/ld-plugin/pr15146a.c b/ld/testsuite/ld-plugin/pr15146a.c
deleted file mode 100644
index a22860af5b..0000000000
--- a/ld/testsuite/ld-plugin/pr15146a.c
+++ /dev/null
@@ -1,13 +0,0 @@
-extern int xxx;
-
-int
-bar (void)
-{
- return xxx;
-}
-
-int
-main ()
-{
- return 0;
-}
diff --git a/ld/testsuite/ld-plugin/pr15146b.c b/ld/testsuite/ld-plugin/pr15146b.c
deleted file mode 100644
index 90eb21ea55..0000000000
--- a/ld/testsuite/ld-plugin/pr15146b.c
+++ /dev/null
@@ -1 +0,0 @@
-int xxx = 3;
diff --git a/ld/testsuite/ld-plugin/pr15146c.c b/ld/testsuite/ld-plugin/pr15146c.c
deleted file mode 100644
index e69de29bb2..0000000000
diff --git a/ld/testsuite/ld-plugin/pr15146d.c b/ld/testsuite/ld-plugin/pr15146d.c
deleted file mode 100644
index ba1e0abfa6..0000000000
--- a/ld/testsuite/ld-plugin/pr15146d.c
+++ /dev/null
@@ -1,7 +0,0 @@
-extern int xxx;
-
-int
-main ()
-{
- return xxx;
-}
--
2.21.3

131
0001-Correct-vcmpsq-vcmpuq-and-xvtlsbb-BF-field.patch Normal file
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@ -0,0 +1,131 @@
From 172234e1fab477ba36ec292913b1f13ef6b94783 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 19 Aug 2020 08:47:35 +0930
Subject: [PATCH] Correct vcmpsq, vcmpuq and xvtlsbb BF field
These shouldn't be optional. The record form of vector instructions
set CR6, giving an expectation that omitting BF should be the same as
specifying CR6.
opcodes/
* ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
vcmpuq and xvtlsbb.
gas/
* testsuite/gas/ppc/int128.s: Correct vcmpuq.
* testsuite/gas/ppc/int128.d: Update.
* testsuite/gas/ppc/xvtlsbb.d: Update.
(cherry picked from commit 18a8a00ebe3159b65798c6132cb5f93ff4ef6c17)
---
gas/ChangeLog | 5 +++++
gas/testsuite/gas/ppc/int128.d | 2 +-
gas/testsuite/gas/ppc/int128.s | 2 +-
gas/testsuite/gas/ppc/xvtlsbb.d | 2 +-
opcodes/ChangeLog | 4 ++++
opcodes/ppc-opc.c | 6 +++---
6 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3d5376df89..fa9e9d1ff2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,6 +1,11 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-19 Alan Modra <amodra@gmail.com>
+ * testsuite/gas/ppc/int128.s: Correct vcmpuq.
+ * testsuite/gas/ppc/int128.d: Update.
+ * testsuite/gas/ppc/xvtlsbb.d: Update.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* testsuite/gas/ppc/power8.d,
* testsuite/gas/ppc/power8.s: Add miso.
diff --git a/gas/testsuite/gas/ppc/int128.d b/gas/testsuite/gas/ppc/int128.d
index c9f14d3360..d7410345ad 100644
--- a/gas/testsuite/gas/ppc/int128.d
+++ b/gas/testsuite/gas/ppc/int128.d
@@ -20,7 +20,7 @@ Disassembly of section \.text:
.*: (13 9d f7 0b|0b f7 9d 13) vmodsq v28,v29,v30
.*: (13 e0 0e 0b|0b 0e e0 13) vmoduq v31,v0,v1
.*: (10 5b 1e 02|02 1e 5b 10) vextsd2q v2,v3
-.*: (10 04 29 01|01 29 04 10) vcmpuq v4,v5
+.*: (10 04 29 01|01 29 04 10) vcmpuq cr0,v4,v5
.*: (10 86 39 41|41 39 86 10) vcmpsq cr1,v6,v7
.*: (11 09 51 c7|c7 51 09 11) vcmpequq v8,v9,v10
.*: (11 6c 6d c7|c7 6d 6c 11) vcmpequq. v11,v12,v13
diff --git a/gas/testsuite/gas/ppc/int128.s b/gas/testsuite/gas/ppc/int128.s
index 4dce648c36..4561cfe9ee 100644
--- a/gas/testsuite/gas/ppc/int128.s
+++ b/gas/testsuite/gas/ppc/int128.s
@@ -12,7 +12,7 @@ _start:
vmodsq 28,29,30
vmoduq 31,0,1
vextsd2q 2,3
- vcmpuq 4,5
+ vcmpuq 0,4,5
vcmpsq 1,6,7
vcmpequq 8,9,10
vcmpequq. 11,12,13
diff --git a/gas/testsuite/gas/ppc/xvtlsbb.d b/gas/testsuite/gas/ppc/xvtlsbb.d
index 1627d7afc6..8aa83dd62c 100644
--- a/gas/testsuite/gas/ppc/xvtlsbb.d
+++ b/gas/testsuite/gas/ppc/xvtlsbb.d
@@ -7,7 +7,7 @@
Disassembly of section \.text:
0+0 <_start>:
-.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb vs63
+.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb cr0,vs63
.*: (f0 82 07 6c|6c 07 82 f0) xvtlsbb cr1,vs0
.*: (f1 02 f7 6e|6e f7 02 f1) xvtlsbb cr2,vs62
.*: (f1 82 0f 6c|6c 0f 82 f1) xvtlsbb cr3,vs1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 06d136d480..6e1fb264f9 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,10 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-19 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
+ vcmpuq and xvtlsbb.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
instructions.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 4471b0f2bc..d15bde1326 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4441,7 +4441,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
-{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
+{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslq", VX (4, 261), VX_MASK, POWER10, 0, {VD, VA, VB}},
@@ -4459,7 +4459,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
{"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
-{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {OBF, VA, VB}},
+{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {BF, VA, VB}},
{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vrlqnm", VX (4, 325), VX_MASK, POWER10, 0, {VD, VA, VB}},
@@ -8455,7 +8455,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xxgenpcvdm", X(60,949), XX1_MASK, POWER10, PPCVLE, {XT6, VB, UIMM}},
{"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
-{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {OBF, XB6}},
+{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {BF, XB6}},
{"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
--
2.21.3

2334
0001-Error-on-lmw-lswi-and-related-PowerPC-insns-when-LE.patch Normal file
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File diff suppressed because it is too large Load Diff

247
0001-GOLD-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-.patch Normal file
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@ -0,0 +1,247 @@
From 9ac6946e2514e5ec1bb51d1afe9f127807e21067 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Sat, 26 Sep 2020 20:34:55 +0930
Subject: [PATCH] [GOLD] PPC64_OPT_LOCALENTRY is incompatible with tail calls
Gold version of commit 3cd7c7d7ef.
* powerpc.cc (Target_powerpc): Rename power10_stubs_ to
power10_relocs_.
(Target_powerpc::set_power10_relocs): New accessor.
(Target_powerpc::set_power10_stubs): Delete.
(Target_powerpc::power10_stubs): Adjust.
(Target_powerpc::has_localentry0): New accessor.
(ld_0_11): New constant.
(glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
(glink_eh_frame_fde_64v2_localentry0): New.
(Output_data_glink::pltresolve_size): Update.
(Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
(Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
and only emit for has_localentry0. Don't use r2 in the stub.
(Target_powerpc::Scan::local, global): Adjust for
set_power10_relocs renaming.
(Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
(cherry picked from commit 63e5eea234c2bd2c7ce7dc921c71b22bc4fd0d6b)
---
gold/ChangeLog | 19 ++++++++++++
gold/powerpc.cc | 82 +++++++++++++++++++++++++++++++++++++------------
2 files changed, 81 insertions(+), 20 deletions(-)
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 7734acec35..1f2ee06817 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,22 @@
+2020-09-26 Alan Modra <amodra@gmail.com>
+
+ * powerpc.cc (Target_powerpc): Rename power10_stubs_ to
+ power10_relocs_.
+ (Target_powerpc::set_power10_relocs): New accessor.
+ (Target_powerpc::set_power10_stubs): Delete.
+ (Target_powerpc::power10_stubs): Adjust.
+ (Target_powerpc::has_localentry0): New accessor.
+ (ld_0_11): New constant.
+ (glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
+ (glink_eh_frame_fde_64v2_localentry0): New.
+ (Output_data_glink::pltresolve_size): Update.
+ (Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
+ (Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
+ and only emit for has_localentry0. Don't use r2 in the stub.
+ (Target_powerpc::Scan::local, global): Adjust for
+ set_power10_relocs renaming.
+ (Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
+
2020-09-24 Alan Modra <amodra@gmail.com>
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 1020fa42f9..adbc120c14 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -647,7 +647,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
glink_(NULL), rela_dyn_(NULL), copy_relocs_(),
tlsld_got_offset_(-1U),
stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(),
- power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false),
+ power10_relocs_(false), plt_thread_safe_(false), plt_localentry0_(false),
plt_localentry0_init_(false), has_localentry0_(false),
has_tls_get_addr_opt_(false),
tprel_opt_(parameters->options().tls_optimize()),
@@ -1079,16 +1079,18 @@ class Target_powerpc : public Sized_target<size, big_endian>
sym->set_dynsym_index(-1U);
}
+ void
+ set_power10_relocs()
+ {
+ this->power10_relocs_ = true;
+ }
+
bool
power10_stubs() const
- { return this->power10_stubs_; }
-
- void
- set_power10_stubs()
{
- if (parameters->options().power10_stubs_enum()
- != General_options::POWER10_STUBS_NO)
- this->power10_stubs_ = true;
+ return (this->power10_relocs_
+ && (parameters->options().power10_stubs_enum()
+ != General_options::POWER10_STUBS_NO));
}
bool
@@ -1106,6 +1108,10 @@ class Target_powerpc : public Sized_target<size, big_endian>
plt_localentry0() const
{ return this->plt_localentry0_; }
+ bool
+ has_localentry0() const
+ { return this->has_localentry0_; }
+
void
set_has_localentry0()
{
@@ -1705,7 +1711,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
Branches branch_info_;
Tocsave_loc tocsave_loc_;
- bool power10_stubs_;
+ bool power10_relocs_;
bool plt_thread_safe_;
bool plt_localentry0_;
bool plt_localentry0_init_;
@@ -4190,6 +4196,7 @@ static const uint32_t cmpwi_11_0 = 0x2c0b0000;
static const uint32_t cror_15_15_15 = 0x4def7b82;
static const uint32_t cror_31_31_31 = 0x4ffffb82;
static const uint32_t ld_0_1 = 0xe8010000;
+static const uint32_t ld_0_11 = 0xe80b0000;
static const uint32_t ld_0_12 = 0xe80c0000;
static const uint32_t ld_2_1 = 0xe8410000;
static const uint32_t ld_2_2 = 0xe8420000;
@@ -4572,9 +4579,9 @@ static const unsigned char glink_eh_frame_fde_64v1[] =
0, 0, 0, 0, // Replaced with offset to .glink.
0, 0, 0, 0, // Replaced with size of .glink.
0, // Augmentation size.
- elfcpp::DW_CFA_advance_loc + 1,
+ elfcpp::DW_CFA_advance_loc + 2,
elfcpp::DW_CFA_register, 65, 12,
- elfcpp::DW_CFA_advance_loc + 5,
+ elfcpp::DW_CFA_advance_loc + 4,
elfcpp::DW_CFA_restore_extended, 65
};
@@ -4584,9 +4591,20 @@ static const unsigned char glink_eh_frame_fde_64v2[] =
0, 0, 0, 0, // Replaced with offset to .glink.
0, 0, 0, 0, // Replaced with size of .glink.
0, // Augmentation size.
- elfcpp::DW_CFA_advance_loc + 1,
+ elfcpp::DW_CFA_advance_loc + 2,
elfcpp::DW_CFA_register, 65, 0,
- elfcpp::DW_CFA_advance_loc + 7,
+ elfcpp::DW_CFA_advance_loc + 2,
+ elfcpp::DW_CFA_restore_extended, 65
+};
+
+static const unsigned char glink_eh_frame_fde_64v2_localentry0[] =
+{
+ 0, 0, 0, 0, // Replaced with offset to .glink.
+ 0, 0, 0, 0, // Replaced with size of .glink.
+ 0, // Augmentation size.
+ elfcpp::DW_CFA_advance_loc + 3,
+ elfcpp::DW_CFA_register, 65, 0,
+ elfcpp::DW_CFA_advance_loc + 2,
elfcpp::DW_CFA_restore_extended, 65
};
@@ -5525,7 +5543,8 @@ class Output_data_glink : public Output_section_data
{
if (size == 64)
return (8
- + (this->targ_->abiversion() < 2 ? 11 * 4 : 14 * 4));
+ + (this->targ_->abiversion() < 2 ? 11 * 4
+ : this->targ_->has_localentry0() ? 14 * 4 : 13 * 4));
return 16 * 4;
}
@@ -5568,6 +5587,12 @@ Output_data_glink<size, big_endian>::add_eh_frame(Layout* layout)
sizeof (Eh_cie<64>::eh_frame_cie),
glink_eh_frame_fde_64v1,
sizeof (glink_eh_frame_fde_64v1));
+ else if (this->targ_->has_localentry0())
+ layout->add_eh_frame_for_plt(this,
+ Eh_cie<64>::eh_frame_cie,
+ sizeof (Eh_cie<64>::eh_frame_cie),
+ glink_eh_frame_fde_64v2_localentry0,
+ sizeof (glink_eh_frame_fde_64v2));
else
layout->add_eh_frame_for_plt(this,
Eh_cie<64>::eh_frame_cie,
@@ -6798,15 +6823,25 @@ Output_data_glink<size, big_endian>::do_write(Output_file* of)
}
else
{
+ if (this->targ_->has_localentry0())
+ {
+ write_insn<big_endian>(p, std_2_1 + 24), p += 4;
+ }
write_insn<big_endian>(p, mflr_0), p += 4;
write_insn<big_endian>(p, bcl_20_31), p += 4;
write_insn<big_endian>(p, mflr_11), p += 4;
- write_insn<big_endian>(p, std_2_1 + 24), p += 4;
- write_insn<big_endian>(p, ld_2_11 + l(-16)), p += 4;
write_insn<big_endian>(p, mtlr_0), p += 4;
+ if (this->targ_->has_localentry0())
+ {
+ write_insn<big_endian>(p, ld_0_11 + l(-20)), p += 4;
+ }
+ else
+ {
+ write_insn<big_endian>(p, ld_0_11 + l(-16)), p += 4;
+ }
write_insn<big_endian>(p, sub_12_12_11), p += 4;
- write_insn<big_endian>(p, add_11_2_11), p += 4;
- write_insn<big_endian>(p, addi_0_12 + l(-48)), p += 4;
+ write_insn<big_endian>(p, add_11_0_11), p += 4;
+ write_insn<big_endian>(p, addi_0_12 + l(-44)), p += 4;
write_insn<big_endian>(p, ld_12_11 + 0), p += 4;
write_insn<big_endian>(p, srdi_0_0_2), p += 4;
write_insn<big_endian>(p, mtctr_12), p += 4;
@@ -8451,7 +8486,7 @@ Target_powerpc<size, big_endian>::Scan::local(
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
- target->set_power10_stubs();
+ target->set_power10_relocs();
break;
default:
break;
@@ -9248,7 +9283,7 @@ Target_powerpc<size, big_endian>::Scan::global(
case elfcpp::R_PPC64_GOT_TLSLD_PCREL34:
case elfcpp::R_PPC64_GOT_DTPREL_PCREL34:
case elfcpp::R_PPC64_GOT_TPREL_PCREL34:
- target->set_power10_stubs();
+ target->set_power10_relocs();
break;
default:
break;
@@ -9590,6 +9625,13 @@ Target_powerpc<size, big_endian>::scan_relocs(
needs_special_offset_handling,
local_symbol_count,
plocal_symbols);
+
+ if (this->plt_localentry0_ && this->power10_relocs_)
+ {
+ gold_warning(_("--plt-localentry is incompatible with "
+ "power10 pc-relative code"));
+ this->plt_localentry0_ = false;
+ }
}
// Functor class for processing the global symbol table.
--
2.21.3

1205
0001-GOLD-Power10-stub-selection.patch Normal file
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File diff suppressed because it is too large Load Diff

75
0001-GOLD-PowerPC64-__tls_get_addr_opt-stub.patch Normal file
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@ -0,0 +1,75 @@
From dc9f426801780e98f6bb81e74d5bb10b663260ac Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 23 Sep 2020 22:54:01 +0930
Subject: [PATCH] [GOLD] PowerPC64 __tls_get_addr_opt stub
This stub doesn't have the r2 store at the beginning.
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
first insn of __tls_get_addr_opt stub.
(cherry picked from commit a993d270f8423a8b6faa2ce9d245073bed076bb0)
---
gold/ChangeLog | 5 +++++
gold/powerpc.cc | 31 +++++++++++++++++--------------
2 files changed, 22 insertions(+), 14 deletions(-)
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 5c891349c4..7734acec35 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,8 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
+ first insn of __tls_get_addr_opt stub.
+
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index e35cbcf6c0..1020fa42f9 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -10401,21 +10401,24 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
value += ent->tocoff_;
if (size == 64
&& ent->r2save_
- && r_type == elfcpp::R_PPC64_REL24_NOTOC)
+ && !(gsym != NULL
+ && target->is_tls_get_addr_opt(gsym)))
{
- if (!(target->power10_stubs()
- && target->power10_stubs_auto()))
- value += 4;
- }
- else if (size == 64
- && ent->r2save_
- && relnum < reloc_count - 1)
- {
- Reltype next_rela(preloc + reloc_size);
- if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
- == elfcpp::R_PPC64_TOCSAVE
- && next_rela.get_r_offset() == rela.get_r_offset() + 4)
- value += 4;
+ if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
+ {
+ if (!(target->power10_stubs()
+ && target->power10_stubs_auto()))
+ value += 4;
+ }
+ else if (relnum < reloc_count - 1)
+ {
+ Reltype next_rela(preloc + reloc_size);
+ if (elfcpp::elf_r_type<size>(next_rela.get_r_info())
+ == elfcpp::R_PPC64_TOCSAVE
+ && (next_rela.get_r_offset()
+ == rela.get_r_offset() + 4))
+ value += 4;
+ }
}
localentry0 = ent->localentry0_;
has_stub_value = true;
--
2.21.3

165
0001-Implement-missing-powerpc-extended-mnemonics.patch Normal file
View File

@ -0,0 +1,165 @@
From f26bb6247b27f9fb81728132949e03f221d1abc4 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 10 Aug 2020 15:08:27 +0930
Subject: [PATCH] Implement missing powerpc extended mnemonics
gas/
* testsuite/gas/ppc/power8.d,
* testsuite/gas/ppc/power8.s: Add miso.
* testsuite/gas/ppc/power9.d,
* testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
opcodes/
* ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
Enable icbt for power5, miso for power8.
(cherry picked from commit 8b2742a1567273f2ecc9fe6d7df1c9287865f5b6)
---
gas/ChangeLog | 6 ++++++
gas/testsuite/gas/ppc/power8.d | 2 ++
gas/testsuite/gas/ppc/power8.s | 2 ++
gas/testsuite/gas/ppc/power9.d | 4 ++++
gas/testsuite/gas/ppc/power9.s | 4 ++++
opcodes/ChangeLog | 4 ++++
opcodes/ppc-opc.c | 18 +++++++++++-------
7 files changed, 33 insertions(+), 7 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0062d877bd..3d5376df89 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,6 +1,12 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * testsuite/gas/ppc/power8.d,
+ * testsuite/gas/ppc/power8.s: Add miso.
+ * testsuite/gas/ppc/power9.d,
+ * testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* testsuite/gas/ppc/power8.d: Update.
* testsuite/gas/ppc/vsx2.d: Update.
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
index 1439496462..df3f5d410d 100644
--- a/gas/testsuite/gas/ppc/power8.d
+++ b/gas/testsuite/gas/ppc/power8.d
@@ -310,4 +310,6 @@ Disassembly of section \.text:
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
.*: (4d 89 04 61|61 04 89 4d) bgttarl cr2
.*: (4d 89 1c 61|61 1c 89 4d) bctarl 12,4\*cr2\+gt,3
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
+.*: (7f 5a d3 78|78 d3 5a 7f) miso
#pass
diff --git a/gas/testsuite/gas/ppc/power8.s b/gas/testsuite/gas/ppc/power8.s
index beb1c5e81c..52a3e8ea69 100644
--- a/gas/testsuite/gas/ppc/power8.s
+++ b/gas/testsuite/gas/ppc/power8.s
@@ -302,3 +302,5 @@ power8:
bctarl 0b01100,4*cr2+gt
bctarl 0b01100,4*cr2+gt,0
bctarl 0b01100,4*cr2+gt,3
+ or 26,26,26
+ miso
diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d
index 4e7156d46d..45a8f495ae 100644
--- a/gas/testsuite/gas/ppc/power9.d
+++ b/gas/testsuite/gas/ppc/power9.d
@@ -399,4 +399,8 @@ Disassembly of section \.text:
.*: (7c 20 20 ac|ac 20 20 7c) dcbfl 0,r4
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
.*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5
+.*: (63 ff 00 00|00 00 ff 63) exser
+.*: (63 ff 00 00|00 00 ff 63) exser
+.*: (7c 00 18 9c|9c 18 00 7c) msgsndu r3
+.*: (7c 00 d8 dc|dc d8 00 7c) msgclru r27
#pass
diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s
index 69053819ff..2d412b9e66 100644
--- a/gas/testsuite/gas/ppc/power9.s
+++ b/gas/testsuite/gas/ppc/power9.s
@@ -390,3 +390,7 @@ power9:
dcbf 0,4,1
dcbflp 0,5
dcbf 0,5,3
+ ori 31,31,0
+ exser
+ msgsndu 3
+ msgclru 27
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 30593769d4..02cbd524f6 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,10 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
+ Enable icbt for power5, miso for power8.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
mtvsrd, and similarly for mfvsrd.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index a830c4c0fd..c4fa6761f4 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -6114,6 +6114,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}},
+{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}},
{"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
@@ -6236,7 +6237,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}},
-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}},
+{"icbt", X(31,22), X_MASK, POWER5|BOOKE|PPCE300, 0, {CT, RA0, RB}},
{"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
{"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}},
@@ -6354,6 +6355,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
{"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
+{"msgsndu", XRTRA(31,78,0,0), XRTRA_MASK, POWER9, 0, {RB}},
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}},
@@ -6387,6 +6389,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lxvrdx", X(31,109), XX1_MASK, POWER10, 0, {XT6, RA0, RB}},
+{"msgclru", XRTRA(31,110,0,0), XRTRA_MASK, POWER9, 0, {RB}},
{"mvidsplt", X(31,110), X_MASK, E6500, 0, {VD, RA, RB}},
{"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
@@ -7051,14 +7054,15 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
-
-{"miso", 0x7f5ad378, 0xffffffff, E6500, 0, {0}},
-
-/* The "yield", "mdoio" and "mdoom" instructions are extended mnemonics for
- "or rX,rX,rX", with rX being r27, r29 and r30 respectively. */
+/* or 26,26,26 */
+{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}},
+/* or 27,27,27 */
{"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}},
+/* or 28,28,28 */
+{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
+/* or 29,29,29 */
{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
+/* or 30,30,30 */
{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
--
2.21.3

369
0001-Implement-missing-powerpc-mtspr-and-mfspr-extended-i.patch Normal file
View File

@ -0,0 +1,369 @@
From 9030004379d4db633dc84a09f3b45ae0d6caed77 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 10 Aug 2020 21:41:36 +0930
Subject: [PATCH] Implement missing powerpc mtspr and mfspr extended insns
* ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
instructions.
(cherry picked from commit 3eb651743e06fb360687a26be87bc6b710fc7066)
---
opcodes/ChangeLog | 4 ++
opcodes/ppc-opc.c | 162 ++++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 160 insertions(+), 6 deletions(-)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 02cbd524f6..06d136d480 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,10 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
+ instructions.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
Enable icbt for power5, miso for power8.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index c4fa6761f4..4471b0f2bc 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -6741,11 +6741,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}},
{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}},
+{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}},
{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}},
{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}},
{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}},
{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}},
{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}},
+{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}},
{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}},
{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}},
{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}},
@@ -6756,9 +6758,12 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}},
{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}},
{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}},
+{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}},
+{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}},
{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}},
{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}},
{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}},
{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}},
{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}},
@@ -6772,16 +6777,28 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}},
{"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}},
+{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}},
{"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}},
{"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}},
{"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}},
+{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}},
{"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}},
{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}},
+{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}},
{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}},
+{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}},
+{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}},
+{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}},
+{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}},
{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}},
{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}},
{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}},
+{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}},
{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
@@ -6797,20 +6814,37 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}},
{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}},
{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}},
+{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}},
+{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}},
+{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}},
{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}},
{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}},
{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}},
{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}},
{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}},
+{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}},
{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}},
+{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}},
{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}},
{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}},
+{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}},
+{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}},
{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}},
+{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}},
{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}},
@@ -6827,6 +6861,14 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}},
{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}},
+{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}},
+{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}},
+{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
+{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
+{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}},
+{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}},
+{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}},
+{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}},
{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}},
{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}},
{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}},
@@ -6851,18 +6893,36 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}},
{"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}},
{"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}},
+{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
+{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
+{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
+{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
+{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
+{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
+{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}},
{"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}},
{"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
+{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}},
+{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}},
+{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
+{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
+{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
+{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
+{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}},
+{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}},
{"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}},
@@ -6876,12 +6936,25 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}},
{"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}},
+{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}},
+{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}},
+{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}},
+{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}},
+{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}},
+{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}},
{"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}},
{"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}},
+{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}},
{"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}},
{"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}},
+{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}},
+{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}},
+{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}},
{"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}},
{"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}},
{"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}},
@@ -7128,8 +7201,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}},
{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}},
+{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}},
{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}},
{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}},
+{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}},
{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}},
{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}},
{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}},
@@ -7142,13 +7217,20 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}},
{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}},
{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}},
+{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}},
{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}},
{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}},
{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}},
{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}},
{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}},
+{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}},
+{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}},
+{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}},
+{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}},
{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}},
@@ -7159,13 +7241,24 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}},
{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}},
{"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}},
+{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}},
{"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}},
{"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}},
{"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}},
+{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}},
{"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}},
{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}},
+{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}},
{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}},
+{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}},
+{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}},
+{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}},
+{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}},
+{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}},
{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}},
{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}},
{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}},
@@ -7181,20 +7274,38 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}},
{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}},
{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}},
+{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}},
+{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}},
+{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}},
+{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}},
+{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}},
{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}},
{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}},
{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}},
{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}},
{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}},
{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}},
{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}},
+{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}},
+{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}},
{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}},
{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}},
@@ -7211,6 +7322,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}},
{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}},
+{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}},
+{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
+{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
+{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}},
+{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}},
+{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}},
{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}},
{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}},
{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}},
@@ -7225,12 +7343,44 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}},
{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}},
{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}},
+{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}},
+{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
+{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
+{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}},
{"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}},
+{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}},
+{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}},
+{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}},
+{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}},
+{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}},
+{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}},
+{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}},
+{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}},
+{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}},
+{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}},
+{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}},
+{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}},
+{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}},
+{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}},
+{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}},
+{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}},
+{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}},
{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}},
{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}},
{"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}},
--
2.21.3

437
0001-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-calls.patch Normal file
View File

@ -0,0 +1,437 @@
From eec51831f13bbbb57f34def5734bc7b1aedd6675 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Sat, 26 Sep 2020 15:10:09 +0930
Subject: [PATCH] PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
(cherry picked from commit 3cd7c7d7ef38ec5dc0a0c137c47d9ad0fc9e2e5f)
---
bfd/ChangeLog | 10 ++++
bfd/elf64-ppc.c | 84 +++++++++++++++++++++++------
ld/ChangeLog | 12 +++++
ld/testsuite/ld-powerpc/elfv2so.d | 17 +++---
ld/testsuite/ld-powerpc/notoc2.d | 4 +-
ld/testsuite/ld-powerpc/tlsdesc.wf | 4 +-
ld/testsuite/ld-powerpc/tlsdesc2.d | 9 ++--
ld/testsuite/ld-powerpc/tlsdesc2.wf | 6 +--
ld/testsuite/ld-powerpc/tlsopt5.d | 11 ++--
ld/testsuite/ld-powerpc/tlsopt5.wf | 4 +-
ld/testsuite/ld-powerpc/tlsopt6.d | 11 ++--
ld/testsuite/ld-powerpc/tlsopt6.wf | 4 +-
12 files changed, 124 insertions(+), 52 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 49232b84c5..01ccac443e 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,13 @@
+2020-09-26 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
+ (LD_R0_0R11, ADD_R11_R0_R11): Define.
+ (ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
+ code detected.
+ (ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
+ (ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
+ and only emit for has_plt_localentry0. Don't use r2 in the stub.
+
2020-09-24 Nick Clifton <nickc@redhat.com>
Import from mainline:
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 7804ea3c14..f4d0c88c7a 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -211,9 +211,10 @@ static bfd_vma opd_entry_value
#define PLD_R12_PC 0x04100000e5800000ULL
#define PNOP 0x0700000000000000ULL
-/* __glink_PLTresolve stub instructions. We enter with the index in R0. */
+/* __glink_PLTresolve stub instructions. We enter with the index in
+ R0 for ELFv1, and the address of a glink branch in R12 for ELFv2. */
#define GLINK_PLTRESOLVE_SIZE(htab) \
- (8u + (htab->opd_abi ? 11 * 4 : 14 * 4))
+ (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4))
/* 0: */
/* .quad plt0-1f */
/* __glink: */
@@ -229,11 +230,14 @@ static bfd_vma opd_entry_value
/* mtctr %12 */
/* ld %11,16(%11) */
/* bctr */
-#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
-#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
-#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
-#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
-#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
+
+#define MFLR_R0 0x7c0802a6 /* mflr %r0 */
+#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */
+#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */
+#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */
+#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */
+#define LD_R0_0R11 0xe80b0000 /* ld %r0,0(%r11) */
+#define ADD_R11_R0_R11 0x7d605a14 /* add %r11,%r0,%r11 */
/* Pad with this. */
#define NOP 0x60000000
@@ -7735,6 +7739,19 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
--plt-localentry can cause trouble. */
if (htab->params->plt_localentry0 < 0)
htab->params->plt_localentry0 = 0;
+ if (htab->params->plt_localentry0 && htab->has_power10_relocs)
+ {
+ /* The issue is that __glink_PLTresolve saves r2, which is done
+ because glibc ld.so _dl_runtime_resolve restores r2 to support
+ a glibc plt call optimisation where global entry code is
+ skipped on calls that resolve to the same binary. The
+ __glink_PLTresolve save of r2 is incompatible with code
+ making tail calls, because the tail call might go via the
+ resolver and thus overwrite the proper saved r2. */
+ _bfd_error_handler (_("warning: --plt-localentry is incompatible with "
+ "power10 pc-relative code"));
+ htab->params->plt_localentry0 = 0;
+ }
if (htab->params->plt_localentry0
&& elf_link_hash_lookup (&htab->elf, "GLIBC_2.26",
FALSE, FALSE, FALSE) == NULL)
@@ -13870,11 +13887,11 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
/* Augmentation. */
p += 1;
- *p++ = DW_CFA_advance_loc + 1;
+ *p++ = DW_CFA_advance_loc + (htab->has_plt_localentry0 ? 3 : 2);
*p++ = DW_CFA_register;
*p++ = 65;
*p++ = htab->opd_abi ? 12 : 0;
- *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 5 : 7);
+ *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 4 : 2);
*p++ = DW_CFA_restore_extended;
*p++ = 65;
p += ((24 + align - 1) & -align) - 24;
@@ -14470,23 +14487,60 @@ ppc64_elf_build_stubs (struct bfd_link_info *info,
}
else
{
+ unsigned int insn;
+
+ /* 0:
+ . .quad plt0-1f # plt0 entry relative to 1:
+ #
+ # We get here with r12 initially @ a glink branch
+ # Load the address of _dl_runtime_resolve from plt0 and
+ # jump to it, with r0 set to the index of the PLT entry
+ # to be resolved and r11 the link map.
+ __glink_PLTresolve:
+ . std %r2,24(%r1) # optional
+ . mflr %r0
+ . bcl 20,31,1f
+ 1:
+ . mflr %r11
+ . mtlr %r0
+ . ld %r0,(0b-1b)(%r11)
+ . sub %r12,%r12,%r11
+ . add %r11,%r0,%r11
+ . addi %r0,%r12,1b-2f
+ . ld %r12,0(%r11)
+ . srdi %r0,%r0,2
+ . mtctr %r12
+ . ld %r11,8(%r11)
+ . bctr
+ 2:
+ . b __glink_PLTresolve
+ . ...
+ . b __glink_PLTresolve */
+
+ if (htab->has_plt_localentry0)
+ {
+ bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
+ p += 4;
+ }
bfd_put_32 (htab->glink->owner, MFLR_R0, p);
p += 4;
bfd_put_32 (htab->glink->owner, BCL_20_31, p);
p += 4;
bfd_put_32 (htab->glink->owner, MFLR_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p);
- p += 4;
- bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p);
- p += 4;
bfd_put_32 (htab->glink->owner, MTLR_R0, p);
p += 4;
+ if (htab->has_plt_localentry0)
+ insn = LD_R0_0R11 | (-20 & 0xfffc);
+ else
+ insn = LD_R0_0R11 | (-16 & 0xfffc);
+ bfd_put_32 (htab->glink->owner, insn, p);
+ p += 4;
bfd_put_32 (htab->glink->owner, SUB_R12_R12_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p);
+ bfd_put_32 (htab->glink->owner, ADD_R11_R0_R11, p);
p += 4;
- bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-48 & 0xffff), p);
+ bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-44 & 0xffff), p);
p += 4;
bfd_put_32 (htab->glink->owner, LD_R12_0R11, p);
p += 4;
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 3fcbc7e67f..a3acc07689 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,15 @@
+2020-09-26 Alan Modra <amodra@gmail.com>
+
+ * testsuite/ld-powerpc/elfv2so.d,
+ * testsuite/ld-powerpc/notoc2.d,
+ * testsuite/ld-powerpc/tlsdesc.wf,
+ * testsuite/ld-powerpc/tlsdesc2.d,
+ * testsuite/ld-powerpc/tlsdesc2.wf,
+ * testsuite/ld-powerpc/tlsopt5.d,
+ * testsuite/ld-powerpc/tlsopt5.wf,
+ * testsuite/ld-powerpc/tlsopt6.d,
+ * testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
+
2020-09-24 Alan Modra <amodra@gmail.com>
PR 26655
diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
index 0162bd0880..4018f0536c 100644
--- a/ld/testsuite/ld-powerpc/elfv2so.d
+++ b/ld/testsuite/ld-powerpc/elfv2so.d
@@ -74,12 +74,11 @@ Disassembly of section \.text:
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
@@ -87,16 +86,16 @@ Disassembly of section \.text:
.*: (4e 80 04 20|20 04 80 4e) bctr
.* <f5@plt>:
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
.* <f3@plt>:
-.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
.* <f2@plt>:
-.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
.* <f4@plt>:
-.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
.* <f1@plt>:
-.*: (4b ff ff b8|b8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
diff --git a/ld/testsuite/ld-powerpc/notoc2.d b/ld/testsuite/ld-powerpc/notoc2.d
index 1e519c0d1b..3448f8b37e 100644
--- a/ld/testsuite/ld-powerpc/notoc2.d
+++ b/ld/testsuite/ld-powerpc/notoc2.d
@@ -22,8 +22,8 @@ Disassembly of section \.text:
.*: (39 80 ff ff|ff ff 80 39)
.*: (06 10 00 00|00 00 10 06) pla r12,0
.*: (39 80 00 00|00 00 80 39)
-.*: (06 10 00 00|00 00 10 06) pla r3,92
-.*: (38 60 00 5c|5c 00 60 38)
+.*: (06 10 00 00|00 00 10 06) pla r3,88
+.*: (38 60 00 58|58 00 60 38)
.*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts>
.*: (60 00 00 00|00 00 00 60) nop
#pass
diff --git a/ld/testsuite/ld-powerpc/tlsdesc.wf b/ld/testsuite/ld-powerpc/tlsdesc.wf
index 09503fa005..e7d4522b50 100644
--- a/ld/testsuite/ld-powerpc/tlsdesc.wf
+++ b/ld/testsuite/ld-powerpc/tlsdesc.wf
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
DW_CFA_nop
0+4c 0+14 0+50 FDE cie=0+ pc=0+2f8\.\.0+32c
- DW_CFA_advance_loc: 4 to 0+2fc
+ DW_CFA_advance_loc: 8 to 0+300
DW_CFA_register: r65 in r12
- DW_CFA_advance_loc: 20 to 0+310
+ DW_CFA_advance_loc: 16 to 0+310
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=0+2e0\.\.0+2ec
diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.d b/ld/testsuite/ld-powerpc/tlsdesc2.d
index 47aedbecb8..c271c949b0 100644
--- a/ld/testsuite/ld-powerpc/tlsdesc2.d
+++ b/ld/testsuite/ld-powerpc/tlsdesc2.d
@@ -53,12 +53,11 @@ Disassembly of section \.text:
.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
-.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
+.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
@@ -66,4 +65,4 @@ Disassembly of section \.text:
.*: (4e 80 04 20|20 04 80 4e) bctr
.* <__tls_get_addr_opt@plt>:
-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
+.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.wf b/ld/testsuite/ld-powerpc/tlsdesc2.wf
index cb92c294b1..79a417ba06 100644
--- a/ld/testsuite/ld-powerpc/tlsdesc2.wf
+++ b/ld/testsuite/ld-powerpc/tlsdesc2.wf
@@ -37,10 +37,10 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+354
- DW_CFA_advance_loc: 4 to 0+31c
+0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+350
+ DW_CFA_advance_loc: 8 to 0+320
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to 0+338
+ DW_CFA_advance_loc: 8 to 0+328
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=0+300\.\.0+30c
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.d b/ld/testsuite/ld-powerpc/tlsopt5.d
index 0fcb79821b..efd6debc55 100644
--- a/ld/testsuite/ld-powerpc/tlsopt5.d
+++ b/ld/testsuite/ld-powerpc/tlsopt5.d
@@ -49,12 +49,11 @@ Disassembly of section \.text:
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (05 00 9f 42|42 9f 00 05) bcl .*
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
@@ -62,7 +61,7 @@ Disassembly of section \.text:
.*: (20 04 80 4e|4e 80 04 20) bctr
.* <__tls_get_addr_opt@plt>:
-.* (c8 ff ff 4b|4b ff ff c8) b .*
+.* (cc ff ff 4b|4b ff ff cc) b .*
.* <aaaaa@plt>:
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
diff --git a/ld/testsuite/ld-powerpc/tlsopt5.wf b/ld/testsuite/ld-powerpc/tlsopt5.wf
index f0453610e0..84bd94ed72 100644
--- a/ld/testsuite/ld-powerpc/tlsopt5.wf
+++ b/ld/testsuite/ld-powerpc/tlsopt5.wf
@@ -16,9 +16,9 @@ Contents of the \.eh_frame section:
DW_CFA_restore_extended: r65
0+2c 0+14 0+30 FDE cie=0+ pc=.*
- DW_CFA_advance_loc: 4 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_restore_extended: r65
0+44 0+10 0+48 FDE cie=0+ pc=.*
diff --git a/ld/testsuite/ld-powerpc/tlsopt6.d b/ld/testsuite/ld-powerpc/tlsopt6.d
index 4ca64092c1..15def719cb 100644
--- a/ld/testsuite/ld-powerpc/tlsopt6.d
+++ b/ld/testsuite/ld-powerpc/tlsopt6.d
@@ -67,12 +67,11 @@ Disassembly of section \.text:
.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
.*: (05 00 9f 42|42 9f 00 05) bcl .*
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\)
-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\)
.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
+.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\)
.*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12
-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11
-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48
+.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11
+.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44
.*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\)
.*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2
.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
@@ -80,7 +79,7 @@ Disassembly of section \.text:
.*: (20 04 80 4e|4e 80 04 20) bctr
.* <__tls_get_addr_opt@plt>:
-.* (c8 ff ff 4b|4b ff ff c8) b .*
+.* (cc ff ff 4b|4b ff ff cc) b .*
.* <aaaaa@plt>:
-.*: (c4 ff ff 4b|4b ff ff c4) b .*
+.*: (c8 ff ff 4b|4b ff ff c8) b .*
diff --git a/ld/testsuite/ld-powerpc/tlsopt6.wf b/ld/testsuite/ld-powerpc/tlsopt6.wf
index abb414a633..c2b9616352 100644
--- a/ld/testsuite/ld-powerpc/tlsopt6.wf
+++ b/ld/testsuite/ld-powerpc/tlsopt6.wf
@@ -38,9 +38,9 @@ Contents of the \.eh_frame section:
DW_CFA_nop
0+4c 0+14 0+50 FDE cie=0+ pc=.*
- DW_CFA_advance_loc: 4 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_register: r65 in r0
- DW_CFA_advance_loc: 28 to .*
+ DW_CFA_advance_loc: 8 to .*
DW_CFA_restore_extended: r65
0+64 0+10 0+68 FDE cie=0+ pc=.*
--
2.21.3

229
0001-PR26655-Power10-libstdc-.so-R_PPC64_NONE-dynamic-rel.patch Normal file
View File

@ -0,0 +1,229 @@
From 97c22b122492ab3d2d1fd6237cadc56296ce76d2 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 23 Sep 2020 14:55:39 +0930
Subject: [PATCH] PR26655, Power10 libstdc++.so R_PPC64_NONE dynamic relocs
Some of the powerpc64 code editing functions are better run after
dynamic symbols have stabilised in order to make proper decisions
based on SYMBOL_REFERENCES_LOCAL. The dynamic symbols are processed
early in bfd_elf_size_dynamic_sections, before the backend
always_size_sections function is called.
One function, ppc64_elf_tls_setup must run before
bfd_elf_size_dynamic_sections because it changes dynamic symbols.
ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I
think. ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run
later.
So this patch arranges to call some edit functions later via
always_size_sections.
PR 26655
bfd/
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
(ppc64_elf_edit): Call params->edit.
(ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a
bfd_boolean.
* elf64-ppc.h (struct ppc64_elf_params): Add "edit".
(ppc64_elf_tls_setup): Update declaration.
ld/
* emultempl/ppc64elf.em (params): Add ppc_edit.
(ppc_before_allocation): Split off some edit functions to..
(ppc_edit): ..this, new function.
(cherry picked from commit c94053440e29421dd8846530da73f09c9ede2e0f)
---
bfd/ChangeLog | 10 ++++++++++
bfd/elf64-ppc.c | 27 ++++++++++++++++-----------
bfd/elf64-ppc.h | 3 ++-
ld/ChangeLog | 7 +++++++
ld/emultempl/ppc64elf.em | 18 +++++++++++++++---
5 files changed, 50 insertions(+), 15 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 825d5e6d4a..1dabc6ebd6 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,13 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ PR 26655
+ * elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
+ (ppc64_elf_edit): Call params->edit.
+ (ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a
+ bfd_boolean.
+ * elf64-ppc.h (struct ppc64_elf_params): Add "edit".
+ (ppc64_elf_tls_setup): Update declaration.
+
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index faf4989659..bc1302e6ef 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -114,7 +114,7 @@ static bfd_vma opd_entry_value
#define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol
#define elf_backend_hide_symbol ppc64_elf_hide_symbol
#define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym
-#define elf_backend_always_size_sections ppc64_elf_func_desc_adjust
+#define elf_backend_always_size_sections ppc64_elf_edit
#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections
#define elf_backend_hash_symbol ppc64_elf_hash_symbol
#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
@@ -6340,13 +6340,13 @@ static const struct sfpr_def_parms save_res_funcs[] =
};
/* Called near the start of bfd_elf_size_dynamic_sections. We use
- this hook to a) provide some gcc support functions, and b) transfer
- dynamic linking information gathered so far on function code symbol
- entries, to their corresponding function descriptor symbol entries. */
+ this hook to a) run the edit functions in this file, b) provide
+ some gcc support functions, and c) transfer dynamic linking
+ information gathered so far on function code symbol entries, to
+ their corresponding function descriptor symbol entries. */
static bfd_boolean
-ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *info)
+ppc64_elf_edit (bfd *obfd ATTRIBUTE_UNUSED, struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
@@ -6354,6 +6354,9 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED,
if (htab == NULL)
return FALSE;
+ /* Call back into the linker, which then runs the edit functions. */
+ htab->params->edit ();
+
/* Provide any missing _save* and _rest* functions. */
if (htab->sfpr != NULL)
{
@@ -7694,9 +7697,11 @@ ppc64_elf_inline_plt (struct bfd_link_info *info)
return TRUE;
}
-/* Set htab->tls_get_addr and call the generic ELF tls_setup function. */
+/* Set htab->tls_get_addr and various other info specific to TLS.
+ This needs to run before dynamic symbols are processed in
+ bfd_elf_size_dynamic_sections. */
-asection *
+bfd_boolean
ppc64_elf_tls_setup (struct bfd_link_info *info)
{
struct ppc_link_hash_table *htab;
@@ -7704,7 +7709,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
htab = ppc_hash_table (info);
if (htab == NULL)
- return NULL;
+ return FALSE;
if (abiversion (info->output_bfd) == 1)
htab->opd_abi = 1;
@@ -7826,7 +7831,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
_bfd_elf_strtab_delref (elf_hash_table (info)->dynstr,
opt_fd->dynstr_index);
if (!bfd_elf_link_record_dynamic_symbol (info, opt_fd))
- return NULL;
+ return FALSE;
}
if (tga_fd != NULL)
{
@@ -7885,7 +7890,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info)
&& htab->params->no_tls_get_addr_regsave == -1)
htab->params->no_tls_get_addr_regsave = 0;
- return _bfd_elf_tls_setup (info->output_bfd, info);
+ return TRUE;
}
/* Return TRUE iff REL is a branch reloc with a global symbol matching
diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h
index a7230de81c..0492fd7fad 100644
--- a/bfd/elf64-ppc.h
+++ b/bfd/elf64-ppc.h
@@ -27,6 +27,7 @@ struct ppc64_elf_params
/* Linker call-backs. */
asection * (*add_stub_section) (const char *, asection *);
void (*layout_sections_again) (void);
+ void (*edit) (void);
/* Maximum size of a group of input sections that can be handled by
one stub section. A value of +/-1 indicates the bfd back-end
@@ -80,7 +81,7 @@ bfd_boolean ppc64_elf_edit_opd
(struct bfd_link_info *);
bfd_boolean ppc64_elf_inline_plt
(struct bfd_link_info *);
-asection *ppc64_elf_tls_setup
+bfd_boolean ppc64_elf_tls_setup
(struct bfd_link_info *);
bfd_boolean ppc64_elf_tls_optimize
(struct bfd_link_info *);
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 0ee333a860..3fcbc7e67f 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ PR 26655
+ * emultempl/ppc64elf.em (params): Add ppc_edit.
+ (ppc_before_allocation): Split off some edit functions to..
+ (ppc_edit): ..this, new function.
+
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
index 42b9bd48fc..2df5a218e6 100644
--- a/ld/emultempl/ppc64elf.em
+++ b/ld/emultempl/ppc64elf.em
@@ -32,10 +32,12 @@ fragment <<EOF
static asection *ppc_add_stub_section (const char *, asection *);
static void ppc_layout_sections_again (void);
+static void ppc_edit (void);
static struct ppc64_elf_params params = { NULL,
&ppc_add_stub_section,
&ppc_layout_sections_again,
+ &ppc_edit,
1, -1, -1, 0,
${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5,
-1, -1, 0, 0, -1, -1, 0};
@@ -294,7 +296,19 @@ ppc_before_allocation (void)
einfo (_("%X%P: inline PLT: %E\n"));
}
- if (ppc64_elf_tls_setup (&link_info)
+ if (!ppc64_elf_tls_setup (&link_info))
+ einfo (_("%X%P: TLS problem %E\n"));
+ }
+
+ gld${EMULATION_NAME}_before_allocation ();
+}
+
+static void
+ppc_edit (void)
+{
+ if (stub_file != NULL)
+ {
+ if (elf_hash_table (&link_info)->tls_sec != NULL
&& !no_tls_opt)
{
/* Size the sections. This is premature, but we want to know the
@@ -323,8 +337,6 @@ ppc_before_allocation (void)
sort_toc_sections (&toc_os->children, NULL, NULL);
}
}
-
- gld${EMULATION_NAME}_before_allocation ();
}
struct hook_stub_info
--
2.21.3

795
0001-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv1-_.patch Normal file
View File

@ -0,0 +1,795 @@
From 6f9a6c28850f6839ff61af22c277b2abbf7895da Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Tue, 22 Sep 2020 22:51:42 +0930
Subject: [PATCH] PR26656, power10 libstdc++.so segfault in
__cxxabiv1::__cxa_throw
This adds missing support for a power10 version of the __tls_get_addr
call stub implementing DT_PPC64_OPT PPC64_OPT_TLS. Without this,
power10 code using __tls_get_addr fails miserably at runtime unless
the --no-tls-get-addr-optimize option is given.
PR 26656
* elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
size_power10_offset rather than calculating from start of stub.
Add size for notoc tls_get_addr_opt stub.
(plt_stub_pad): Add "odd" param, pass to plt_stub_size.
(build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
(build_tls_get_addr_stub): Delete.
(ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
Emit notoc tls_get_addr_opt stub. Move eh_frame code to
suit. Adjust code to use bfd_tls_get_addr_head/tail in place
of build_tls_get_addr_stub.
(ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
when padding stub. Size eh_frame for notoc stub too.
Correct lr_restore value.
(ppc64_elf_relocate_section): Don't skip over first insn of
notoc tls_get_addr_opt stub.
(cherry picked from commit 294338867c268b6da43327b6cbe70e746bff1a04)
---
bfd/ChangeLog | 20 +++
bfd/elf64-ppc.c | 424 +++++++++++++++++++++++++++---------------------
2 files changed, 259 insertions(+), 185 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 1dabc6ebd6..da976cac0f 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,23 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ PR 26656
+ * elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
+ size_power10_offset rather than calculating from start of stub.
+ Add size for notoc tls_get_addr_opt stub.
+ (plt_stub_pad): Add "odd" param, pass to plt_stub_size.
+ (build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
+ (build_tls_get_addr_stub): Delete.
+ (ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
+ Emit notoc tls_get_addr_opt stub. Move eh_frame code to
+ suit. Adjust code to use bfd_tls_get_addr_head/tail in place
+ of build_tls_get_addr_stub.
+ (ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
+ Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
+ when padding stub. Size eh_frame for notoc stub too.
+ Correct lr_restore value.
+ (ppc64_elf_relocate_section): Don't skip over first insn of
+ notoc tls_get_addr_opt stub.
+
2020-09-24 Alan Modra <amodra@gmail.com>
PR 26655
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index bc1302e6ef..7804ea3c14 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -10839,62 +10839,60 @@ eh_advance_size (unsigned int delta)
static inline unsigned int
plt_stub_size (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_vma off)
+ bfd_vma off,
+ unsigned int odd)
{
unsigned size;
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
{
if (htab->params->power10_stubs != 0)
- {
- bfd_vma start = (stub_entry->stub_offset
- + stub_entry->group->stub_sec->output_offset
- + stub_entry->group->stub_sec->output_section->vma);
- if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
- start += 4;
- size = 8 + size_power10_offset (off, start & 4);
- }
+ size = 8 + size_power10_offset (off, odd);
else
size = 8 + size_offset (off - 8);
if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
size += 4;
- return size;
}
-
- size = 12;
- if (ALWAYS_EMIT_R2SAVE
- || stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 4;
- if (PPC_HA (off) != 0)
- size += 4;
- if (htab->opd_abi)
+ else
{
- size += 4;
- if (htab->params->plt_static_chain)
+ size = 12;
+ if (ALWAYS_EMIT_R2SAVE
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save)
size += 4;
- if (htab->params->plt_thread_safe
- && htab->elf.dynamic_sections_created
- && stub_entry->h != NULL
- && stub_entry->h->elf.dynindx != -1)
- size += 8;
- if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) != PPC_HA (off))
+ if (PPC_HA (off) != 0)
size += 4;
+ if (htab->opd_abi)
+ {
+ size += 4;
+ if (htab->params->plt_static_chain)
+ size += 4;
+ if (htab->params->plt_thread_safe
+ && htab->elf.dynamic_sections_created
+ && stub_entry->h != NULL
+ && stub_entry->h->elf.dynindx != -1)
+ size += 8;
+ if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain)
+ != PPC_HA (off))
+ size += 4;
+ }
}
if (stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt)
{
- if (htab->params->no_tls_get_addr_regsave)
+ if (!htab->params->no_tls_get_addr_regsave)
{
- size += 7 * 4;
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 6 * 4;
+ size += 30 * 4;
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ size += 4;
}
else
{
- size += 30 * 4;
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- size += 4;
+ size += 7 * 4;
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ size += 6 * 4;
}
}
return size;
@@ -10909,7 +10907,8 @@ plt_stub_size (struct ppc_link_hash_table *htab,
static inline unsigned int
plt_stub_pad (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_vma plt_off)
+ bfd_vma plt_off,
+ unsigned int odd)
{
int stub_align;
unsigned stub_size;
@@ -10924,7 +10923,7 @@ plt_stub_pad (struct ppc_link_hash_table *htab,
}
stub_align = 1 << -htab->params->plt_stub_align;
- stub_size = plt_stub_size (htab, stub_entry, plt_off);
+ stub_size = plt_stub_size (htab, stub_entry, plt_off, odd);
if (((stub_off + stub_size - 1) & -stub_align) - (stub_off & -stub_align)
> ((stub_size - 1) & -stub_align))
return stub_align - (stub_off & (stub_align - 1));
@@ -11119,14 +11118,12 @@ build_plt_stub (struct ppc_link_hash_table *htab,
#define MR_R3_R0 0x7c030378
#define BCTRL 0x4e800421
-static inline bfd_byte *
-build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
+static bfd_byte *
+build_tls_get_addr_head (struct ppc_link_hash_table *htab,
struct ppc_stub_hash_entry *stub_entry,
- bfd_byte *p, bfd_vma offset, Elf_Internal_Rela *r)
+ bfd_byte *p)
{
bfd *obfd = htab->params->stub_bfd;
- bfd_byte *loc = p;
- unsigned int i;
bfd_put_32 (obfd, LD_R0_0R3 + 0, p), p += 4;
bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4;
@@ -11135,21 +11132,43 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
bfd_put_32 (obfd, ADD_R3_R12_R13, p), p += 4;
bfd_put_32 (obfd, BEQLR, p), p += 4;
bfd_put_32 (obfd, MR_R3_R0, p), p += 4;
- if (htab->params->no_tls_get_addr_regsave)
- {
- if (r != NULL)
- r[0].r_offset += 7 * 4;
- if (stub_entry->stub_type != ppc_stub_plt_call_r2save)
- return build_plt_stub (htab, stub_entry, p, offset, r);
+ if (!htab->params->no_tls_get_addr_regsave)
+ p = tls_get_addr_prologue (obfd, p, htab);
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
bfd_put_32 (obfd, MFLR_R0, p);
p += 4;
bfd_put_32 (obfd, STD_R0_0R1 + STK_LINKER (htab), p);
p += 4;
+ }
+ return p;
+}
- if (r != NULL)
- r[0].r_offset += 2 * 4;
- p = build_plt_stub (htab, stub_entry, p, offset, r);
+static bfd_byte *
+build_tls_get_addr_tail (struct ppc_link_hash_table *htab,
+ struct ppc_stub_hash_entry *stub_entry,
+ bfd_byte *p,
+ bfd_byte *loc)
+{
+ bfd *obfd = htab->params->stub_bfd;
+
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ bfd_put_32 (obfd, BCTRL, p - 4);
+
+ if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
+ p += 4;
+ }
+ p = tls_get_addr_epilogue (obfd, p, htab);
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
bfd_put_32 (obfd, BCTRL, p - 4);
bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
@@ -11161,24 +11180,6 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
bfd_put_32 (obfd, BLR, p);
p += 4;
}
- else
- {
- p = tls_get_addr_prologue (obfd, p, htab);
-
- if (r != NULL)
- r[0].r_offset += 18 * 4;
-
- p = build_plt_stub (htab, stub_entry, p, offset, r);
- bfd_put_32 (obfd, BCTRL, p - 4);
-
- if (stub_entry->stub_type == ppc_stub_plt_call_r2save)
- {
- bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p);
- p += 4;
- }
-
- p = tls_get_addr_epilogue (obfd, p, htab);
- }
if (htab->glink_eh_frame != NULL
&& htab->glink_eh_frame->size != 0)
@@ -11187,21 +11188,11 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
base = htab->glink_eh_frame->contents + stub_entry->group->eh_base + 17;
eh = base + stub_entry->group->eh_size;
- if (htab->params->no_tls_get_addr_regsave)
- {
- unsigned int lr_used, delta;
- lr_used = stub_entry->stub_offset + (p - 20 - loc);
- delta = lr_used - stub_entry->group->lr_restore;
- stub_entry->group->lr_restore = lr_used + 16;
- eh = eh_advance (htab->elf.dynobj, eh, delta);
- *eh++ = DW_CFA_offset_extended_sf;
- *eh++ = 65;
- *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
- *eh++ = DW_CFA_advance_loc + 4;
- }
- else
+
+ if (!htab->params->no_tls_get_addr_regsave)
{
- unsigned int cfa_updt, delta;
+ unsigned int cfa_updt, delta, i;
+
/* After the bctrl, lr has been modified so we need to emit
.eh_frame info saying the return address is on the stack. In
fact we must put the EH info at or before the call rather
@@ -11240,10 +11231,27 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab,
for (i = 4; i < 12; i++)
*eh++ = DW_CFA_restore + i;
*eh++ = DW_CFA_advance_loc + 2;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ unsigned int lr_used, delta;
+
+ lr_used = stub_entry->stub_offset + (p - 20 - loc);
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->lr_restore = lr_used + 16;
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
+ *eh++ = DW_CFA_offset_extended_sf;
+ *eh++ = 65;
+ *eh++ = -(STK_LINKER (htab) / 8) & 0x7f;
+ *eh++ = DW_CFA_advance_loc + 4;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
}
- *eh++ = DW_CFA_restore_extended;
- *eh++ = 65;
- stub_entry->group->eh_size = eh - base;
}
return p;
}
@@ -11377,6 +11385,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
struct ppc_branch_hash_entry *br_entry;
struct bfd_link_info *info;
struct ppc_link_hash_table *htab;
+ bfd *obfd;
bfd_byte *loc;
bfd_byte *p, *relp;
bfd_vma targ, off;
@@ -11384,6 +11393,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
asection *plt;
int num_rel;
int odd;
+ bfd_boolean is_tga;
/* Massage our args to the form they really have. */
stub_entry = (struct ppc_stub_hash_entry *) gen_entry;
@@ -11433,6 +11443,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
off = targ - off;
p = loc;
+ obfd = htab->params->stub_bfd;
if (stub_entry->stub_type == ppc_stub_long_branch_r2off)
{
bfd_vma r2off = get_r2off (info, stub_entry);
@@ -11442,23 +11453,21 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
htab->stub_error = TRUE;
return FALSE;
}
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
if (PPC_HA (r2off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R2_R2 | PPC_HA (r2off), p);
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
p += 4;
}
if (PPC_LO (r2off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDI_R2_R2 | PPC_LO (r2off), p);
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
p += 4;
}
off -= p - loc;
}
- bfd_put_32 (htab->params->stub_bfd, B_DOT | (off & 0x3fffffc), p);
+ bfd_put_32 (obfd, B_DOT | (off & 0x3fffffc), p);
p += 4;
if (off + (1 << 25) >= (bfd_vma) (1 << 26))
@@ -11584,19 +11593,17 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
}
p = loc;
+ obfd = htab->params->stub_bfd;
if (stub_entry->stub_type != ppc_stub_plt_branch_r2off)
{
if (PPC_HA (off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R12_R2 | PPC_HA (off), p);
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R12 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
}
else
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R2 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
}
else
{
@@ -11608,36 +11615,32 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
return FALSE;
}
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
if (PPC_HA (off) != 0)
{
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R12_R2 | PPC_HA (off), p);
+ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- LD_R12_0R12 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p);
}
else
- bfd_put_32 (htab->params->stub_bfd, LD_R12_0R2 | PPC_LO (off), p);
+ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p);
if (PPC_HA (r2off) != 0)
{
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- ADDIS_R2_R2 | PPC_HA (r2off), p);
+ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p);
}
if (PPC_LO (r2off) != 0)
{
p += 4;
- bfd_put_32 (htab->params->stub_bfd,
- ADDI_R2_R2 | PPC_LO (r2off), p);
+ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p);
}
}
p += 4;
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
+ bfd_put_32 (obfd, MTCTR_R12, p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
+ bfd_put_32 (obfd, BCTR, p);
p += 4;
break;
@@ -11651,12 +11654,22 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
off = (stub_entry->stub_offset
+ stub_entry->group->stub_sec->output_offset
+ stub_entry->group->stub_sec->output_section->vma);
+ obfd = htab->params->stub_bfd;
+ is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt);
+ if (is_tga)
+ {
+ p = build_tls_get_addr_head (htab, stub_entry, p);
+ off += p - loc;
+ }
if (stub_entry->stub_type == ppc_stub_long_branch_both
|| stub_entry->stub_type == ppc_stub_plt_branch_both
|| stub_entry->stub_type == ppc_stub_plt_call_both)
{
off += 4;
- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p);
+ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p);
p += 4;
}
if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
@@ -11689,17 +11702,39 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
if (htab->params->power10_stubs != 0)
{
bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc;
- p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load);
+ p = build_power10_offset (obfd, p, off, odd, load);
}
else
{
+ if (htab->glink_eh_frame != NULL
+ && htab->glink_eh_frame->size != 0)
+ {
+ bfd_byte *base, *eh;
+ unsigned int lr_used, delta;
+
+ base = (htab->glink_eh_frame->contents
+ + stub_entry->group->eh_base + 17);
+ eh = base + stub_entry->group->eh_size;
+ lr_used = stub_entry->stub_offset + (p - loc) + 8;
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->lr_restore = lr_used + 8;
+ eh = eh_advance (htab->elf.dynobj, eh, delta);
+ *eh++ = DW_CFA_register;
+ *eh++ = 65;
+ *eh++ = 12;
+ *eh++ = DW_CFA_advance_loc + 2;
+ *eh++ = DW_CFA_restore_extended;
+ *eh++ = 65;
+ stub_entry->group->eh_size = eh - base;
+ }
+
/* The notoc stubs calculate their target (either a PLT entry or
the global entry point of a function) relative to the PC
returned by the "bcl" two instructions past the start of the
sequence emitted by build_offset. The offset is therefore 8
less than calculated from the start of the sequence. */
off -= 8;
- p = build_offset (htab->params->stub_bfd, p, off,
+ p = build_offset (obfd, p, off,
stub_entry->stub_type >= ppc_stub_plt_call_notoc);
}
@@ -11711,17 +11746,19 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
+ stub_entry->group->stub_sec->output_offset
+ stub_entry->group->stub_sec->output_section->vma
+ (p - loc));
- bfd_put_32 (htab->params->stub_bfd,
- B_DOT | ((targ - from) & 0x3fffffc), p);
+ bfd_put_32 (obfd, B_DOT | ((targ - from) & 0x3fffffc), p);
}
else
{
- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p);
+ bfd_put_32 (obfd, MTCTR_R12, p);
p += 4;
- bfd_put_32 (htab->params->stub_bfd, BCTR, p);
+ bfd_put_32 (obfd, BCTR, p);
}
p += 4;
+ if (is_tga)
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
+
if (info->emitrelocations)
{
bfd_vma roff = relp - stub_entry->group->stub_sec->contents;
@@ -11752,33 +11789,6 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
return FALSE;
}
}
-
- if (htab->params->power10_stubs == 0
- && htab->glink_eh_frame != NULL
- && htab->glink_eh_frame->size != 0)
- {
- bfd_byte *base, *eh;
- unsigned int lr_used, delta;
-
- base = (htab->glink_eh_frame->contents
- + stub_entry->group->eh_base + 17);
- eh = base + stub_entry->group->eh_size;
- lr_used = stub_entry->stub_offset + 8;
- if (stub_entry->stub_type == ppc_stub_long_branch_both
- || stub_entry->stub_type == ppc_stub_plt_branch_both
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- lr_used += 4;
- delta = lr_used - stub_entry->group->lr_restore;
- stub_entry->group->lr_restore = lr_used + 8;
- eh = eh_advance (htab->elf.dynobj, eh, delta);
- *eh++ = DW_CFA_register;
- *eh++ = 65;
- *eh++ = 12;
- *eh++ = DW_CFA_advance_loc + 2;
- *eh++ = DW_CFA_restore_extended;
- *eh++ = 65;
- stub_entry->group->eh_size = eh - base;
- }
break;
case ppc_stub_plt_call:
@@ -11847,12 +11857,20 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
r[0].r_offset += 2;
r[0].r_addend = targ;
}
- if (stub_entry->h != NULL
- && is_tls_get_addr (&stub_entry->h->elf, htab)
- && htab->params->tls_get_addr_opt)
- p = build_tls_get_addr_stub (htab, stub_entry, loc, off, r);
- else
- p = build_plt_stub (htab, stub_entry, loc, off, r);
+ p = loc;
+ obfd = htab->params->stub_bfd;
+ is_tga = (stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt);
+ if (is_tga)
+ {
+ p = build_tls_get_addr_head (htab, stub_entry, p);
+ if (r != NULL)
+ r[0].r_offset += p - loc;
+ }
+ p = build_plt_stub (htab, stub_entry, p, off, r);
+ if (is_tga)
+ p = build_tls_get_addr_tail (htab, stub_entry, p, loc);
break;
case ppc_stub_save_res:
@@ -12148,11 +12166,18 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
case ppc_stub_plt_call_notoc:
case ppc_stub_plt_call_both:
- off = (stub_entry->stub_offset
- + stub_entry->group->stub_sec->output_offset
- + stub_entry->group->stub_sec->output_section->vma);
+ lr_used = 0;
+ if (is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt)
+ {
+ lr_used += 7 * 4;
+ if (!htab->params->no_tls_get_addr_regsave)
+ lr_used += 11 * 4;
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
+ lr_used += 2 * 4;
+ }
if (stub_entry->stub_type == ppc_stub_plt_call_both)
- off += 4;
+ lr_used += 4;
targ = stub_entry->plt_ent->plt.offset & ~1;
if (targ >= (bfd_vma) -2)
abort ();
@@ -12168,16 +12193,21 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
plt = htab->pltlocal;
}
targ += plt->output_offset + plt->output_section->vma;
+ off = (stub_entry->stub_offset
+ + stub_entry->group->stub_sec->output_offset
+ + stub_entry->group->stub_sec->output_section->vma
+ + lr_used);
odd = off & 4;
off = targ - off;
if (htab->params->plt_stub_align != 0)
{
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, odd);
stub_entry->group->stub_sec->size += pad;
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
off -= pad;
+ odd ^= pad & 4;
}
if (info->emitrelocations)
@@ -12191,15 +12221,13 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
stub_entry->group->stub_sec->flags |= SEC_RELOC;
}
- size = plt_stub_size (htab, stub_entry, off);
+ size = plt_stub_size (htab, stub_entry, off, odd);
if (htab->params->power10_stubs == 0)
{
/* After the bcl, lr has been modified so we need to emit
.eh_frame info saying the return address is in r12. */
- lr_used = stub_entry->stub_offset + 8;
- if (stub_entry->stub_type == ppc_stub_plt_call_both)
- lr_used += 4;
+ lr_used += stub_entry->stub_offset + 8;
/* The eh_frame info will consist of a DW_CFA_advance_loc or
variant, DW_CFA_register, 65, 12, DW_CFA_advance_loc+2,
DW_CFA_restore_extended 65. */
@@ -12207,6 +12235,29 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
stub_entry->group->lr_restore = lr_used + 8;
}
+ if ((stub_entry->stub_type == ppc_stub_plt_call_notoc
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
+ && htab->params->tls_get_addr_opt)
+ {
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
+ delta = cfa_updt - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta);
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
+ stub_entry->group->lr_restore
+ = stub_entry->stub_offset + size - 4;
+ }
+ else if (stub_entry->stub_type == ppc_stub_plt_call_both)
+ {
+ lr_used = stub_entry->stub_offset + size - 20;
+ delta = lr_used - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta) + 6;
+ stub_entry->group->lr_restore
+ = stub_entry->stub_offset + size - 4;
+ }
+ }
break;
case ppc_stub_plt_call:
@@ -12232,7 +12283,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
if (htab->params->plt_stub_align != 0)
{
- unsigned pad = plt_stub_pad (htab, stub_entry, off);
+ unsigned pad = plt_stub_pad (htab, stub_entry, off, 0);
stub_entry->group->stub_sec->size += pad;
stub_entry->stub_offset = stub_entry->group->stub_sec->size;
@@ -12249,14 +12300,22 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
stub_entry->group->stub_sec->flags |= SEC_RELOC;
}
- size = plt_stub_size (htab, stub_entry, off);
+ size = plt_stub_size (htab, stub_entry, off, 0);
if (stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt
&& stub_entry->stub_type == ppc_stub_plt_call_r2save)
{
- if (htab->params->no_tls_get_addr_regsave)
+ if (!htab->params->no_tls_get_addr_regsave)
+ {
+ /* Adjustments to r1 need to be described. */
+ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
+ delta = cfa_updt - stub_entry->group->lr_restore;
+ stub_entry->group->eh_size += eh_advance_size (delta);
+ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
+ }
+ else
{
lr_used = stub_entry->stub_offset + size - 20;
/* The eh_frame info will consist of a DW_CFA_advance_loc
@@ -12265,15 +12324,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
delta = lr_used - stub_entry->group->lr_restore;
stub_entry->group->eh_size += eh_advance_size (delta) + 6;
}
- else
- {
- /* Adjustments to r1 need to be described. */
- unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4;
- delta = cfa_updt - stub_entry->group->lr_restore;
- stub_entry->group->eh_size += eh_advance_size (delta);
- stub_entry->group->eh_size += htab->opd_abi ? 36 : 35;
- }
- stub_entry->group->lr_restore = size - 4;
+ stub_entry->group->lr_restore = stub_entry->stub_offset + size - 4;
}
break;
@@ -15885,22 +15936,25 @@ ppc64_elf_relocate_section (bfd *output_bfd,
addend = 0;
reloc_dest = DEST_STUB;
- if (((stub_entry->stub_type == ppc_stub_plt_call
- && ALWAYS_EMIT_R2SAVE)
- || stub_entry->stub_type == ppc_stub_plt_call_r2save
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- && !(h != NULL
- && is_tls_get_addr (&h->elf, htab)
- && htab->params->tls_get_addr_opt)
- && rel + 1 < relend
- && rel[1].r_offset == rel->r_offset + 4
- && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
- relocation += 4;
- else if ((stub_entry->stub_type == ppc_stub_long_branch_both
- || stub_entry->stub_type == ppc_stub_plt_branch_both
- || stub_entry->stub_type == ppc_stub_plt_call_both)
- && r_type == R_PPC64_REL24_NOTOC)
- relocation += 4;
+ if ((((stub_entry->stub_type == ppc_stub_plt_call
+ && ALWAYS_EMIT_R2SAVE)
+ || stub_entry->stub_type == ppc_stub_plt_call_r2save
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && rel + 1 < relend
+ && rel[1].r_offset == rel->r_offset + 4
+ && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE)
+ || ((stub_entry->stub_type == ppc_stub_long_branch_both
+ || stub_entry->stub_type == ppc_stub_plt_branch_both
+ || stub_entry->stub_type == ppc_stub_plt_call_both)
+ && r_type == R_PPC64_REL24_NOTOC))
+ {
+ /* Skip over the r2 store at the start of the stub. */
+ if (!(stub_entry->stub_type >= ppc_stub_plt_call
+ && htab->params->tls_get_addr_opt
+ && h != NULL
+ && is_tls_get_addr (&h->elf, htab)))
+ relocation += 4;
+ }
if (r_type == R_PPC64_REL24_NOTOC
&& (stub_entry->stub_type == ppc_stub_plt_call_notoc
--
2.21.3

296
0001-PowerPC64-no-pcrel-optimize.patch Normal file
View File

@ -0,0 +1,296 @@
From c39dc246d44f9bc6e29bb4b2a0d692d27a0e913a Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 12 Aug 2020 23:31:28 +0930
Subject: [PATCH] PowerPC64 --no-pcrel-optimize
This new option effectively ignores R_PPC64_PCREL_OPT, disabling the
optimization of instructions marked by that relocation. The patch
also disables GOT indirect to GOT/TOC pointer relative code editing
when --no-toc-optimize.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
* elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT
optimization when --no-pcrel-optimize.
ld/
* emultempl/ppc64elf.em (params): Init new field.
(enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
(PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
(cherry picked from commit 6738c8a7c93cd77a0caa720c6cc21c422561be2c)
---
bfd/ChangeLog | 9 +++
bfd/elf64-ppc.c | 116 +++++++++++++++++++--------------------
bfd/elf64-ppc.h | 3 +
ld/ChangeLog | 9 +++
ld/emultempl/ppc64elf.em | 12 +++-
5 files changed, 90 insertions(+), 59 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 7608f9b0ba..825d5e6d4a 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,12 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2020-08-13 Alan Modra <amodra@gmail.com>
+ * elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
+ * elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
+ optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT
+ optimization when --no-pcrel-optimize.
+
2020-09-19 Nick Clifton <nickc@redhat.com>
* development.sh (development): Set to true.
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 4bf37e1d98..faf4989659 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -15944,7 +15944,8 @@ ppc64_elf_relocate_section (bfd *output_bfd,
break;
case R_PPC64_GOT16_DS:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x8000 < 0x10000
@@ -15963,7 +15964,8 @@ ppc64_elf_relocate_section (bfd *output_bfd,
case R_PPC64_GOT16_LO_DS:
case R_PPC64_GOT16_HA:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL
@@ -15986,34 +15988,38 @@ ppc64_elf_relocate_section (bfd *output_bfd,
break;
case R_PPC64_GOT_PCREL34:
- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC)
+ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC
+ || !htab->do_toc_opt)
break;
from = (rel->r_offset
+ input_section->output_section->vma
+ input_section->output_offset);
- if (relocation - from + (1ULL << 33) < 1ULL << 34
- && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
- {
- offset = rel->r_offset;
- pinsn = bfd_get_32 (input_bfd, contents + offset);
- pinsn <<= 32;
- pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
- if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
- == ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
- {
- /* Replace with paddi. */
- pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
- r_type = R_PPC64_PCREL34;
- rel->r_info = ELF64_R_INFO (r_symndx, r_type);
- bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
- bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
- goto pcrelopt;
- }
- }
- break;
+ if (!(relocation - from + (1ULL << 33) < 1ULL << 34
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf)))
+ break;
+
+ offset = rel->r_offset;
+ pinsn = bfd_get_32 (input_bfd, contents + offset);
+ pinsn <<= 32;
+ pinsn |= bfd_get_32 (input_bfd, contents + offset + 4);
+ if ((pinsn & ((-1ULL << 50) | (63ULL << 26)))
+ != ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */))
+ break;
+
+ /* Replace with paddi. */
+ pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26);
+ r_type = R_PPC64_PCREL34;
+ rel->r_info = ELF64_R_INFO (r_symndx, r_type);
+ bfd_put_32 (input_bfd, pinsn >> 32, contents + offset);
+ bfd_put_32 (input_bfd, pinsn, contents + offset + 4);
+ /* Fall through. */
case R_PPC64_PCREL34:
- if (SYMBOL_REFERENCES_LOCAL (info, &h->elf))
+ if (!htab->params->no_pcrel_opt
+ && rel + 1 < relend
+ && rel[1].r_offset == rel->r_offset
+ && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT)
+ && SYMBOL_REFERENCES_LOCAL (info, &h->elf))
{
offset = rel->r_offset;
pinsn = bfd_get_32 (input_bfd, contents + offset);
@@ -16023,43 +16029,37 @@ ppc64_elf_relocate_section (bfd *output_bfd,
== ((1ULL << 58) | (2ULL << 56) | (1ULL << 52)
| (14ULL << 26) /* paddi */))
{
- pcrelopt:
- if (rel + 1 < relend
- && rel[1].r_offset == offset
- && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT))
+ bfd_vma off2 = rel[1].r_addend;
+ if (off2 == 0)
+ /* zero means next insn. */
+ off2 = 8;
+ off2 += offset;
+ if (off2 + 4 <= input_section->size)
{
- bfd_vma off2 = rel[1].r_addend;
- if (off2 == 0)
- /* zero means next insn. */
- off2 = 8;
- off2 += offset;
- if (off2 + 4 <= input_section->size)
+ uint64_t pinsn2;
+ bfd_signed_vma addend_off;
+ pinsn2 = bfd_get_32 (input_bfd, contents + off2);
+ pinsn2 <<= 32;
+ if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
{
- uint64_t pinsn2;
- bfd_signed_vma addend_off;
- pinsn2 = bfd_get_32 (input_bfd, contents + off2);
- pinsn2 <<= 32;
+ if (off2 + 8 > input_section->size)
+ break;
+ pinsn2 |= bfd_get_32 (input_bfd,
+ contents + off2 + 4);
+ }
+ if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
+ {
+ addend += addend_off;
+ rel->r_addend = addend;
+ bfd_put_32 (input_bfd, pinsn >> 32,
+ contents + offset);
+ bfd_put_32 (input_bfd, pinsn,
+ contents + offset + 4);
+ bfd_put_32 (input_bfd, pinsn2 >> 32,
+ contents + off2);
if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
- {
- if (off2 + 8 > input_section->size)
- break;
- pinsn2 |= bfd_get_32 (input_bfd,
- contents + off2 + 4);
- }
- if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off))
- {
- addend += addend_off;
- rel->r_addend = addend;
- bfd_put_32 (input_bfd, pinsn >> 32,
- contents + offset);
- bfd_put_32 (input_bfd, pinsn,
- contents + offset + 4);
- bfd_put_32 (input_bfd, pinsn2 >> 32,
- contents + off2);
- if ((pinsn2 & (63ULL << 58)) == 1ULL << 58)
- bfd_put_32 (input_bfd, pinsn2,
- contents + off2 + 4);
- }
+ bfd_put_32 (input_bfd, pinsn2,
+ contents + off2 + 4);
}
}
}
diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h
index 547971f8be..a7230de81c 100644
--- a/bfd/elf64-ppc.h
+++ b/bfd/elf64-ppc.h
@@ -57,6 +57,9 @@ struct ppc64_elf_params
/* Whether to use power10 instructions in linkage stubs. */
int power10_stubs;
+ /* Whether R_PPC64_PCREL_OPT should be ignored. */
+ int no_pcrel_opt;
+
/* Whether to canonicalize .opd so that there are no overlapping
.opd entries. */
int non_overlapping_opd;
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 4eec7d2977..0ee333a860 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,12 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2020-08-13 Alan Modra <amodra@gmail.com>
+ * emultempl/ppc64elf.em (params): Init new field.
+ (enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
+ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
+ (PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
+
2020-09-19 Nick Clifton <nickc@redhat.com>
This is the 2.35.1 point release.
diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em
index 1331d03113..42b9bd48fc 100644
--- a/ld/emultempl/ppc64elf.em
+++ b/ld/emultempl/ppc64elf.em
@@ -38,7 +38,7 @@ static struct ppc64_elf_params params = { NULL,
&ppc_layout_sections_again,
1, -1, -1, 0,
${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5,
- -1, -1, 0, -1, -1, 0};
+ -1, -1, 0, 0, -1, -1, 0};
/* Fake input file for stubs. */
static lang_input_statement_type *stub_file;
@@ -686,6 +686,7 @@ enum ppc64_opt
OPTION_NO_PLT_LOCALENTRY,
OPTION_POWER10_STUBS,
OPTION_NO_POWER10_STUBS,
+ OPTION_NO_PCREL_OPT,
OPTION_STUBSYMS,
OPTION_NO_STUBSYMS,
OPTION_SAVRES,
@@ -717,6 +718,7 @@ PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
{ "plt-localentry", optional_argument, NULL, OPTION_PLT_LOCALENTRY },
{ "no-plt-localentry", no_argument, NULL, OPTION_NO_PLT_LOCALENTRY },
{ "power10-stubs", optional_argument, NULL, OPTION_POWER10_STUBS },
+ { "no-pcrel-optimize", no_argument, NULL, OPTION_NO_PCREL_OPT },
{ "no-power10-stubs", no_argument, NULL, OPTION_NO_POWER10_STUBS },
{ "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS },
{ "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS },
@@ -776,6 +778,9 @@ PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
--power10-stubs [=auto] Use Power10 PLT call stubs (default auto)\n"
));
fprintf (file, _("\
+ --no-pcrel-optimize Don'\''t perform R_PPC64_PCREL_OPT optimization\n"
+ ));
+ fprintf (file, _("\
--no-power10-stubs Don'\''t use Power10 PLT call stubs\n"
));
fprintf (file, _("\
@@ -909,6 +914,10 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
params.power10_stubs = 0;
break;
+ case OPTION_NO_PCREL_OPT:
+ params.no_pcrel_opt = 1;
+ break;
+
case OPTION_STUBSYMS:
params.emit_stub_syms = 1;
break;
@@ -985,6 +994,7 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
params.no_multi_toc = 1;
no_toc_sort = 1;
params.plt_static_chain = 1;
+ params.no_pcrel_opt = 1;
return FALSE;
'
--
2.21.3

501
0001-Prioritise-mtfprd-and-mtvrd-over-mtvsrd-in-PowerPC-d.patch Normal file
View File

@ -0,0 +1,501 @@
From 904570fe6c56165183b07da6a3625538f56b0ccc Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 10 Aug 2020 15:07:33 +0930
Subject: [PATCH] Prioritise mtfprd and mtvrd over mtvsrd in PowerPC
disassembly
gas/
* testsuite/gas/ppc/power8.d: Update.
* testsuite/gas/ppc/vsx2.d: Update.
opcodes/
* ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
mtvsrd, and similarly for mfvsrd.
(cherry picked from commit 5fbec329ec3b21fab7e06cd1e4bf7068332a876c)
---
gas/ChangeLog | 4 +
gas/testsuite/gas/ppc/power8.d | 290 ++++++++++++++++-----------------
gas/testsuite/gas/ppc/vsx2.d | 110 ++++++-------
opcodes/ChangeLog | 7 +
opcodes/ppc-opc.c | 4 +-
5 files changed, 213 insertions(+), 202 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 77b38a1cba..0062d877bd 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,6 +1,10 @@
2020-09-24 Alan Modra <amodra@gmail.com>
Apply from master
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * testsuite/gas/ppc/power8.d: Update.
+ * testsuite/gas/ppc/vsx2.d: Update.
+
2020-08-10 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx,
stswi, or stswx in little-endian mode.
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
index dfd3345461..1439496462 100644
--- a/gas/testsuite/gas/ppc/power8.d
+++ b/gas/testsuite/gas/ppc/power8.d
@@ -7,151 +7,151 @@
Disassembly of section \.text:
0+00 <power8>:
- 0: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
- 4: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
- 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
- c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
- 10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
- 14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
- 18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
- 1c: (7c 00 05 5d|5d 05 00 7c) tend\.
- 20: (7c 00 05 5d|5d 05 00 7c) tend\.
- 24: (7e 00 05 5d|5d 05 00 7e) tendall\.
- 28: (7e 00 05 5d|5d 05 00 7e) tendall\.
- 2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
- 30: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
- 34: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
- 38: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
- 3c: (7c 20 05 dd|dd 05 20 7c) tresume\.
- 40: (7c 20 05 dd|dd 05 20 7c) tresume\.
- 44: (60 42 00 00|00 00 42 60) ori r2,r2,0
- 48: (60 00 00 00|00 00 00 60) nop
- 4c: (60 42 00 00|00 00 42 60) ori r2,r2,0
- 50: (4c 00 01 24|24 01 00 4c) rfebb 0
- 54: (4c 00 09 24|24 09 00 4c) rfebb
- 58: (4c 00 09 24|24 09 00 4c) rfebb
- 5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
- 60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
- 64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
- 68: (4c e2 04 61|61 04 e2 4c) bnetarl\+
- 6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
- 70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
- 74: (7c 00 00 3c|3c 00 00 7c) waitasec
- 78: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
- 7c: (7c 20 01 26|26 01 20 7c) mtsle 1
- 80: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
- 84: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
- 88: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
- 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
- 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
- 94: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
- 98: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
- 9c: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
- a0: (7c 00 03 5c|5c 03 00 7c) clrbhrb
- a4: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
- a8: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
- ac: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
- b0: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
- b4: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
- b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
- bc: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
- c0: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
- c4: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
- c8: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
- cc: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
- d0: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
- d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
- d8: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
- dc: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
- e0: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
- e4: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
- e8: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
- ec: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
- f0: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
- f4: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
- f8: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
- fc: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
- 100: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
- 104: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
- 108: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
- 10c: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
- 110: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
- 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
- 118: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
- 11c: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
- 120: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
- 124: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
- 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
- 12c: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
- 130: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
- 134: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
- 138: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
- 13c: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
- 140: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
- 144: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
- 148: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
- 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
- 150: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
- 154: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
- 158: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
- 15c: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
- 160: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
- 164: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
- 168: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
- 16c: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
- 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
- 174: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
- 178: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
- 17c: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
- 180: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
- 184: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
- 188: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
- 18c: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
- 190: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
- 194: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
- 198: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
- 19c: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
- 1a0: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
- 1a4: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
- 1a8: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
- 1ac: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 1b0: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 1b4: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
- 1b8: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
- 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11
- 1c0: (7f f7 01 a7|a7 01 f7 7f) mtvrwa v31,r23
- 1c4: (7e 1a 01 e6|e6 01 1a 7e) mtfprwz f16,r26
- 1c8: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
- 1cc: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
- 1d0: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
- 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
- 1d8: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
- 1dc: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
- 1e0: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
- 1e4: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
- 1e8: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
- 1ec: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
- 1f0: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
- 1f4: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
- 1f8: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
- 1fc: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
- 200: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
- 204: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
- 208: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
- 20c: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
- 210: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
- 214: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
- 218: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
- 21c: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
- 220: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
- 224: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
- 228: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
- 22c: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
- 230: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
- 234: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
- 238: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
- 23c: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
- 240: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
+.*: (7c 05 07 1d|1d 07 05 7c) tabort\. r5
+.*: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16
+.*: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
+.*: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
+.*: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
+.*: (7c 00 05 1d|1d 05 00 7c) tbegin\.
+.*: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
+.*: (7c 00 05 5d|5d 05 00 7c) tend\.
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
+.*: (7e 00 05 5d|5d 05 00 7e) tendall\.
+.*: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
+.*: (7c 00 07 dd|dd 07 00 7c) trechkpt\.
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
+.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\.
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
+.*: (7c 20 05 dd|dd 05 20 7c) tresume\.
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
+.*: (4c 00 01 24|24 01 00 4c) rfebb 0
+.*: (4c 00 09 24|24 09 00 4c) rfebb
+.*: (4c 00 09 24|24 09 00 4c) rfebb
+.*: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
+.*: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
+.*: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
+.*: (4c e2 04 61|61 04 e2 4c) bnetarl\+
+.*: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
+.*: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
+.*: (7c 00 00 3c|3c 00 00 7c) waitasec
+.*: (7c 00 41 1c|1c 41 00 7c) msgsndp r8
+.*: (7c 20 01 26|26 01 20 7c) mtsle 1
+.*: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27
+.*: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12
+.*: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7
+.*: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
+.*: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
+.*: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6
+.*: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16
+.*: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7
+.*: (7c 00 03 5c|5c 03 00 7c) clrbhrb
+.*: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23
+.*: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4
+.*: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2
+.*: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19
+.*: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29
+.*: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13
+.*: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26
+.*: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28
+.*: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1
+.*: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1
+.*: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11
+.*: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30
+.*: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13
+.*: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4
+.*: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4
+.*: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21
+.*: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19
+.*: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15
+.*: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2
+.*: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9
+.*: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11
+.*: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11
+.*: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1
+.*: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12
+.*: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1
+.*: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16
+.*: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20
+.*: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29
+.*: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13
+.*: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18
+.*: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22
+.*: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7
+.*: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22
+.*: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13
+.*: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16
+.*: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5
+.*: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31
+.*: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27
+.*: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23
+.*: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9
+.*: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27
+.*: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24
+.*: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13
+.*: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7
+.*: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0
+.*: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26
+.*: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6
+.*: (13 95 76 84|84 76 95 13) veqv v28,v21,v14
+.*: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19
+.*: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10
+.*: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14
+.*: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13
+.*: (11 c0 87 02|02 87 c0 11) vclzb v14,v16
+.*: (12 80 df 03|03 df 80 12) vpopcntb v20,v27
+.*: (13 80 5f 42|42 5f 80 13) vclzh v28,v11
+.*: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9
+.*: (13 60 ff 82|82 ff 60 13) vclzw v27,v31
+.*: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19
+.*: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29
+.*: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22
+.*: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29
+.*: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
+.*: (7e 0b 01 67|67 01 0b 7e) (mtvrd v16,r11|mtvsrd vs48,r11)
+.*: (7f f7 01 a7|a7 01 f7 7f) (mtvrwa v31,r23|mtvsrwa vs63,r23)
+.*: (7e 1a 01 e6|e6 01 1a 7e) (mtfprwz f16,r26|mtvsrwz vs16,r26)
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
+.*: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
+.*: (7c 00 b9 dc|dc b9 00 7c) msgclr r23
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
.*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5
.*: (7d 54 36 98|98 36 54 7d) lxvd2x vs10,r20,r6
diff --git a/gas/testsuite/gas/ppc/vsx2.d b/gas/testsuite/gas/ppc/vsx2.d
index e7ea585262..4f0b25bd47 100644
--- a/gas/testsuite/gas/ppc/vsx2.d
+++ b/gas/testsuite/gas/ppc/vsx2.d
@@ -7,59 +7,59 @@
Disassembly of section \.text:
0+00 <vsx2>:
- 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
- 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
- 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
- c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
- 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
- 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30
- 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62
- 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12
- 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
- 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12
- 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
- 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
- 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
- 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28
- 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
- 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29
- 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
- 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22
- 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
- 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23
- 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
- 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27
- 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
- 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28
- 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
- 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
- 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
- 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
- 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
- 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
- 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
- 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
- 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
- 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
- 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
- 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
- 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
- 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
- a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
- a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
- a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
- ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
- b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
- b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
- b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
- bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
- c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
- c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
- c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
- cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
- d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
- d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
- d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
+.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26
+.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25
+.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26
+.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
+.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30)
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12)
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
+.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44)
+.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14
+.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
+.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28)
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
+.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29)
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
+.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22)
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
+.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23)
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
+.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27)
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
+.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28)
+.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13
+.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13
+.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4
+.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
+.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25
+.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1
+.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42
+.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52
+.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59
+.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41
+.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32
+.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26
+.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6
+.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55
+.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8
+.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33
+.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30
+.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31
+.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58
+.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44
+.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29
+.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30
+.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54
+.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45
+.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59
+.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49
+.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26
+.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2
+.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5
#pass
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b53a2bba98..30593769d4 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2020-09-24 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2020-08-10 Alan Modra <amodra@gmail.com>
+ * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
+ mtvsrd, and similarly for mfvsrd.
+
2020-09-19 Nick Clifton <nickc@redhat.com>
This is the 2.35.1 point release.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 6932e4e820..a830c4c0fd 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -6302,9 +6302,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
{"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}},
-{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}},
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
+{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
{"lbarx", X(31,52), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}},
@@ -6489,9 +6489,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}},
-{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
+{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
{"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
--
2.21.3

66
0001-Re-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv.patch Normal file
View File

@ -0,0 +1,66 @@
From 39f2c1f7b80a30297e93f04c885b444e5a874372 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Mon, 28 Sep 2020 09:30:19 +0930
Subject: [PATCH] Re: PR26656, power10 libstdc++.so segfault in
__cxxabiv1::__cxa_throw
Some missing NULL checks meant a stub for a local symbol used a stub
looking like the __tls_get_addr_opt stub.
PR 26656
* elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
NULL stub_entry->h before calling is_tls_get_addr.
(cherry picked from commit 12cf8b93da0ae155643d262235486fde5af72a80)
---
bfd/ChangeLog | 6 ++++++
bfd/elf64-ppc.c | 5 ++++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 01ccac443e..dd6d8fdd03 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2020-09-28 Alan Modra <amodra@gmail.com>
+
+ PR 26656
+ * elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
+ NULL stub_entry->h before calling is_tls_get_addr.
+
2020-09-26 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index f4d0c88c7a..0aeda47e57 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -11674,6 +11674,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
obfd = htab->params->stub_bfd;
is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|| stub_entry->stub_type == ppc_stub_plt_call_both)
+ && stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt);
if (is_tga)
@@ -12184,7 +12185,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
case ppc_stub_plt_call_notoc:
case ppc_stub_plt_call_both:
lr_used = 0;
- if (is_tls_get_addr (&stub_entry->h->elf, htab)
+ if (stub_entry->h != NULL
+ && is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt)
{
lr_used += 7 * 4;
@@ -12254,6 +12256,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
}
if ((stub_entry->stub_type == ppc_stub_plt_call_notoc
|| stub_entry->stub_type == ppc_stub_plt_call_both)
+ && stub_entry->h != NULL
&& is_tls_get_addr (&stub_entry->h->elf, htab)
&& htab->params->tls_get_addr_opt)
{
--
2.21.3

236
binutils-2.20.51.0.2-libtool-lib64.patch Normal file
View File

@ -0,0 +1,236 @@
diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
--- a/bfd/configure 2010-04-08 14:53:48.000000000 +0100
+++ b/bfd/configure 2010-04-08 14:56:50.000000000 +0100
@@ -10762,10 +10762,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure
--- a/binutils/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/binutils/configure 2010-04-08 14:56:21.000000000 +0100
@@ -10560,10 +10560,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure
--- a/gas/configure 2010-04-08 14:53:47.000000000 +0100
+++ b/gas/configure 2010-04-08 14:57:24.000000000 +0100
@@ -10547,10 +10547,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure
--- a/gprof/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/gprof/configure 2010-04-08 14:57:50.000000000 +0100
@@ -10485,10 +10485,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure
--- a/ld/configure 2010-04-08 14:53:44.000000000 +0100
+++ b/ld/configure 2010-04-08 14:58:21.000000000 +0100
@@ -10966,10 +10966,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
Only in .: .#libtool.m4
Only in .: #libtool.m4#
diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure
--- a/opcodes/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/opcodes/configure 2010-04-08 14:59:10.000000000 +0100
@@ -10496,10 +10496,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on

28
binutils-2.22.52.0.4-no-config-h-check.patch Normal file
View File

@ -0,0 +1,28 @@
--- a/bfd/bfd-in.h 2012-08-02 10:56:34.561769686 +0100
+++ b/bfd/bfd-in.h 2012-08-02 11:13:27.134797755 +0100
@@ -25,11 +25,6 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
-/* PR 14072: Ensure that config.h is included first. */
-#if !defined PACKAGE && !defined PACKAGE_VERSION
-#error config.h must be included before this header
-#endif
-
#ifdef __cplusplus
extern "C" {
#endif
--- a/bfd/bfd-in2.h 2012-08-02 10:56:34.349769680 +0100
+++ b/bfd/bfd-in2.h 2012-08-02 11:13:40.015798113 +0100
@@ -32,11 +32,6 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
-/* PR 14072: Ensure that config.h is included first. */
-#if !defined PACKAGE && !defined PACKAGE_VERSION
-#error config.h must be included before this header
-#endif
-
#ifdef __cplusplus
extern "C" {
#endif

38
binutils-2.25-set-long-long.patch Normal file
View File

@ -0,0 +1,38 @@
diff -up binutils-2.25.orig/bfd/configure.ac binutils-2.25/bfd/configure.ac
--- binutils-2.25.orig/bfd/configure.ac 2014-12-24 10:34:45.590491143 +0000
+++ binutils-2.25/bfd/configure.ac 2014-12-24 10:36:12.997981992 +0000
@@ -183,11 +183,13 @@ if test "x${ac_cv_sizeof_long}" = "x8";
BFD_HOST_64BIT_LONG=1
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
+fi
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
BFD_HOST_64BIT_LONG_LONG=1
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
BFD_HOSTPTR_T="unsigned long long"
fi
fi
diff -up ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
--- a/bfd/configure 2010-04-08 15:23:58.000000000 +0100
+++ b/bfd/configure 2010-04-08 15:24:06.000000000 +0100
@@ -12819,11 +12819,13 @@
BFD_HOST_64BIT_LONG=1
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
+fi
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
BFD_HOST_64BIT_LONG_LONG=1
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
BFD_HOSTPTR_T="unsigned long long"
fi
fi

44
binutils-2.25-version.patch Normal file
View File

@ -0,0 +1,44 @@
--- binutils-2.26.orig/bfd/Makefile.am 2016-01-25 10:11:33.505289018 +0000
+++ binutils-2.26/bfd/Makefile.am 2016-01-25 10:13:23.489964145 +0000
@@ -1043,8 +1043,8 @@ DISTCLEANFILES = $(BUILD_CFILES) $(BUILD
bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in
@echo "creating $@"
@bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\
- bfd_version_string="\"$(VERSION)\"" ;\
- bfd_soversion="$(VERSION)" ;\
+ bfd_version_string="\"$(VERSION)-%{release}\"" ;\
+ bfd_soversion="$(VERSION)-%{release}" ;\
bfd_version_package="\"$(PKGVERSION)\"" ;\
report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\
. $(srcdir)/development.sh ;\
@@ -1055,7 +1055,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/
fi ;\
$(SED) -e "s,@bfd_version@,$$bfd_version," \
-e "s,@bfd_version_string@,$$bfd_version_string," \
- -e "s,@bfd_version_package@,$$bfd_version_package," \
+ -e "s,@bfd_version_package@,\"version \"," \
-e "s,@report_bugs_to@,$$report_bugs_to," \
< $(srcdir)/version.h > $@; \
echo "$${bfd_soversion}" > libtool-soversion
--- binutils-2.26.orig/bfd/Makefile.in 2016-01-25 10:11:33.505289018 +0000
+++ binutils-2.26/bfd/Makefile.in 2016-01-25 10:14:17.818297941 +0000
@@ -2111,8 +2111,8 @@ stmp-lcoff-h: $(LIBCOFF_H_FILES)
bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in
@echo "creating $@"
@bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\
- bfd_version_string="\"$(VERSION)\"" ;\
- bfd_soversion="$(VERSION)" ;\
+ bfd_version_string="\"$(VERSION)-%{release}\"" ;\
+ bfd_soversion="$(VERSION)-%{release}" ;\
bfd_version_package="\"$(PKGVERSION)\"" ;\
report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\
. $(srcdir)/development.sh ;\
@@ -2123,7 +2123,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/
fi ;\
$(SED) -e "s,@bfd_version@,$$bfd_version," \
-e "s,@bfd_version_string@,$$bfd_version_string," \
- -e "s,@bfd_version_package@,$$bfd_version_package," \
+ -e "s,@bfd_version_package@,\"version \"," \
-e "s,@report_bugs_to@,$$report_bugs_to," \
< $(srcdir)/version.h > $@; \
echo "$${bfd_soversion}" > libtool-soversion

11
binutils-2.27-aarch64-ifunc.patch Normal file
View File

@ -0,0 +1,11 @@
diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.27/bfd/elfnn-aarch64.c
--- binutils.orig/bfd/elfnn-aarch64.c 2017-02-21 10:45:19.311956006 +0000
+++ binutils-2.27/bfd/elfnn-aarch64.c 2017-02-21 11:55:07.517922655 +0000
@@ -4947,6 +4947,7 @@ elfNN_aarch64_final_link_relocate (reloc
it here if it is defined in a non-shared object. */
if (h != NULL
&& h->type == STT_GNU_IFUNC
+ && (input_section->flags & SEC_ALLOC)
&& h->def_regular)
{
asection *plt;

123
binutils-2.29-filename-in-error-messages.patch Normal file
View File

@ -0,0 +1,123 @@
--- binutils.orig/binutils/readelf.c 2020-07-24 14:55:25.163647522 +0100
+++ binutils-2.35/binutils/readelf.c 2020-07-24 15:02:39.613851369 +0100
@@ -20729,79 +20729,92 @@ process_file (char * file_name)
Filedata * filedata = NULL;
struct stat statbuf;
char armag[SARMAG];
- bfd_boolean ret = TRUE;
+ bfd_boolean ret = FALSE;
+ char * name;
+ char * saved_program_name;
+
+ /* Overload program_name to include file_name. Doing this means
+ that warning/error messages will positively identify the file
+ concerned even when multiple instances of readelf are running. */
+ name = xmalloc (strlen (program_name) + strlen (file_name) + 3);
+ sprintf (name, "%s: %s", program_name, file_name);
+ saved_program_name = program_name;
+ program_name = name;
if (stat (file_name, &statbuf) < 0)
{
if (errno == ENOENT)
- error (_("'%s': No such file\n"), file_name);
+ error (_("No such file\n"));
else
- error (_("Could not locate '%s'. System error message: %s\n"),
- file_name, strerror (errno));
- return FALSE;
+ error (_("Could not locate file. System error message: %s\n"),
+ strerror (errno));
+ goto done;
}
if (! S_ISREG (statbuf.st_mode))
{
- error (_("'%s' is not an ordinary file\n"), file_name);
- return FALSE;
+ error (_("Not an ordinary file\n"));
+ goto done;
}
filedata = calloc (1, sizeof * filedata);
if (filedata == NULL)
{
error (_("Out of memory allocating file data structure\n"));
- return FALSE;
+ goto done;
}
filedata->file_name = file_name;
filedata->handle = fopen (file_name, "rb");
if (filedata->handle == NULL)
{
- error (_("Input file '%s' is not readable.\n"), file_name);
- free (filedata);
- return FALSE;
+ error (_("Not readable\n"));
+ goto done;
}
if (fread (armag, SARMAG, 1, filedata->handle) != 1)
{
- error (_("%s: Failed to read file's magic number\n"), file_name);
+ error (_("Failed to read file's magic number\n"));
fclose (filedata->handle);
- free (filedata);
- return FALSE;
+ goto done;
}
filedata->file_size = (bfd_size_type) statbuf.st_size;
if (memcmp (armag, ARMAG, SARMAG) == 0)
{
- if (! process_archive (filedata, FALSE))
- ret = FALSE;
+ if (process_archive (filedata, FALSE))
+ ret = TRUE;
}
else if (memcmp (armag, ARMAGT, SARMAG) == 0)
{
- if ( ! process_archive (filedata, TRUE))
- ret = FALSE;
+ if (process_archive (filedata, TRUE))
+ ret = TRUE;
}
else
{
if (do_archive_index && !check_all)
- error (_("File %s is not an archive so its index cannot be displayed.\n"),
- file_name);
+ error (_("Not an archive so its index cannot be displayed.\n"));
rewind (filedata->handle);
filedata->archive_file_size = filedata->archive_file_offset = 0;
- if (! process_object (filedata))
- ret = FALSE;
+ if (process_object (filedata))
+ ret = TRUE;
}
- fclose (filedata->handle);
- free (filedata->section_headers);
- free (filedata->program_headers);
- free (filedata->string_table);
- free (filedata->dump.dump_sects);
- free (filedata);
+ done:
+ if (filedata)
+ {
+ fclose (filedata->handle);
+ free (filedata->section_headers);
+ free (filedata->program_headers);
+ free (filedata->string_table);
+ free (filedata->dump.dump_sects);
+ free (filedata);
+ }
+ free (program_name);
+ program_name = saved_program_name;
free (ba_cache.strtab);
ba_cache.strtab = NULL;

265
binutils-2.29-revert-PLT-elision.patch Normal file
View File

@ -0,0 +1,265 @@
diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d
--- binutils.orig/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 13:32:39.335065263 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 15:03:55.649727195 +0000
@@ -2,6 +2,7 @@
#readelf: -S --wide
#as: --32
+#pass
#...
+\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.*
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d
--- binutils.orig/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 13:32:39.329065335 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 15:04:20.803430034 +0000
@@ -3,7 +3,6 @@
#readelf: -d --wide
#as: --32
-#failif
#...
+0x[0-9a-f]+ +\(PLTREL.*
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d
--- binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 13:32:39.336065251 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 15:03:00.413379749 +0000
@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse
[0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func
-
+#...
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size Type +Bind +Vis +Ndx Name
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d
--- binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 13:32:39.330065323 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 15:03:28.928042882 +0000
@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse
[0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func
-
+#...
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size Type +Bind +Vis +Ndx Name
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d
--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 13:32:39.415064300 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 15:08:39.333375801 +0000
@@ -2,8 +2,4 @@
#readelf: -S --wide
#as: --64
-#...
- +\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.*
-#...
- +\[ *[0-9]+\] \.got\.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+18 +.*
#pass
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d
--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 13:32:39.404064432 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 15:08:59.031143095 +0000
@@ -3,7 +3,6 @@
#readelf: -d --wide
#as: --64
-#failif
#...
+0x[0-9a-f]+ +\(PLTREL.*
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/plt-main-bnd.dd binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main-bnd.dd
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-bnd.dd 2017-11-15 13:32:39.405064420 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main-bnd.dd 2017-11-15 15:06:53.694623801 +0000
@@ -1,7 +1,4 @@
-#...
-Disassembly of section .plt.got:
-[a-f0-9]+ <[a-z_]+@plt>:
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <.*>
+#...
[ ]*[a-f0-9]+: 90 nop
#pass
diff -rup binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 13:32:39.407064397 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 15:06:17.244054423 +0000
@@ -1,4 +1,3 @@
-#failif
#...
[0-9a-f ]+R_X86_64_JUMP_SLOT +0+ +bar \+ 0
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 13:32:39.412064336 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 15:15:09.918750288 +0000
@@ -20,6 +20,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
+#pass
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 13:32:39.413064324 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 15:16:08.227055104 +0000
@@ -20,6 +20,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
+#pass
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 13:32:39.413064324 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 15:16:20.115913358 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 13:32:39.411064348 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 15:16:29.012807282 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038a.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038a.d 2017-11-15 13:32:39.408064384 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a.d 2017-11-15 15:19:48.097433680 +0000
@@ -19,7 +19,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038a-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038a-now.d 2017-11-15 13:32:39.401064469 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a-now.d 2017-11-15 15:10:56.077760324 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038b.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038b.d 2017-11-15 13:32:39.405064420 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b.d 2017-11-15 15:10:42.828916844 +0000
@@ -19,6 +19,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
+#pass
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001d8..00000000000001dd
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038b-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038b-now.d 2017-11-15 13:32:39.416064288 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b-now.d 2017-11-15 15:11:11.550577531 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001d8..00000000000001dd
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038c.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038c.d 2017-11-15 13:32:39.411064348 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c.d 2017-11-15 15:09:52.664509478 +0000
@@ -19,7 +19,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000014 0000001c FDE cie=00000000 pc=0000000000000220..0000000000000231
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038c-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr21038c-now.d 2017-11-15 13:32:39.413064324 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c-now.d 2017-11-15 15:11:22.975442559 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000014 0000001c FDE cie=00000000 pc=0000000000000220..0000000000000231
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd
--- binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 13:32:39.417064276 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 15:05:02.950932110 +0000
@@ -14,6 +14,7 @@ Section Headers:
+\[[ 0-9]+\] .dynsym +.*
+\[[ 0-9]+\] .dynstr +.*
+\[[ 0-9]+\] .rela.dyn +.*
+#pass
+\[[ 0-9]+\] .plt +.*
+\[[ 0-9]+\] .plt.got +.*
+\[[ 0-9]+\] .text +PROGBITS +0+1000 0+1000 0+31a 00 +AX +0 +0 4096
--- binutils.orig/bfd/elfxx-x86.c 2018-01-22 15:59:25.875788033 +0000
+++ binutils-2.30.0/bfd/elfxx-x86.c 2018-01-22 16:00:20.789146597 +0000
@@ -107,7 +107,7 @@ elf_x86_allocate_dynrelocs (struct elf_l
plt_entry_size = htab->plt.plt_entry_size;
resolved_to_zero = UNDEFINED_WEAK_RESOLVED_TO_ZERO (info, eh);
-
+#if 0
/* We can't use the GOT PLT if pointer equality is needed since
finish_dynamic_symbol won't clear symbol value and the dynamic
linker won't update the GOT slot. We will get into an infinite
@@ -125,7 +125,7 @@ elf_x86_allocate_dynrelocs (struct elf_l
/* Use the GOT PLT. */
eh->plt_got.refcount = 1;
}
-
+#endif
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
here if it is defined and referenced in a non-shared object. */
if (h->type == STT_GNU_IFUNC
--- binutils.orig/ld/testsuite/ld-i386/pr20830.d 2018-07-09 09:49:51.277239857 +0100
+++ binutils-2.30.90/ld/testsuite/ld-i386/pr20830.d 2018-07-09 10:32:41.113356733 +0100
@@ -19,7 +19,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r8 \(eip\) at cfa-4
DW_CFA_nop
DW_CFA_nop
-
+#pass
0+18 00000010 0000001c FDE cie=00000000 pc=00000128..00000133
DW_CFA_nop
DW_CFA_nop
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2020-07-24 14:55:25.370646189 +0100
+++ binutils-2.35/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2020-07-24 15:06:58.124189348 +0100
@@ -1,7 +1,3 @@
#...
-Disassembly of section .plt.got:
-
-[a-f0-9]+ <[_a-z]+@plt>:
[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <.*>
#pass

15
binutils-CVE-2019-1010204.patch Normal file
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@ -0,0 +1,15 @@
--- binutils.orig/gold/fileread.cc 2019-08-06 14:22:08.669313110 +0100
+++ binutils-2.32/gold/fileread.cc 2019-08-06 14:22:28.799177543 +0100
@@ -381,6 +381,12 @@ File_read::do_read(off_t start, section_
ssize_t bytes;
if (this->whole_file_view_ != NULL)
{
+ // See PR 23765 for an example of a testcase that triggers this error.
+ if (((ssize_t) start) < 0)
+ gold_fatal(_("%s: read failed, starting offset (%#llx) less than zero"),
+ this->filename().c_str(),
+ static_cast<long long>(start));
+
bytes = this->size_ - start;
if (static_cast<section_size_type>(bytes) >= size)
{

2148
binutils-LTO-fix.patch Normal file
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File diff suppressed because it is too large Load Diff

5925
binutils-Power10-fixes.patch Normal file
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File diff suppressed because it is too large Load Diff

93
binutils-aarch64-condbranch-relocs.patch Normal file
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@ -0,0 +1,93 @@
diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.35/bfd/elfnn-aarch64.c
--- binutils.orig/bfd/elfnn-aarch64.c 2020-09-10 17:03:31.738458044 +0100
+++ binutils-2.35/bfd/elfnn-aarch64.c 2020-09-10 17:04:03.643344898 +0100
@@ -5445,7 +5445,6 @@ elfNN_aarch64_final_link_relocate (reloc
bfd_vma orig_value = value;
bfd_boolean resolved_to_zero;
bfd_boolean abs_symbol_p;
- bfd_boolean via_plt_p;
globals = elf_aarch64_hash_table (info);
@@ -5467,8 +5466,6 @@ elfNN_aarch64_final_link_relocate (reloc
: bfd_is_und_section (sym_sec));
abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
- via_plt_p = (globals->root.splt != NULL && h != NULL
- && h->plt.offset != (bfd_vma) - 1);
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle
it here if it is defined in a non-shared object. */
@@ -5805,23 +5802,12 @@ elfNN_aarch64_final_link_relocate (reloc
value += signed_addend;
break;
- case BFD_RELOC_AARCH64_BRANCH19:
- case BFD_RELOC_AARCH64_TSTBR14:
- /* A conditional branch to an undefined weak symbol is converted to a
- branch to itself. */
- if (weak_undef_p && !via_plt_p)
- {
- value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
- place, value,
- signed_addend,
- weak_undef_p);
- break;
- }
- /* Fall through. */
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
{
asection *splt = globals->root.splt;
+ bfd_boolean via_plt_p =
+ splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
/* A call to an undefined weak symbol is converted to a jump to
the next instruction unless a PLT entry will be created.
@@ -5902,6 +5888,23 @@ elfNN_aarch64_final_link_relocate (reloc
bfd_set_error (bfd_error_bad_value);
return bfd_reloc_notsupported;
}
+ value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
+ place, value,
+ signed_addend,
+ weak_undef_p);
+ break;
+
+ case BFD_RELOC_AARCH64_BRANCH19:
+ case BFD_RELOC_AARCH64_TSTBR14:
+ if (h && h->root.type == bfd_link_hash_undefined)
+ {
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%pB: conditional branch to undefined symbol `%s' "
+ "not allowed"), input_bfd, h->root.root.string);
+ bfd_set_error (bfd_error_bad_value);
+ return bfd_reloc_notsupported;
+ }
/* Fall through. */
case BFD_RELOC_AARCH64_16:
@@ -7967,8 +7970,6 @@ elfNN_aarch64_check_relocs (bfd *abfd, s
break;
}
- case BFD_RELOC_AARCH64_BRANCH19:
- case BFD_RELOC_AARCH64_TSTBR14:
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
/* If this is a local symbol then we resolve it
Only in binutils-2.35/bfd: elfnn-aarch64.c.orig
diff -rup binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d
--- binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:03:31.067460424 +0100
+++ binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:04:03.644344895 +0100
@@ -1,8 +1,3 @@
#source: emit-relocs-560.s
#ld: -shared
-#readelf: -r
-
-Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 2 entries:
- Offset Info Type Sym. Value Sym. Name \+ Addend
-[0-9a-f]+ 000100000402 R_AARCH64_JUMP_SL 0000000000000000 baz \+ 0
-[0-9a-f]+ 000200000402 R_AARCH64_JUMP_SL 0000000000000000 bar \+ 0
+#error: .*: conditional branch to undefined symbol `bar' not allowed

1981
binutils-add-sym-cache-to-elf-link-hash.patch Normal file
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70
binutils-attach-to-group.patch Normal file
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@ -0,0 +1,70 @@
diff -rup binutils.orig/gas/config/obj-elf.c binutils-2.34/gas/config/obj-elf.c
--- binutils.orig/gas/config/obj-elf.c 2020-02-02 11:34:11.858321477 +0000
+++ binutils-2.34/gas/config/obj-elf.c 2020-02-02 11:34:30.099247619 +0000
@@ -78,9 +78,11 @@ static void obj_elf_gnu_attribute (int);
static void obj_elf_tls_common (int);
static void obj_elf_lcomm (int);
static void obj_elf_struct (int);
+static void obj_elf_attach_to_group (int);
static const pseudo_typeS elf_pseudo_table[] =
{
+ {"attach_to_group", obj_elf_attach_to_group, 0},
{"comm", obj_elf_common, 0},
{"common", obj_elf_common, 1},
{"ident", obj_elf_ident, 0},
@@ -1003,6 +1005,27 @@ obj_elf_section_name (void)
return name;
}
+static void
+obj_elf_attach_to_group (int dummy ATTRIBUTE_UNUSED)
+{
+ const char * gname = obj_elf_section_name ();
+
+ if (gname == NULL)
+ {
+ as_warn ("group name not parseable");
+ return;
+ }
+
+ if (elf_group_name (now_seg))
+ {
+ as_warn ("already has a group");
+ return;
+ }
+
+ elf_group_name (now_seg) = xstrdup (gname);
+ elf_section_flags (now_seg) |= SHF_GROUP;
+}
+
void
obj_elf_section (int push)
{
Only in binutils-2.34/gas/config: obj-elf.c.orig
diff -rup binutils.orig/gas/doc/as.texi binutils-2.34/gas/doc/as.texi
--- binutils.orig/gas/doc/as.texi 2020-02-02 11:34:11.850321509 +0000
+++ binutils-2.34/gas/doc/as.texi 2020-02-02 11:35:11.359080560 +0000
@@ -4359,6 +4359,7 @@ Some machine configurations provide addi
* Altmacro:: @code{.altmacro}
* Ascii:: @code{.ascii "@var{string}"}@dots{}
* Asciz:: @code{.asciz "@var{string}"}@dots{}
+* Attach_to_group:: @code{.attach_to_group @var{name}}
* Balign:: @code{.balign [@var{abs-expr}[, @var{abs-expr}]]}
* Bundle directives:: @code{.bundle_align_mode @var{abs-expr}}, etc
* Byte:: @code{.byte @var{expressions}}
@@ -4656,6 +4657,12 @@ trailing zero byte) into consecutive add
@code{.asciz} is just like @code{.ascii}, but each string is followed by
a zero byte. The ``z'' in @samp{.asciz} stands for ``zero''.
+@node Attach_to_group
+@section @code{.attach_to_group @var{name}}
+Attaches the current section to the named group. This is like declaring
+the section with the @code{G} attribute, but can be done after the section
+has been created.
+
@node Balign
@section @code{.balign[wl] [@var{abs-expr}[, @var{abs-expr}[, @var{abs-expr}]]]}
Only in binutils-2.34/gas/doc: as.texi.orig
Only in binutils-2.34/gas/doc: as.texi.rej

44
binutils-config.patch Normal file
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@ -0,0 +1,44 @@
diff -Nrup a/libiberty/aclocal.m4 b/libiberty/aclocal.m4
--- a/libiberty/aclocal.m4 2019-01-19 09:01:34.000000000 -0700
+++ b/libiberty/aclocal.m4 2020-01-09 22:00:27.183312982 -0700
@@ -147,7 +147,7 @@ if test $ac_cv_os_cray = yes; then
fi
AC_CACHE_CHECK(stack direction for C alloca, ac_cv_c_stack_direction,
-[AC_TRY_RUN([find_stack_direction ()
+[AC_TRY_RUN([__attribute__ ((noclone,noinline)) find_stack_direction ()
{
static char *addr = 0;
auto char dummy;
diff --git a/config/intdiv0.m4 b/config/intdiv0.m4
index 55dddcf1..ba906efc 100644
--- a/config/intdiv0.m4
+++ b/config/intdiv0.m4
@@ -31,10 +31,10 @@ sigfpe_handler (sig) int sig;
exit (sig != SIGFPE);
}
-int x = 1;
-int y = 0;
-int z;
-int nan;
+volatile int x = 1;
+volatile int y = 0;
+volatile int z;
+volatile int nan;
int main ()
{
diff --git a/libiberty/configure.ac b/libiberty/configure.ac
index f1ce7601..fc20d228 100644
--- a/libiberty/configure.ac
+++ b/libiberty/configure.ac
@@ -661,7 +661,7 @@ if test -z "${setobjs}"; then
for v in $vars; do
AC_MSG_CHECKING([for $v])
AC_CACHE_VAL(libiberty_cv_var_$v,
- [AC_LINK_IFELSE([AC_LANG_PROGRAM([[int *p;]],[[extern int $v []; p = $v;]])],
+ [AC_LINK_IFELSE([AC_LANG_PROGRAM([[__attribute__ ((used)) int *p;]],[[extern int $v []; p = $v;]])],
[eval "libiberty_cv_var_$v=yes"],
[eval "libiberty_cv_var_$v=no"])])
if eval "test \"`echo '$libiberty_cv_var_'$v`\" = yes"; then

83
binutils-do-not-link-with-static-libstdc++.patch Normal file
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@ -0,0 +1,83 @@
diff -rup binutils.orig/configure binutils-2.30/configure
--- binutils.orig/configure 2018-09-24 17:50:06.967172922 +0100
+++ binutils-2.30/configure 2018-09-24 17:51:16.648624865 +0100
@@ -4996,49 +4996,6 @@ if test -z "$LD"; then
fi
fi
-# Check whether -static-libstdc++ -static-libgcc is supported.
-have_static_libs=no
-if test "$GCC" = yes; then
- saved_LDFLAGS="$LDFLAGS"
-
- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc"
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether g++ accepts -static-libstdc++ -static-libgcc" >&5
-$as_echo_n "checking whether g++ accepts -static-libstdc++ -static-libgcc... " >&6; }
- ac_ext=cpp
-ac_cpp='$CXXCPP $CPPFLAGS'
-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
-
-
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5)
-#error -static-libstdc++ not implemented
-#endif
-int main() {}
-_ACEOF
-if ac_fn_cxx_try_link "$LINENO"; then :
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
-$as_echo "yes" >&6; }; have_static_libs=yes
-else
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
-$as_echo "no" >&6; }
-fi
-rm -f core conftest.err conftest.$ac_objext \
- conftest$ac_exeext conftest.$ac_ext
- ac_ext=c
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-
- LDFLAGS="$saved_LDFLAGS"
-fi
-
-
if test -n "$ac_tool_prefix"; then
diff -rup binutils.orig/configure.ac binutils-2.30/configure.ac
--- binutils.orig/configure.ac 2018-09-24 17:50:07.241170767 +0100
+++ binutils-2.30/configure.ac 2018-09-24 17:50:29.908992486 +0100
@@ -1288,26 +1288,6 @@ if test -z "$LD"; then
fi
fi
-# Check whether -static-libstdc++ -static-libgcc is supported.
-have_static_libs=no
-if test "$GCC" = yes; then
- saved_LDFLAGS="$LDFLAGS"
-
- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc"
- AC_MSG_CHECKING([whether g++ accepts -static-libstdc++ -static-libgcc])
- AC_LANG_PUSH(C++)
- AC_LINK_IFELSE([AC_LANG_SOURCE([
-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5)
-#error -static-libstdc++ not implemented
-#endif
-int main() {}])],
- [AC_MSG_RESULT([yes]); have_static_libs=yes],
- [AC_MSG_RESULT([no])])
- AC_LANG_POP(C++)
-
- LDFLAGS="$saved_LDFLAGS"
-fi
-
ACX_PROG_GNAT
ACX_PROG_CMP_IGNORE_INITIAL

36
binutils-elf-add-objects.patch Normal file
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@ -0,0 +1,36 @@
--- binutils.orig/bfd/elflink.c 2020-07-31 10:45:48.747912761 +0100
+++ binutils-2.35/bfd/elflink.c 2020-07-31 10:47:26.336262770 +0100
@@ -505,6 +505,16 @@ bfd_elf_link_record_dynamic_symbol (stru
const char *name;
size_t indx;
+ if (h->root.type == bfd_link_hash_defined
+ || h->root.type == bfd_link_hash_defweak)
+ {
+ /* An IR symbol should not be made dynamic. */
+ if (h->root.u.def.section != NULL
+ && h->root.u.def.section->owner != NULL
+ && (h->root.u.def.section->owner->flags & BFD_PLUGIN) != 0)
+ return TRUE;
+ }
+
/* XXX: The ABI draft says the linker must turn hidden and
internal symbols into STB_LOCAL symbols when producing the
DSO. However, if ld.so honors st_other in the dynamic table,
@@ -5199,15 +5209,11 @@ elf_link_add_object_symbols (bfd *abfd,
break;
}
- /* Don't add DT_NEEDED for references from the dummy bfd nor
- for unmatched symbol. */
if (!add_needed
&& matched
&& definition
&& ((dynsym
- && h->ref_regular_nonweak
- && (old_bfd == NULL
- || (old_bfd->flags & BFD_PLUGIN) == 0))
+ && h->ref_regular_nonweak)
|| (h->ref_dynamic_nonweak
&& (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0
&& !on_needed_list (elf_dt_name (abfd),

33
binutils-export-demangle.h.patch Normal file
View File

@ -0,0 +1,33 @@
diff -rup binutils.orig/bfd/Makefile.am binutils-2.32/bfd/Makefile.am
--- binutils.orig/bfd/Makefile.am 2019-02-08 12:22:51.395684251 +0000
+++ binutils-2.32/bfd/Makefile.am 2019-02-08 12:22:53.970664973 +0000
@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@
bfdincludedir = @bfdincludedir@
bfdlib_LTLIBRARIES = libbfd.la
bfdinclude_HEADERS = $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
+ bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
else !INSTALL_LIBBFD
# Empty these so that the respective installation directories will not be created.
bfdlibdir =
diff -rup binutils.orig/bfd/Makefile.in binutils-2.32/bfd/Makefile.in
--- binutils.orig/bfd/Makefile.in 2019-02-08 12:21:35.291254044 +0000
+++ binutils-2.32/bfd/Makefile.in 2019-02-08 12:22:10.163992947 +0000
@@ -249,7 +249,7 @@ am__can_run_installinfo = \
esac
am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bfd_stdint.h \
- $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
HEADERS = $(bfdinclude_HEADERS)
RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
distclean-recursive maintainer-clean-recursive
@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -rel
@INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2)
@INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-@INSTALL_LIBBFD_TRUE@ bfd_stdint.h $(INCDIR)/diagnostics.h \
+@INSTALL_LIBBFD_TRUE@ bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/demangle.h \
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/bfdlink.h $(am__append_2)
@INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@
@INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la

330
binutils-fix-testsuite-failures.patch Normal file
View File

@ -0,0 +1,330 @@
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:40:26.911199033 +0000
@@ -34,5 +34,6 @@ hook called: claim_file tmpdir/libtext.a
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:41:30.189692800 +0000
@@ -23,5 +23,3 @@ hook called: claim_file tmpdir/main.o \[
hook called: claim_file .*/ld/testsuite/ld-plugin/func.c \[@0/.* CLAIMED
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
-.*main.c.*: undefined reference to `\.?func'
-#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:42:03.598430960 +0000
@@ -27,7 +27,6 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:42:28.014239600 +0000
@@ -28,7 +28,6 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:43:21.309821910 +0000
@@ -30,9 +30,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:43:54.925558451 +0000
@@ -31,7 +31,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:49:20.091010016 +0000
@@ -2,6 +2,5 @@ hook called: all symbols read.
Input: func.c \(tmpdir/libfunc.a\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:49:34.506897033 +0000
@@ -2,6 +2,5 @@ hook called: all symbols read.
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:50:00.409694022 +0000
@@ -2,6 +2,5 @@ Claimed: tmpdir/libfunc.a \[@.*
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:50:14.938580156 +0000
@@ -2,6 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:49:46.346804240 +0000
@@ -2,4 +2,5 @@ hook called: all symbols read.
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:50:29.322467422 +0000
@@ -2,4 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:45:05.343006557 +0000
@@ -1 +1,3 @@
.*: error: Error
+#...
+
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:45:22.764870016 +0000
@@ -1 +1,2 @@
.*: warning: Warning
+#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:33:21.976627309 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:48:57.067190464 +0000
@@ -24,3 +24,4 @@ hook called: claim_file tmpdir/main.o \[
hook called: claim_file tmpdir/func.o \[@0/.* not claimed
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
hook called: claim_file tmpdir/libempty.a \[@.* not claimed
+#pass
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:37:14.672749977 +0000
@@ -27,7 +27,6 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:37:58.000400421 +0000
@@ -28,7 +28,6 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:38:34.096109209 +0000
@@ -32,7 +32,6 @@ hook called: claim_file tmpdir/text.o \[
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:39:52.655475403 +0000
@@ -31,7 +31,8 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d binutils-2.32/ld/testsuite/ld-plugin/pr20070.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:33:21.976627309 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:50:56.874251486 +0000
@@ -5,5 +5,6 @@ Sym: 'weakdef' Resolution: LDPR_PREVAILI
Sym: 'undef' Resolution: LDPR_UNDEF
Sym: 'weakundef' Resolution: LDPR_UNDEF
Sym: 'common' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp binutils-2.32/ld/testsuite/ld-srec/srec.exp
--- binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:33:21.938627615 +0000
+++ binutils-2.32/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:53:58.744814006 +0000
@@ -21,6 +21,8 @@
# Get the offset from an S-record line to the start of the data.
+return
+
proc srec_off { l } {
if [string match "S1*" $l] {
return 8
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:10:59.038709514 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:13:53.532300721 +0000
@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:10:59.041709490 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:14:50.061844322 +0000
@@ -35,8 +35,9 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:10:58.942710289 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:15:20.030602369 +0000
@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:10:59.024709627 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:15:54.926320633 +0000
@@ -35,8 +35,9 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:10:58.998709837 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:12:19.856057024 +0000
@@ -1,3 +1,2 @@
.*: error: Error
#...
-
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:10:59.074709224 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:11:48.144313048 +0000
@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
#...
hook called: cleanup.
diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd
--- binutils.orig/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 09:45:44.013108697 +0100
+++ binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 12:06:17.287425232 +0100
@@ -7,9 +7,9 @@ Symbol table '.dynsym' contains [0-9]+ e
# And ensure the dynamic symbol table contains at least x@VERS.0
# and foo@@VERS.0 symbols
#...
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
#...
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
#...
Symbol table '.symtab' contains [0-9]+ entries:
#pass
diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.30/ld/testsuite/ld-plugin/plugin.exp
--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 09:45:44.023108605 +0100
+++ binutils-2.30/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 11:18:53.997202105 +0100
@@ -118,6 +118,12 @@ if { $can_compile && !$failed_compile }
}
}
+# I do not know why, but the underscore prefix test is going
+# wrong on ppc64le targets. So override it here.
+if { [istarget powerpc*-*-linux*] || [istarget x86_64*-*-linux*] } {
+ set _ ""
+}
+
set testobjfiles "tmpdir/main.o tmpdir/func.o tmpdir/text.o"
set testobjfiles_notext "tmpdir/main.o tmpdir/func.o"
set testsrcfiles "tmpdir/main.o $srcdir/$subdir/func.c tmpdir/text.o"

180
binutils-gcc-10-fixes.patch Normal file
View File

@ -0,0 +1,180 @@
diff -rup binutils.orig/gold/gdb-index.cc binutils-2.34.0/gold/gdb-index.cc
--- binutils.orig/gold/gdb-index.cc 2020-07-24 09:12:29.241306445 +0100
+++ binutils-2.34.0/gold/gdb-index.cc 2020-07-24 09:15:48.332095898 +0100
@@ -817,7 +817,7 @@ Gdb_index_info_reader::get_qualified_nam
void
Gdb_index_info_reader::record_cu_ranges(Dwarf_die* die)
{
- unsigned int shndx;
+ unsigned int shndx = 0;
unsigned int shndx2;
off_t ranges_offset = die->ref_attribute(elfcpp::DW_AT_ranges, &shndx);
diff -rup binutils.orig/gold/layout.cc binutils-2.34.0/gold/layout.cc
--- binutils.orig/gold/layout.cc 2020-07-24 09:12:29.243306433 +0100
+++ binutils-2.34.0/gold/layout.cc 2020-07-24 09:15:11.464320064 +0100
@@ -1986,7 +1986,7 @@ Layout::attach_allocated_section_to_segm
seg_flags |= os->extra_segment_flags();
// Check for --section-start.
- uint64_t addr;
+ uint64_t addr = 0;
bool is_address_set = parameters->options().section_start(os->name(), &addr);
// In general the only thing we really care about for PT_LOAD
diff -rup binutils.orig/binutils/dlltool.c binutils-2.34.0/binutils/dlltool.c
--- binutils.orig/binutils/dlltool.c 2020-07-24 09:12:28.974308069 +0100
+++ binutils-2.34.0/binutils/dlltool.c 2020-07-24 12:09:37.527121295 +0100
@@ -1305,7 +1305,7 @@ run (const char *what, char *args)
int pid, wait_status;
int i;
const char **argv;
- char *errmsg_fmt, *errmsg_arg;
+ char *errmsg_fmt = "", *errmsg_arg = "";
char *temp_base = choose_temp_base ();
inform (_("run: %s %s"), what, args);
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 09:12:32.368287432 +0100
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:14:19.842360634 +0100
@@ -28416,9 +28416,12 @@ md_apply_fix (fixS * fixP,
perform relaxation. */
if (value == -2)
{
- newval = md_chars_to_number (buf, THUMB_SIZE);
- newval = 0xbf00; /* NOP encoding T1 */
- md_number_to_chars (buf, newval, THUMB_SIZE);
+ if (fixP->fx_done || !seg->use_rela_p)
+ {
+ newval = md_chars_to_number (buf, THUMB_SIZE);
+ newval = 0xbf00; /* NOP encoding T1 */
+ md_number_to_chars (buf, newval, THUMB_SIZE);
+ }
}
else
{
@@ -28631,17 +28634,14 @@ md_apply_fix (fixS * fixP,
case BFD_RELOC_ARM_GOTFUNCDESC:
case BFD_RELOC_ARM_GOTOFFFUNCDESC:
case BFD_RELOC_ARM_FUNCDESC:
- if (arm_fdpic)
- {
- if (fixP->fx_done || !seg->use_rela_p)
- md_number_to_chars (buf, 0, 4);
- }
- else
+ if (!arm_fdpic)
{
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Relocation supported only in FDPIC mode"));
- }
- break;
+ break;
+ }
+ value = 0;
+ /* Fall through. */
#endif
case BFD_RELOC_RVA:
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 12:16:02.099719884 +0100
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:34:17.690858328 +0100
@@ -28641,7 +28641,7 @@ md_apply_fix (fixS * fixP,
break;
}
value = 0;
- /* Fall through. */
+ goto fred;
#endif
case BFD_RELOC_RVA:
@@ -28653,6 +28653,7 @@ md_apply_fix (fixS * fixP,
#ifdef TE_PE
case BFD_RELOC_32_SECREL:
#endif
+ fred:
if (fixP->fx_done || !seg->use_rela_p)
#ifdef TE_WINCE
/* For WinCE we only do this for pcrel fixups. */
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 13:28:26.926553452 +0100
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 13:31:57.835215763 +0100
@@ -28416,12 +28416,8 @@ md_apply_fix (fixS * fixP,
perform relaxation. */
if (value == -2)
{
- if (fixP->fx_done || !seg->use_rela_p)
- {
- newval = md_chars_to_number (buf, THUMB_SIZE);
- newval = 0xbf00; /* NOP encoding T1 */
- md_number_to_chars (buf, newval, THUMB_SIZE);
- }
+ newval = 0xbf00; /* NOP encoding T1 */
+ goto jim;
}
else
{
@@ -28432,6 +28428,7 @@ md_apply_fix (fixS * fixP,
{
newval = md_chars_to_number (buf, THUMB_SIZE);
newval |= ((value & 0x3e) << 2) | ((value & 0x40) << 3);
+ jim:
md_number_to_chars (buf, newval, THUMB_SIZE);
}
}
diff -rup binutils.orig/binutils/mclex.c binutils-2.34.0/binutils/mclex.c
--- binutils.orig/binutils/mclex.c 2020-07-24 13:28:26.297557441 +0100
+++ binutils-2.34.0/binutils/mclex.c 2020-07-24 14:46:53.587940149 +0100
@@ -207,7 +207,7 @@ enum_severity (int e)
static void
mc_add_keyword_ascii (const char *sz, int rid, const char *grp, rc_uint_type nv, const char *sv)
{
- unichar *usz, *usv = NULL;
+ unichar *usz = NULL, *usv = NULL;
rc_uint_type usz_len;
unicode_from_codepage (&usz_len, &usz, sz, CP_ACP);
diff -rup binutils.orig/binutils/windmc.c binutils-2.34.0/binutils/windmc.c
--- binutils.orig/binutils/windmc.c 2020-07-24 13:28:26.279557556 +0100
+++ binutils-2.34.0/binutils/windmc.c 2020-07-24 14:48:05.460477478 +0100
@@ -338,7 +338,7 @@ mc_add_node_lang (mc_node *root, const m
static char *
convert_unicode_to_ACP (const unichar *usz)
{
- char *s;
+ char *s = NULL;
rc_uint_type l;
if (! usz)
@@ -607,10 +607,10 @@ mc_generate_bin_item (mc_node_lang *n, r
else
{
rc_uint_type txt_len, l;
- char *cvt_txt;
+ char *cvt_txt = NULL;
codepage_from_unicode( &l, n->message, &cvt_txt, n->lang->lang_info.wincp);
- if (! cvt_txt)
+ if (cvt_txt == NULL)
fatal ("Failed to convert message to language codepage.\n");
txt_len = strlen (cvt_txt);
if (mcset_automatic_null_termination && txt_len > 0)
@@ -1107,7 +1107,7 @@ main (int argc, char **argv)
/* Load the input file and do code page transformations to UTF16. */
{
- unichar *u;
+ unichar *u = NULL;
rc_uint_type ul;
char *buff;
bfd_size_type flen;
--- binutils.orig/binutils/srconv.c 2020-07-24 15:37:25.847459208 +0100
+++ binutils-2.34.0/binutils/srconv.c 2020-07-24 15:39:12.853773423 +0100
@@ -316,6 +316,7 @@ wr_hd (struct coff_ofile *p)
struct IT_hd hd;
hd.spare1 = 0;
+ hd.spare2 = 0;
if (bfd_get_file_flags (abfd) & EXEC_P)
hd.mt = MTYPE_ABS_LM;
else

19
binutils-gold-mismatched-section-flags.patch Normal file
View File

@ -0,0 +1,19 @@
diff -rup binutils.orig/gold/layout.cc binutils-2.32/gold/layout.cc
--- binutils.orig/gold/layout.cc 2019-06-24 14:37:36.013086899 +0100
+++ binutils-2.32/gold/layout.cc 2019-06-24 14:41:40.054517479 +0100
@@ -868,6 +868,7 @@ Layout::get_output_section(const char* n
&& (same_name->flags() & elfcpp::SHF_TLS) == 0)
os = same_name;
}
+#if 0 /* BZ 1722715, PR 17556. */
else if ((flags & elfcpp::SHF_TLS) == 0)
{
elfcpp::Elf_Xword zero_flags = 0;
@@ -878,6 +879,7 @@ Layout::get_output_section(const char* n
if (p != this->section_name_map_.end())
os = p->second;
}
+#endif
}
if (os == NULL)

66
binutils-gold-warn-unsupported.patch Normal file
View File

@ -0,0 +1,66 @@
Only in binutils-2.34/gold: autom4te.cache
diff -rup binutils.orig/gold/configure binutils-2.34/gold/configure
--- binutils.orig/gold/configure 2020-04-20 12:35:13.048297305 +0100
+++ binutils-2.34/gold/configure 2020-04-20 14:02:06.743725696 +0100
@@ -5180,7 +5180,8 @@ for targ in $target $canon_targets; do
. ${srcdir}/configure.tgt
if test "$targ_obj" = "UNKNOWN"; then
- as_fn_error $? "\"unsupported target $targ\"" "$LINENO" 5
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: \"unsupported target $targ\"" >&5
+$as_echo "$as_me: WARNING: \"unsupported target $targ\"" >&2;}
else
targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)"
if test "$targ_extra_obj" != ""; then
diff -rup binutils.orig/gold/configure.ac binutils-2.34/gold/configure.ac
--- binutils.orig/gold/configure.ac 2020-04-20 12:35:13.050297291 +0100
+++ binutils-2.34/gold/configure.ac 2020-04-20 14:01:46.435868770 +0100
@@ -181,7 +181,7 @@ for targ in $target $canon_targets; do
. ${srcdir}/configure.tgt
if test "$targ_obj" = "UNKNOWN"; then
- AC_MSG_ERROR("unsupported target $targ")
+ AC_MSG_WARN("unsupported target $targ")
else
targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)"
if test "$targ_extra_obj" != ""; then
--- binutils.orig/ld/configure.tgt 2020-04-20 12:35:12.465301359 +0100
+++ binutils-2.34/ld/configure.tgt 2020-04-20 14:17:52.123066333 +0100
@@ -220,7 +220,7 @@ bfin-*-linux-uclibc*) targ_emul=elf32bfi
targ_extra_emuls="elf32bfin"
targ_extra_libpath=$targ_extra_emuls
;;
-bpf-*-*) targ_emul=elf64bpf
+bpf-* | bpf-*-*) targ_emul=elf64bpf
;;
cr16-*-elf*) targ_emul=elf32cr16
;;
@@ -1026,7 +1026,7 @@ z8k-*-coff) targ_emul=z8002
targ_extra_ofiles=
;;
*)
- echo 2>&1 "*** ld does not support target ${targ}"
+ echo 2>&1 "*** ld does not support target '${targ}' NO REALLY"
echo 2>&1 "*** see ld/configure.tgt for supported targets"
exit 1
--- binutils.orig/bfd/config.bfd 2020-04-20 12:35:13.038297375 +0100
+++ binutils-2.34/bfd/config.bfd 2020-04-20 14:25:26.452869193 +0100
@@ -473,7 +473,7 @@ case "${targ}" in
;;
#ifdef BFD64
- bpf-*-none)
+ bpf-*-none | bpf-*)
targ_defvec=bpf_elf64_le_vec
targ_selvecs=bpf_elf64_be_vec
targ_underscore=yes
@@ -1427,7 +1427,7 @@ case "${targ}" in
;;
*)
- echo 1>&2 "*** BFD does not support target ${targ}."
+ echo 1>&2 "*** BFD does not support target '${targ}'. Honest."
echo 1>&2 "*** Look in bfd/config.bfd for supported targets."
exit 1
;;

83
binutils-plugin-as-needed.patch Normal file
View File

@ -0,0 +1,83 @@
diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.35.1/ld/testsuite/ld-plugin/lto.exp
--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2020-10-09 11:46:13.571665439 +0100
+++ binutils-2.35.1/ld/testsuite/ld-plugin/lto.exp 2020-10-09 11:47:59.113302758 +0100
@@ -319,27 +319,6 @@ set lto_link_elf_tests [list \
[list "PR ld/13244" \
"-shared -O2 -fPIC -flto -fuse-linker-plugin -nostdlib" "-O2 -fno-early-inlining -flto" \
{pr13244.c} {{"readelf" {-s --wide} "pr13244.d"}} "pr13244.so" "c"] \
- [list "Build libpr15146a.a" \
- "$plug_opt" "-flto -O2" \
- {pr15146a.c} {} "lib15146a.a"] \
- [list "Build pr15146b.so" \
- "-shared" "-O2 -fpic" \
- {pr15146b.c} {} "pr15146b.so" "c"] \
- [list "Build pr15146c.so" \
- "-shared -Wl,--no-as-needed tmpdir/pr15146b.so" "-O2 -fpic" \
- {pr15146c.c} {} "pr15146c.so" "c"] \
- [list "PR ld/15146 (1)" \
- "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146a.o tmpdir/pr15146c.so" "" \
- {dummy.c} {{"readelf" {-d} "pr15146.d"}} "pr15146a.exe"] \
- [list "Build libpr15146d.a" \
- "$plug_opt" "-flto -O2" \
- {pr15146d.c} {} "lib15146d.a"] \
- [list "Build libpr16746a.a" \
- "" "" \
- {pr16746a.c pr16746b.c} {} "lib15146a.a"] \
- [list "Build libpr16746b.a" \
- "$plug_opt" "-O2 -flto" \
- {pr16746c.c pr16746d.c} {} "lib15146b.a"] \
[list "PR ld/16746 (1)" \
"-O2 -flto -fuse-linker-plugin tmpdir/pr16746a.o tmpdir/pr16746c.o" "-O2 -flto" \
{dummy.c} {} "pr16746a.exe"] \
@@ -602,13 +581,6 @@ run_cc_link_tests $lto_compile_elf_tests
# Restrict these to ELF targets that support shared libs and PIC.
if { [is_elf_format] && [check_lto_shared_available] } {
run_cc_link_tests $lto_link_elf_tests
- set testname "PR ld/15146 (2)"
- set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146d.o tmpdir/pr15146c.so"]
- if { [ regexp "undefined reference to symbol '\\.?xxx'" $exec_output ] } {
- pass $testname
- } {
- fail $testname
- }
set testname "PR ld/16746 (3)"
set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin tmpdir/pr16746b.o tmpdir/pr16746d.o"]
if { [ regexp "warning: \\.?foobar" $exec_output ] && ![ regexp "symbol from plugin" $exec_output ] } {
diff -rup binutils.orig/bfd/elflink.c binutils-2.35.1/bfd/elflink.c
--- binutils.orig/bfd/elflink.c 2020-10-09 11:46:14.151663446 +0100
+++ binutils-2.35.1/bfd/elflink.c 2020-10-09 11:46:27.222618528 +0100
@@ -4970,11 +4970,7 @@ elf_link_add_object_symbols (bfd *abfd,
object and a shared object. */
bfd_boolean dynsym = FALSE;
- /* Plugin symbols aren't normal. Don't set def_regular or
- ref_regular for them, or make them dynamic. */
- if ((abfd->flags & BFD_PLUGIN) != 0)
- ;
- else if (! dynamic)
+ if (! dynamic)
{
if (! definition)
{
@@ -5155,10 +5151,6 @@ elf_link_add_object_symbols (bfd *abfd,
&& !bfd_link_relocatable (info))
dynsym = FALSE;
- /* Nor should we make plugin symbols dynamic. */
- if ((abfd->flags & BFD_PLUGIN) != 0)
- dynsym = FALSE;
-
if (definition)
{
h->target_internal = isym->st_target_internal;
@@ -5185,7 +5177,7 @@ elf_link_add_object_symbols (bfd *abfd,
}
}
- if (dynsym && h->dynindx == -1)
+ if (dynsym && (abfd->flags & BFD_PLUGIN) == 0 && h->dynindx == -1)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
goto error_free_vers;

39
binutils-ppc-annobin-disassembly.patch Normal file
View File

@ -0,0 +1,39 @@
--- binutils.orig/opcodes/ppc-dis.c 2020-09-11 10:55:56.243724026 +0100
+++ binutils-2.35/opcodes/ppc-dis.c 2020-09-11 10:57:51.363934217 +0100
@@ -399,12 +399,36 @@ static unsigned short vle_opcd_indices[V
#define SPE2_OPCD_SEGS (1 + SPE2_XOP_TO_SEG (SPE2_XOP (-1)))
static unsigned short spe2_opcd_indices[SPE2_OPCD_SEGS + 1];
+static bfd_boolean
+ppc_symbol_is_valid (asymbol *sym,
+ struct disassemble_info *info ATTRIBUTE_UNUSED)
+{
+ elf_symbol_type * est;
+
+ if (sym == NULL)
+ return FALSE;
+
+ est = elf_symbol_from (NULL, sym);
+
+ /* Ignore ELF hidden, local, no-type symbols.
+ These are generated by annobin. */
+ if (est != NULL
+ && ELF_ST_VISIBILITY (est->internal_elf_sym.st_other) == STV_HIDDEN
+ && ELF_ST_BIND (est->internal_elf_sym.st_info) == STB_LOCAL
+ && ELF_ST_TYPE (est->internal_elf_sym.st_info) == STT_NOTYPE)
+ return FALSE;
+
+ return TRUE;
+}
+
/* Calculate opcode table indices to speed up disassembly,
and init dialect. */
void
disassemble_init_powerpc (struct disassemble_info *info)
{
+ info->symbol_is_valid = ppc_symbol_is_valid;
+
if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
{
unsigned seg, idx, op;

35
binutils-readelf-other-sym-info.patch Normal file
View File

@ -0,0 +1,35 @@
--- binutils.orig/binutils/readelf.c 2020-07-24 15:08:30.317597020 +0100
+++ binutils-2.35/binutils/readelf.c 2020-07-24 15:09:39.029155552 +0100
@@ -12069,11 +12069,13 @@ print_dynamic_symbol (Filedata *filedata
unsigned int vis = ELF_ST_VISIBILITY (psym->st_other);
printf (" %-7s", get_symbol_visibility (vis));
+#if 0
/* Check to see if any other bits in the st_other field are set.
Note - displaying this information disrupts the layout of the
table being generated, but for the moment this case is very rare. */
if (psym->st_other ^ vis)
printf (" [%s] ", get_symbol_other (filedata, psym->st_other ^ vis));
+#endif
}
printf (" %4s ", get_symbol_index_type (filedata, psym->st_shndx));
@@ -12112,7 +12114,17 @@ print_dynamic_symbol (Filedata *filedata
version_string);
}
- putchar ('\n');
+#if 1
+ {
+ unsigned int vis = ELF_ST_VISIBILITY (psym->st_other);
+
+ /* Check to see if any other bits in the st_other field are set. */
+ if (psym->st_other ^ vis)
+ printf (" \t[%s]", get_symbol_other (filedata, psym->st_other ^ vis));
+ }
+#endif
+
+ putchar ('\n');
if (ELF_ST_BIND (psym->st_info) == STB_LOCAL
&& section != NULL

772
binutils-s390-build.patch Normal file
View File

@ -0,0 +1,772 @@
diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c
--- binutils.orig/libctf/ctf-create.c 2020-06-16 12:06:28.466468753 +0100
+++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 12:16:19.744482839 +0100
@@ -871,7 +871,8 @@ ctf_add_encoded (ctf_file_t *fp, uint32_
if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
-
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0);
dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT)
/ CHAR_BIT);
@@ -896,6 +897,8 @@ ctf_add_reftype (ctf_file_t *fp, uint32_
if ((type = ctf_add_generic (fp, flag, NULL, kind, &dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0);
dtd->dtd_data.ctt_type = (uint32_t) ref;
@@ -958,6 +961,8 @@ ctf_add_slice (ctf_file_t *fp, uint32_t
if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_SLICE, &dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_SLICE, flag, 0);
dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT)
@@ -1008,6 +1013,8 @@ ctf_add_array (ctf_file_t *fp, uint32_t
if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_ARRAY, &dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ARRAY, flag, 0);
dtd->dtd_data.ctt_size = 0;
@@ -1075,6 +1082,8 @@ ctf_add_function (ctf_file_t *fp, uint32
free (vdat);
return CTF_ERR; /* errno is set for us. */
}
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FUNCTION, flag, vlen);
dtd->dtd_data.ctt_type = (uint32_t) ctc->ctc_return;
@@ -1104,6 +1113,8 @@ ctf_add_struct_sized (ctf_file_t *fp, ui
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_STRUCT,
&dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_STRUCT, flag, 0);
@@ -1141,6 +1152,8 @@ ctf_add_union_sized (ctf_file_t *fp, uin
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_UNION,
&dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_UNION, flag, 0);
@@ -1177,6 +1190,8 @@ ctf_add_enum (ctf_file_t *fp, uint32_t f
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_ENUM,
&dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ENUM, flag, 0);
dtd->dtd_data.ctt_size = fp->ctf_dmodel->ctd_int;
diff -rup binutils.orig/libctf/ctf-types.c binutils-2.34.0/libctf/ctf-types.c
--- binutils.orig/libctf/ctf-types.c 2020-06-16 12:06:28.466468753 +0100
+++ binutils-2.34.0/libctf/ctf-types.c 2020-06-16 12:10:58.033563365 +0100
@@ -748,7 +748,7 @@ ctf_type_encoding (ctf_file_t *fp, ctf_i
case CTF_K_SLICE:
{
const ctf_slice_t *slice;
- ctf_encoding_t underlying_en;
+ ctf_encoding_t underlying_en = {0};
slice = &dtd->dtd_u.dtu_slice;
data = ctf_type_encoding (fp, slice->cts_type, &underlying_en);
diff -rup binutils.orig/opcodes/s390-mkopc.c binutils-2.34.0/opcodes/s390-mkopc.c
--- binutils.orig/opcodes/s390-mkopc.c 2020-06-16 12:06:28.447468816 +0100
+++ binutils-2.34.0/opcodes/s390-mkopc.c 2020-06-16 12:17:10.783311417 +0100
@@ -168,7 +168,7 @@ insertExpandedMnemonic (char *opcode, ch
int mask_start, i = 0, tag_found = 0, reading_number = 0;
int number_p = 0, suffix_p = 0, prefix_p = 0;
const struct s390_cond_ext_format *ext_table;
- int ext_table_length;
+ int ext_table_length = 0;
if (!(tag = strpbrk (mnemonic, "*$")))
{
Only in binutils.orig/libctf: .#ctf-create.c
diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c
--- binutils.orig/libctf/ctf-create.c 2020-06-16 14:49:06.080801319 +0100
+++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 14:49:08.046794113 +0100
@@ -798,6 +798,7 @@ ctf_add_generic (ctf_file_t *fp, uint32_
{
ctf_dtdef_t *dtd;
ctf_id_t type;
+ *rp = NULL;
if (flag != CTF_ADD_NONROOT && flag != CTF_ADD_ROOT)
return (ctf_set_errno (fp, EINVAL));
diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c
--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 14:49:06.074801341 +0100
+++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 16:43:31.428324833 +0100
@@ -810,7 +810,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_DIR10 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
value = ((value) << (2));
fields->f_dir10 = value;
@@ -821,7 +821,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_DIR9 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
value = ((value) << (1));
fields->f_dir9 = value;
@@ -829,7 +829,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_DISP10 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
value = ((value) * (4));
fields->f_disp10 = value;
@@ -840,7 +840,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_DISP9 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
value = ((value) * (2));
fields->f_disp9 = value;
@@ -865,7 +865,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_LABEL12 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel12 = value;
@@ -873,7 +873,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_LABEL9 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel9 = value;
@@ -881,7 +881,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_M4 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
value = ((value) | (-16));
fields->f_m4 = value;
@@ -911,7 +911,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_U10 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
value = ((value) << (2));
fields->f_u10 = value;
@@ -928,7 +928,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_UDISP6 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
value = ((value) << (2));
fields->f_udisp6 = value;
diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c
--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 17:10:22.540563440 +0100
+++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 17:10:48.966468906 +0100
@@ -903,7 +903,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
break;
case FR30_OPERAND_S10 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
value = ((value) * (4));
fields->f_s10 = value;
Only in binutils-2.34.0/opcodes: fr30-ibld.c~
--- binutils.orig/opcodes/m32c-ibld.c 2020-06-16 17:10:22.531563472 +0100
+++ binutils-2.34.0/opcodes/m32c-ibld.c 2020-06-16 17:25:48.612258094 +0100
@@ -1805,7 +1805,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_BIT32RNPREFIXED :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_dst32_rn_prefixed_QI = value;
@@ -1813,7 +1813,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_BIT32RNUNPREFIXED :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_dst32_rn_unprefixed_QI = value;
@@ -1824,7 +1824,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_BITBASE16_16_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -1860,7 +1860,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_16_s16 = value;
@@ -1887,7 +1887,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -1903,7 +1903,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -1971,7 +1971,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_32_u16 = value;
@@ -1996,7 +1996,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_16_S16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_16_s16 = value;
@@ -2007,7 +2007,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_16_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -2016,7 +2016,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_DSP_16_U20 :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -2032,7 +2032,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_DSP_16_U24 :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
@@ -2078,7 +2078,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_32_u16 = value;
@@ -2094,7 +2094,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_32_u16 = value;
@@ -2110,7 +2110,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_32_S16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_32_s16 = value;
@@ -2121,7 +2121,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_32_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_32_u16 = value;
@@ -2129,7 +2129,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_32_U20 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
fields->f_dsp_32_u24 = value;
@@ -2137,7 +2137,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_32_U24 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
fields->f_dsp_32_u24 = value;
@@ -2148,7 +2148,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_40_S16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_40_s16 = value;
@@ -2159,7 +2159,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_40_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_40_u16 = value;
@@ -2167,7 +2167,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_40_U20 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
fields->f_dsp_40_u20 = value;
@@ -2175,7 +2175,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_40_U24 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
fields->f_dsp_40_u24 = value;
@@ -2186,7 +2186,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_48_S16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_48_s16 = value;
@@ -2197,7 +2197,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_48_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_48_u16 = value;
@@ -2206,7 +2206,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_DSP_48_U20 :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_48_u16 = value;
@@ -2222,7 +2222,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_DSP_48_U24 :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_48_u16 = value;
@@ -2240,7 +2240,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_8_S24 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
fields->f_dsp_8_s24 = value;
@@ -2251,7 +2251,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_8_U16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_8_u16 = value;
@@ -2259,7 +2259,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DSP_8_U24 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
fields->f_dsp_8_u24 = value;
@@ -2343,7 +2343,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNPREFIXEDHI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
value = ((((value) + (2))) % (4));
fields->f_dst32_rn_prefixed_HI = value;
@@ -2351,7 +2351,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNPREFIXEDQI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_dst32_rn_prefixed_QI = value;
@@ -2359,7 +2359,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNPREFIXEDSI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
value = ((value) - (2));
fields->f_dst32_rn_prefixed_SI = value;
@@ -2367,7 +2367,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNUNPREFIXEDHI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
value = ((((value) + (2))) % (4));
fields->f_dst32_rn_unprefixed_HI = value;
@@ -2375,7 +2375,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNUNPREFIXEDQI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_dst32_rn_unprefixed_QI = value;
@@ -2383,7 +2383,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_DST32RNUNPREFIXEDSI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
value = ((value) - (2));
fields->f_dst32_rn_unprefixed_SI = value;
@@ -2402,7 +2402,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM_16_HI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_16_s16 = value;
@@ -2414,14 +2414,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_IMM_16_SI :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_16_u16 = value;
}
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_32_u16 = value;
@@ -2454,7 +2454,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
fields->f_dsp_32_u24 = value;
@@ -2467,7 +2467,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM_32_HI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_32_s16 = value;
@@ -2486,7 +2486,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM_40_HI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_40_s16 = value;
@@ -2498,7 +2498,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_IMM_40_SI :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
fields->f_dsp_40_u24 = value;
@@ -2513,7 +2513,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM_48_HI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_48_s16 = value;
@@ -2525,14 +2525,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
case M32C_OPERAND_IMM_48_SI :
{
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_48_u16 = value;
}
if (length <= 0) break;
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
fields->f_dsp_64_u16 = value;
@@ -2567,7 +2567,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM_8_HI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_8_s16 = value;
@@ -2593,7 +2593,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_IMM1_S :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
value = ((value) + (1));
fields->f_imm1_S = value;
@@ -2612,7 +2612,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_16_8 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_16_8 = value;
@@ -2620,7 +2620,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_24_8 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_24_8 = value;
@@ -2628,7 +2628,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_32_8 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_32_8 = value;
@@ -2636,7 +2636,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_40_8 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_40_8 = value;
@@ -2644,7 +2644,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_5_3 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_5_3 = value;
@@ -2652,7 +2652,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_8_16 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1))));
fields->f_lab_8_16 = value;
@@ -2660,7 +2660,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_8_24 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
fields->f_lab_8_24 = value;
@@ -2668,7 +2668,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_LAB_8_8 :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
value = ((value) + (((pc) + (1))));
fields->f_lab_8_8 = value;
@@ -2757,7 +2757,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNPREFIXEDHI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
value = ((((value) + (2))) % (4));
fields->f_src32_rn_prefixed_HI = value;
@@ -2765,7 +2765,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNPREFIXEDQI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_src32_rn_prefixed_QI = value;
@@ -2773,7 +2773,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNPREFIXEDSI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
value = ((value) - (2));
fields->f_src32_rn_prefixed_SI = value;
@@ -2781,7 +2781,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
value = ((((value) + (2))) % (4));
fields->f_src32_rn_unprefixed_HI = value;
@@ -2789,7 +2789,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
fields->f_src32_rn_unprefixed_QI = value;
@@ -2797,7 +2797,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
break;
case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
{
- long value;
+ long value = 0;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
value = ((value) - (2));
fields->f_src32_rn_unprefixed_SI = value;
--- binutils.orig/binutils/srconv.c 2020-06-16 17:10:22.251564474 +0100
+++ binutils-2.34.0/binutils/srconv.c 2020-06-16 20:07:51.670025912 +0100
@@ -492,6 +492,8 @@ wr_rl (struct coff_ofile *ptr ATTRIBUTE_
rl.addr = r->offset;
rl.bitloc = 0;
rl.flen = 32; /* SH Specific. */
+ rl.dunno = 0;
+ rl.symn = 0;
/* What sort of reloc ? Look in the section to find out. */
ref = r->symbol;
--- binutils.orig/libctf/ctf-create.c 2020-07-24 15:33:26.100996335 +0100
+++ binutils-2.35/libctf/ctf-create.c 2020-07-24 15:33:29.042977475 +0100
@@ -1257,6 +1257,8 @@ ctf_add_forward (ctf_file_t *fp, uint32_
if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR)
return CTF_ERR; /* errno is set for us. */
+ if (dtd == NULL)
+ return CTF_ERR;
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FORWARD, flag, 0);
dtd->dtd_data.ctt_type = kind;

27
binutils-special-sections-in-groups.patch Normal file
View File

@ -0,0 +1,27 @@
--- binutils.orig/bfd/elf.c 2018-10-19 11:42:10.107277490 +0100
+++ binutils-2.31.1/bfd/elf.c 2018-10-19 11:44:33.607105801 +0100
@@ -830,7 +830,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd
}
}
- if (elf_group_name (newsect) == NULL)
+ if (elf_group_name (newsect) == NULL
+ /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section)
+ but they will not have been added to the group because they do not
+ have contents that the ELF code in the BFD library knows how to
+ process. This is OK though - we rely upon the target backends to
+ handle these sections for us. */
+ && hdr->sh_type < SHT_LOOS)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: no group info for section '%pA'"),
@@ -936,7 +942,8 @@ _bfd_elf_setup_sections (bfd *abfd)
else if (idx->shdr->bfd_section)
elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section;
else if (idx->shdr->sh_type != SHT_RELA
- && idx->shdr->sh_type != SHT_REL)
+ && idx->shdr->sh_type != SHT_REL
+ && idx->shdr->sh_type < SHT_LOOS)
{
/* There are some unknown sections in the group. */
_bfd_error_handler

19
binutils-strip-merge.patch Normal file
View File

@ -0,0 +1,19 @@
--- binutils.orig/binutils/objcopy.c 2020-10-06 14:53:19.264943750 +0100
+++ binutils-2.35.1/binutils/objcopy.c 2020-10-06 14:53:47.002761889 +0100
@@ -3313,14 +3313,12 @@ copy_object (bfd *ibfd, bfd *obfd, const
/* It is likely that output sections are in the same order
as the input sections, but do not assume that this is
the case. */
- if (strcmp (bfd_section_name (merged->sec),
- bfd_section_name (osec)) != 0)
+ if (merged->sec->output_section != osec)
{
for (merged = merged_note_sections;
merged != NULL;
merged = merged->next)
- if (strcmp (bfd_section_name (merged->sec),
- bfd_section_name (osec)) == 0)
+ if (merged->sec->output_section == osec)
break;
if (merged == NULL)

158
binutils-warnings.patch Normal file
View File

@ -0,0 +1,158 @@
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 6ecfab5d..f8698213 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -4914,7 +4914,7 @@ display_debug_lines_decoded (struct dwarf_section * section,
else
{
newFileName = (char *) xmalloc (fileNameLength + 1);
- strncpy (newFileName, fileName, fileNameLength + 1);
+ strcpy (newFileName, fileName);
}
if (!do_wide || (fileNameLength <= MAX_FILENAME_LENGTH))
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index 3639bfbf..ed080a1a 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -185,20 +185,6 @@ static void d_init_info (const char *, int, size_t, struct d_info *);
#define CP_STATIC_IF_GLIBCPP_V3
#endif /* ! defined(IN_GLIBCPP_V3) */
-/* See if the compiler supports dynamic arrays. */
-
-#ifdef __GNUC__
-#define CP_DYNAMIC_ARRAYS
-#else
-#ifdef __STDC__
-#ifdef __STDC_VERSION__
-#if __STDC_VERSION__ >= 199901L && !__STDC_NO_VLA__
-#define CP_DYNAMIC_ARRAYS
-#endif /* __STDC_VERSION__ >= 199901L && !__STDC_NO_VLA__ */
-#endif /* defined (__STDC_VERSION__) */
-#endif /* defined (__STDC__) */
-#endif /* ! defined (__GNUC__) */
-
/* We avoid pulling in the ctype tables, to prevent pulling in
additional unresolved symbols when this code is used in a library.
FIXME: Is this really a valid reason? This comes from the original
@@ -4343,29 +4329,21 @@ cplus_demangle_print_callback (int options,
d_print_init (&dpi, callback, opaque, dc);
{
-#ifdef CP_DYNAMIC_ARRAYS
- /* Avoid zero-length VLAs, which are prohibited by the C99 standard
- and flagged as errors by Address Sanitizer. */
- __extension__ struct d_saved_scope scopes[(dpi.num_saved_scopes > 0)
- ? dpi.num_saved_scopes : 1];
- __extension__ struct d_print_template temps[(dpi.num_copy_templates > 0)
- ? dpi.num_copy_templates : 1];
-
- dpi.saved_scopes = scopes;
- dpi.copy_templates = temps;
-#else
- dpi.saved_scopes = alloca (dpi.num_saved_scopes
- * sizeof (*dpi.saved_scopes));
- dpi.copy_templates = alloca (dpi.num_copy_templates
- * sizeof (*dpi.copy_templates));
-#endif
-
+ dpi.saved_scopes
+ = (struct d_saved_scope *) xmalloc (dpi.num_saved_scopes
+ * sizeof (*dpi.saved_scopes));
+ dpi.copy_templates
+ = (struct d_print_template *) xmalloc (dpi.num_copy_templates
+ * sizeof (*dpi.copy_templates));
d_print_comp (&dpi, options, dc);
}
d_print_flush (&dpi);
- return ! d_print_saw_error (&dpi);
+ int retval = ! d_print_saw_error (&dpi);
+ free (dpi.saved_scopes);
+ free (dpi.copy_templates);
+ return retval;
}
/* Turn components into a human readable string. OPTIONS is the
@@ -6307,16 +6285,12 @@ d_demangle_callback (const char *mangled, int options,
}
{
-#ifdef CP_DYNAMIC_ARRAYS
- __extension__ struct demangle_component comps[di.num_comps];
- __extension__ struct demangle_component *subs[di.num_subs];
-
- di.comps = comps;
- di.subs = subs;
-#else
- di.comps = alloca (di.num_comps * sizeof (*di.comps));
- di.subs = alloca (di.num_subs * sizeof (*di.subs));
-#endif
+ di.comps
+ = (struct demangle_component *) xmalloc (di.num_comps
+ * sizeof (*di.comps));
+ di.subs
+ = (struct demangle_component **) xmalloc (di.num_subs
+ * sizeof (*di.subs));
switch (type)
{
@@ -6357,6 +6331,8 @@ d_demangle_callback (const char *mangled, int options,
: 0;
}
+ free (di.comps);
+ free (di.subs);
return status;
}
@@ -6588,16 +6564,12 @@ is_ctor_or_dtor (const char *mangled,
cplus_demangle_init_info (mangled, DMGL_GNU_V3, strlen (mangled), &di);
{
-#ifdef CP_DYNAMIC_ARRAYS
- __extension__ struct demangle_component comps[di.num_comps];
- __extension__ struct demangle_component *subs[di.num_subs];
-
- di.comps = comps;
- di.subs = subs;
-#else
- di.comps = alloca (di.num_comps * sizeof (*di.comps));
- di.subs = alloca (di.num_subs * sizeof (*di.subs));
-#endif
+ di.comps
+ = (struct demangle_component *) xmalloc (di.num_comps
+ * sizeof (*di.comps));
+ di.subs
+ = (struct demangle_component **) xmalloc (di.num_subs
+ * sizeof (*di.subs));
dc = cplus_demangle_mangled_name (&di, 1);
@@ -6640,6 +6612,8 @@ is_ctor_or_dtor (const char *mangled,
}
}
+ free (di.comps);
+ free (di.subs);
return ret;
}
diff --git a/libiberty/make-relative-prefix.c b/libiberty/make-relative-prefix.c
index e3f9f920..5dbe6f89 100644
--- a/libiberty/make-relative-prefix.c
+++ b/libiberty/make-relative-prefix.c
@@ -259,10 +259,7 @@ make_relative_prefix_1 (const char *progname, const char *bin_prefix,
#ifdef HAVE_HOST_EXECUTABLE_SUFFIX
len += strlen (HOST_EXECUTABLE_SUFFIX);
#endif
- if (len < MAX_ALLOCA_SIZE)
- nstore = (char *) alloca (len);
- else
- alloc_ptr = nstore = (char *) malloc (len);
+ alloc_ptr = nstore = (char *) malloc (len);
startp = endp = temp;
while (1)

3394
binutils.spec Normal file
View File

File diff suppressed because it is too large Load Diff

3
sources Normal file
View File

@ -0,0 +1,3 @@
SHA512 (binutils-2.35.1.tar.xz) = 94ff72708403413b70b247f3af4099ebaa882b6659249869f1ed9941a0f1912e313f08357d470f9fd2359e7f5e5b0eb86285e5eaf883fa8187789d6b1bd304eb
SHA512 (binutils-2.19.50.0.1-output-format.sed) = 2f8686b0c8af13c98cda056824c2820416f6e2d003f70b78ccf5314525b9ee3684d421dfa83e638a2d42d06ea4d4bdaf5226b64d6ec26f7ff59c44ffb2a23dd2
SHA512 (standards.info.gz) = 52452ec58c9b0045abeb1f7fb29d56a62cd4042edbb5e1685dad5f6932731ace2bf05ec238b2e8d3d851114a2718b511dfc721c996bee8721a873314de7c7358