diff --git a/.gitignore b/.gitignore index e69de29..a1a0073 100644 --- a/.gitignore +++ b/.gitignore @@ -0,0 +1,3 @@ +/binutils-2.35.1.tar.xz +/binutils-2.19.50.0.1-output-format.sed +/standards.info.gz diff --git a/0001-Allow-plugin-syms-to-mark-as-needed-shared-libs-need.patch b/0001-Allow-plugin-syms-to-mark-as-needed-shared-libs-need.patch new file mode 100644 index 0000000..abcc18f --- /dev/null +++ b/0001-Allow-plugin-syms-to-mark-as-needed-shared-libs-need.patch @@ -0,0 +1,216 @@ +From 1e3b96fd6cf0c7d018083994ad951ccf92aba582 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Fri, 4 Sep 2020 13:54:21 +0930 +Subject: [PATCH] Allow plugin syms to mark as-needed shared libs needed + +We must tell LTO about symbols in all shared libraries loaded. That +means we can't load extra shared libraries after LTO recompilation, at +least, not those that affect the set of symbols that LTO cares about, +the IR symbols. + +This change will likely result in complaints about --as-needed +libraries being loaded unnecessarily, but being correct is more +important than being optimal. One of the PR15146 tests regresses, and +while that could be hidden by disabling the missing dso message by +making it conditional on h->root.non_ir_ref_regular, that would just +be sweeping a problem under the rug. + +bfd/ + PR 15146 + PR 26314 + PR 26530 + * elflink.c (elf_link_add_object_symbols): Do set def_regular + and ref_regular for IR symbols. Don't clear dynsym, allowing + IR symbols to load --as-needed shared libraries, but prevent + IR symbols from becoming dynamic. +ld/ + * testsuite/ld-plugin/lto.exp: Don't run pr15146 tests. + * testsuite/ld-plugin/pr15146.d: Delete. + * testsuite/ld-plugin/pr15146a.c: Delete. + * testsuite/ld-plugin/pr15146b.c: Delete. + * testsuite/ld-plugin/pr15146c.c: Delete. + * testsuite/ld-plugin/pr15146d.c: Delete. +--- + bfd/ChangeLog | 10 ++++++++++ + bfd/elflink.c | 12 ++---------- + ld/ChangeLog | 9 +++++++++ + ld/testsuite/ld-plugin/lto.exp | 22 ---------------------- + ld/testsuite/ld-plugin/pr15146.d | 4 ---- + ld/testsuite/ld-plugin/pr15146a.c | 13 ------------- + ld/testsuite/ld-plugin/pr15146b.c | 1 - + ld/testsuite/ld-plugin/pr15146c.c | 0 + ld/testsuite/ld-plugin/pr15146d.c | 7 ------- + 9 files changed, 21 insertions(+), 57 deletions(-) + delete mode 100644 ld/testsuite/ld-plugin/pr15146.d + delete mode 100644 ld/testsuite/ld-plugin/pr15146a.c + delete mode 100644 ld/testsuite/ld-plugin/pr15146b.c + delete mode 100644 ld/testsuite/ld-plugin/pr15146c.c + delete mode 100644 ld/testsuite/ld-plugin/pr15146d.c + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 1b58f9517c..a431f8f14d 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,13 @@ ++2020-09-04 Alan Modra ++ ++ PR 15146 ++ PR 26314 ++ PR 26530 ++ * elflink.c (elf_link_add_object_symbols): Do set def_regular ++ and ref_regular for IR symbols. Don't clear dynsym, allowing ++ IR symbols to load --as-needed shared libraries, but prevent ++ IR symbols from becoming dynamic. ++ + 2020-09-03 Nick Clifton + + PR 26521 +diff --git a/bfd/elflink.c b/bfd/elflink.c +index 5c085b14b7..1384c1a46b 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -4977,11 +4977,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) + object and a shared object. */ + bfd_boolean dynsym = FALSE; + +- /* Plugin symbols aren't normal. Don't set def_regular or +- ref_regular for them, or make them dynamic. */ +- if ((abfd->flags & BFD_PLUGIN) != 0) +- ; +- else if (! dynamic) ++ if (! dynamic) + { + if (! definition) + { +@@ -5162,10 +5158,6 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) + && !bfd_link_relocatable (info)) + dynsym = FALSE; + +- /* Nor should we make plugin symbols dynamic. */ +- if ((abfd->flags & BFD_PLUGIN) != 0) +- dynsym = FALSE; +- + if (definition) + { + h->target_internal = isym->st_target_internal; +@@ -5192,7 +5184,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) + } + } + +- if (dynsym && h->dynindx == -1) ++ if (dynsym && (abfd->flags & BFD_PLUGIN) == 0 && h->dynindx == -1) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + goto error_free_vers; +diff --git a/ld/ChangeLog b/ld/ChangeLog +index 0fcbf0d6c2..0a11b79c67 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,12 @@ ++2020-09-04 Alan Modra ++ ++ * testsuite/ld-plugin/lto.exp: Don't run pr15146 tests. ++ * testsuite/ld-plugin/pr15146.d: Delete. ++ * testsuite/ld-plugin/pr15146a.c: Delete. ++ * testsuite/ld-plugin/pr15146b.c: Delete. ++ * testsuite/ld-plugin/pr15146c.c: Delete. ++ * testsuite/ld-plugin/pr15146d.c: Delete. ++ + 2020-09-03 H.J. Lu + + * testsuite/config/default.exp: Change NOSANTIZE_CFLAGS to +diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp +index adad1e4895..684d1db314 100644 +--- a/ld/testsuite/ld-plugin/lto.exp ++++ b/ld/testsuite/ld-plugin/lto.exp +@@ -320,21 +320,6 @@ set lto_link_elf_tests [list \ + [list "PR ld/13244" \ + "-shared -O2 -fPIC -flto -fuse-linker-plugin -nostdlib" "-O2 -fno-early-inlining -flto" \ + {pr13244.c} {{"readelf" {-s --wide} "pr13244.d"}} "pr13244.so" "c"] \ +- [list "Build libpr15146a.a" \ +- "$plug_opt" "-flto -O2" \ +- {pr15146a.c} {} "lib15146a.a"] \ +- [list "Build pr15146b.so" \ +- "-shared" "-O2 -fpic" \ +- {pr15146b.c} {} "pr15146b.so" "c"] \ +- [list "Build pr15146c.so" \ +- "-shared -Wl,--no-as-needed tmpdir/pr15146b.so" "-O2 -fpic $no_lto" \ +- {pr15146c.c} {} "pr15146c.so" "c"] \ +- [list "PR ld/15146 (1)" \ +- "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146a.o tmpdir/pr15146c.so" "" \ +- {dummy.c} {{"readelf" {-d} "pr15146.d"}} "pr15146a.exe"] \ +- [list "Build libpr15146d.a" \ +- "$plug_opt" "-flto -O2" \ +- {pr15146d.c} {} "lib15146d.a"] \ + [list "Build libpr16746a.a" \ + "" "" \ + {pr16746a.c pr16746b.c} {} "lib15146a.a"] \ +@@ -605,13 +590,6 @@ run_cc_link_tests $lto_compile_elf_tests + # Restrict these to ELF targets that support shared libs and PIC. + if { [is_elf_format] && [check_lto_shared_available] } { + run_cc_link_tests $lto_link_elf_tests +- set testname "PR ld/15146 (2)" +- set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146d.o tmpdir/pr15146c.so"] +- if { [ regexp "undefined reference to symbol '\\.?xxx'" $exec_output ] } { +- pass $testname +- } { +- fail $testname +- } + set testname "PR ld/16746 (3)" + set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin tmpdir/pr16746b.o tmpdir/pr16746d.o"] + if { [ regexp "warning: \\.?foobar" $exec_output ] && ![ regexp "symbol from plugin" $exec_output ] } { +diff --git a/ld/testsuite/ld-plugin/pr15146.d b/ld/testsuite/ld-plugin/pr15146.d +deleted file mode 100644 +index 48d4b85446..0000000000 +--- a/ld/testsuite/ld-plugin/pr15146.d ++++ /dev/null +@@ -1,4 +0,0 @@ +-#failif +-#... +- +0x[0-9a-f]+ +\(NEEDED\) +Shared library: +\[.*pr15146b.so\] +-#... +diff --git a/ld/testsuite/ld-plugin/pr15146a.c b/ld/testsuite/ld-plugin/pr15146a.c +deleted file mode 100644 +index a22860af5b..0000000000 +--- a/ld/testsuite/ld-plugin/pr15146a.c ++++ /dev/null +@@ -1,13 +0,0 @@ +-extern int xxx; +- +-int +-bar (void) +-{ +- return xxx; +-} +- +-int +-main () +-{ +- return 0; +-} +diff --git a/ld/testsuite/ld-plugin/pr15146b.c b/ld/testsuite/ld-plugin/pr15146b.c +deleted file mode 100644 +index 90eb21ea55..0000000000 +--- a/ld/testsuite/ld-plugin/pr15146b.c ++++ /dev/null +@@ -1 +0,0 @@ +-int xxx = 3; +diff --git a/ld/testsuite/ld-plugin/pr15146c.c b/ld/testsuite/ld-plugin/pr15146c.c +deleted file mode 100644 +index e69de29bb2..0000000000 +diff --git a/ld/testsuite/ld-plugin/pr15146d.c b/ld/testsuite/ld-plugin/pr15146d.c +deleted file mode 100644 +index ba1e0abfa6..0000000000 +--- a/ld/testsuite/ld-plugin/pr15146d.c ++++ /dev/null +@@ -1,7 +0,0 @@ +-extern int xxx; +- +-int +-main () +-{ +- return xxx; +-} +-- +2.21.3 + diff --git a/0001-Correct-vcmpsq-vcmpuq-and-xvtlsbb-BF-field.patch b/0001-Correct-vcmpsq-vcmpuq-and-xvtlsbb-BF-field.patch new file mode 100644 index 0000000..bfe8a07 --- /dev/null +++ b/0001-Correct-vcmpsq-vcmpuq-and-xvtlsbb-BF-field.patch @@ -0,0 +1,131 @@ +From 172234e1fab477ba36ec292913b1f13ef6b94783 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Wed, 19 Aug 2020 08:47:35 +0930 +Subject: [PATCH] Correct vcmpsq, vcmpuq and xvtlsbb BF field + +These shouldn't be optional. The record form of vector instructions +set CR6, giving an expectation that omitting BF should be the same as +specifying CR6. + +opcodes/ + * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq, + vcmpuq and xvtlsbb. +gas/ + * testsuite/gas/ppc/int128.s: Correct vcmpuq. + * testsuite/gas/ppc/int128.d: Update. + * testsuite/gas/ppc/xvtlsbb.d: Update. + +(cherry picked from commit 18a8a00ebe3159b65798c6132cb5f93ff4ef6c17) +--- + gas/ChangeLog | 5 +++++ + gas/testsuite/gas/ppc/int128.d | 2 +- + gas/testsuite/gas/ppc/int128.s | 2 +- + gas/testsuite/gas/ppc/xvtlsbb.d | 2 +- + opcodes/ChangeLog | 4 ++++ + opcodes/ppc-opc.c | 6 +++--- + 6 files changed, 15 insertions(+), 6 deletions(-) + +diff --git a/gas/ChangeLog b/gas/ChangeLog +index 3d5376df89..fa9e9d1ff2 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,6 +1,11 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-19 Alan Modra ++ * testsuite/gas/ppc/int128.s: Correct vcmpuq. ++ * testsuite/gas/ppc/int128.d: Update. ++ * testsuite/gas/ppc/xvtlsbb.d: Update. ++ + 2020-08-10 Alan Modra + * testsuite/gas/ppc/power8.d, + * testsuite/gas/ppc/power8.s: Add miso. +diff --git a/gas/testsuite/gas/ppc/int128.d b/gas/testsuite/gas/ppc/int128.d +index c9f14d3360..d7410345ad 100644 +--- a/gas/testsuite/gas/ppc/int128.d ++++ b/gas/testsuite/gas/ppc/int128.d +@@ -20,7 +20,7 @@ Disassembly of section \.text: + .*: (13 9d f7 0b|0b f7 9d 13) vmodsq v28,v29,v30 + .*: (13 e0 0e 0b|0b 0e e0 13) vmoduq v31,v0,v1 + .*: (10 5b 1e 02|02 1e 5b 10) vextsd2q v2,v3 +-.*: (10 04 29 01|01 29 04 10) vcmpuq v4,v5 ++.*: (10 04 29 01|01 29 04 10) vcmpuq cr0,v4,v5 + .*: (10 86 39 41|41 39 86 10) vcmpsq cr1,v6,v7 + .*: (11 09 51 c7|c7 51 09 11) vcmpequq v8,v9,v10 + .*: (11 6c 6d c7|c7 6d 6c 11) vcmpequq. v11,v12,v13 +diff --git a/gas/testsuite/gas/ppc/int128.s b/gas/testsuite/gas/ppc/int128.s +index 4dce648c36..4561cfe9ee 100644 +--- a/gas/testsuite/gas/ppc/int128.s ++++ b/gas/testsuite/gas/ppc/int128.s +@@ -12,7 +12,7 @@ _start: + vmodsq 28,29,30 + vmoduq 31,0,1 + vextsd2q 2,3 +- vcmpuq 4,5 ++ vcmpuq 0,4,5 + vcmpsq 1,6,7 + vcmpequq 8,9,10 + vcmpequq. 11,12,13 +diff --git a/gas/testsuite/gas/ppc/xvtlsbb.d b/gas/testsuite/gas/ppc/xvtlsbb.d +index 1627d7afc6..8aa83dd62c 100644 +--- a/gas/testsuite/gas/ppc/xvtlsbb.d ++++ b/gas/testsuite/gas/ppc/xvtlsbb.d +@@ -7,7 +7,7 @@ + Disassembly of section \.text: + + 0+0 <_start>: +-.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb vs63 ++.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb cr0,vs63 + .*: (f0 82 07 6c|6c 07 82 f0) xvtlsbb cr1,vs0 + .*: (f1 02 f7 6e|6e f7 02 f1) xvtlsbb cr2,vs62 + .*: (f1 82 0f 6c|6c 0f 82 f1) xvtlsbb cr3,vs1 +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index 06d136d480..6e1fb264f9 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,6 +1,10 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-19 Alan Modra ++ * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq, ++ vcmpuq and xvtlsbb. ++ + 2020-08-10 Alan Modra + * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended + instructions. +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index 4471b0f2bc..d15bde1326 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -4441,7 +4441,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}}, +-{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {OBF, VA, VB}}, ++{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {BF, VA, VB}}, + {"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslq", VX (4, 261), VX_MASK, POWER10, 0, {VD, VA, VB}}, +@@ -4459,7 +4459,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}}, +-{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {OBF, VA, VB}}, ++{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {BF, VA, VB}}, + {"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vrlqnm", VX (4, 325), VX_MASK, POWER10, 0, {VD, VA, VB}}, +@@ -8455,7 +8455,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"xxgenpcvdm", X(60,949), XX1_MASK, POWER10, PPCVLE, {XT6, VB, UIMM}}, + {"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, +-{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {OBF, XB6}}, ++{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {BF, XB6}}, + {"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, +-- +2.21.3 + diff --git a/0001-Error-on-lmw-lswi-and-related-PowerPC-insns-when-LE.patch b/0001-Error-on-lmw-lswi-and-related-PowerPC-insns-when-LE.patch new file mode 100644 index 0000000..acd434a --- /dev/null +++ b/0001-Error-on-lmw-lswi-and-related-PowerPC-insns-when-LE.patch @@ -0,0 +1,2334 @@ +From 08ec0947d2601e799c9ad1ac5d7cba3d67893e55 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Mon, 10 Aug 2020 15:06:43 +0930 +Subject: [PATCH] Error on lmw, lswi and related PowerPC insns when LE + + * config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx, + stswi, or stswx in little-endian mode. + * testsuite/gas/ppc/476.d, + * testsuite/gas/ppc/476.s: Delete lmw, stmw, lswi, lswx, stswi, stswx. + * testsuite/gas/ppc/a2.d, + * testsuite/gas/ppc/a2.s: Move lmw, stmw, lswi, lswx, stswi, stswx.. + * testsuite/gas/ppc/be.d, + * testsuite/gas/ppc/be.s: ..to here, new big-endian only test. + * testsuite/gas/ppc/le_error.d, + * testsuite/gas/ppc/le_error.l: New little-endian test. + * testsuite/gas/ppc/ppc.exp: Run new tests. + +(cherry picked from commit 86c0f617ac5f3a5f4aab76c7f90255254ca27576) +--- + gas/ChangeLog | 16 + + gas/config/tc-ppc.c | 9 + + gas/testsuite/gas/ppc/476.d | 970 +++++++++++++------------ + gas/testsuite/gas/ppc/476.s | 6 - + gas/testsuite/gas/ppc/a2.d | 1138 +++++++++++++++--------------- + gas/testsuite/gas/ppc/a2.s | 8 - + gas/testsuite/gas/ppc/be.d | 17 + + gas/testsuite/gas/ppc/be.s | 10 + + gas/testsuite/gas/ppc/le_error.d | 3 + + gas/testsuite/gas/ppc/le_error.l | 9 + + gas/testsuite/gas/ppc/ppc.exp | 2 + + 11 files changed, 1113 insertions(+), 1075 deletions(-) + create mode 100644 gas/testsuite/gas/ppc/be.d + create mode 100644 gas/testsuite/gas/ppc/be.s + create mode 100644 gas/testsuite/gas/ppc/le_error.d + create mode 100644 gas/testsuite/gas/ppc/le_error.l + +diff --git a/gas/ChangeLog b/gas/ChangeLog +index 26c703531d..77b38a1cba 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,3 +1,19 @@ ++2020-09-24 Alan Modra ++ ++ Apply from master ++ 2020-08-10 Alan Modra ++ * config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx, ++ stswi, or stswx in little-endian mode. ++ * testsuite/gas/ppc/476.d, ++ * testsuite/gas/ppc/476.s: Delete lmw, stmw, lswi, lswx, stswi, stswx. ++ * testsuite/gas/ppc/a2.d, ++ * testsuite/gas/ppc/a2.s: Move lmw, stmw, lswi, lswx, stswi, stswx.. ++ * testsuite/gas/ppc/be.d, ++ * testsuite/gas/ppc/be.s: ..to here, new big-endian only test. ++ * testsuite/gas/ppc/le_error.d, ++ * testsuite/gas/ppc/le_error.l: New little-endian test. ++ * testsuite/gas/ppc/ppc.exp: Run new tests. ++ + 2020-09-19 Nick Clifton + + This is the 2.35.1 point release. +diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c +index aa989e7d1c..9719341c54 100644 +--- a/gas/config/tc-ppc.c ++++ b/gas/config/tc-ppc.c +@@ -3335,6 +3335,15 @@ md_assemble (char *str) + } + + insn = opcode->opcode; ++ if (!target_big_endian ++ && ((insn & ~(1 << 26)) == 46u << 26 ++ || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1))) ++ { ++ /* lmw, stmw, lswi, lswx, stswi, stswx */ ++ as_bad (_("`%s' invalid when little-endian"), str); ++ ppc_clear_labels (); ++ return; ++ } + + str = s; + while (ISSPACE (*str)) +diff --git a/gas/testsuite/gas/ppc/476.d b/gas/testsuite/gas/ppc/476.d +index 7818b86b13..0b75d75ae2 100644 +--- a/gas/testsuite/gas/ppc/476.d ++++ b/gas/testsuite/gas/ppc/476.d +@@ -7,491 +7,485 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5 +- 4: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5 +- 8: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5 +- c: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5 +- 10: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5 +- 14: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5 +- 18: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5 +- 1c: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5 +- 20: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5 +- 24: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5 +- 28: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128 +- 2c: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128 +- 30: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128 +- 34: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128 +- 38: (7c 64 01 d4|d4 01 64 7c) addme r3,r4 +- 3c: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4 +- 40: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4 +- 44: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4 +- 48: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5 +- 4c: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5 +- 50: (7c 64 01 94|94 01 64 7c) addze r3,r4 +- 54: (7c 64 01 95|95 01 64 7c) addze\. r3,r4 +- 58: (7c 64 05 94|94 05 64 7c) addzeo r3,r4 +- 5c: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4 +- 60: (7c 83 28 38|38 28 83 7c) and r3,r4,r5 +- 64: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5 +- 68: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15 +- 6c: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18 +- 70: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005 +- 74: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005 +- 78: (48 00 00 02|02 00 00 48) ba 0 +- 7c: (40 01 00 00|00 00 01 40) bdnzf gt,7c +- 80: (40 85 00 02|02 00 85 40) blea cr1,0 +- 84: (4d 80 04 20|20 04 80 4d) bltctr +- 88: (4c 8a 04 20|20 04 8a 4c) bnectr cr2 +- 8c: (4c 86 04 20|20 04 86 4c) bnectr cr1 +- 90: (4c 86 04 20|20 04 86 4c) bnectr cr1 +- 94: (4d 80 04 21|21 04 80 4d) bltctrl +- 98: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2 +- 9c: (4c 86 04 21|21 04 86 4c) bnectrl cr1 +- a0: (4c 86 04 21|21 04 86 4c) bnectrl cr1 +- a4: (40 43 00 01|01 00 43 40) bdzfl so,a4 +- a8: (4d 80 00 20|20 00 80 4d) bltlr +- ac: (4c 8a 00 20|20 00 8a 4c) bnelr cr2 +- b0: (4c 86 00 20|20 00 86 4c) bnelr cr1 +- b4: (4c 86 00 20|20 00 86 4c) bnelr cr1 +- b8: (4d 80 00 21|21 00 80 4d) bltlrl +- bc: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2 +- c0: (4c 86 00 21|21 00 86 4c) bnelrl cr1 +- c4: (4c 86 00 21|21 00 86 4c) bnelrl cr1 +- c8: (48 00 00 00|00 00 00 48) b c8 +- cc: (48 00 00 01|01 00 00 48) bl cc +- d0: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 +- d4: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 +- d8: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4 +- dc: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 +- e0: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 +- e4: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 +- e8: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167 +- ec: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 +- f0: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4 +- f4: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 +- f8: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167 +- fc: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 +- 100: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 +- 104: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 +- 108: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 +- 10c: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11 +- 110: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11 +- 114: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq +- 118: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt +- 11c: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt +- 120: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so +- 124: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq +- 128: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so +- 12c: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt +- 130: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt +- 134: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10 +- 138: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 +- 13c: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 +- 140: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7 +- 144: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6 +- 148: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7 +- 14c: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 +- 150: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 +- 154: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6 +- 158: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9 +- 15c: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 +- 160: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 +- 164: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7 +- 168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12 +- 16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2 +- 170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6 +- 174: (7c 00 03 8c|8c 03 00 7c) dccci +- 178: (7c 00 03 8c|8c 03 00 7c) dccci +- 17c: (7c 00 03 8c|8c 03 00 7c) dccci +- 180: (7c 20 03 8c|8c 03 20 7c) dci 1 +- 184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12 +- 188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13 +- 18c: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12 +- 190: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13 +- 194: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12 +- 198: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13 +- 19c: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12 +- 1a0: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13 +- 1a4: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5 +- 1a8: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5 +- 1ac: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12 +- 1b0: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12 +- 1b4: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 +- 1b8: (7c 83 07 74|74 07 83 7c) extsb r3,r4 +- 1bc: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4 +- 1c0: (7c 83 07 34|34 07 83 7c) extsh r3,r4 +- 1c4: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4 +- 1c8: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31 +- 1cc: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31 +- 1d0: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12 +- 1d4: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12 +- 1d8: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12 +- 1dc: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12 +- 1e0: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11 +- 1e4: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11 +- 1e8: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11 +- 1ec: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5 +- 1f0: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12 +- 1f4: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12 +- 1f8: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11 +- 1fc: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11 +- 200: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11 +- 204: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11 +- 208: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11 +- 20c: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11 +- 210: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11 +- 214: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11 +- 218: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12 +- 21c: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12 +- 220: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12 +- 224: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12 +- 228: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13 +- 22c: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13 +- 230: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13 +- 234: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13 +- 238: (fc 60 20 90|90 20 60 fc) fmr f3,f4 +- 23c: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4 +- 240: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13 +- 244: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13 +- 248: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13 +- 24c: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13 +- 250: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12 +- 254: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12 +- 258: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12 +- 25c: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12 +- 260: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30 +- 264: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30 +- 268: (fc 60 20 50|50 20 60 fc) fneg f3,f4 +- 26c: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4 +- 270: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13 +- 274: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13 +- 278: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13 +- 27c: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13 +- 280: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13 +- 284: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13 +- 288: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13 +- 28c: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13 +- 290: (fd c0 78 30|30 78 c0 fd) fre f14,f15 +- 294: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15 +- 298: (ed c0 78 30|30 78 c0 ed) fres f14,f15 +- 29c: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15 +- 2a0: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11 +- 2a4: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11 +- 2a8: (fd 40 5b 10|10 5b 40 fd) frin f10,f11 +- 2ac: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11 +- 2b0: (fd 40 5b 90|90 5b 40 fd) frip f10,f11 +- 2b4: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11 +- 2b8: (fd 40 5b 50|50 5b 40 fd) friz f10,f11 +- 2bc: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11 +- 2c0: (fc c0 38 18|18 38 c0 fc) frsp f6,f7 +- 2c4: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9 +- 2c8: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15 +- 2cc: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15 +- 2d0: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15 +- 2d4: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15 +- 2d8: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13 +- 2dc: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13 +- 2e0: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11 +- 2e4: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11 +- 2e8: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11 +- 2ec: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11 +- 2f0: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12 +- 2f4: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12 +- 2f8: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12 +- 2fc: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12 +- 300: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4 +- 304: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18 +- 308: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9 +- 30c: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15 +- 310: (7c 00 07 8c|8c 07 00 7c) iccci +- 314: (7c 00 07 8c|8c 07 00 7c) iccci +- 318: (7c 00 07 8c|8c 07 00 7c) iccci +- 31c: (7c 20 07 8c|8c 07 20 7c) ici 1 +- 320: (7c 03 27 cc|cc 27 03 7c) icread r3,r4 +- 324: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 +- 328: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28 +- 32c: (4c 00 01 2c|2c 01 00 4c) isync +- 330: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\) +- 334: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\) +- 338: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22 +- 33c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5 +- 340: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\) +- 344: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\) +- 348: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22 +- 34c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15 +- 350: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4 +- 354: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\) +- 358: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\) +- 35c: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12 +- 360: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12 +- 364: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\) +- 368: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\) +- 36c: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11 +- 370: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11 +- 374: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5 +- 378: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\) +- 37c: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\) +- 380: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24 +- 384: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25 +- 388: (b8 61 ff f0|f0 ff 61 b8) lmw r3,-16\(r1\) +- 38c: (7c a4 84 aa|aa 84 a4 7c) lswi r5,r4,16 +- 390: (7c 64 2c 2a|2a 2c 64 7c) lswx r3,r4,r5 +- 394: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 +- 398: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 +- 39c: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1 +- 3a0: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5 +- 3a4: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\) +- 3a8: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\) +- 3ac: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5 +- 3b0: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5 +- 3b4: (10 64 29 58|58 29 64 10) macchw r3,r4,r5 +- 3b8: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5 +- 3bc: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5 +- 3c0: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5 +- 3c4: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5 +- 3c8: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5 +- 3cc: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5 +- 3d0: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5 +- 3d4: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5 +- 3d8: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5 +- 3dc: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5 +- 3e0: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5 +- 3e4: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5 +- 3e8: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5 +- 3ec: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5 +- 3f0: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5 +- 3f4: (10 64 28 58|58 28 64 10) machhw r3,r4,r5 +- 3f8: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5 +- 3fc: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5 +- 400: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5 +- 404: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5 +- 408: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5 +- 40c: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5 +- 410: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5 +- 414: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5 +- 418: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5 +- 41c: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5 +- 420: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5 +- 424: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5 +- 428: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5 +- 42c: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5 +- 430: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5 +- 434: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5 +- 438: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5 +- 43c: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5 +- 440: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5 +- 444: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5 +- 448: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5 +- 44c: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5 +- 450: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5 +- 454: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5 +- 458: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5 +- 45c: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5 +- 460: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5 +- 464: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5 +- 468: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5 +- 46c: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5 +- 470: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5 +- 474: (7c 00 06 ac|ac 06 00 7c) mbar +- 478: (7c 00 06 ac|ac 06 00 7c) mbar +- 47c: (7c 20 06 ac|ac 06 20 7c) mbar 1 +- 480: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 +- 484: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 +- 488: (7d 80 04 00|00 04 80 7d) mcrxr cr3 +- 48c: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 490: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 494: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234 +- 498: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4 +- 49c: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5 +- 4a0: (ff c0 04 8e|8e 04 c0 ff) mffs f30 +- 4a4: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31 +- 4a8: (7e 60 00 a6|a6 00 60 7e) mfmsr r19 +- 4ac: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 4b0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128 +- 4b4: (7c 6c 42 a6|a6 42 6c 7c) mftb r3 +- 4b8: (7c 00 04 ac|ac 04 00 7c) msync +- 4bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 4c0: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 +- 4c4: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8 +- 4c8: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4 +- 4cc: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7 +- 4d0: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 +- 4d4: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 +- 4d8: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 +- 4dc: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 +- 4e0: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 +- 4e4: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 +- 4e8: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1 +- 4ec: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1 +- 4f0: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 +- 4f4: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 +- 4f8: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1 +- 4fc: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1 +- 500: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 504: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 508: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 50c: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1 +- 510: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 514: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 518: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 51c: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1 +- 520: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 524: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 528: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3 +- 52c: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5 +- 530: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5 +- 534: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5 +- 538: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5 +- 53c: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5 +- 540: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5 +- 544: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5 +- 548: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5 +- 54c: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5 +- 550: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5 +- 554: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5 +- 558: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5 +- 55c: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5 +- 560: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5 +- 564: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5 +- 568: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5 +- 56c: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5 +- 570: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5 +- 574: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5 +- 578: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5 +- 57c: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5 +- 580: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30 +- 584: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30 +- 588: (7c 64 00 d0|d0 00 64 7c) neg r3,r4 +- 58c: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4 +- 590: (7e 11 04 d0|d0 04 11 7e) nego r16,r17 +- 594: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19 +- 598: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5 +- 59c: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5 +- 5a0: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5 +- 5a4: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5 +- 5a8: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5 +- 5ac: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5 +- 5b0: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5 +- 5b4: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5 +- 5b8: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5 +- 5bc: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5 +- 5c0: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5 +- 5c4: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5 +- 5c8: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5 +- 5cc: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5 +- 5d0: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5 +- 5d4: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5 +- 5d8: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5 +- 5dc: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5 +- 5e0: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5 +- 5e4: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5 +- 5e8: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5 +- 5ec: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5 +- 5f0: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5 +- 5f4: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5 +- 5f8: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 +- 5fc: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 +- 600: (7c 40 23 78|78 23 40 7c) or r0,r2,r4 +- 604: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16 +- 608: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17 +- 60c: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20 +- 610: (60 21 00 00|00 00 21 60) ori r1,r1,0 +- 614: (64 83 de ad|ad de 83 64) oris r3,r4,57005 +- 618: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4 +- 61c: (7c 83 01 34|34 01 83 7c) prtyw r3,r4 +- 620: (4c 00 00 66|66 00 00 4c) rfci +- 624: (4c 00 00 64|64 00 00 4c) rfi +- 628: (4c 00 00 4c|4c 00 00 4c) rfmci +- 62c: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 +- 630: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27 +- 634: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 +- 638: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 +- 63c: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 +- 640: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27 +- 644: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 +- 648: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 +- 64c: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 +- 650: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 +- 654: (44 00 00 02|02 00 00 44) sc +- 658: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5 +- 65c: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5 +- 660: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5 +- 664: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5 +- 668: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16 +- 66c: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16 +- 670: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5 +- 674: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5 +- 678: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 +- 67c: (99 61 00 02|02 00 61 99) stb r11,2\(r1\) +- 680: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\) +- 684: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15 +- 688: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5 +- 68c: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\) +- 690: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\) +- 694: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2 +- 698: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31 +- 69c: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4 +- 6a0: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\) +- 6a4: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\) +- 6a8: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28 +- 6ac: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25 +- 6b0: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\) +- 6b4: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8 +- 6b8: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\) +- 6bc: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23 +- 6c0: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14 +- 6c4: (bc c1 ff f0|f0 ff c1 bc) stmw r6,-16\(r1\) +- 6c8: (7c 64 85 aa|aa 85 64 7c) stswi r3,r4,16 +- 6cc: (7c 64 2d 2a|2a 2d 64 7c) stswx r3,r4,r5 +- 6d0: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\) +- 6d4: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5 +- 6d8: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5 +- 6dc: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\) +- 6e0: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5 +- 6e4: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5 +- 6e8: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5 +- 6ec: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5 +- 6f0: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5 +- 6f4: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5 +- 6f8: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5 +- 6fc: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5 +- 700: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5 +- 704: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5 +- 708: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5 +- 70c: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5 +- 710: (20 64 00 05|05 00 64 20) subfic r3,r4,5 +- 714: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4 +- 718: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4 +- 71c: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4 +- 720: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4 +- 724: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5 +- 728: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5 +- 72c: (7c 64 01 90|90 01 64 7c) subfze r3,r4 +- 730: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4 +- 734: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4 +- 738: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4 +- 73c: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8 +- 740: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7 +- 744: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12 +- 748: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14 +- 74c: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14 +- 750: (7c 00 04 6c|6c 04 00 7c) tlbsync +- 754: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 758: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 75c: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1 +- 760: (7f e0 00 08|08 00 e0 7f) trap +- 764: (7f e0 00 08|08 00 e0 7f) trap +- 768: (7c 83 20 08|08 20 83 7c) tweq r3,r4 +- 76c: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 +- 770: (7c 83 20 08|08 20 83 7c) tweq r3,r4 +- 774: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 +- 778: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 +- 77c: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 +- 780: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 +- 784: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 +- 788: (7c 60 01 06|06 01 60 7c) wrtee r3 +- 78c: (7c 00 81 46|46 81 00 7c) wrteei 1 +- 790: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31 +- 794: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31 +- 798: (68 83 de ad|ad de 83 68) xori r3,r4,57005 +- 79c: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005 ++.*: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5 ++.*: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5 ++.*: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5 ++.*: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5 ++.*: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5 ++.*: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5 ++.*: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5 ++.*: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5 ++.*: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5 ++.*: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5 ++.*: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128 ++.*: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128 ++.*: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128 ++.*: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128 ++.*: (7c 64 01 d4|d4 01 64 7c) addme r3,r4 ++.*: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4 ++.*: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4 ++.*: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4 ++.*: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5 ++.*: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5 ++.*: (7c 64 01 94|94 01 64 7c) addze r3,r4 ++.*: (7c 64 01 95|95 01 64 7c) addze\. r3,r4 ++.*: (7c 64 05 94|94 05 64 7c) addzeo r3,r4 ++.*: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4 ++.*: (7c 83 28 38|38 28 83 7c) and r3,r4,r5 ++.*: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5 ++.*: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15 ++.*: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18 ++.*: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005 ++.*: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005 ++.*: (48 00 00 02|02 00 00 48) ba 0 ++.*: (40 01 00 00|00 00 01 40) bdnzf gt,7c ++.*: (40 85 00 02|02 00 85 40) blea cr1,0 ++.*: (4d 80 04 20|20 04 80 4d) bltctr ++.*: (4c 8a 04 20|20 04 8a 4c) bnectr cr2 ++.*: (4c 86 04 20|20 04 86 4c) bnectr cr1 ++.*: (4c 86 04 20|20 04 86 4c) bnectr cr1 ++.*: (4d 80 04 21|21 04 80 4d) bltctrl ++.*: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2 ++.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1 ++.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1 ++.*: (40 43 00 01|01 00 43 40) bdzfl so,a4 ++.*: (4d 80 00 20|20 00 80 4d) bltlr ++.*: (4c 8a 00 20|20 00 8a 4c) bnelr cr2 ++.*: (4c 86 00 20|20 00 86 4c) bnelr cr1 ++.*: (4c 86 00 20|20 00 86 4c) bnelr cr1 ++.*: (4d 80 00 21|21 00 80 4d) bltlrl ++.*: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2 ++.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1 ++.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1 ++.*: (48 00 00 00|00 00 00 48) b c8 ++.*: (48 00 00 01|01 00 00 48) bl cc ++.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 ++.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 ++.*: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4 ++.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 ++.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 ++.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 ++.*: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167 ++.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 ++.*: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4 ++.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 ++.*: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167 ++.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 ++.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 ++.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 ++.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 ++.*: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11 ++.*: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11 ++.*: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq ++.*: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt ++.*: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt ++.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so ++.*: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq ++.*: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so ++.*: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt ++.*: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt ++.*: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10 ++.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 ++.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 ++.*: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7 ++.*: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6 ++.*: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7 ++.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 ++.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 ++.*: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6 ++.*: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9 ++.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 ++.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 ++.*: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7 ++.*: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12 ++.*: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2 ++.*: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6 ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 20 03 8c|8c 03 20 7c) dci 1 ++.*: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12 ++.*: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13 ++.*: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12 ++.*: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13 ++.*: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12 ++.*: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13 ++.*: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12 ++.*: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13 ++.*: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5 ++.*: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5 ++.*: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12 ++.*: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12 ++.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 ++.*: (7c 83 07 74|74 07 83 7c) extsb r3,r4 ++.*: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4 ++.*: (7c 83 07 34|34 07 83 7c) extsh r3,r4 ++.*: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4 ++.*: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31 ++.*: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31 ++.*: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12 ++.*: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12 ++.*: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12 ++.*: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12 ++.*: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11 ++.*: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11 ++.*: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11 ++.*: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5 ++.*: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12 ++.*: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12 ++.*: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11 ++.*: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11 ++.*: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11 ++.*: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11 ++.*: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11 ++.*: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11 ++.*: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11 ++.*: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11 ++.*: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12 ++.*: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12 ++.*: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12 ++.*: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12 ++.*: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13 ++.*: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13 ++.*: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13 ++.*: (fc 60 20 90|90 20 60 fc) fmr f3,f4 ++.*: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4 ++.*: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13 ++.*: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13 ++.*: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13 ++.*: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13 ++.*: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12 ++.*: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12 ++.*: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12 ++.*: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12 ++.*: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30 ++.*: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30 ++.*: (fc 60 20 50|50 20 60 fc) fneg f3,f4 ++.*: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4 ++.*: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13 ++.*: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13 ++.*: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13 ++.*: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13 ++.*: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13 ++.*: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13 ++.*: (fd c0 78 30|30 78 c0 fd) fre f14,f15 ++.*: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15 ++.*: (ed c0 78 30|30 78 c0 ed) fres f14,f15 ++.*: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15 ++.*: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11 ++.*: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11 ++.*: (fd 40 5b 10|10 5b 40 fd) frin f10,f11 ++.*: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11 ++.*: (fd 40 5b 90|90 5b 40 fd) frip f10,f11 ++.*: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11 ++.*: (fd 40 5b 50|50 5b 40 fd) friz f10,f11 ++.*: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11 ++.*: (fc c0 38 18|18 38 c0 fc) frsp f6,f7 ++.*: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9 ++.*: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15 ++.*: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15 ++.*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15 ++.*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15 ++.*: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13 ++.*: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13 ++.*: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11 ++.*: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11 ++.*: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11 ++.*: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11 ++.*: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12 ++.*: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12 ++.*: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12 ++.*: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12 ++.*: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4 ++.*: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18 ++.*: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9 ++.*: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15 ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 20 07 8c|8c 07 20 7c) ici 1 ++.*: (7c 03 27 cc|cc 27 03 7c) icread r3,r4 ++.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 ++.*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28 ++.*: (4c 00 01 2c|2c 01 00 4c) isync ++.*: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\) ++.*: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\) ++.*: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22 ++.*: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5 ++.*: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\) ++.*: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\) ++.*: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22 ++.*: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15 ++.*: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4 ++.*: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\) ++.*: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\) ++.*: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12 ++.*: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12 ++.*: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\) ++.*: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\) ++.*: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11 ++.*: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11 ++.*: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5 ++.*: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\) ++.*: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\) ++.*: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24 ++.*: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25 ++.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 ++.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 ++.*: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1 ++.*: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5 ++.*: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\) ++.*: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\) ++.*: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5 ++.*: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5 ++.*: (10 64 29 58|58 29 64 10) macchw r3,r4,r5 ++.*: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5 ++.*: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5 ++.*: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5 ++.*: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5 ++.*: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5 ++.*: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5 ++.*: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5 ++.*: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5 ++.*: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5 ++.*: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5 ++.*: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5 ++.*: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5 ++.*: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5 ++.*: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5 ++.*: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5 ++.*: (10 64 28 58|58 28 64 10) machhw r3,r4,r5 ++.*: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5 ++.*: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5 ++.*: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5 ++.*: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5 ++.*: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5 ++.*: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5 ++.*: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5 ++.*: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5 ++.*: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5 ++.*: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5 ++.*: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5 ++.*: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5 ++.*: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5 ++.*: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5 ++.*: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5 ++.*: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5 ++.*: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5 ++.*: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5 ++.*: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5 ++.*: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5 ++.*: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5 ++.*: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5 ++.*: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5 ++.*: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5 ++.*: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5 ++.*: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5 ++.*: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5 ++.*: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5 ++.*: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5 ++.*: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5 ++.*: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5 ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 20 06 ac|ac 06 20 7c) mbar 1 ++.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 ++.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 ++.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234 ++.*: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4 ++.*: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5 ++.*: (ff c0 04 8e|8e 04 c0 ff) mffs f30 ++.*: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31 ++.*: (7e 60 00 a6|a6 00 60 7e) mfmsr r19 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128 ++.*: (7c 6c 42 a6|a6 42 6c 7c) mftb r3 ++.*: (7c 00 04 ac|ac 04 00 7c) msync ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 ++.*: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8 ++.*: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4 ++.*: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7 ++.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 ++.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 ++.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 ++.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 ++.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 ++.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 ++.*: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1 ++.*: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1 ++.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 ++.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 ++.*: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1 ++.*: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3 ++.*: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5 ++.*: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5 ++.*: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5 ++.*: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5 ++.*: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5 ++.*: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5 ++.*: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5 ++.*: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5 ++.*: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5 ++.*: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5 ++.*: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5 ++.*: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5 ++.*: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5 ++.*: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5 ++.*: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5 ++.*: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5 ++.*: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5 ++.*: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5 ++.*: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5 ++.*: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5 ++.*: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5 ++.*: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30 ++.*: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30 ++.*: (7c 64 00 d0|d0 00 64 7c) neg r3,r4 ++.*: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4 ++.*: (7e 11 04 d0|d0 04 11 7e) nego r16,r17 ++.*: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19 ++.*: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5 ++.*: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5 ++.*: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5 ++.*: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5 ++.*: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5 ++.*: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5 ++.*: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5 ++.*: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5 ++.*: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5 ++.*: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5 ++.*: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5 ++.*: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5 ++.*: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5 ++.*: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5 ++.*: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5 ++.*: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5 ++.*: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5 ++.*: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5 ++.*: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5 ++.*: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5 ++.*: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5 ++.*: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5 ++.*: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5 ++.*: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5 ++.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 ++.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 ++.*: (7c 40 23 78|78 23 40 7c) or r0,r2,r4 ++.*: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16 ++.*: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17 ++.*: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20 ++.*: (60 21 00 00|00 00 21 60) ori r1,r1,0 ++.*: (64 83 de ad|ad de 83 64) oris r3,r4,57005 ++.*: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4 ++.*: (7c 83 01 34|34 01 83 7c) prtyw r3,r4 ++.*: (4c 00 00 66|66 00 00 4c) rfci ++.*: (4c 00 00 64|64 00 00 4c) rfi ++.*: (4c 00 00 4c|4c 00 00 4c) rfmci ++.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 ++.*: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27 ++.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 ++.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 ++.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 ++.*: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27 ++.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 ++.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 ++.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 ++.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 ++.*: (44 00 00 02|02 00 00 44) sc ++.*: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5 ++.*: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5 ++.*: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5 ++.*: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5 ++.*: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16 ++.*: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16 ++.*: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5 ++.*: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5 ++.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 ++.*: (99 61 00 02|02 00 61 99) stb r11,2\(r1\) ++.*: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\) ++.*: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15 ++.*: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5 ++.*: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\) ++.*: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\) ++.*: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2 ++.*: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31 ++.*: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4 ++.*: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\) ++.*: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\) ++.*: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28 ++.*: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25 ++.*: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\) ++.*: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8 ++.*: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\) ++.*: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23 ++.*: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14 ++.*: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\) ++.*: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5 ++.*: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5 ++.*: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\) ++.*: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5 ++.*: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5 ++.*: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5 ++.*: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5 ++.*: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5 ++.*: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5 ++.*: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5 ++.*: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5 ++.*: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5 ++.*: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5 ++.*: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5 ++.*: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5 ++.*: (20 64 00 05|05 00 64 20) subfic r3,r4,5 ++.*: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4 ++.*: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4 ++.*: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4 ++.*: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4 ++.*: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5 ++.*: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5 ++.*: (7c 64 01 90|90 01 64 7c) subfze r3,r4 ++.*: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4 ++.*: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4 ++.*: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4 ++.*: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8 ++.*: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7 ++.*: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12 ++.*: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14 ++.*: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14 ++.*: (7c 00 04 6c|6c 04 00 7c) tlbsync ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1 ++.*: (7f e0 00 08|08 00 e0 7f) trap ++.*: (7f e0 00 08|08 00 e0 7f) trap ++.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4 ++.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 ++.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4 ++.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 ++.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 ++.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 ++.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 ++.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 ++.*: (7c 60 01 06|06 01 60 7c) wrtee r3 ++.*: (7c 00 81 46|46 81 00 7c) wrteei 1 ++.*: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31 ++.*: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31 ++.*: (68 83 de ad|ad de 83 68) xori r3,r4,57005 ++.*: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005 +diff --git a/gas/testsuite/gas/ppc/476.s b/gas/testsuite/gas/ppc/476.s +index da6fb7152f..db5d9e153b 100644 +--- a/gas/testsuite/gas/ppc/476.s ++++ b/gas/testsuite/gas/ppc/476.s +@@ -226,9 +226,6 @@ ppc476: + lhzu 14,2(1) + lhzux 20,22,24 + lhzx 23,24,25 +- lmw 3,-16(1) +- lswi 5,4,16 +- lswx 3,4,5 + lwarx 3,4,5 + lwarx 3,4,5,0 + lwarx 3,4,5,1 +@@ -433,9 +430,6 @@ ppc476: + sthu 18,12(1) + sthux 21,22,23 + sthx 12,13,14 +- stmw 6,-16(1) +- stswi 3,4,16 +- stswx 3,4,5 + stw 6,-16(7) + stwbrx 3,4,5 + stwcx. 3,4,5 +diff --git a/gas/testsuite/gas/ppc/a2.d b/gas/testsuite/gas/ppc/a2.d +index fa7211943a..517ec1c368 100644 +--- a/gas/testsuite/gas/ppc/a2.d ++++ b/gas/testsuite/gas/ppc/a2.d +@@ -9,577 +9,569 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6 +- 4: (7c 85 32 14|14 32 85 7c) add r4,r5,r6 +- 8: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6 +- c: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6 +- 10: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6 +- 14: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6 +- 18: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6 +- 1c: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6 +- 20: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6 +- 24: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6 +- 28: (38 85 00 0d|0d 00 85 38) addi r4,r5,13 +- 2c: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13 +- 30: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13 +- 34: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13 +- 38: (30 85 00 0d|0d 00 85 30) addic r4,r5,13 +- 3c: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13 +- 40: (3c 85 00 17|17 00 85 3c) addis r4,r5,23 +- 44: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23 +- 48: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5 +- 4c: (7c 85 01 d4|d4 01 85 7c) addme r4,r5 +- 50: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5 +- 54: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5 +- 58: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6 +- 5c: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6 +- 60: (7c 85 01 95|95 01 85 7c) addze\. r4,r5 +- 64: (7c 85 01 94|94 01 85 7c) addze r4,r5 +- 68: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5 +- 6c: (7c 85 05 94|94 05 85 7c) addzeo r4,r5 +- 70: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6 +- 74: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6 +- 78: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6 +- 7c: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6 +- 80: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6 +- 84: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6 +- 88: (00 00 02 00|00 02 00 00) attn +- 8c: (48 00 00 02|02 00 00 48) ba 0 +- 8c: R_PPC(|64)_ADDR24 label_abs +- 90: (40 8a 00 00|00 00 8a 40) bne cr2,90 +- 90: R_PPC(|64)_REL14 foo +- 94: (40 ca 00 00|00 00 ca 40) bne- cr2,94 +- 94: R_PPC(|64)_REL14 foo +- 98: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 +- 98: R_PPC(|64)_REL14 foo +- 9c: (40 85 00 02|02 00 85 40) blea cr1,0 +- 9c: R_PPC(|64)_ADDR14 foo_abs +- a0: (40 c5 00 02|02 00 c5 40) blea- cr1,0 +- a0: R_PPC(|64)_ADDR14 foo_abs +- a4: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 +- a4: R_PPC(|64)_ADDR14 foo_abs +- a8: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1 +- ac: (4c c6 04 20|20 04 c6 4c) bnectr- cr1 +- b0: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1 +- b4: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1 +- b8: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1 +- bc: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1 +- c0: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 +- c0: R_PPC(|64)_REL14 foo +- c4: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 +- c4: R_PPC(|64)_REL14 foo +- c8: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 +- c8: R_PPC(|64)_REL14 foo +- cc: (40 85 00 03|03 00 85 40) blela cr1,0 +- cc: R_PPC(|64)_ADDR14 foo_abs +- d0: (40 c5 00 03|03 00 c5 40) blela- cr1,0 +- d0: R_PPC(|64)_ADDR14 foo_abs +- d4: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 +- d4: R_PPC(|64)_ADDR14 foo_abs +- d8: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1 +- dc: (4c c6 00 20|20 00 c6 4c) bnelr- cr1 +- e0: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1 +- e4: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1 +- e8: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1 +- ec: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1 +- f0: (48 00 00 00|00 00 00 48) b f0 +- f0: R_PPC(|64)_REL24 label +- f4: (48 00 00 03|03 00 00 48) bla 0 +- f4: R_PPC(|64)_ADDR24 label_abs +- f8: (48 00 00 01|01 00 00 48) bl f8 +- f8: R_PPC(|64)_REL24 label +- fc: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12 +- 100: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8 +- 104: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12 +- 108: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13 +- 10c: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13 +- 110: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8 +- 114: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100 +- 118: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21 +- 11c: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21 +- 120: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21 +- 124: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21 +- 128: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so +- 12c: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so +- 130: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so +- 134: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so +- 138: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so +- 13c: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so +- 140: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so +- 144: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so +- 148: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11 +- 14c: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11 +- 150: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11 +- 154: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11 +- 158: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11 +- 15c: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11 +- 160: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11 +- 164: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11 +- 168: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11 +- 16c: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11 +- 170: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11 +- 174: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12 +- 178: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11 +- 17c: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11 +- 180: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11 +- 184: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11 +- 188: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12 +- 18c: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11 +- 190: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11 +- 194: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11 +- 198: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11 +- 19c: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a0: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a4: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a8: (7d 40 03 8c|8c 03 40 7d) dci 10 +- 1ac: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22 +- 1b0: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22 +- 1b4: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22 +- 1b8: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22 +- 1bc: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22 +- 1c0: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22 +- 1c4: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22 +- 1c8: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22 +- 1cc: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22 +- 1d0: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22 +- 1d4: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22 +- 1d8: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22 +- 1dc: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22 +- 1e0: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22 +- 1e4: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22 +- 1e8: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22 +- 1ec: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22 +- 1f0: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22 +- 1f4: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11 +- 1f8: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11 +- 1fc: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11 +- 200: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12 +- 204: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0 +- 208: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3 +- 20c: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12 +- 210: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12 +- 214: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0 +- 218: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3 +- 21c: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11 +- 220: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11 +- 224: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11 +- 228: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11 +- 22c: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11 +- 230: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11 +- 234: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21 +- 238: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21 +- 23c: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22 +- 240: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22 +- 244: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22 +- 248: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22 +- 24c: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21 +- 250: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21 +- 254: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21 +- 258: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21 +- 25c: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21 +- 260: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21 +- 264: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22 +- 268: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22 +- 26c: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21 +- 270: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21 +- 274: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21 +- 278: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21 +- 27c: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21 +- 280: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21 +- 284: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21 +- 288: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21 +- 28c: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22 +- 290: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22 +- 294: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22 +- 298: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22 +- 29c: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23 +- 2a0: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23 +- 2a4: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23 +- 2a8: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23 +- 2ac: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21 +- 2b0: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21 +- 2b4: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23 +- 2b8: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23 +- 2bc: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23 +- 2c0: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23 +- 2c4: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22 +- 2c8: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22 +- 2cc: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22 +- 2d0: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22 +- 2d4: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21 +- 2d8: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21 +- 2dc: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21 +- 2e0: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21 +- 2e4: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23 +- 2e8: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23 +- 2ec: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23 +- 2f0: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23 +- 2f4: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23 +- 2f8: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23 +- 2fc: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23 +- 300: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23 +- 304: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 +- 308: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 +- 30c: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 +- 310: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 +- 314: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1 +- 318: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1 +- 31c: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 +- 320: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 +- 324: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 +- 328: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 +- 32c: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1 +- 330: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1 +- 334: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21 +- 338: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21 +- 33c: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21 +- 340: (fe 80 ab 10|10 ab 80 fe) frin f20,f21 +- 344: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21 +- 348: (fe 80 ab 90|90 ab 80 fe) frip f20,f21 +- 34c: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21 +- 350: (fe 80 ab 50|50 ab 80 fe) friz f20,f21 +- 354: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21 +- 358: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21 +- 35c: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 +- 360: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 +- 364: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 +- 368: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 +- 36c: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1 +- 370: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1 +- 374: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 +- 378: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 +- 37c: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 +- 380: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 +- 384: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1 +- 388: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1 +- 38c: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23 +- 390: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23 +- 394: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21 +- 398: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21 +- 39c: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21 +- 3a0: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21 +- 3a4: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22 +- 3a8: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22 +- 3ac: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22 +- 3b0: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22 +- 3b4: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11 +- 3b8: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11 +- 3bc: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11 +- 3c0: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11 +- 3c4: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11 +- 3c8: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11 +- 3cc: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d0: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d4: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d8: (7d 40 07 8c|8c 07 40 7d) ici 10 +- 3dc: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12 +- 3e0: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12 +- 3e4: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23 +- 3e8: (4c 00 01 2c|2c 01 00 4c) isync +- 3ec: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12 +- 3f0: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\) +- 3f4: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\) +- 3f8: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\) +- 3fc: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\) +- 400: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13 +- 404: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13 +- 408: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\) +- 40c: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\) +- 410: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12 +- 414: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1 +- 418: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12 +- 41c: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12 +- 420: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\) +- 424: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\) +- 428: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12 +- 42c: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12 +- 430: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\) +- 434: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\) +- 438: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11 +- 43c: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\) +- 440: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\) +- 444: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11 +- 448: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11 +- 44c: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11 +- 450: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11 +- 454: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\) +- 458: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\) +- 45c: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\) +- 460: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\) +- 464: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11 +- 468: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11 +- 46c: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\) +- 470: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\) +- 474: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12 +- 478: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12 +- 47c: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12 +- 480: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12 +- 484: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\) +- 488: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\) +- 48c: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\) +- 490: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\) +- 494: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12 +- 498: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12 +- 49c: (ba 8a 00 10|10 00 8a ba) lmw r20,16\(r10\) +- 4a0: (7d 4b 0c aa|aa 0c 4b 7d) lswi r10,r11,1 +- 4a4: (7d 8b 04 aa|aa 04 8b 7d) lswi r12,r11,32 +- 4a8: (7d 4b 64 2a|2a 64 4b 7d) lswx r10,r11,r12 +- 4ac: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\) +- 4b0: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\) +- 4b4: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12 +- 4b8: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1 +- 4bc: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12 +- 4c0: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12 +- 4c4: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12 +- 4c8: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12 +- 4cc: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\) +- 4d0: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\) +- 4d4: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\) +- 4d8: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\) +- 4dc: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12 +- 4e0: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12 +- 4e4: (7c 00 06 ac|ac 06 00 7c) mbar +- 4e8: (7c 00 06 ac|ac 06 00 7c) mbar +- 4ec: (7c 00 06 ac|ac 06 00 7c) mbar +- 4f0: (7c 20 06 ac|ac 06 20 7c) mbar 1 +- 4f4: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 +- 4f8: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 +- 4fc: (7c 00 04 00|00 04 00 7c) mcrxr cr0 +- 500: (7d 80 04 00|00 04 80 7d) mcrxr cr3 +- 504: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 508: (7c 70 20 26|26 20 70 7c) mfocrf r3,2 +- 50c: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 +- 510: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 514: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234 +- 518: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234 +- 51c: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11 +- 520: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11 +- 524: (fe 80 04 8f|8f 04 80 fe) mffs\. f20 +- 528: (fe 80 04 8e|8e 04 80 fe) mffs f20 +- 52c: (7d 40 00 a6|a6 00 40 7d) mfmsr r10 +- 530: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 +- 534: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 538: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234 +- 53c: (7d 4c 42 a6|a6 42 4c 7d) mftb r10 +- 540: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10 +- 544: (7c 00 51 dc|dc 51 00 7c) msgclr r10 +- 548: (7c 00 51 9c|9c 51 00 7c) msgsnd r10 +- 54c: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3 +- 550: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 +- 554: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 558: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 +- 55c: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10 +- 560: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10 +- 564: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11 +- 568: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11 +- 56c: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 +- 570: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 +- 574: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 +- 578: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 +- 57c: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 +- 580: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 +- 584: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 +- 588: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 +- 58c: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1 +- 590: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1 +- 594: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0 +- 598: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 59c: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13 +- 5a0: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13 +- 5a4: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1 +- 5a8: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1 +- 5ac: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 5b0: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 5b4: (7d 41 01 24|24 01 41 7d) mtmsr r10,1 +- 5b8: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 +- 5bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 5c0: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10 +- 5c4: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22 +- 5c8: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22 +- 5cc: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22 +- 5d0: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22 +- 5d4: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22 +- 5d8: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22 +- 5dc: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22 +- 5e0: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22 +- 5e4: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22 +- 5e8: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22 +- 5ec: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22 +- 5f0: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22 +- 5f4: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100 +- 5f8: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100 +- 5fc: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22 +- 600: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22 +- 604: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22 +- 608: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22 +- 60c: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22 +- 610: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22 +- 614: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21 +- 618: (7e 95 00 d0|d0 00 95 7e) neg r20,r21 +- 61c: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21 +- 620: (7e 95 04 d0|d0 04 95 7e) nego r20,r21 +- 624: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 +- 628: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 +- 62c: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22 +- 630: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22 +- 634: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22 +- 638: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22 +- 63c: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096 +- 640: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096 +- 644: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11 +- 648: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11 +- 64c: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11 +- 650: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11 +- 654: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11 +- 658: (4c 00 00 66|66 00 00 4c) rfci +- 65c: (4c 00 00 cc|cc 00 00 4c) rfgi +- 660: (4c 00 00 64|64 00 00 4c) rfi +- 664: (4c 00 00 4c|4c 00 00 4c) rfmci +- 668: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63 +- 66c: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63 +- 670: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63 +- 674: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63 +- 678: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63 +- 67c: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63 +- 680: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63 +- 684: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63 +- 688: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63 +- 68c: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63 +- 690: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63 +- 694: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63 +- 698: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31 +- 69c: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31 +- 6a0: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23 +- 6a4: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23 +- 6a8: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23 +- 6ac: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23 +- 6b0: (44 00 00 02|02 00 00 44) sc +- 6b4: (44 00 0c 82|82 0c 00 44) sc 100 +- 6b8: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12 +- 6bc: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12 +- 6c0: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12 +- 6c4: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12 +- 6c8: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12 +- 6cc: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12 +- 6d0: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63 +- 6d4: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63 +- 6d8: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12 +- 6dc: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12 +- 6e0: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31 +- 6e4: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31 +- 6e8: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12 +- 6ec: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12 +- 6f0: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12 +- 6f4: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12 +- 6f8: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\) +- 6fc: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\) +- 700: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12 +- 704: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\) +- 708: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\) +- 70c: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12 +- 710: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12 +- 714: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\) +- 718: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\) +- 71c: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12 +- 720: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12 +- 724: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12 +- 728: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\) +- 72c: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\) +- 730: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12 +- 734: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12 +- 738: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\) +- 73c: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\) +- 740: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11 +- 744: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\) +- 748: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\) +- 74c: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11 +- 750: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11 +- 754: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11 +- 758: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\) +- 75c: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\) +- 760: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\) +- 764: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\) +- 768: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11 +- 76c: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11 +- 770: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\) +- 774: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\) +- 778: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\) +- 77c: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\) +- 780: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12 +- 784: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12 +- 788: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\) +- 78c: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\) +- 790: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12 +- 794: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12 +- 798: (be 8a 00 10|10 00 8a be) stmw r20,16\(r10\) +- 79c: (7d 4b 0d aa|aa 0d 4b 7d) stswi r10,r11,1 +- 7a0: (7d 4b 05 aa|aa 05 4b 7d) stswi r10,r11,32 +- 7a4: (7d 4b 65 2a|2a 65 4b 7d) stswx r10,r11,r12 +- 7a8: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12 +- 7ac: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12 +- 7b0: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12 +- 7b4: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\) +- 7b8: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\) +- 7bc: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12 +- 7c0: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12 +- 7c4: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22 +- 7c8: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22 +- 7cc: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22 +- 7d0: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22 +- 7d4: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22 +- 7d8: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22 +- 7dc: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22 +- 7e0: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22 +- 7e4: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22 +- 7e8: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22 +- 7ec: (22 95 00 64|64 00 95 22) subfic r20,r21,100 +- 7f0: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100 +- 7f4: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21 +- 7f8: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21 +- 7fc: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21 +- 800: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21 +- 804: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22 +- 808: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22 +- 80c: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21 +- 810: (7e 95 01 90|90 01 95 7e) subfze r20,r21 +- 814: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21 +- 818: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21 +- 81c: (7c 00 04 ac|ac 04 00 7c) hwsync +- 820: (7c 00 04 ac|ac 04 00 7c) hwsync +- 824: (7c 00 04 ac|ac 04 00 7c) hwsync +- 828: (7c 20 04 ac|ac 04 20 7c) lwsync +- 82c: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11 +- 830: (08 aa 00 64|64 00 aa 08) tdlgei r10,100 +- 834: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100 +- 838: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11 +- 83c: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11 +- 840: (7c 00 07 64|64 07 00 7c) tlbre +- 844: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7 +- 848: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11 +- 84c: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12 +- 850: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12 +- 854: (7c 00 04 6c|6c 04 00 7c) tlbsync +- 858: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 85c: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7 +- 860: (7c aa 58 08|08 58 aa 7c) twlge r10,r11 +- 864: (0c aa 00 64|64 00 aa 0c) twlgei r10,100 +- 868: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100 +- 86c: (7c 00 00 7c|7c 00 00 7c) wait +- 870: (7c 00 00 7c|7c 00 00 7c) wait +- 874: (7c 20 00 7c|7c 00 20 7c) waitrsv +- 878: (7c 40 00 7c|7c 00 40 7c) waitimpl +- 87c: (7c 40 00 7c|7c 00 40 7c) waitimpl +- 880: (7c 20 00 7c|7c 00 20 7c) waitrsv +- 884: (7c 00 01 6c|6c 01 00 7c) wchkall +- 888: (7c 00 01 6c|6c 01 00 7c) wchkall +- 88c: (7d 80 01 6c|6c 01 80 7d) wchkall cr3 +- 890: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11 +- 894: (7c 20 07 4c|4c 07 20 7c) wclrall 1 +- 898: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11 +- 89c: (7d 40 01 06|06 01 40 7d) wrtee r10 +- 8a0: (7c 00 81 46|46 81 00 7c) wrteei 1 +- 8a4: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12 +- 8a8: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12 +- 8ac: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096 +- 8b0: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096 ++.*: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6 ++.*: (7c 85 32 14|14 32 85 7c) add r4,r5,r6 ++.*: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6 ++.*: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6 ++.*: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6 ++.*: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6 ++.*: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6 ++.*: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6 ++.*: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6 ++.*: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6 ++.*: (38 85 00 0d|0d 00 85 38) addi r4,r5,13 ++.*: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13 ++.*: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13 ++.*: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13 ++.*: (30 85 00 0d|0d 00 85 30) addic r4,r5,13 ++.*: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13 ++.*: (3c 85 00 17|17 00 85 3c) addis r4,r5,23 ++.*: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23 ++.*: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5 ++.*: (7c 85 01 d4|d4 01 85 7c) addme r4,r5 ++.*: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5 ++.*: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5 ++.*: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6 ++.*: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6 ++.*: (7c 85 01 95|95 01 85 7c) addze\. r4,r5 ++.*: (7c 85 01 94|94 01 85 7c) addze r4,r5 ++.*: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5 ++.*: (7c 85 05 94|94 05 85 7c) addzeo r4,r5 ++.*: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6 ++.*: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6 ++.*: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6 ++.*: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6 ++.*: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6 ++.*: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6 ++.*: (00 00 02 00|00 02 00 00) attn ++.*: (48 00 00 02|02 00 00 48) ba 0 ++.*: R_PPC(|64)_ADDR24 label_abs ++.*: (40 8a 00 00|00 00 8a 40) bne cr2,90 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ca 00 00|00 00 ca 40) bne- cr2,94 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 85 00 02|02 00 85 40) blea cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 c5 00 02|02 00 c5 40) blea- cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1 ++.*: (4c c6 04 20|20 04 c6 4c) bnectr- cr1 ++.*: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1 ++.*: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1 ++.*: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1 ++.*: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1 ++.*: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 85 00 03|03 00 85 40) blela cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 c5 00 03|03 00 c5 40) blela- cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1 ++.*: (4c c6 00 20|20 00 c6 4c) bnelr- cr1 ++.*: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1 ++.*: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1 ++.*: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1 ++.*: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1 ++.*: (48 00 00 00|00 00 00 48) b f0 ++.*: R_PPC(|64)_REL24 label ++.*: (48 00 00 03|03 00 00 48) bla 0 ++.*: R_PPC(|64)_ADDR24 label_abs ++.*: (48 00 00 01|01 00 00 48) bl f8 ++.*: R_PPC(|64)_REL24 label ++.*: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12 ++.*: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8 ++.*: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12 ++.*: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13 ++.*: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13 ++.*: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8 ++.*: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100 ++.*: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21 ++.*: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21 ++.*: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21 ++.*: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21 ++.*: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so ++.*: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so ++.*: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so ++.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so ++.*: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so ++.*: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so ++.*: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so ++.*: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so ++.*: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11 ++.*: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11 ++.*: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11 ++.*: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11 ++.*: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11 ++.*: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11 ++.*: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11 ++.*: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11 ++.*: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11 ++.*: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11 ++.*: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11 ++.*: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12 ++.*: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11 ++.*: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11 ++.*: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11 ++.*: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11 ++.*: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12 ++.*: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11 ++.*: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11 ++.*: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11 ++.*: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11 ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7d 40 03 8c|8c 03 40 7d) dci 10 ++.*: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22 ++.*: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22 ++.*: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22 ++.*: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22 ++.*: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22 ++.*: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22 ++.*: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22 ++.*: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22 ++.*: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22 ++.*: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22 ++.*: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22 ++.*: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22 ++.*: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22 ++.*: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22 ++.*: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22 ++.*: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22 ++.*: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22 ++.*: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22 ++.*: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11 ++.*: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11 ++.*: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11 ++.*: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12 ++.*: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0 ++.*: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3 ++.*: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12 ++.*: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12 ++.*: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0 ++.*: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3 ++.*: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11 ++.*: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11 ++.*: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11 ++.*: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11 ++.*: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11 ++.*: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11 ++.*: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21 ++.*: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21 ++.*: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22 ++.*: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22 ++.*: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22 ++.*: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22 ++.*: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21 ++.*: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21 ++.*: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21 ++.*: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21 ++.*: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21 ++.*: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21 ++.*: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22 ++.*: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22 ++.*: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21 ++.*: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21 ++.*: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21 ++.*: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21 ++.*: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21 ++.*: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21 ++.*: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21 ++.*: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21 ++.*: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22 ++.*: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22 ++.*: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22 ++.*: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22 ++.*: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23 ++.*: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23 ++.*: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23 ++.*: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23 ++.*: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21 ++.*: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21 ++.*: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23 ++.*: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23 ++.*: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23 ++.*: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23 ++.*: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22 ++.*: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22 ++.*: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22 ++.*: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22 ++.*: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21 ++.*: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21 ++.*: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21 ++.*: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21 ++.*: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23 ++.*: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23 ++.*: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23 ++.*: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23 ++.*: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23 ++.*: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23 ++.*: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23 ++.*: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23 ++.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 ++.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 ++.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 ++.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 ++.*: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1 ++.*: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1 ++.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 ++.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 ++.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 ++.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 ++.*: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1 ++.*: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1 ++.*: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21 ++.*: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21 ++.*: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21 ++.*: (fe 80 ab 10|10 ab 80 fe) frin f20,f21 ++.*: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21 ++.*: (fe 80 ab 90|90 ab 80 fe) frip f20,f21 ++.*: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21 ++.*: (fe 80 ab 50|50 ab 80 fe) friz f20,f21 ++.*: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21 ++.*: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21 ++.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 ++.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 ++.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 ++.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 ++.*: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1 ++.*: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1 ++.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 ++.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 ++.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 ++.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 ++.*: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1 ++.*: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1 ++.*: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23 ++.*: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23 ++.*: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21 ++.*: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21 ++.*: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21 ++.*: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21 ++.*: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22 ++.*: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22 ++.*: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22 ++.*: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22 ++.*: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11 ++.*: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11 ++.*: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11 ++.*: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11 ++.*: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11 ++.*: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11 ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7d 40 07 8c|8c 07 40 7d) ici 10 ++.*: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12 ++.*: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12 ++.*: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23 ++.*: (4c 00 01 2c|2c 01 00 4c) isync ++.*: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12 ++.*: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\) ++.*: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\) ++.*: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\) ++.*: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\) ++.*: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13 ++.*: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13 ++.*: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\) ++.*: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\) ++.*: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12 ++.*: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1 ++.*: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12 ++.*: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12 ++.*: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\) ++.*: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\) ++.*: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12 ++.*: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12 ++.*: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\) ++.*: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\) ++.*: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11 ++.*: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\) ++.*: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\) ++.*: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11 ++.*: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11 ++.*: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11 ++.*: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11 ++.*: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\) ++.*: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\) ++.*: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\) ++.*: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\) ++.*: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11 ++.*: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11 ++.*: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\) ++.*: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\) ++.*: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12 ++.*: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12 ++.*: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12 ++.*: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12 ++.*: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\) ++.*: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\) ++.*: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\) ++.*: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\) ++.*: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12 ++.*: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12 ++.*: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\) ++.*: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\) ++.*: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12 ++.*: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1 ++.*: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12 ++.*: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12 ++.*: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12 ++.*: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12 ++.*: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\) ++.*: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\) ++.*: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\) ++.*: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\) ++.*: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12 ++.*: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12 ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 20 06 ac|ac 06 20 7c) mbar 1 ++.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 ++.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 ++.*: (7c 00 04 00|00 04 00 7c) mcrxr cr0 ++.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c 70 20 26|26 20 70 7c) mfocrf r3,2 ++.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234 ++.*: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234 ++.*: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11 ++.*: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11 ++.*: (fe 80 04 8f|8f 04 80 fe) mffs\. f20 ++.*: (fe 80 04 8e|8e 04 80 fe) mffs f20 ++.*: (7d 40 00 a6|a6 00 40 7d) mfmsr r10 ++.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234 ++.*: (7d 4c 42 a6|a6 42 4c 7d) mftb r10 ++.*: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10 ++.*: (7c 00 51 dc|dc 51 00 7c) msgclr r10 ++.*: (7c 00 51 9c|9c 51 00 7c) msgsnd r10 ++.*: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3 ++.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 ++.*: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10 ++.*: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10 ++.*: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11 ++.*: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11 ++.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 ++.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 ++.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 ++.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 ++.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 ++.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 ++.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 ++.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 ++.*: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1 ++.*: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1 ++.*: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13 ++.*: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13 ++.*: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1 ++.*: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7d 41 01 24|24 01 41 7d) mtmsr r10,1 ++.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10 ++.*: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22 ++.*: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22 ++.*: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22 ++.*: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22 ++.*: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22 ++.*: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22 ++.*: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22 ++.*: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22 ++.*: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22 ++.*: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22 ++.*: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22 ++.*: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22 ++.*: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100 ++.*: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100 ++.*: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22 ++.*: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22 ++.*: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22 ++.*: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22 ++.*: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22 ++.*: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22 ++.*: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21 ++.*: (7e 95 00 d0|d0 00 95 7e) neg r20,r21 ++.*: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21 ++.*: (7e 95 04 d0|d0 04 95 7e) nego r20,r21 ++.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 ++.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 ++.*: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22 ++.*: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22 ++.*: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22 ++.*: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22 ++.*: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096 ++.*: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096 ++.*: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11 ++.*: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11 ++.*: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11 ++.*: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11 ++.*: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11 ++.*: (4c 00 00 66|66 00 00 4c) rfci ++.*: (4c 00 00 cc|cc 00 00 4c) rfgi ++.*: (4c 00 00 64|64 00 00 4c) rfi ++.*: (4c 00 00 4c|4c 00 00 4c) rfmci ++.*: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63 ++.*: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63 ++.*: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63 ++.*: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63 ++.*: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63 ++.*: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63 ++.*: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63 ++.*: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63 ++.*: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63 ++.*: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63 ++.*: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63 ++.*: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63 ++.*: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31 ++.*: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31 ++.*: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23 ++.*: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23 ++.*: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23 ++.*: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23 ++.*: (44 00 00 02|02 00 00 44) sc ++.*: (44 00 0c 82|82 0c 00 44) sc 100 ++.*: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12 ++.*: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12 ++.*: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12 ++.*: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12 ++.*: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12 ++.*: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12 ++.*: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63 ++.*: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63 ++.*: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12 ++.*: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12 ++.*: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31 ++.*: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31 ++.*: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12 ++.*: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12 ++.*: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12 ++.*: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12 ++.*: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\) ++.*: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\) ++.*: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12 ++.*: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\) ++.*: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\) ++.*: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12 ++.*: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12 ++.*: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\) ++.*: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\) ++.*: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12 ++.*: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12 ++.*: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12 ++.*: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\) ++.*: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\) ++.*: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12 ++.*: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12 ++.*: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\) ++.*: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\) ++.*: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11 ++.*: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\) ++.*: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\) ++.*: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11 ++.*: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11 ++.*: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11 ++.*: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\) ++.*: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\) ++.*: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\) ++.*: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\) ++.*: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11 ++.*: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11 ++.*: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\) ++.*: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\) ++.*: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\) ++.*: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\) ++.*: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12 ++.*: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12 ++.*: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\) ++.*: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\) ++.*: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12 ++.*: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12 ++.*: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12 ++.*: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12 ++.*: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12 ++.*: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\) ++.*: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\) ++.*: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12 ++.*: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12 ++.*: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22 ++.*: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22 ++.*: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22 ++.*: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22 ++.*: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22 ++.*: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22 ++.*: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22 ++.*: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22 ++.*: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22 ++.*: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22 ++.*: (22 95 00 64|64 00 95 22) subfic r20,r21,100 ++.*: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100 ++.*: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21 ++.*: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21 ++.*: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21 ++.*: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21 ++.*: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22 ++.*: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22 ++.*: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21 ++.*: (7e 95 01 90|90 01 95 7e) subfze r20,r21 ++.*: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21 ++.*: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21 ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 20 04 ac|ac 04 20 7c) lwsync ++.*: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11 ++.*: (08 aa 00 64|64 00 aa 08) tdlgei r10,100 ++.*: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100 ++.*: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11 ++.*: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11 ++.*: (7c 00 07 64|64 07 00 7c) tlbre ++.*: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7 ++.*: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11 ++.*: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12 ++.*: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12 ++.*: (7c 00 04 6c|6c 04 00 7c) tlbsync ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7 ++.*: (7c aa 58 08|08 58 aa 7c) twlge r10,r11 ++.*: (0c aa 00 64|64 00 aa 0c) twlgei r10,100 ++.*: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100 ++.*: (7c 00 00 7c|7c 00 00 7c) wait ++.*: (7c 00 00 7c|7c 00 00 7c) wait ++.*: (7c 20 00 7c|7c 00 20 7c) waitrsv ++.*: (7c 40 00 7c|7c 00 40 7c) waitimpl ++.*: (7c 40 00 7c|7c 00 40 7c) waitimpl ++.*: (7c 20 00 7c|7c 00 20 7c) waitrsv ++.*: (7c 00 01 6c|6c 01 00 7c) wchkall ++.*: (7c 00 01 6c|6c 01 00 7c) wchkall ++.*: (7d 80 01 6c|6c 01 80 7d) wchkall cr3 ++.*: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11 ++.*: (7c 20 07 4c|4c 07 20 7c) wclrall 1 ++.*: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11 ++.*: (7d 40 01 06|06 01 40 7d) wrtee r10 ++.*: (7c 00 81 46|46 81 00 7c) wrteei 1 ++.*: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12 ++.*: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12 ++.*: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096 ++.*: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096 + #pass +diff --git a/gas/testsuite/gas/ppc/a2.s b/gas/testsuite/gas/ppc/a2.s +index 6893ae8cfe..c3d23ea3de 100644 +--- a/gas/testsuite/gas/ppc/a2.s ++++ b/gas/testsuite/gas/ppc/a2.s +@@ -295,10 +295,6 @@ start: + lhzu 10,2(11) + lhzux 10,11,12 + lhzx 10,11,12 +- lmw 20,16(10) +- lswi 10,11,1 +- lswi 12,11,32 +- lswx 10,11,12 + lwa 10,-4(11) + lwa 10,4(11) + lwarx 10,11,12,0 +@@ -486,10 +482,6 @@ start: + sthu 10,2(11) + sthux 10,11,12 + sthx 10,11,12 +- stmw 20,16(10) +- stswi 10,11,1 +- stswi 10,11,32 +- stswx 10,11,12 + stwbrx 10,11,12 + stwcx. 10,11,12 + stwepx 10,11,12 +diff --git a/gas/testsuite/gas/ppc/be.d b/gas/testsuite/gas/ppc/be.d +new file mode 100644 +index 0000000000..9255ddbadf +--- /dev/null ++++ b/gas/testsuite/gas/ppc/be.d +@@ -0,0 +1,17 @@ ++#objdump: -d -Mcom ++#as: -mcom -be ++#name: BE only instructions ++ ++.* ++ ++Disassembly of section \.text: ++ ++0+00 : ++.*: ba 8a 00 10 lmw r20,16\(r10\) ++.*: 7d 4b 0c aa lswi r10,r11,1 ++.*: 7d 8b 04 aa lswi r12,r11,32 ++.*: 7d 4b 64 2a lswx r10,r11,r12 ++.*: be 8a 00 10 stmw r20,16\(r10\) ++.*: 7d 4b 0d aa stswi r10,r11,1 ++.*: 7d 4b 05 aa stswi r10,r11,32 ++.*: 7d 4b 65 2a stswx r10,r11,r12 +diff --git a/gas/testsuite/gas/ppc/be.s b/gas/testsuite/gas/ppc/be.s +new file mode 100644 +index 0000000000..dbbcbb6331 +--- /dev/null ++++ b/gas/testsuite/gas/ppc/be.s +@@ -0,0 +1,10 @@ ++ .text ++start: ++ lmw 20,16(10) ++ lswi 10,11,1 ++ lswi 12,11,32 ++ lswx 10,11,12 ++ stmw 20,16(10) ++ stswi 10,11,1 ++ stswi 10,11,32 ++ stswx 10,11,12 +diff --git a/gas/testsuite/gas/ppc/le_error.d b/gas/testsuite/gas/ppc/le_error.d +new file mode 100644 +index 0000000000..765004655e +--- /dev/null ++++ b/gas/testsuite/gas/ppc/le_error.d +@@ -0,0 +1,3 @@ ++#as: -mcom -le ++#source: be.s ++#error_output: le_error.l +diff --git a/gas/testsuite/gas/ppc/le_error.l b/gas/testsuite/gas/ppc/le_error.l +new file mode 100644 +index 0000000000..dd0021b972 +--- /dev/null ++++ b/gas/testsuite/gas/ppc/le_error.l +@@ -0,0 +1,9 @@ ++.*Assembler messages: ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian +diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp +index 48c4ce62f3..f2a7b44cdd 100644 +--- a/gas/testsuite/gas/ppc/ppc.exp ++++ b/gas/testsuite/gas/ppc/ppc.exp +@@ -76,6 +76,8 @@ if { [istarget powerpc64*-*-*] || [istarget *-*-elf64*]} then { + run_dump_test "common" + run_dump_test "476" + run_dump_test "a2" ++run_dump_test "be" ++run_dump_test "le_error" + run_dump_test "pr21303" + run_dump_test "vle" + run_dump_test "vle-reloc" +-- +2.21.3 + diff --git a/0001-GOLD-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-.patch b/0001-GOLD-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-.patch new file mode 100644 index 0000000..c6263d6 --- /dev/null +++ b/0001-GOLD-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-.patch @@ -0,0 +1,247 @@ +From 9ac6946e2514e5ec1bb51d1afe9f127807e21067 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Sat, 26 Sep 2020 20:34:55 +0930 +Subject: [PATCH] [GOLD] PPC64_OPT_LOCALENTRY is incompatible with tail calls + +Gold version of commit 3cd7c7d7ef. + + * powerpc.cc (Target_powerpc): Rename power10_stubs_ to + power10_relocs_. + (Target_powerpc::set_power10_relocs): New accessor. + (Target_powerpc::set_power10_stubs): Delete. + (Target_powerpc::power10_stubs): Adjust. + (Target_powerpc::has_localentry0): New accessor. + (ld_0_11): New constant. + (glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust. + (glink_eh_frame_fde_64v2_localentry0): New. + (Output_data_glink::pltresolve_size): Update. + (Output_data_glink::add_eh_frame): Use localentry0 version eh_frame. + (Output_data_glink::do_write): Move r2 save to start of ELFv2 stub + and only emit for has_localentry0. Don't use r2 in the stub. + (Target_powerpc::Scan::local, global): Adjust for + set_power10_relocs renaming. + (Target_powerpc::scan_relocs): Warn and reset plt_localentry0_. + +(cherry picked from commit 63e5eea234c2bd2c7ce7dc921c71b22bc4fd0d6b) +--- + gold/ChangeLog | 19 ++++++++++++ + gold/powerpc.cc | 82 +++++++++++++++++++++++++++++++++++++------------ + 2 files changed, 81 insertions(+), 20 deletions(-) + +diff --git a/gold/ChangeLog b/gold/ChangeLog +index 7734acec35..1f2ee06817 100644 +--- a/gold/ChangeLog ++++ b/gold/ChangeLog +@@ -1,3 +1,22 @@ ++2020-09-26 Alan Modra ++ ++ * powerpc.cc (Target_powerpc): Rename power10_stubs_ to ++ power10_relocs_. ++ (Target_powerpc::set_power10_relocs): New accessor. ++ (Target_powerpc::set_power10_stubs): Delete. ++ (Target_powerpc::power10_stubs): Adjust. ++ (Target_powerpc::has_localentry0): New accessor. ++ (ld_0_11): New constant. ++ (glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust. ++ (glink_eh_frame_fde_64v2_localentry0): New. ++ (Output_data_glink::pltresolve_size): Update. ++ (Output_data_glink::add_eh_frame): Use localentry0 version eh_frame. ++ (Output_data_glink::do_write): Move r2 save to start of ELFv2 stub ++ and only emit for has_localentry0. Don't use r2 in the stub. ++ (Target_powerpc::Scan::local, global): Adjust for ++ set_power10_relocs renaming. ++ (Target_powerpc::scan_relocs): Warn and reset plt_localentry0_. ++ + 2020-09-24 Alan Modra + + * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip +diff --git a/gold/powerpc.cc b/gold/powerpc.cc +index 1020fa42f9..adbc120c14 100644 +--- a/gold/powerpc.cc ++++ b/gold/powerpc.cc +@@ -647,7 +647,7 @@ class Target_powerpc : public Sized_target + glink_(NULL), rela_dyn_(NULL), copy_relocs_(), + tlsld_got_offset_(-1U), + stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(), +- power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false), ++ power10_relocs_(false), plt_thread_safe_(false), plt_localentry0_(false), + plt_localentry0_init_(false), has_localentry0_(false), + has_tls_get_addr_opt_(false), + tprel_opt_(parameters->options().tls_optimize()), +@@ -1079,16 +1079,18 @@ class Target_powerpc : public Sized_target + sym->set_dynsym_index(-1U); + } + ++ void ++ set_power10_relocs() ++ { ++ this->power10_relocs_ = true; ++ } ++ + bool + power10_stubs() const +- { return this->power10_stubs_; } +- +- void +- set_power10_stubs() + { +- if (parameters->options().power10_stubs_enum() +- != General_options::POWER10_STUBS_NO) +- this->power10_stubs_ = true; ++ return (this->power10_relocs_ ++ && (parameters->options().power10_stubs_enum() ++ != General_options::POWER10_STUBS_NO)); + } + + bool +@@ -1106,6 +1108,10 @@ class Target_powerpc : public Sized_target + plt_localentry0() const + { return this->plt_localentry0_; } + ++ bool ++ has_localentry0() const ++ { return this->has_localentry0_; } ++ + void + set_has_localentry0() + { +@@ -1705,7 +1711,7 @@ class Target_powerpc : public Sized_target + Branches branch_info_; + Tocsave_loc tocsave_loc_; + +- bool power10_stubs_; ++ bool power10_relocs_; + bool plt_thread_safe_; + bool plt_localentry0_; + bool plt_localentry0_init_; +@@ -4190,6 +4196,7 @@ static const uint32_t cmpwi_11_0 = 0x2c0b0000; + static const uint32_t cror_15_15_15 = 0x4def7b82; + static const uint32_t cror_31_31_31 = 0x4ffffb82; + static const uint32_t ld_0_1 = 0xe8010000; ++static const uint32_t ld_0_11 = 0xe80b0000; + static const uint32_t ld_0_12 = 0xe80c0000; + static const uint32_t ld_2_1 = 0xe8410000; + static const uint32_t ld_2_2 = 0xe8420000; +@@ -4572,9 +4579,9 @@ static const unsigned char glink_eh_frame_fde_64v1[] = + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. +- elfcpp::DW_CFA_advance_loc + 1, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_register, 65, 12, +- elfcpp::DW_CFA_advance_loc + 5, ++ elfcpp::DW_CFA_advance_loc + 4, + elfcpp::DW_CFA_restore_extended, 65 + }; + +@@ -4584,9 +4591,20 @@ static const unsigned char glink_eh_frame_fde_64v2[] = + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. +- elfcpp::DW_CFA_advance_loc + 1, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_register, 65, 0, +- elfcpp::DW_CFA_advance_loc + 7, ++ elfcpp::DW_CFA_advance_loc + 2, ++ elfcpp::DW_CFA_restore_extended, 65 ++}; ++ ++static const unsigned char glink_eh_frame_fde_64v2_localentry0[] = ++{ ++ 0, 0, 0, 0, // Replaced with offset to .glink. ++ 0, 0, 0, 0, // Replaced with size of .glink. ++ 0, // Augmentation size. ++ elfcpp::DW_CFA_advance_loc + 3, ++ elfcpp::DW_CFA_register, 65, 0, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_restore_extended, 65 + }; + +@@ -5525,7 +5543,8 @@ class Output_data_glink : public Output_section_data + { + if (size == 64) + return (8 +- + (this->targ_->abiversion() < 2 ? 11 * 4 : 14 * 4)); ++ + (this->targ_->abiversion() < 2 ? 11 * 4 ++ : this->targ_->has_localentry0() ? 14 * 4 : 13 * 4)); + return 16 * 4; + } + +@@ -5568,6 +5587,12 @@ Output_data_glink::add_eh_frame(Layout* layout) + sizeof (Eh_cie<64>::eh_frame_cie), + glink_eh_frame_fde_64v1, + sizeof (glink_eh_frame_fde_64v1)); ++ else if (this->targ_->has_localentry0()) ++ layout->add_eh_frame_for_plt(this, ++ Eh_cie<64>::eh_frame_cie, ++ sizeof (Eh_cie<64>::eh_frame_cie), ++ glink_eh_frame_fde_64v2_localentry0, ++ sizeof (glink_eh_frame_fde_64v2)); + else + layout->add_eh_frame_for_plt(this, + Eh_cie<64>::eh_frame_cie, +@@ -6798,15 +6823,25 @@ Output_data_glink::do_write(Output_file* of) + } + else + { ++ if (this->targ_->has_localentry0()) ++ { ++ write_insn(p, std_2_1 + 24), p += 4; ++ } + write_insn(p, mflr_0), p += 4; + write_insn(p, bcl_20_31), p += 4; + write_insn(p, mflr_11), p += 4; +- write_insn(p, std_2_1 + 24), p += 4; +- write_insn(p, ld_2_11 + l(-16)), p += 4; + write_insn(p, mtlr_0), p += 4; ++ if (this->targ_->has_localentry0()) ++ { ++ write_insn(p, ld_0_11 + l(-20)), p += 4; ++ } ++ else ++ { ++ write_insn(p, ld_0_11 + l(-16)), p += 4; ++ } + write_insn(p, sub_12_12_11), p += 4; +- write_insn(p, add_11_2_11), p += 4; +- write_insn(p, addi_0_12 + l(-48)), p += 4; ++ write_insn(p, add_11_0_11), p += 4; ++ write_insn(p, addi_0_12 + l(-44)), p += 4; + write_insn(p, ld_12_11 + 0), p += 4; + write_insn(p, srdi_0_0_2), p += 4; + write_insn(p, mtctr_12), p += 4; +@@ -8451,7 +8486,7 @@ Target_powerpc::Scan::local( + case elfcpp::R_PPC64_GOT_TLSLD_PCREL34: + case elfcpp::R_PPC64_GOT_DTPREL_PCREL34: + case elfcpp::R_PPC64_GOT_TPREL_PCREL34: +- target->set_power10_stubs(); ++ target->set_power10_relocs(); + break; + default: + break; +@@ -9248,7 +9283,7 @@ Target_powerpc::Scan::global( + case elfcpp::R_PPC64_GOT_TLSLD_PCREL34: + case elfcpp::R_PPC64_GOT_DTPREL_PCREL34: + case elfcpp::R_PPC64_GOT_TPREL_PCREL34: +- target->set_power10_stubs(); ++ target->set_power10_relocs(); + break; + default: + break; +@@ -9590,6 +9625,13 @@ Target_powerpc::scan_relocs( + needs_special_offset_handling, + local_symbol_count, + plocal_symbols); ++ ++ if (this->plt_localentry0_ && this->power10_relocs_) ++ { ++ gold_warning(_("--plt-localentry is incompatible with " ++ "power10 pc-relative code")); ++ this->plt_localentry0_ = false; ++ } + } + + // Functor class for processing the global symbol table. +-- +2.21.3 + diff --git a/0001-GOLD-Power10-stub-selection.patch b/0001-GOLD-Power10-stub-selection.patch new file mode 100644 index 0000000..e983534 --- /dev/null +++ b/0001-GOLD-Power10-stub-selection.patch @@ -0,0 +1,1205 @@ +From 55ae73eaa02c4268e5fdf9e4cf1f154ea3689879 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 23 Jul 2020 10:35:56 +0930 +Subject: [PATCH] [GOLD] Power10 stub selection + +gold version of commit e10a07b32dc1. + + * options.h (DEFINE_enum): Add optional_arg__ param, adjust + all uses. + (General_options): Add --power10-stubs and --no-power10-stubs. + * options.cc (General_options::finalize): Handle --power10-stubs. + * powerpc.cc (set_power10_stubs): Don't set when --power10-stubs=no. + (power10_stubs_auto): New. + (struct Plt_stub_ent): Add toc_ and tocoff_. Don't use a bitfield + for indx_. + (struct Branch_stub_ent): Add toc_and tocoff_. Use bitfields for + iter_, notoc_ and save_res_. + (add_plt_call_entry): Set toc_. Adjust resizing conditions for + --power10-stubs=auto. + (add_long_branch_entry): Set toc_. + (add_eh_frame, define_stub_syms): No longer use const_iterators + for plt and long branch stub iteration. + (build_tls_opt_head, build_tls_opt_tail): Change parameters and + return value. Move tests for __tls_get_addr to callers. + (plt_call_size): Handle --power10-stubs=auto. + (branch_stub_size): Likewise. + (Stub_table::do_write): Likewise. + (relocate): Likewise. + +(cherry picked from commit afd2ea23626c43886ab8b028b68b7b663d6de3c6) +--- + gold/ChangeLog | 27 ++ + gold/options.cc | 29 ++ + gold/options.h | 48 +++- + gold/powerpc.cc | 682 ++++++++++++++++++++++++++++++++---------------- + 4 files changed, 551 insertions(+), 235 deletions(-) + +diff --git a/gold/ChangeLog b/gold/ChangeLog +index 85fefa989f..5c891349c4 100644 +--- a/gold/ChangeLog ++++ b/gold/ChangeLog +@@ -1,3 +1,30 @@ ++2020-09-24 Alan Modra ++ ++ Apply from master ++ 2020-07-27 Alan Modra ++ * options.h (DEFINE_enum): Add optional_arg__ param, adjust ++ all uses. ++ (General_options): Add --power10-stubs and --no-power10-stubs. ++ * options.cc (General_options::parse_no_power10_stubs): New. ++ (General_options::finalize): Handle --power10-stubs. ++ * powerpc.cc (set_power10_stubs): Don't set when --power10-stubs=no. ++ (power10_stubs_auto): New. ++ (struct Plt_stub_ent): Add toc_ and tocoff_. Don't use a bitfield ++ for indx_. ++ (struct Branch_stub_ent): Add toc_and tocoff_. Use bitfields for ++ iter_, notoc_ and save_res_. ++ (add_plt_call_entry): Set toc_. Adjust resizing conditions for ++ --power10-stubs=auto. ++ (add_long_branch_entry): Set toc_. ++ (add_eh_frame, define_stub_syms): No longer use const_iterators ++ for plt and long branch stub iteration. ++ (build_tls_opt_head, build_tls_opt_tail): Change parameters and ++ return value. Move tests for __tls_get_addr to callers. ++ (plt_call_size): Handle --power10-stubs=auto. ++ (branch_stub_size): Likewise. ++ (Stub_table::do_write): Likewise. ++ (relocate): Likewise. ++ + 2020-09-19 Nick Clifton + + This is the 2.35.1 point release. +diff --git a/gold/options.cc b/gold/options.cc +index b13ae71ce1..6b194374c8 100644 +--- a/gold/options.cc ++++ b/gold/options.cc +@@ -464,6 +464,14 @@ General_options::parse_plugin_opt(const char*, const char* arg, + this->add_plugin_option(arg); + } + ++void ++General_options::parse_no_power10_stubs(const char*, const char*, ++ Command_line*) ++{ ++ this->set_power10_stubs("no"); ++ this->set_user_set_power10_stubs(); ++} ++ + void + General_options::parse_R(const char* option, const char* arg, + Command_line* cmdline) +@@ -1183,6 +1191,27 @@ General_options::finalize() + this->set_start_stop_visibility_enum(elfcpp::STV_PROTECTED); + } + ++ // Parse the --power10-stubs argument. ++ if (!this->user_set_power10_stubs()) ++ { ++ // --power10-stubs without an arg is equivalent to --power10-stubs=yes ++ // but not specifying --power10-stubs at all should be equivalent to ++ // --power10-stubs=auto. This doesn't fit into the notion of ++ // "default_value", used both as a static initializer and to provide ++ // a missing optional arg. Fix it here. ++ this->set_power10_stubs("auto"); ++ this->set_power10_stubs_enum(POWER10_STUBS_AUTO); ++ } ++ else ++ { ++ if (strcmp(this->power10_stubs(), "auto") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_AUTO); ++ else if (strcmp(this->power10_stubs(), "no") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_NO); ++ else if (strcmp(this->power10_stubs(), "yes") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_YES); ++ } ++ + // -M is equivalent to "-Map -". + if (this->print_map() && !this->user_set_Map()) + { +diff --git a/gold/options.h b/gold/options.h +index 3c8d25a662..bc211151de 100644 +--- a/gold/options.h ++++ b/gold/options.h +@@ -481,9 +481,9 @@ struct Struct_special : public Struct_var + // After helparg__ should come an initializer list, like + // {"foo", "bar", "baz"} + #define DEFINE_enum(varname__, dashes__, shortname__, default_value__, \ +- helpstring__, helparg__, ...) \ ++ helpstring__, helparg__, optional_arg__, ...) \ + DEFINE_var(varname__, dashes__, shortname__, default_value__, \ +- default_value__, helpstring__, helparg__, false, \ ++ default_value__, helpstring__, helparg__, optional_arg__, \ + const char*, const char*, parse_choices_##varname__, false) \ + private: \ + static void parse_choices_##varname__(const char* option_name, \ +@@ -703,7 +703,7 @@ class General_options + N_("Use DT_NEEDED for all shared libraries")); + + DEFINE_enum(assert, options::ONE_DASH, '\0', NULL, +- N_("Ignored"), N_("[ignored]"), ++ N_("Ignored"), N_("[ignored]"), false, + {"definitions", "nodefinitions", "nosymbolic", "pure-text"}); + + // b +@@ -761,7 +761,7 @@ class General_options + + DEFINE_enum(compress_debug_sections, options::TWO_DASHES, '\0', "none", + N_("Compress .debug_* sections in the output file"), +- ("[none,zlib,zlib-gnu,zlib-gabi]"), ++ ("[none,zlib,zlib-gnu,zlib-gabi]"), false, + {"none", "zlib", "zlib-gnu", "zlib-gabi"}); + + DEFINE_bool(copy_dt_needed_entries, options::TWO_DASHES, '\0', false, +@@ -934,7 +934,7 @@ class General_options + N_("FRACTION")); + + DEFINE_enum(hash_style, options::TWO_DASHES, '\0', DEFAULT_HASH_STYLE, +- N_("Dynamic hash style"), N_("[sysv,gnu,both]"), ++ N_("Dynamic hash style"), N_("[sysv,gnu,both]"), false, + {"sysv", "gnu", "both"}); + + // i +@@ -946,7 +946,7 @@ class General_options + N_("Identical Code Folding. " + "\'--icf=safe\' Folds ctors, dtors and functions whose" + " pointers are definitely not taken"), +- ("[none,all,safe]"), ++ ("[none,all,safe]"), false, + {"none", "all", "safe"}); + + DEFINE_uint(icf_iterations, options::TWO_DASHES , '\0', 0, +@@ -1086,7 +1086,7 @@ class General_options + + DEFINE_enum(orphan_handling, options::TWO_DASHES, '\0', "place", + N_("Orphan section handling"), N_("[place,discard,warn,error]"), +- {"place", "discard", "warn", "error"}); ++ false, {"place", "discard", "warn", "error"}); + + // p + +@@ -1141,6 +1141,12 @@ class General_options + N_("Use posix_fallocate to reserve space in the output file"), + N_("Use fallocate or ftruncate to reserve space")); + ++ DEFINE_enum(power10_stubs, options::TWO_DASHES, '\0', "yes", ++ N_("(PowerPC64 only) stubs use power10 insns"), ++ N_("[=auto,no,yes]"), true, {"auto", "no", "yes"}); ++ DEFINE_special(no_power10_stubs, options::TWO_DASHES, '\0', ++ N_("(PowerPC64 only) stubs do not use power10 insns"), NULL); ++ + DEFINE_bool(preread_archive_symbols, options::TWO_DASHES, '\0', false, + N_("Preread archive symbols when multi-threaded"), NULL); + +@@ -1236,7 +1242,7 @@ class General_options + DEFINE_enum(sort_section, options::TWO_DASHES, '\0', "none", + N_("Sort sections by name. \'--no-text-reorder\'" + " will override \'--sort-section=name\' for .text"), +- N_("[none,name]"), ++ N_("[none,name]"), false, + {"none", "name"}); + + DEFINE_uint(spare_dynamic_tags, options::TWO_DASHES, '\0', 5, +@@ -1287,7 +1293,7 @@ class General_options + NULL); + DEFINE_enum(target2, options::TWO_DASHES, '\0', NULL, + N_("(ARM only) Set R_ARM_TARGET2 relocation type"), +- N_("[rel, abs, got-rel"), ++ N_("[rel, abs, got-rel"), false, + {"rel", "abs", "got-rel"}); + + DEFINE_bool(text_reorder, options::TWO_DASHES, '\0', true, +@@ -1344,7 +1350,7 @@ class General_options + DEFINE_enum(unresolved_symbols, options::TWO_DASHES, '\0', NULL, + N_("How to handle unresolved symbols"), + ("ignore-all,report-all,ignore-in-object-files," +- "ignore-in-shared-libs"), ++ "ignore-in-shared-libs"), false, + {"ignore-all", "report-all", "ignore-in-object-files", + "ignore-in-shared-libs"}); + +@@ -1507,7 +1513,7 @@ class General_options + DEFINE_enum(start_stop_visibility, options::DASH_Z, '\0', "protected", + N_("ELF symbol visibility for synthesized " + "__start_* and __stop_* symbols"), +- ("[default,internal,hidden,protected]"), ++ ("[default,internal,hidden,protected]"), false, + {"default", "internal", "hidden", "protected"}); + DEFINE_bool(text, options::DASH_Z, '\0', false, + N_("Do not permit relocations in read-only segments"), +@@ -1763,6 +1769,20 @@ class General_options + start_stop_visibility_enum() const + { return this->start_stop_visibility_enum_; } + ++ enum Power10_stubs ++ { ++ // Use Power10 insns on @notoc calls/branches, non-Power10 elsewhere. ++ POWER10_STUBS_AUTO, ++ // Don't use Power10 insns ++ POWER10_STUBS_NO, ++ // Always use Power10 insns ++ POWER10_STUBS_YES ++ }; ++ ++ Power10_stubs ++ power10_stubs_enum() const ++ { return this->power10_stubs_enum_; } ++ + private: + // Don't copy this structure. + General_options(const General_options&); +@@ -1826,6 +1846,10 @@ class General_options + set_start_stop_visibility_enum(elfcpp::STV value) + { this->start_stop_visibility_enum_ = value; } + ++ void ++ set_power10_stubs_enum(Power10_stubs value) ++ { this->power10_stubs_enum_ = value; } ++ + // These are called by finalize() to set up the search-path correctly. + void + add_to_library_path_with_sysroot(const std::string& arg) +@@ -1895,6 +1919,8 @@ class General_options + Orphan_handling orphan_handling_enum_; + // Symbol visibility for __start_* / __stop_* magic symbols. + elfcpp::STV start_stop_visibility_enum_; ++ // Power10 stubs option ++ Power10_stubs power10_stubs_enum_; + }; + + // The position-dependent options. We use this to store the state of +diff --git a/gold/powerpc.cc b/gold/powerpc.cc +index 59ba40dc3f..e35cbcf6c0 100644 +--- a/gold/powerpc.cc ++++ b/gold/powerpc.cc +@@ -1086,7 +1086,16 @@ class Target_powerpc : public Sized_target + void + set_power10_stubs() + { +- this->power10_stubs_ = true; ++ if (parameters->options().power10_stubs_enum() ++ != General_options::POWER10_STUBS_NO) ++ this->power10_stubs_ = true; ++ } ++ ++ bool ++ power10_stubs_auto() const ++ { ++ return (parameters->options().power10_stubs_enum() ++ == General_options::POWER10_STUBS_AUTO); + } + + bool +@@ -4631,26 +4640,32 @@ class Stub_table : public Output_relaxed_input_section + struct Plt_stub_ent + { + Plt_stub_ent(unsigned int off, unsigned int indx) +- : off_(off), indx_(indx), iter_(0), notoc_(0), r2save_(0), localentry0_(0) ++ : off_(off), indx_(indx), iter_(0), notoc_(0), toc_(0), ++ r2save_(0), localentry0_(0), tocoff_(0) + { } + + unsigned int off_; +- unsigned int indx_ : 28; ++ unsigned int indx_; + unsigned int iter_ : 1; + unsigned int notoc_ : 1; ++ unsigned int toc_ : 1; + unsigned int r2save_ : 1; + unsigned int localentry0_ : 1; ++ unsigned int tocoff_ : 8; + }; + struct Branch_stub_ent + { + Branch_stub_ent(unsigned int off, bool notoc, bool save_res) +- : off_(off), iter_(false), notoc_(notoc), save_res_(save_res) ++ : off_(off), iter_(0), notoc_(notoc), toc_(0), save_res_(save_res), ++ tocoff_(0) + { } + + unsigned int off_; +- bool iter_; +- bool notoc_; +- bool save_res_; ++ unsigned int iter_ : 1; ++ unsigned int notoc_ : 1; ++ unsigned int toc_ : 1; ++ unsigned int save_res_ : 1; ++ unsigned int tocoff_ : 8; + }; + typedef typename elfcpp::Elf_types::Elf_Addr Address; + static const Address invalid_address = static_cast
(0) - 1; +@@ -4898,7 +4913,7 @@ class Stub_table : public Output_relaxed_input_section + + // Size of a given plt call stub. + unsigned int +- plt_call_size(typename Plt_stub_entries::const_iterator p) const; ++ plt_call_size(typename Plt_stub_entries::iterator p) const; + + unsigned int + plt_call_align(unsigned int bytes) const +@@ -4909,16 +4924,14 @@ class Stub_table : public Output_relaxed_input_section + + // Return long branch stub size. + unsigned int +- branch_stub_size(typename Branch_stub_entries::const_iterator p, ++ branch_stub_size(typename Branch_stub_entries::iterator p, + bool* need_lt); + +- bool +- build_tls_opt_head(unsigned char** pp, +- typename Plt_stub_entries::const_iterator cs); ++ void ++ build_tls_opt_head(unsigned char** pp, bool save_lr); + +- bool +- build_tls_opt_tail(unsigned char* p, +- typename Plt_stub_entries::const_iterator cs); ++ void ++ build_tls_opt_tail(unsigned char* p); + + void + plt_error(const Plt_stub_key& p); +@@ -5083,15 +5096,22 @@ Stub_table::add_plt_call_entry( + if (r_type == elfcpp::R_PPC64_REL24_NOTOC) + { + if (!p.second && !p.first->second.notoc_ +- && !this->targ_->power10_stubs()) ++ && (!this->targ_->power10_stubs() ++ || this->targ_->power10_stubs_auto())) + this->need_resize_ = true; + p.first->second.notoc_ = 1; + } +- else if (!tocsave && !p.first->second.localentry0_) ++ else + { +- if (!p.second && !p.first->second.r2save_) ++ if (!p.second && !p.first->second.toc_) + this->need_resize_ = true; +- p.first->second.r2save_ = 1; ++ p.first->second.toc_ = 1; ++ if (!tocsave && !p.first->second.localentry0_) ++ { ++ if (!p.second && !p.first->second.r2save_) ++ this->need_resize_ = true; ++ p.first->second.r2save_ = 1; ++ } + } + } + if (p.second || (this->resizing_ && !p.first->second.iter_)) +@@ -5134,15 +5154,22 @@ Stub_table::add_plt_call_entry( + if (r_type == elfcpp::R_PPC64_REL24_NOTOC) + { + if (!p.second && !p.first->second.notoc_ +- && !this->targ_->power10_stubs()) ++ && (!this->targ_->power10_stubs() ++ || this->targ_->power10_stubs_auto())) + this->need_resize_ = true; + p.first->second.notoc_ = 1; + } +- else if (!tocsave && !p.first->second.localentry0_) ++ else + { +- if (!p.second && !p.first->second.r2save_) ++ if (!p.second && !p.first->second.toc_) + this->need_resize_ = true; +- p.first->second.r2save_ = 1; ++ p.first->second.toc_ = 1; ++ if (!tocsave && !p.first->second.localentry0_) ++ { ++ if (!p.second && !p.first->second.r2save_) ++ this->need_resize_ = true; ++ p.first->second.r2save_ = 1; ++ } + } + } + if (p.second || (this->resizing_ && !p.first->second.iter_)) +@@ -5231,11 +5258,18 @@ Stub_table::add_long_branch_entry( + Branch_stub_ent ent(this->branch_size_, notoc, save_res); + std::pair p + = this->long_branch_stubs_.insert(std::make_pair(key, ent)); +- if (notoc && !p.first->second.notoc_) ++ if (notoc) + { +- this->need_resize_ = true; ++ if (!p.second && !p.first->second.notoc_) ++ this->need_resize_ = true; + p.first->second.notoc_ = true; + } ++ else ++ { ++ if (!p.second && !p.first->second.toc_) ++ this->need_resize_ = true; ++ p.first->second.toc_ = true; ++ } + gold_assert(save_res == p.first->second.save_res_); + if (p.second || (this->resizing_ && !p.first->second.iter_)) + { +@@ -5330,7 +5364,7 @@ Stub_table::add_eh_frame(Layout* layout) + if (!this->targ_->has_glink()) + return; + +- typedef typename Plt_stub_entries::const_iterator plt_iter; ++ typedef typename Plt_stub_entries::iterator plt_iter; + std::vector calls; + if (!this->plt_call_stubs_.empty()) + for (plt_iter cs = this->plt_call_stubs_.begin(); +@@ -5632,7 +5666,7 @@ Stub_table::define_stub_syms(Symbol_table* symtab) + // output .symtab ordering depends on the order in which symbols + // are added to the linker symtab. We want reproducible output + // so must sort the call stub symbols. +- typedef typename Plt_stub_entries::const_iterator plt_iter; ++ typedef typename Plt_stub_entries::iterator plt_iter; + std::vector sorted; + sorted.resize(this->plt_call_stubs_.size()); + +@@ -5676,7 +5710,7 @@ Stub_table::define_stub_syms(Symbol_table* symtab) + } + } + +- typedef typename Branch_stub_entries::const_iterator branch_iter; ++ typedef typename Branch_stub_entries::iterator branch_iter; + for (branch_iter bs = this->long_branch_stubs_.begin(); + bs != this->long_branch_stubs_.end(); + ++bs) +@@ -5698,88 +5732,72 @@ Stub_table::define_stub_syms(Symbol_table* symtab) + // Emit the start of a __tls_get_addr_opt plt call stub. + + template +-bool +-Stub_table::build_tls_opt_head( +- unsigned char** pp, +- typename Plt_stub_entries::const_iterator cs) ++void ++Stub_table::build_tls_opt_head(unsigned char** pp, ++ bool save_lr) + { +- if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ unsigned char* p = *pp; ++ if (size == 64) + { +- unsigned char* p = *pp; +- if (size == 64) +- { +- write_insn(p, ld_11_3 + 0); +- p += 4; +- write_insn(p, ld_12_3 + 8); +- p += 4; +- write_insn(p, mr_0_3); +- p += 4; +- write_insn(p, cmpdi_11_0); +- p += 4; +- write_insn(p, add_3_12_13); +- p += 4; +- write_insn(p, beqlr); +- p += 4; +- write_insn(p, mr_3_0); +- p += 4; +- if (cs->second.r2save_ && !cs->second.localentry0_) +- { +- write_insn(p, mflr_11); +- p += 4; +- write_insn(p, (std_11_1 + this->targ_->stk_linker())); +- p += 4; +- } +- } +- else ++ write_insn(p, ld_11_3 + 0); ++ p += 4; ++ write_insn(p, ld_12_3 + 8); ++ p += 4; ++ write_insn(p, mr_0_3); ++ p += 4; ++ write_insn(p, cmpdi_11_0); ++ p += 4; ++ write_insn(p, add_3_12_13); ++ p += 4; ++ write_insn(p, beqlr); ++ p += 4; ++ write_insn(p, mr_3_0); ++ p += 4; ++ if (save_lr) + { +- write_insn(p, lwz_11_3 + 0); ++ write_insn(p, mflr_11); + p += 4; +- write_insn(p, lwz_12_3 + 4); +- p += 4; +- write_insn(p, mr_0_3); +- p += 4; +- write_insn(p, cmpwi_11_0); +- p += 4; +- write_insn(p, add_3_12_2); +- p += 4; +- write_insn(p, beqlr); +- p += 4; +- write_insn(p, mr_3_0); +- p += 4; +- write_insn(p, nop); ++ write_insn(p, (std_11_1 + this->targ_->stk_linker())); + p += 4; + } +- *pp = p; +- return true; + } +- return false; +-} +- +-// Emit the tail of a __tls_get_addr_opt plt call stub. +- +-template +-bool +-Stub_table::build_tls_opt_tail( +- unsigned char* p, +- typename Plt_stub_entries::const_iterator cs) +-{ +- if (size == 64 +- && cs->second.r2save_ +- && !cs->second.localentry0_ +- && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ else + { +- write_insn(p, bctrl); ++ write_insn(p, lwz_11_3 + 0); + p += 4; +- write_insn(p, ld_2_1 + this->targ_->stk_toc()); ++ write_insn(p, lwz_12_3 + 4); + p += 4; +- write_insn(p, ld_11_1 + this->targ_->stk_linker()); ++ write_insn(p, mr_0_3); + p += 4; +- write_insn(p, mtlr_11); ++ write_insn(p, cmpwi_11_0); ++ p += 4; ++ write_insn(p, add_3_12_2); ++ p += 4; ++ write_insn(p, beqlr); ++ p += 4; ++ write_insn(p, mr_3_0); ++ p += 4; ++ write_insn(p, nop); + p += 4; +- write_insn(p, blr); +- return true; + } +- return false; ++ *pp = p; ++} ++ ++// Emit the tail of a __tls_get_addr_opt plt call stub. ++ ++template ++void ++Stub_table::build_tls_opt_tail(unsigned char* p) ++{ ++ write_insn(p, bctrl); ++ p += 4; ++ write_insn(p, ld_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ write_insn(p, ld_11_1 + this->targ_->stk_linker()); ++ p += 4; ++ write_insn(p, mtlr_11); ++ p += 4; ++ write_insn(p, blr); + } + + // Emit pc-relative plt call stub code. +@@ -5949,7 +5967,7 @@ build_notoc_offset(unsigned char* p, uint64_t off, bool load) + template + unsigned int + Stub_table::plt_call_size( +- typename Plt_stub_entries::const_iterator p) const ++ typename Plt_stub_entries::iterator p) const + { + if (size == 32) + { +@@ -5961,77 +5979,122 @@ Stub_table::plt_call_size( + const Output_data_plt_powerpc* plt; + uint64_t plt_addr = this->plt_off(p, &plt); + plt_addr += plt->address(); +- unsigned int bytes = 0; +- const Symbol* gsym = p->first.sym_; +- if (this->targ_->is_tls_get_addr_opt(gsym)) ++ if (this->targ_->power10_stubs() ++ && this->targ_->power10_stubs_auto()) + { +- if (p->second.r2save_ && !p->second.localentry0_) +- bytes = 13 * 4; +- else +- bytes = 7 * 4; ++ unsigned int bytes = 0; ++ if (p->second.notoc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ bytes = 7 * 4; ++ uint64_t from = this->stub_address() + p->second.off_ + bytes; ++ uint64_t odd = from & 4; ++ uint64_t off = plt_addr - from; ++ if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes += odd + 4 * 4; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes += 7 * 4; ++ else ++ bytes += 8 * 4; ++ bytes = this->plt_call_align(bytes); ++ } ++ unsigned int tail = 0; ++ if (p->second.toc_) ++ { ++ p->second.tocoff_ = bytes; ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ { ++ bytes += 7 * 4; ++ if (p->second.r2save_ && !p->second.localentry0_) ++ { ++ bytes += 2 * 4; ++ tail = 4 * 4; ++ } ++ } ++ if (p->second.r2save_) ++ bytes += 4; ++ uint64_t got_addr ++ = this->targ_->got_section()->output_section()->address(); ++ const Powerpc_relobj* ppcobj = static_cast ++ *>(p->first.object_); ++ got_addr += ppcobj->toc_base_offset(); ++ uint64_t off = plt_addr - got_addr; ++ bytes += 3 * 4 + 4 * (ha(off) != 0); ++ } ++ return bytes + tail; + } +- +- if (p->second.r2save_) +- bytes += 4; +- +- if (this->targ_->power10_stubs()) ++ else + { +- uint64_t from = this->stub_address() + p->second.off_ + bytes; +- if (bytes > 8 * 4) +- from -= 4 * 4; +- uint64_t odd = from & 4; +- uint64_t off = plt_addr - from; +- if (off - odd + (1ULL << 33) < 1ULL << 34) +- bytes += odd + 4 * 4; +- else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) +- bytes += 7 * 4; +- else +- bytes += 8 * 4; +- return bytes; +- } ++ unsigned int bytes = 0; ++ unsigned int tail = 0; ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ { ++ bytes = 7 * 4; ++ if (p->second.r2save_ && !p->second.localentry0_) ++ { ++ bytes = 9 * 4; ++ tail = 4 * 4; ++ } ++ } + +- if (p->second.notoc_) +- { +- uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4; +- if (bytes > 32) +- from -= 4 * 4; +- uint64_t off = plt_addr - from; +- if (off + 0x8000 < 0x10000) +- bytes += 7 * 4; +- else if (off + 0x80008000ULL < 0x100000000ULL) +- bytes += 8 * 4; +- else ++ if (p->second.r2save_) ++ bytes += 4; ++ ++ if (this->targ_->power10_stubs()) + { +- bytes += 8 * 4; +- if (off + 0x800000000000ULL >= 0x1000000000000ULL +- && ((off >> 32) & 0xffff) != 0) +- bytes += 4; +- if (((off >> 32) & 0xffffffffULL) != 0) +- bytes += 4; +- if (hi(off) != 0) +- bytes += 4; +- if (l(off) != 0) +- bytes += 4; ++ uint64_t from = this->stub_address() + p->second.off_ + bytes; ++ uint64_t odd = from & 4; ++ uint64_t off = plt_addr - from; ++ if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes += odd + 4 * 4; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes += 7 * 4; ++ else ++ bytes += 8 * 4; ++ return bytes + tail; + } +- return bytes; +- } + +- uint64_t got_addr = this->targ_->got_section()->output_section()->address(); +- const Powerpc_relobj* ppcobj = static_cast +- *>(p->first.object_); +- got_addr += ppcobj->toc_base_offset(); +- uint64_t off = plt_addr - got_addr; +- bytes += 3 * 4 + 4 * (ha(off) != 0); +- if (this->targ_->abiversion() < 2) +- { +- bool static_chain = parameters->options().plt_static_chain(); +- bool thread_safe = this->targ_->plt_thread_safe(); +- bytes += (4 +- + 4 * static_chain +- + 8 * thread_safe +- + 4 * (ha(off + 8 + 8 * static_chain) != ha(off))); ++ if (p->second.notoc_) ++ { ++ uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4; ++ uint64_t off = plt_addr - from; ++ if (off + 0x8000 < 0x10000) ++ bytes += 7 * 4; ++ else if (off + 0x80008000ULL < 0x100000000ULL) ++ bytes += 8 * 4; ++ else ++ { ++ bytes += 8 * 4; ++ if (off + 0x800000000000ULL >= 0x1000000000000ULL ++ && ((off >> 32) & 0xffff) != 0) ++ bytes += 4; ++ if (((off >> 32) & 0xffffffffULL) != 0) ++ bytes += 4; ++ if (hi(off) != 0) ++ bytes += 4; ++ if (l(off) != 0) ++ bytes += 4; ++ } ++ return bytes + tail; ++ } ++ ++ uint64_t got_addr = this->targ_->got_section()->output_section()->address(); ++ const Powerpc_relobj* ppcobj = static_cast ++ *>(p->first.object_); ++ got_addr += ppcobj->toc_base_offset(); ++ uint64_t off = plt_addr - got_addr; ++ bytes += 3 * 4 + 4 * (ha(off) != 0); ++ if (this->targ_->abiversion() < 2) ++ { ++ bool static_chain = parameters->options().plt_static_chain(); ++ bool thread_safe = this->targ_->plt_thread_safe(); ++ bytes += (4 ++ + 4 * static_chain ++ + 8 * thread_safe ++ + 4 * (ha(off + 8 + 8 * static_chain) != ha(off))); ++ } ++ return bytes + tail; + } +- return bytes; + } + + // Return long branch stub size. +@@ -6039,7 +6102,7 @@ Stub_table::plt_call_size( + template + unsigned int + Stub_table::branch_stub_size( +- typename Branch_stub_entries::const_iterator p, ++ typename Branch_stub_entries::iterator p, + bool* need_lt) + { + Address loc = this->stub_address() + this->last_plt_size_ + p->second.off_; +@@ -6053,46 +6116,56 @@ Stub_table::branch_stub_size( + } + + uint64_t off = p->first.dest_ - loc; ++ unsigned int bytes = 0; + if (p->second.notoc_) + { + if (this->targ_->power10_stubs()) + { + Address odd = loc & 4; + if (off + (1 << 25) < 2 << 25) +- return odd + 12; +- if (off - odd + (1ULL << 33) < 1ULL << 34) +- return odd + 16; +- if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) +- return 28; +- return 32; +- } +- off -= 8; +- if (off + 0x8000 < 0x10000) +- return 24; +- if (off + 0x80008000ULL < 0x100000000ULL) +- { +- if (off + 24 + (1 << 25) < 2 << 25) +- return 28; +- return 32; +- } +- unsigned int bytes = 32; +- if (off + 0x800000000000ULL >= 0x1000000000000ULL +- && ((off >> 32) & 0xffff) != 0) +- bytes += 4; +- if (((off >> 32) & 0xffffffffULL) != 0) +- bytes += 4; +- if (hi(off) != 0) +- bytes += 4; +- if (l(off) != 0) +- bytes += 4; +- return bytes; ++ bytes = odd + 12; ++ else if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes = odd + 16; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes = 28; ++ else ++ bytes = 32; ++ if (!(p->second.toc_ && this->targ_->power10_stubs_auto())) ++ return bytes; ++ p->second.tocoff_ = bytes; ++ } ++ else ++ { ++ off -= 8; ++ if (off + 0x8000 < 0x10000) ++ return 24; ++ if (off + 0x80008000ULL < 0x100000000ULL) ++ { ++ if (off + 24 + (1 << 25) < 2 << 25) ++ return 28; ++ return 32; ++ } ++ ++ bytes = 32; ++ if (off + 0x800000000000ULL >= 0x1000000000000ULL ++ && ((off >> 32) & 0xffff) != 0) ++ bytes += 4; ++ if (((off >> 32) & 0xffffffffULL) != 0) ++ bytes += 4; ++ if (hi(off) != 0) ++ bytes += 4; ++ if (l(off) != 0) ++ bytes += 4; ++ return bytes; ++ } + } + + if (off + (1 << 25) < 2 << 25) +- return 4; +- if (!this->targ_->power10_stubs()) ++ return bytes + 4; ++ if (!this->targ_->power10_stubs() ++ || (p->second.toc_ && this->targ_->power10_stubs_auto())) + *need_lt = true; +- return 16; ++ return bytes + 16; + } + + template +@@ -6128,6 +6201,10 @@ Stub_table::do_write(Output_file* of) + if (size == 64 + && this->targ_->power10_stubs()) + { ++ const Output_data_got_powerpc* got ++ = this->targ_->got_section(); ++ Address got_os_addr = got->output_section()->address(); ++ + if (!this->plt_call_stubs_.empty()) + { + // Write out plt call stubs. +@@ -6137,22 +6214,94 @@ Stub_table::do_write(Output_file* of) + ++cs) + { + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); +- if (cs->second.r2save_) +- { +- write_insn(p, std_2_1 + this->targ_->stk_toc()); +- p += 4; +- } + const Output_data_plt_powerpc* plt; + Address pltoff = this->plt_off(cs, &plt); + Address plt_addr = pltoff + plt->address(); +- Address from = this->stub_address() + (p - oview); +- Address delta = plt_addr - from; +- p = build_power10_offset(p, delta, from & 4, true); +- write_insn(p, mtctr_12); +- p += 4; +- if (!this->build_tls_opt_tail(p, cs)) +- write_insn(p, bctr); ++ if (this->targ_->power10_stubs_auto()) ++ { ++ if (cs->second.notoc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_head(&p, false); ++ Address from = this->stub_address() + (p - oview); ++ Address delta = plt_addr - from; ++ p = build_power10_offset(p, delta, from & 4, ++ true); ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ p += 4; ++ p = oview + this->plt_call_align(p - oview); ++ } ++ if (cs->second.toc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr ++ = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } ++ const Powerpc_relobj* ppcobj ++ = static_cast*>( ++ cs->first.object_); ++ Address got_addr = got_os_addr + ppcobj->toc_base_offset(); ++ Address off = plt_addr - got_addr; ++ ++ if (off + 0x80008000 > 0xffffffff || (off & 7) != 0) ++ this->plt_error(cs->first); ++ ++ if (cs->second.r2save_) ++ { ++ write_insn(p, std_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ } ++ if (ha(off) != 0) ++ { ++ write_insn(p, addis_12_2 + ha(off)); ++ p += 4; ++ write_insn(p, ld_12_12 + l(off)); ++ p += 4; ++ } ++ else ++ { ++ write_insn(p, ld_12_2 + l(off)); ++ p += 4; ++ } ++ write_insn(p, mtctr_12); ++ p += 4; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else ++ write_insn(p, bctr); ++ } ++ } ++ else ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr ++ = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } ++ if (cs->second.r2save_) ++ { ++ write_insn(p, std_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ } ++ Address from = this->stub_address() + (p - oview); ++ Address delta = plt_addr - from; ++ p = build_power10_offset(p, delta, from & 4, true); ++ write_insn(p, mtctr_12); ++ p += 4; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else ++ write_insn(p, bctr); ++ } + } + } + +@@ -6168,19 +6317,76 @@ Stub_table::do_write(Output_file* of) + p = oview + off; + Address loc = this->stub_address() + off; + Address delta = bs->first.dest_ - loc; +- if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25) ++ if (this->targ_->power10_stubs_auto()) + { +- unsigned char* startp = p; +- p = build_power10_offset(p, delta, loc & 4, false); +- delta -= p - startp; ++ if (bs->second.notoc_) ++ { ++ unsigned char* startp = p; ++ p = build_power10_offset(p, delta, ++ loc & 4, false); ++ delta -= p - startp; ++ startp = p; ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } ++ p += 4; ++ delta -= p - startp; ++ } ++ if (bs->second.toc_) ++ { ++ if (delta + (1 << 25) >= 2 << 25) ++ { ++ Address brlt_addr ++ = this->targ_->find_branch_lookup_table(bs->first.dest_); ++ gold_assert(brlt_addr != invalid_address); ++ brlt_addr += this->targ_->brlt_section()->address(); ++ Address got_addr = got_os_addr + bs->first.toc_base_off_; ++ Address brltoff = brlt_addr - got_addr; ++ if (ha(brltoff) == 0) ++ { ++ write_insn(p, ld_12_2 + l(brltoff)); ++ p += 4; ++ } ++ else ++ { ++ write_insn(p, addis_12_2 + ha(brltoff)); ++ p += 4; ++ write_insn(p, ld_12_12 + l(brltoff)); ++ p += 4; ++ } ++ } ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } ++ } + } +- if (delta + (1 << 25) < 2 << 25) +- write_insn(p, b | (delta & 0x3fffffc)); + else + { +- write_insn(p, mtctr_12); +- p += 4; +- write_insn(p, bctr); ++ if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25) ++ { ++ unsigned char* startp = p; ++ p = build_power10_offset(p, delta, ++ loc & 4, false); ++ delta -= p - startp; ++ } ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } + } + } + } +@@ -6204,7 +6410,11 @@ Stub_table::do_write(Output_file* of) + Address plt_addr = pltoff + plt->address(); + + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } + if (cs->second.r2save_) + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); +@@ -6241,7 +6451,11 @@ Stub_table::do_write(Output_file* of) + } + write_insn(p, mtctr_12); + p += 4; +- if (!this->build_tls_opt_tail(p, cs)) ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else + write_insn(p, bctr); + } + } +@@ -6292,8 +6506,12 @@ Stub_table::do_write(Output_file* of) + } + + p = oview + cs->second.off_; +- if (this->build_tls_opt_head(&p, cs)) +- use_fake_dep = thread_safe; ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ use_fake_dep = thread_safe; ++ } + if (cs->second.r2save_) + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); +@@ -6355,8 +6573,10 @@ Stub_table::do_write(Output_file* of) + write_insn(p, ld_2_2 + l(off + 8)); + p += 4; + } +- if (this->build_tls_opt_tail(p, cs)) +- ; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); + else if (thread_safe && !use_fake_dep) + { + write_insn(p, cmpldi_2_0); +@@ -6437,7 +6657,8 @@ Stub_table::do_write(Output_file* of) + plt_addr += plt->address(); + + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_head(&p, false); + if (parameters->options().output_is_position_independent()) + { + Address got_addr; +@@ -10175,10 +10396,17 @@ Target_powerpc::Relocate::relocate( + const int reloc_size = elfcpp::Elf_sizes::rela_size; + elfcpp::Shdr shdr(relinfo->reloc_shdr); + size_t reloc_count = shdr.get_sh_size() / reloc_size; ++ if (size == 64 ++ && r_type != elfcpp::R_PPC64_REL24_NOTOC) ++ value += ent->tocoff_; + if (size == 64 + && ent->r2save_ + && r_type == elfcpp::R_PPC64_REL24_NOTOC) +- value += 4; ++ { ++ if (!(target->power10_stubs() ++ && target->power10_stubs_auto())) ++ value += 4; ++ } + else if (size == 64 + && ent->r2save_ + && relnum < reloc_count - 1) +@@ -10795,8 +11023,14 @@ Target_powerpc::Relocate::relocate( + value = (value - target->savres_section()->address() + + stub_table->branch_size()); + else +- value = (stub_table->stub_address() + stub_table->plt_size() +- + ent->off_); ++ { ++ value = (stub_table->stub_address() ++ + stub_table->plt_size() ++ + ent->off_); ++ if (size == 64 ++ && r_type != elfcpp::R_PPC64_REL24_NOTOC) ++ value += ent->tocoff_; ++ } + has_stub_value = true; + } + } +-- +2.21.3 + diff --git a/0001-GOLD-PowerPC64-__tls_get_addr_opt-stub.patch b/0001-GOLD-PowerPC64-__tls_get_addr_opt-stub.patch new file mode 100644 index 0000000..8547a6b --- /dev/null +++ b/0001-GOLD-PowerPC64-__tls_get_addr_opt-stub.patch @@ -0,0 +1,75 @@ +From dc9f426801780e98f6bb81e74d5bb10b663260ac Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Wed, 23 Sep 2020 22:54:01 +0930 +Subject: [PATCH] [GOLD] PowerPC64 __tls_get_addr_opt stub + +This stub doesn't have the r2 store at the beginning. + + * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip + first insn of __tls_get_addr_opt stub. + +(cherry picked from commit a993d270f8423a8b6faa2ce9d245073bed076bb0) +--- + gold/ChangeLog | 5 +++++ + gold/powerpc.cc | 31 +++++++++++++++++-------------- + 2 files changed, 22 insertions(+), 14 deletions(-) + +diff --git a/gold/ChangeLog b/gold/ChangeLog +index 5c891349c4..7734acec35 100644 +--- a/gold/ChangeLog ++++ b/gold/ChangeLog +@@ -1,3 +1,8 @@ ++2020-09-24 Alan Modra ++ ++ * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip ++ first insn of __tls_get_addr_opt stub. ++ + 2020-09-24 Alan Modra + + Apply from master +diff --git a/gold/powerpc.cc b/gold/powerpc.cc +index e35cbcf6c0..1020fa42f9 100644 +--- a/gold/powerpc.cc ++++ b/gold/powerpc.cc +@@ -10401,21 +10401,24 @@ Target_powerpc::Relocate::relocate( + value += ent->tocoff_; + if (size == 64 + && ent->r2save_ +- && r_type == elfcpp::R_PPC64_REL24_NOTOC) ++ && !(gsym != NULL ++ && target->is_tls_get_addr_opt(gsym))) + { +- if (!(target->power10_stubs() +- && target->power10_stubs_auto())) +- value += 4; +- } +- else if (size == 64 +- && ent->r2save_ +- && relnum < reloc_count - 1) +- { +- Reltype next_rela(preloc + reloc_size); +- if (elfcpp::elf_r_type(next_rela.get_r_info()) +- == elfcpp::R_PPC64_TOCSAVE +- && next_rela.get_r_offset() == rela.get_r_offset() + 4) +- value += 4; ++ if (r_type == elfcpp::R_PPC64_REL24_NOTOC) ++ { ++ if (!(target->power10_stubs() ++ && target->power10_stubs_auto())) ++ value += 4; ++ } ++ else if (relnum < reloc_count - 1) ++ { ++ Reltype next_rela(preloc + reloc_size); ++ if (elfcpp::elf_r_type(next_rela.get_r_info()) ++ == elfcpp::R_PPC64_TOCSAVE ++ && (next_rela.get_r_offset() ++ == rela.get_r_offset() + 4)) ++ value += 4; ++ } + } + localentry0 = ent->localentry0_; + has_stub_value = true; +-- +2.21.3 + diff --git a/0001-Implement-missing-powerpc-extended-mnemonics.patch b/0001-Implement-missing-powerpc-extended-mnemonics.patch new file mode 100644 index 0000000..1739613 --- /dev/null +++ b/0001-Implement-missing-powerpc-extended-mnemonics.patch @@ -0,0 +1,165 @@ +From f26bb6247b27f9fb81728132949e03f221d1abc4 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Mon, 10 Aug 2020 15:08:27 +0930 +Subject: [PATCH] Implement missing powerpc extended mnemonics + +gas/ + * testsuite/gas/ppc/power8.d, + * testsuite/gas/ppc/power8.s: Add miso. + * testsuite/gas/ppc/power9.d, + * testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru. +opcodes/ + * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru. + Enable icbt for power5, miso for power8. + +(cherry picked from commit 8b2742a1567273f2ecc9fe6d7df1c9287865f5b6) +--- + gas/ChangeLog | 6 ++++++ + gas/testsuite/gas/ppc/power8.d | 2 ++ + gas/testsuite/gas/ppc/power8.s | 2 ++ + gas/testsuite/gas/ppc/power9.d | 4 ++++ + gas/testsuite/gas/ppc/power9.s | 4 ++++ + opcodes/ChangeLog | 4 ++++ + opcodes/ppc-opc.c | 18 +++++++++++------- + 7 files changed, 33 insertions(+), 7 deletions(-) + +diff --git a/gas/ChangeLog b/gas/ChangeLog +index 0062d877bd..3d5376df89 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,6 +1,12 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-10 Alan Modra ++ * testsuite/gas/ppc/power8.d, ++ * testsuite/gas/ppc/power8.s: Add miso. ++ * testsuite/gas/ppc/power9.d, ++ * testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru. ++ + 2020-08-10 Alan Modra + * testsuite/gas/ppc/power8.d: Update. + * testsuite/gas/ppc/vsx2.d: Update. +diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d +index 1439496462..df3f5d410d 100644 +--- a/gas/testsuite/gas/ppc/power8.d ++++ b/gas/testsuite/gas/ppc/power8.d +@@ -310,4 +310,6 @@ Disassembly of section \.text: + .*: (4d 89 04 61|61 04 89 4d) bgttarl cr2 + .*: (4d 89 04 61|61 04 89 4d) bgttarl cr2 + .*: (4d 89 1c 61|61 1c 89 4d) bctarl 12,4\*cr2\+gt,3 ++.*: (7f 5a d3 78|78 d3 5a 7f) miso ++.*: (7f 5a d3 78|78 d3 5a 7f) miso + #pass +diff --git a/gas/testsuite/gas/ppc/power8.s b/gas/testsuite/gas/ppc/power8.s +index beb1c5e81c..52a3e8ea69 100644 +--- a/gas/testsuite/gas/ppc/power8.s ++++ b/gas/testsuite/gas/ppc/power8.s +@@ -302,3 +302,5 @@ power8: + bctarl 0b01100,4*cr2+gt + bctarl 0b01100,4*cr2+gt,0 + bctarl 0b01100,4*cr2+gt,3 ++ or 26,26,26 ++ miso +diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d +index 4e7156d46d..45a8f495ae 100644 +--- a/gas/testsuite/gas/ppc/power9.d ++++ b/gas/testsuite/gas/ppc/power9.d +@@ -399,4 +399,8 @@ Disassembly of section \.text: + .*: (7c 20 20 ac|ac 20 20 7c) dcbfl 0,r4 + .*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5 + .*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5 ++.*: (63 ff 00 00|00 00 ff 63) exser ++.*: (63 ff 00 00|00 00 ff 63) exser ++.*: (7c 00 18 9c|9c 18 00 7c) msgsndu r3 ++.*: (7c 00 d8 dc|dc d8 00 7c) msgclru r27 + #pass +diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s +index 69053819ff..2d412b9e66 100644 +--- a/gas/testsuite/gas/ppc/power9.s ++++ b/gas/testsuite/gas/ppc/power9.s +@@ -390,3 +390,7 @@ power9: + dcbf 0,4,1 + dcbflp 0,5 + dcbf 0,5,3 ++ ori 31,31,0 ++ exser ++ msgsndu 3 ++ msgclru 27 +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index 30593769d4..02cbd524f6 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,6 +1,10 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-10 Alan Modra ++ * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru. ++ Enable icbt for power5, miso for power8. ++ + 2020-08-10 Alan Modra + * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over + mtvsrd, and similarly for mfvsrd. +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index a830c4c0fd..c4fa6761f4 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -6114,6 +6114,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, + + {"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}}, ++{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}}, + {"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, + {"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, + +@@ -6236,7 +6237,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}}, + +-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}}, ++{"icbt", X(31,22), X_MASK, POWER5|BOOKE|PPCE300, 0, {CT, RA0, RB}}, + + {"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}}, + {"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}}, +@@ -6354,6 +6355,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}}, + {"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}}, + ++{"msgsndu", XRTRA(31,78,0,0), XRTRA_MASK, POWER9, 0, {RB}}, + {"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}}, + {"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}}, + +@@ -6387,6 +6389,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"lxvrdx", X(31,109), XX1_MASK, POWER10, 0, {XT6, RA0, RB}}, + ++{"msgclru", XRTRA(31,110,0,0), XRTRA_MASK, POWER9, 0, {RB}}, + {"mvidsplt", X(31,110), X_MASK, E6500, 0, {VD, RA, RB}}, + + {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}}, +@@ -7051,14 +7054,15 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}}, + +-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}}, +- +-{"miso", 0x7f5ad378, 0xffffffff, E6500, 0, {0}}, +- +-/* The "yield", "mdoio" and "mdoom" instructions are extended mnemonics for +- "or rX,rX,rX", with rX being r27, r29 and r30 respectively. */ ++/* or 26,26,26 */ ++{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}}, ++/* or 27,27,27 */ + {"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}}, ++/* or 28,28,28 */ ++{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}}, ++/* or 29,29,29 */ + {"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}}, ++/* or 30,30,30 */ + {"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}}, + {"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}}, + {"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}}, +-- +2.21.3 + diff --git a/0001-Implement-missing-powerpc-mtspr-and-mfspr-extended-i.patch b/0001-Implement-missing-powerpc-mtspr-and-mfspr-extended-i.patch new file mode 100644 index 0000000..68ef102 --- /dev/null +++ b/0001-Implement-missing-powerpc-mtspr-and-mfspr-extended-i.patch @@ -0,0 +1,369 @@ +From 9030004379d4db633dc84a09f3b45ae0d6caed77 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Mon, 10 Aug 2020 21:41:36 +0930 +Subject: [PATCH] Implement missing powerpc mtspr and mfspr extended insns + + * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended + instructions. + +(cherry picked from commit 3eb651743e06fb360687a26be87bc6b710fc7066) +--- + opcodes/ChangeLog | 4 ++ + opcodes/ppc-opc.c | 162 ++++++++++++++++++++++++++++++++++++++++++++-- + 2 files changed, 160 insertions(+), 6 deletions(-) + +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index 02cbd524f6..06d136d480 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,6 +1,10 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-10 Alan Modra ++ * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended ++ instructions. ++ + 2020-08-10 Alan Modra + * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru. + Enable icbt for power5, miso for power8. +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index c4fa6761f4..4471b0f2bc 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -6741,11 +6741,13 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}}, + {"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}}, ++{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}}, + {"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}}, + {"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}}, + {"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}}, + {"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}}, + {"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}}, ++{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}}, + {"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}}, + {"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}}, + {"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}}, +@@ -6756,9 +6758,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}}, + {"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}}, + {"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}}, ++{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}}, + {"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}}, +@@ -6772,16 +6777,28 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}}, ++{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}}, + {"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}}, + {"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}}, + {"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}}, + {"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}}, + {"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}}, + {"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}}, + {"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}}, ++{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}}, + {"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, + {"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, + {"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, +@@ -6797,20 +6814,37 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}}, + {"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}}, ++{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}}, + {"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}}, + {"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}}, + {"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}}, +@@ -6827,6 +6861,14 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}}, + {"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}}, + {"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}}, + {"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}}, +@@ -6851,18 +6893,36 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}}, + {"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}}, + {"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}}, + {"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}}, ++{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}}, + {"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}}, +@@ -6876,12 +6936,25 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}}, + {"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}}, ++{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}}, + {"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}}, + {"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}}, ++{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}}, ++{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}}, + {"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}}, + {"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}}, + {"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}}, +@@ -7128,8 +7201,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}}, + {"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}}, ++{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}}, + {"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}}, + {"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}}, ++{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}}, + {"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}}, + {"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}}, + {"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}}, +@@ -7142,13 +7217,20 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}}, + {"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}}, + {"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}}, ++{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}}, + {"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}}, + {"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}}, +@@ -7159,13 +7241,24 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}}, + {"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}}, + {"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}}, + {"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}}, + {"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}}, + {"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}}, + {"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}}, + {"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}}, + {"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}}, + {"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}}, +@@ -7181,20 +7274,38 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}}, + {"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}}, + {"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}}, ++{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}}, + {"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}}, + {"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}}, + {"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}}, +@@ -7211,6 +7322,13 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}}, ++{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}}, + {"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}}, + {"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}}, + {"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}}, +@@ -7225,12 +7343,44 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}}, + {"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}}, + {"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}}, ++{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}}, ++{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}}, ++{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}}, + {"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}}, + {"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}}, + {"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}}, +-- +2.21.3 + diff --git a/0001-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-calls.patch b/0001-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-calls.patch new file mode 100644 index 0000000..4bc22e7 --- /dev/null +++ b/0001-PPC64_OPT_LOCALENTRY-is-incompatible-with-tail-calls.patch @@ -0,0 +1,437 @@ +From eec51831f13bbbb57f34def5734bc7b1aedd6675 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Sat, 26 Sep 2020 15:10:09 +0930 +Subject: [PATCH] PPC64_OPT_LOCALENTRY is incompatible with tail calls + +The save of r2 in __glink_PLTresolve is the culprit. Remove it, +unless we know we need it for --plt-localentry. --plt-localentry +should not be used with power10 pc-relative code that makes tail +calls. + +The patch also removes use of r2 as a scratch reg in the ELFv2 +__glink_PLTresolve. Using r2 isn't a problem, this is just reducing +the number of scratch regs. + +bfd/ + * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0. + (LD_R0_0R11, ADD_R11_R0_R11): Define. + (ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10 + code detected. + (ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame. + (ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve, + and only emit for has_plt_localentry0. Don't use r2 in the stub. +ld/ + * testsuite/ld-powerpc/elfv2so.d, + * testsuite/ld-powerpc/notoc2.d, + * testsuite/ld-powerpc/tlsdesc.wf, + * testsuite/ld-powerpc/tlsdesc2.d, + * testsuite/ld-powerpc/tlsdesc2.wf, + * testsuite/ld-powerpc/tlsopt5.d, + * testsuite/ld-powerpc/tlsopt5.wf, + * testsuite/ld-powerpc/tlsopt6.d, + * testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve. + +(cherry picked from commit 3cd7c7d7ef38ec5dc0a0c137c47d9ad0fc9e2e5f) +--- + bfd/ChangeLog | 10 ++++ + bfd/elf64-ppc.c | 84 +++++++++++++++++++++++------ + ld/ChangeLog | 12 +++++ + ld/testsuite/ld-powerpc/elfv2so.d | 17 +++--- + ld/testsuite/ld-powerpc/notoc2.d | 4 +- + ld/testsuite/ld-powerpc/tlsdesc.wf | 4 +- + ld/testsuite/ld-powerpc/tlsdesc2.d | 9 ++-- + ld/testsuite/ld-powerpc/tlsdesc2.wf | 6 +-- + ld/testsuite/ld-powerpc/tlsopt5.d | 11 ++-- + ld/testsuite/ld-powerpc/tlsopt5.wf | 4 +- + ld/testsuite/ld-powerpc/tlsopt6.d | 11 ++-- + ld/testsuite/ld-powerpc/tlsopt6.wf | 4 +- + 12 files changed, 124 insertions(+), 52 deletions(-) + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 49232b84c5..01ccac443e 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,13 @@ ++2020-09-26 Alan Modra ++ ++ * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0. ++ (LD_R0_0R11, ADD_R11_R0_R11): Define. ++ (ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10 ++ code detected. ++ (ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame. ++ (ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve, ++ and only emit for has_plt_localentry0. Don't use r2 in the stub. ++ + 2020-09-24 Nick Clifton + + Import from mainline: +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index 7804ea3c14..f4d0c88c7a 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -211,9 +211,10 @@ static bfd_vma opd_entry_value + #define PLD_R12_PC 0x04100000e5800000ULL + #define PNOP 0x0700000000000000ULL + +-/* __glink_PLTresolve stub instructions. We enter with the index in R0. */ ++/* __glink_PLTresolve stub instructions. We enter with the index in ++ R0 for ELFv1, and the address of a glink branch in R12 for ELFv2. */ + #define GLINK_PLTRESOLVE_SIZE(htab) \ +- (8u + (htab->opd_abi ? 11 * 4 : 14 * 4)) ++ (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4)) + /* 0: */ + /* .quad plt0-1f */ + /* __glink: */ +@@ -229,11 +230,14 @@ static bfd_vma opd_entry_value + /* mtctr %12 */ + /* ld %11,16(%11) */ + /* bctr */ +-#define MFLR_R0 0x7c0802a6 /* mflr %r0 */ +-#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */ +-#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */ +-#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */ +-#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */ ++ ++#define MFLR_R0 0x7c0802a6 /* mflr %r0 */ ++#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */ ++#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */ ++#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */ ++#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */ ++#define LD_R0_0R11 0xe80b0000 /* ld %r0,0(%r11) */ ++#define ADD_R11_R0_R11 0x7d605a14 /* add %r11,%r0,%r11 */ + + /* Pad with this. */ + #define NOP 0x60000000 +@@ -7735,6 +7739,19 @@ ppc64_elf_tls_setup (struct bfd_link_info *info) + --plt-localentry can cause trouble. */ + if (htab->params->plt_localentry0 < 0) + htab->params->plt_localentry0 = 0; ++ if (htab->params->plt_localentry0 && htab->has_power10_relocs) ++ { ++ /* The issue is that __glink_PLTresolve saves r2, which is done ++ because glibc ld.so _dl_runtime_resolve restores r2 to support ++ a glibc plt call optimisation where global entry code is ++ skipped on calls that resolve to the same binary. The ++ __glink_PLTresolve save of r2 is incompatible with code ++ making tail calls, because the tail call might go via the ++ resolver and thus overwrite the proper saved r2. */ ++ _bfd_error_handler (_("warning: --plt-localentry is incompatible with " ++ "power10 pc-relative code")); ++ htab->params->plt_localentry0 = 0; ++ } + if (htab->params->plt_localentry0 + && elf_link_hash_lookup (&htab->elf, "GLIBC_2.26", + FALSE, FALSE, FALSE) == NULL) +@@ -13870,11 +13887,11 @@ ppc64_elf_size_stubs (struct bfd_link_info *info) + /* Augmentation. */ + p += 1; + +- *p++ = DW_CFA_advance_loc + 1; ++ *p++ = DW_CFA_advance_loc + (htab->has_plt_localentry0 ? 3 : 2); + *p++ = DW_CFA_register; + *p++ = 65; + *p++ = htab->opd_abi ? 12 : 0; +- *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 5 : 7); ++ *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 4 : 2); + *p++ = DW_CFA_restore_extended; + *p++ = 65; + p += ((24 + align - 1) & -align) - 24; +@@ -14470,23 +14487,60 @@ ppc64_elf_build_stubs (struct bfd_link_info *info, + } + else + { ++ unsigned int insn; ++ ++ /* 0: ++ . .quad plt0-1f # plt0 entry relative to 1: ++ # ++ # We get here with r12 initially @ a glink branch ++ # Load the address of _dl_runtime_resolve from plt0 and ++ # jump to it, with r0 set to the index of the PLT entry ++ # to be resolved and r11 the link map. ++ __glink_PLTresolve: ++ . std %r2,24(%r1) # optional ++ . mflr %r0 ++ . bcl 20,31,1f ++ 1: ++ . mflr %r11 ++ . mtlr %r0 ++ . ld %r0,(0b-1b)(%r11) ++ . sub %r12,%r12,%r11 ++ . add %r11,%r0,%r11 ++ . addi %r0,%r12,1b-2f ++ . ld %r12,0(%r11) ++ . srdi %r0,%r0,2 ++ . mtctr %r12 ++ . ld %r11,8(%r11) ++ . bctr ++ 2: ++ . b __glink_PLTresolve ++ . ... ++ . b __glink_PLTresolve */ ++ ++ if (htab->has_plt_localentry0) ++ { ++ bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p); ++ p += 4; ++ } + bfd_put_32 (htab->glink->owner, MFLR_R0, p); + p += 4; + bfd_put_32 (htab->glink->owner, BCL_20_31, p); + p += 4; + bfd_put_32 (htab->glink->owner, MFLR_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p); +- p += 4; +- bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p); +- p += 4; + bfd_put_32 (htab->glink->owner, MTLR_R0, p); + p += 4; ++ if (htab->has_plt_localentry0) ++ insn = LD_R0_0R11 | (-20 & 0xfffc); ++ else ++ insn = LD_R0_0R11 | (-16 & 0xfffc); ++ bfd_put_32 (htab->glink->owner, insn, p); ++ p += 4; + bfd_put_32 (htab->glink->owner, SUB_R12_R12_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p); ++ bfd_put_32 (htab->glink->owner, ADD_R11_R0_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-48 & 0xffff), p); ++ bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-44 & 0xffff), p); + p += 4; + bfd_put_32 (htab->glink->owner, LD_R12_0R11, p); + p += 4; +diff --git a/ld/ChangeLog b/ld/ChangeLog +index 3fcbc7e67f..a3acc07689 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,15 @@ ++2020-09-26 Alan Modra ++ ++ * testsuite/ld-powerpc/elfv2so.d, ++ * testsuite/ld-powerpc/notoc2.d, ++ * testsuite/ld-powerpc/tlsdesc.wf, ++ * testsuite/ld-powerpc/tlsdesc2.d, ++ * testsuite/ld-powerpc/tlsdesc2.wf, ++ * testsuite/ld-powerpc/tlsopt5.d, ++ * testsuite/ld-powerpc/tlsopt5.wf, ++ * testsuite/ld-powerpc/tlsopt6.d, ++ * testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve. ++ + 2020-09-24 Alan Modra + + PR 26655 +diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d +index 0162bd0880..4018f0536c 100644 +--- a/ld/testsuite/ld-powerpc/elfv2so.d ++++ b/ld/testsuite/ld-powerpc/elfv2so.d +@@ -74,12 +74,11 @@ Disassembly of section \.text: + .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 + .*: (42 9f 00 05|05 00 9f 42) bcl .* + .*: (7d 68 02 a6|a6 02 68 7d) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) + .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 ++.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\) + .*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12 +-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11 +-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48 ++.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 ++.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44 + .*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\) + .*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2 + .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 +@@ -87,16 +86,16 @@ Disassembly of section \.text: + .*: (4e 80 04 20|20 04 80 4e) bctr + + .* : +-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff b8|b8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve> +diff --git a/ld/testsuite/ld-powerpc/notoc2.d b/ld/testsuite/ld-powerpc/notoc2.d +index 1e519c0d1b..3448f8b37e 100644 +--- a/ld/testsuite/ld-powerpc/notoc2.d ++++ b/ld/testsuite/ld-powerpc/notoc2.d +@@ -22,8 +22,8 @@ Disassembly of section \.text: + .*: (39 80 ff ff|ff ff 80 39) + .*: (06 10 00 00|00 00 10 06) pla r12,0 + .*: (39 80 00 00|00 00 80 39) +-.*: (06 10 00 00|00 00 10 06) pla r3,92 +-.*: (38 60 00 5c|5c 00 60 38) ++.*: (06 10 00 00|00 00 10 06) pla r3,88 ++.*: (38 60 00 58|58 00 60 38) + .*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts> + .*: (60 00 00 00|00 00 00 60) nop + #pass +diff --git a/ld/testsuite/ld-powerpc/tlsdesc.wf b/ld/testsuite/ld-powerpc/tlsdesc.wf +index 09503fa005..e7d4522b50 100644 +--- a/ld/testsuite/ld-powerpc/tlsdesc.wf ++++ b/ld/testsuite/ld-powerpc/tlsdesc.wf +@@ -38,9 +38,9 @@ Contents of the \.eh_frame section: + DW_CFA_nop + + 0+4c 0+14 0+50 FDE cie=0+ pc=0+2f8\.\.0+32c +- DW_CFA_advance_loc: 4 to 0+2fc ++ DW_CFA_advance_loc: 8 to 0+300 + DW_CFA_register: r65 in r12 +- DW_CFA_advance_loc: 20 to 0+310 ++ DW_CFA_advance_loc: 16 to 0+310 + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=0+2e0\.\.0+2ec +diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.d b/ld/testsuite/ld-powerpc/tlsdesc2.d +index 47aedbecb8..c271c949b0 100644 +--- a/ld/testsuite/ld-powerpc/tlsdesc2.d ++++ b/ld/testsuite/ld-powerpc/tlsdesc2.d +@@ -53,12 +53,11 @@ Disassembly of section \.text: + .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 + .*: (42 9f 00 05|05 00 9f 42) bcl .* + .*: (7d 68 02 a6|a6 02 68 7d) mflr r11 +-.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\) +-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) + .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 ++.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\) + .*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12 +-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11 +-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48 ++.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 ++.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44 + .*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\) + .*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2 + .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 +@@ -66,4 +65,4 @@ Disassembly of section \.text: + .*: (4e 80 04 20|20 04 80 4e) bctr + + .* <__tls_get_addr_opt@plt>: +-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve> +diff --git a/ld/testsuite/ld-powerpc/tlsdesc2.wf b/ld/testsuite/ld-powerpc/tlsdesc2.wf +index cb92c294b1..79a417ba06 100644 +--- a/ld/testsuite/ld-powerpc/tlsdesc2.wf ++++ b/ld/testsuite/ld-powerpc/tlsdesc2.wf +@@ -37,10 +37,10 @@ Contents of the \.eh_frame section: + DW_CFA_nop + DW_CFA_nop + +-0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+354 +- DW_CFA_advance_loc: 4 to 0+31c ++0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+350 ++ DW_CFA_advance_loc: 8 to 0+320 + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to 0+338 ++ DW_CFA_advance_loc: 8 to 0+328 + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=0+300\.\.0+30c +diff --git a/ld/testsuite/ld-powerpc/tlsopt5.d b/ld/testsuite/ld-powerpc/tlsopt5.d +index 0fcb79821b..efd6debc55 100644 +--- a/ld/testsuite/ld-powerpc/tlsopt5.d ++++ b/ld/testsuite/ld-powerpc/tlsopt5.d +@@ -49,12 +49,11 @@ Disassembly of section \.text: + .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 + .*: (05 00 9f 42|42 9f 00 05) bcl .* + .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\) + .*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 ++.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\) + .*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12 +-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11 +-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48 ++.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11 ++.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44 + .*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\) + .*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2 + .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +@@ -62,7 +61,7 @@ Disassembly of section \.text: + .*: (20 04 80 4e|4e 80 04 20) bctr + + .* <__tls_get_addr_opt@plt>: +-.* (c8 ff ff 4b|4b ff ff c8) b .* ++.* (cc ff ff 4b|4b ff ff cc) b .* + + .* : +-.*: (c4 ff ff 4b|4b ff ff c4) b .* ++.*: (c8 ff ff 4b|4b ff ff c8) b .* +diff --git a/ld/testsuite/ld-powerpc/tlsopt5.wf b/ld/testsuite/ld-powerpc/tlsopt5.wf +index f0453610e0..84bd94ed72 100644 +--- a/ld/testsuite/ld-powerpc/tlsopt5.wf ++++ b/ld/testsuite/ld-powerpc/tlsopt5.wf +@@ -16,9 +16,9 @@ Contents of the \.eh_frame section: + DW_CFA_restore_extended: r65 + + 0+2c 0+14 0+30 FDE cie=0+ pc=.* +- DW_CFA_advance_loc: 4 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_restore_extended: r65 + + 0+44 0+10 0+48 FDE cie=0+ pc=.* +diff --git a/ld/testsuite/ld-powerpc/tlsopt6.d b/ld/testsuite/ld-powerpc/tlsopt6.d +index 4ca64092c1..15def719cb 100644 +--- a/ld/testsuite/ld-powerpc/tlsopt6.d ++++ b/ld/testsuite/ld-powerpc/tlsopt6.d +@@ -67,12 +67,11 @@ Disassembly of section \.text: + .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 + .*: (05 00 9f 42|42 9f 00 05) bcl .* + .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\) + .*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 ++.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\) + .*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12 +-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11 +-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48 ++.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11 ++.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44 + .*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\) + .*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2 + .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +@@ -80,7 +79,7 @@ Disassembly of section \.text: + .*: (20 04 80 4e|4e 80 04 20) bctr + + .* <__tls_get_addr_opt@plt>: +-.* (c8 ff ff 4b|4b ff ff c8) b .* ++.* (cc ff ff 4b|4b ff ff cc) b .* + + .* : +-.*: (c4 ff ff 4b|4b ff ff c4) b .* ++.*: (c8 ff ff 4b|4b ff ff c8) b .* +diff --git a/ld/testsuite/ld-powerpc/tlsopt6.wf b/ld/testsuite/ld-powerpc/tlsopt6.wf +index abb414a633..c2b9616352 100644 +--- a/ld/testsuite/ld-powerpc/tlsopt6.wf ++++ b/ld/testsuite/ld-powerpc/tlsopt6.wf +@@ -38,9 +38,9 @@ Contents of the \.eh_frame section: + DW_CFA_nop + + 0+4c 0+14 0+50 FDE cie=0+ pc=.* +- DW_CFA_advance_loc: 4 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=.* +-- +2.21.3 + diff --git a/0001-PR26655-Power10-libstdc-.so-R_PPC64_NONE-dynamic-rel.patch b/0001-PR26655-Power10-libstdc-.so-R_PPC64_NONE-dynamic-rel.patch new file mode 100644 index 0000000..b7c8794 --- /dev/null +++ b/0001-PR26655-Power10-libstdc-.so-R_PPC64_NONE-dynamic-rel.patch @@ -0,0 +1,229 @@ +From 97c22b122492ab3d2d1fd6237cadc56296ce76d2 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Wed, 23 Sep 2020 14:55:39 +0930 +Subject: [PATCH] PR26655, Power10 libstdc++.so R_PPC64_NONE dynamic relocs + +Some of the powerpc64 code editing functions are better run after +dynamic symbols have stabilised in order to make proper decisions +based on SYMBOL_REFERENCES_LOCAL. The dynamic symbols are processed +early in bfd_elf_size_dynamic_sections, before the backend +always_size_sections function is called. + +One function, ppc64_elf_tls_setup must run before +bfd_elf_size_dynamic_sections because it changes dynamic symbols. +ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I +think. ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run +later. + +So this patch arranges to call some edit functions later via +always_size_sections. + + PR 26655 +bfd/ + * elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to.. + (ppc64_elf_edit): Call params->edit. + (ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a + bfd_boolean. + * elf64-ppc.h (struct ppc64_elf_params): Add "edit". + (ppc64_elf_tls_setup): Update declaration. +ld/ + * emultempl/ppc64elf.em (params): Add ppc_edit. + (ppc_before_allocation): Split off some edit functions to.. + (ppc_edit): ..this, new function. + +(cherry picked from commit c94053440e29421dd8846530da73f09c9ede2e0f) +--- + bfd/ChangeLog | 10 ++++++++++ + bfd/elf64-ppc.c | 27 ++++++++++++++++----------- + bfd/elf64-ppc.h | 3 ++- + ld/ChangeLog | 7 +++++++ + ld/emultempl/ppc64elf.em | 18 +++++++++++++++--- + 5 files changed, 50 insertions(+), 15 deletions(-) + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 825d5e6d4a..1dabc6ebd6 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,13 @@ ++2020-09-24 Alan Modra ++ ++ PR 26655 ++ * elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to.. ++ (ppc64_elf_edit): Call params->edit. ++ (ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a ++ bfd_boolean. ++ * elf64-ppc.h (struct ppc64_elf_params): Add "edit". ++ (ppc64_elf_tls_setup): Update declaration. ++ + 2020-09-24 Alan Modra + + Apply from master +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index faf4989659..bc1302e6ef 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -114,7 +114,7 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_func_desc_adjust ++#define elf_backend_always_size_sections ppc64_elf_edit + #define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections +@@ -6340,13 +6340,13 @@ static const struct sfpr_def_parms save_res_funcs[] = + }; + + /* Called near the start of bfd_elf_size_dynamic_sections. We use +- this hook to a) provide some gcc support functions, and b) transfer +- dynamic linking information gathered so far on function code symbol +- entries, to their corresponding function descriptor symbol entries. */ ++ this hook to a) run the edit functions in this file, b) provide ++ some gcc support functions, and c) transfer dynamic linking ++ information gathered so far on function code symbol entries, to ++ their corresponding function descriptor symbol entries. */ + + static bfd_boolean +-ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++ppc64_elf_edit (bfd *obfd ATTRIBUTE_UNUSED, struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + +@@ -6354,6 +6354,9 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED, + if (htab == NULL) + return FALSE; + ++ /* Call back into the linker, which then runs the edit functions. */ ++ htab->params->edit (); ++ + /* Provide any missing _save* and _rest* functions. */ + if (htab->sfpr != NULL) + { +@@ -7694,9 +7697,11 @@ ppc64_elf_inline_plt (struct bfd_link_info *info) + return TRUE; + } + +-/* Set htab->tls_get_addr and call the generic ELF tls_setup function. */ ++/* Set htab->tls_get_addr and various other info specific to TLS. ++ This needs to run before dynamic symbols are processed in ++ bfd_elf_size_dynamic_sections. */ + +-asection * ++bfd_boolean + ppc64_elf_tls_setup (struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; +@@ -7704,7 +7709,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info) + + htab = ppc_hash_table (info); + if (htab == NULL) +- return NULL; ++ return FALSE; + + if (abiversion (info->output_bfd) == 1) + htab->opd_abi = 1; +@@ -7826,7 +7831,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info) + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + opt_fd->dynstr_index); + if (!bfd_elf_link_record_dynamic_symbol (info, opt_fd)) +- return NULL; ++ return FALSE; + } + if (tga_fd != NULL) + { +@@ -7885,7 +7890,7 @@ ppc64_elf_tls_setup (struct bfd_link_info *info) + && htab->params->no_tls_get_addr_regsave == -1) + htab->params->no_tls_get_addr_regsave = 0; + +- return _bfd_elf_tls_setup (info->output_bfd, info); ++ return TRUE; + } + + /* Return TRUE iff REL is a branch reloc with a global symbol matching +diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h +index a7230de81c..0492fd7fad 100644 +--- a/bfd/elf64-ppc.h ++++ b/bfd/elf64-ppc.h +@@ -27,6 +27,7 @@ struct ppc64_elf_params + /* Linker call-backs. */ + asection * (*add_stub_section) (const char *, asection *); + void (*layout_sections_again) (void); ++ void (*edit) (void); + + /* Maximum size of a group of input sections that can be handled by + one stub section. A value of +/-1 indicates the bfd back-end +@@ -80,7 +81,7 @@ bfd_boolean ppc64_elf_edit_opd + (struct bfd_link_info *); + bfd_boolean ppc64_elf_inline_plt + (struct bfd_link_info *); +-asection *ppc64_elf_tls_setup ++bfd_boolean ppc64_elf_tls_setup + (struct bfd_link_info *); + bfd_boolean ppc64_elf_tls_optimize + (struct bfd_link_info *); +diff --git a/ld/ChangeLog b/ld/ChangeLog +index 0ee333a860..3fcbc7e67f 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,10 @@ ++2020-09-24 Alan Modra ++ ++ PR 26655 ++ * emultempl/ppc64elf.em (params): Add ppc_edit. ++ (ppc_before_allocation): Split off some edit functions to.. ++ (ppc_edit): ..this, new function. ++ + 2020-09-24 Alan Modra + + Apply from master +diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em +index 42b9bd48fc..2df5a218e6 100644 +--- a/ld/emultempl/ppc64elf.em ++++ b/ld/emultempl/ppc64elf.em +@@ -32,10 +32,12 @@ fragment <tls_sec != NULL + && !no_tls_opt) + { + /* Size the sections. This is premature, but we want to know the +@@ -323,8 +337,6 @@ ppc_before_allocation (void) + sort_toc_sections (&toc_os->children, NULL, NULL); + } + } +- +- gld${EMULATION_NAME}_before_allocation (); + } + + struct hook_stub_info +-- +2.21.3 + diff --git a/0001-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv1-_.patch b/0001-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv1-_.patch new file mode 100644 index 0000000..c4ab874 --- /dev/null +++ b/0001-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv1-_.patch @@ -0,0 +1,795 @@ +From 6f9a6c28850f6839ff61af22c277b2abbf7895da Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Tue, 22 Sep 2020 22:51:42 +0930 +Subject: [PATCH] PR26656, power10 libstdc++.so segfault in + __cxxabiv1::__cxa_throw + +This adds missing support for a power10 version of the __tls_get_addr +call stub implementing DT_PPC64_OPT PPC64_OPT_TLS. Without this, +power10 code using __tls_get_addr fails miserably at runtime unless +the --no-tls-get-addr-optimize option is given. + + PR 26656 + * elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with + size_power10_offset rather than calculating from start of stub. + Add size for notoc tls_get_addr_opt stub. + (plt_stub_pad): Add "odd" param, pass to plt_stub_size. + (build_tls_get_addr_head, build_tls_get_addr_tail): New functions. + (build_tls_get_addr_stub): Delete. + (ppc_build_one_stub): Use a temp for htab->params->stub_bfd. + Emit notoc tls_get_addr_opt stub. Move eh_frame code to + suit. Adjust code to use bfd_tls_get_addr_head/tail in place + of build_tls_get_addr_stub. + (ppc_size_one_stub): Size notoc tls_get_addr_opt stub. + Adjust plt_stub_size and plt_stub_pad calls. Correct "odd" + when padding stub. Size eh_frame for notoc stub too. + Correct lr_restore value. + (ppc64_elf_relocate_section): Don't skip over first insn of + notoc tls_get_addr_opt stub. + +(cherry picked from commit 294338867c268b6da43327b6cbe70e746bff1a04) +--- + bfd/ChangeLog | 20 +++ + bfd/elf64-ppc.c | 424 +++++++++++++++++++++++++++--------------------- + 2 files changed, 259 insertions(+), 185 deletions(-) + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 1dabc6ebd6..da976cac0f 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,23 @@ ++2020-09-24 Alan Modra ++ ++ PR 26656 ++ * elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with ++ size_power10_offset rather than calculating from start of stub. ++ Add size for notoc tls_get_addr_opt stub. ++ (plt_stub_pad): Add "odd" param, pass to plt_stub_size. ++ (build_tls_get_addr_head, build_tls_get_addr_tail): New functions. ++ (build_tls_get_addr_stub): Delete. ++ (ppc_build_one_stub): Use a temp for htab->params->stub_bfd. ++ Emit notoc tls_get_addr_opt stub. Move eh_frame code to ++ suit. Adjust code to use bfd_tls_get_addr_head/tail in place ++ of build_tls_get_addr_stub. ++ (ppc_size_one_stub): Size notoc tls_get_addr_opt stub. ++ Adjust plt_stub_size and plt_stub_pad calls. Correct "odd" ++ when padding stub. Size eh_frame for notoc stub too. ++ Correct lr_restore value. ++ (ppc64_elf_relocate_section): Don't skip over first insn of ++ notoc tls_get_addr_opt stub. ++ + 2020-09-24 Alan Modra + + PR 26655 +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index bc1302e6ef..7804ea3c14 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -10839,62 +10839,60 @@ eh_advance_size (unsigned int delta) + static inline unsigned int + plt_stub_size (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_vma off) ++ bfd_vma off, ++ unsigned int odd) + { + unsigned size; + + if (stub_entry->stub_type >= ppc_stub_plt_call_notoc) + { + if (htab->params->power10_stubs != 0) +- { +- bfd_vma start = (stub_entry->stub_offset +- + stub_entry->group->stub_sec->output_offset +- + stub_entry->group->stub_sec->output_section->vma); +- if (stub_entry->stub_type > ppc_stub_plt_call_notoc) +- start += 4; +- size = 8 + size_power10_offset (off, start & 4); +- } ++ size = 8 + size_power10_offset (off, odd); + else + size = 8 + size_offset (off - 8); + if (stub_entry->stub_type > ppc_stub_plt_call_notoc) + size += 4; +- return size; + } +- +- size = 12; +- if (ALWAYS_EMIT_R2SAVE +- || stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 4; +- if (PPC_HA (off) != 0) +- size += 4; +- if (htab->opd_abi) ++ else + { +- size += 4; +- if (htab->params->plt_static_chain) ++ size = 12; ++ if (ALWAYS_EMIT_R2SAVE ++ || stub_entry->stub_type == ppc_stub_plt_call_r2save) + size += 4; +- if (htab->params->plt_thread_safe +- && htab->elf.dynamic_sections_created +- && stub_entry->h != NULL +- && stub_entry->h->elf.dynindx != -1) +- size += 8; +- if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) != PPC_HA (off)) ++ if (PPC_HA (off) != 0) + size += 4; ++ if (htab->opd_abi) ++ { ++ size += 4; ++ if (htab->params->plt_static_chain) ++ size += 4; ++ if (htab->params->plt_thread_safe ++ && htab->elf.dynamic_sections_created ++ && stub_entry->h != NULL ++ && stub_entry->h->elf.dynindx != -1) ++ size += 8; ++ if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) ++ != PPC_HA (off)) ++ size += 4; ++ } + } + if (stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt) + { +- if (htab->params->no_tls_get_addr_regsave) ++ if (!htab->params->no_tls_get_addr_regsave) + { +- size += 7 * 4; +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 6 * 4; ++ size += 30 * 4; ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ size += 4; + } + else + { +- size += 30 * 4; +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 4; ++ size += 7 * 4; ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ size += 6 * 4; + } + } + return size; +@@ -10909,7 +10907,8 @@ plt_stub_size (struct ppc_link_hash_table *htab, + static inline unsigned int + plt_stub_pad (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_vma plt_off) ++ bfd_vma plt_off, ++ unsigned int odd) + { + int stub_align; + unsigned stub_size; +@@ -10924,7 +10923,7 @@ plt_stub_pad (struct ppc_link_hash_table *htab, + } + + stub_align = 1 << -htab->params->plt_stub_align; +- stub_size = plt_stub_size (htab, stub_entry, plt_off); ++ stub_size = plt_stub_size (htab, stub_entry, plt_off, odd); + if (((stub_off + stub_size - 1) & -stub_align) - (stub_off & -stub_align) + > ((stub_size - 1) & -stub_align)) + return stub_align - (stub_off & (stub_align - 1)); +@@ -11119,14 +11118,12 @@ build_plt_stub (struct ppc_link_hash_table *htab, + #define MR_R3_R0 0x7c030378 + #define BCTRL 0x4e800421 + +-static inline bfd_byte * +-build_tls_get_addr_stub (struct ppc_link_hash_table *htab, ++static bfd_byte * ++build_tls_get_addr_head (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_byte *p, bfd_vma offset, Elf_Internal_Rela *r) ++ bfd_byte *p) + { + bfd *obfd = htab->params->stub_bfd; +- bfd_byte *loc = p; +- unsigned int i; + + bfd_put_32 (obfd, LD_R0_0R3 + 0, p), p += 4; + bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4; +@@ -11135,21 +11132,43 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab, + bfd_put_32 (obfd, ADD_R3_R12_R13, p), p += 4; + bfd_put_32 (obfd, BEQLR, p), p += 4; + bfd_put_32 (obfd, MR_R3_R0, p), p += 4; +- if (htab->params->no_tls_get_addr_regsave) +- { +- if (r != NULL) +- r[0].r_offset += 7 * 4; +- if (stub_entry->stub_type != ppc_stub_plt_call_r2save) +- return build_plt_stub (htab, stub_entry, p, offset, r); + ++ if (!htab->params->no_tls_get_addr_regsave) ++ p = tls_get_addr_prologue (obfd, p, htab); ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { + bfd_put_32 (obfd, MFLR_R0, p); + p += 4; + bfd_put_32 (obfd, STD_R0_0R1 + STK_LINKER (htab), p); + p += 4; ++ } ++ return p; ++} + +- if (r != NULL) +- r[0].r_offset += 2 * 4; +- p = build_plt_stub (htab, stub_entry, p, offset, r); ++static bfd_byte * ++build_tls_get_addr_tail (struct ppc_link_hash_table *htab, ++ struct ppc_stub_hash_entry *stub_entry, ++ bfd_byte *p, ++ bfd_byte *loc) ++{ ++ bfd *obfd = htab->params->stub_bfd; ++ ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ bfd_put_32 (obfd, BCTRL, p - 4); ++ ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); ++ p += 4; ++ } ++ p = tls_get_addr_epilogue (obfd, p, htab); ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { + bfd_put_32 (obfd, BCTRL, p - 4); + + bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); +@@ -11161,24 +11180,6 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab, + bfd_put_32 (obfd, BLR, p); + p += 4; + } +- else +- { +- p = tls_get_addr_prologue (obfd, p, htab); +- +- if (r != NULL) +- r[0].r_offset += 18 * 4; +- +- p = build_plt_stub (htab, stub_entry, p, offset, r); +- bfd_put_32 (obfd, BCTRL, p - 4); +- +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- { +- bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); +- p += 4; +- } +- +- p = tls_get_addr_epilogue (obfd, p, htab); +- } + + if (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->size != 0) +@@ -11187,21 +11188,11 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab, + + base = htab->glink_eh_frame->contents + stub_entry->group->eh_base + 17; + eh = base + stub_entry->group->eh_size; +- if (htab->params->no_tls_get_addr_regsave) +- { +- unsigned int lr_used, delta; +- lr_used = stub_entry->stub_offset + (p - 20 - loc); +- delta = lr_used - stub_entry->group->lr_restore; +- stub_entry->group->lr_restore = lr_used + 16; +- eh = eh_advance (htab->elf.dynobj, eh, delta); +- *eh++ = DW_CFA_offset_extended_sf; +- *eh++ = 65; +- *eh++ = -(STK_LINKER (htab) / 8) & 0x7f; +- *eh++ = DW_CFA_advance_loc + 4; +- } +- else ++ ++ if (!htab->params->no_tls_get_addr_regsave) + { +- unsigned int cfa_updt, delta; ++ unsigned int cfa_updt, delta, i; ++ + /* After the bctrl, lr has been modified so we need to emit + .eh_frame info saying the return address is on the stack. In + fact we must put the EH info at or before the call rather +@@ -11240,10 +11231,27 @@ build_tls_get_addr_stub (struct ppc_link_hash_table *htab, + for (i = 4; i < 12; i++) + *eh++ = DW_CFA_restore + i; + *eh++ = DW_CFA_advance_loc + 2; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ unsigned int lr_used, delta; ++ ++ lr_used = stub_entry->stub_offset + (p - 20 - loc); ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->lr_restore = lr_used + 16; ++ eh = eh_advance (htab->elf.dynobj, eh, delta); ++ *eh++ = DW_CFA_offset_extended_sf; ++ *eh++ = 65; ++ *eh++ = -(STK_LINKER (htab) / 8) & 0x7f; ++ *eh++ = DW_CFA_advance_loc + 4; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; + } +- *eh++ = DW_CFA_restore_extended; +- *eh++ = 65; +- stub_entry->group->eh_size = eh - base; + } + return p; + } +@@ -11377,6 +11385,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + struct ppc_branch_hash_entry *br_entry; + struct bfd_link_info *info; + struct ppc_link_hash_table *htab; ++ bfd *obfd; + bfd_byte *loc; + bfd_byte *p, *relp; + bfd_vma targ, off; +@@ -11384,6 +11393,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + asection *plt; + int num_rel; + int odd; ++ bfd_boolean is_tga; + + /* Massage our args to the form they really have. */ + stub_entry = (struct ppc_stub_hash_entry *) gen_entry; +@@ -11433,6 +11443,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + off = targ - off; + + p = loc; ++ obfd = htab->params->stub_bfd; + if (stub_entry->stub_type == ppc_stub_long_branch_r2off) + { + bfd_vma r2off = get_r2off (info, stub_entry); +@@ -11442,23 +11453,21 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + htab->stub_error = TRUE; + return FALSE; + } +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + if (PPC_HA (r2off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R2_R2 | PPC_HA (r2off), p); ++ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p); + p += 4; + } + if (PPC_LO (r2off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDI_R2_R2 | PPC_LO (r2off), p); ++ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p); + p += 4; + } + off -= p - loc; + } +- bfd_put_32 (htab->params->stub_bfd, B_DOT | (off & 0x3fffffc), p); ++ bfd_put_32 (obfd, B_DOT | (off & 0x3fffffc), p); + p += 4; + + if (off + (1 << 25) >= (bfd_vma) (1 << 26)) +@@ -11584,19 +11593,17 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + } + + p = loc; ++ obfd = htab->params->stub_bfd; + if (stub_entry->stub_type != ppc_stub_plt_branch_r2off) + { + if (PPC_HA (off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R12_R2 | PPC_HA (off), p); ++ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R12 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p); + } + else +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R2 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p); + } + else + { +@@ -11608,36 +11615,32 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + return FALSE; + } + +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + if (PPC_HA (off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R12_R2 | PPC_HA (off), p); ++ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R12 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p); + } + else +- bfd_put_32 (htab->params->stub_bfd, LD_R12_0R2 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p); + + if (PPC_HA (r2off) != 0) + { + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R2_R2 | PPC_HA (r2off), p); ++ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p); + } + if (PPC_LO (r2off) != 0) + { + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- ADDI_R2_R2 | PPC_LO (r2off), p); ++ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p); + } + } + p += 4; +- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p); ++ bfd_put_32 (obfd, MTCTR_R12, p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, BCTR, p); ++ bfd_put_32 (obfd, BCTR, p); + p += 4; + break; + +@@ -11651,12 +11654,22 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + off = (stub_entry->stub_offset + + stub_entry->group->stub_sec->output_offset + + stub_entry->group->stub_sec->output_section->vma); ++ obfd = htab->params->stub_bfd; ++ is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt); ++ if (is_tga) ++ { ++ p = build_tls_get_addr_head (htab, stub_entry, p); ++ off += p - loc; ++ } + if (stub_entry->stub_type == ppc_stub_long_branch_both + || stub_entry->stub_type == ppc_stub_plt_branch_both + || stub_entry->stub_type == ppc_stub_plt_call_both) + { + off += 4; +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + } + if (stub_entry->stub_type >= ppc_stub_plt_call_notoc) +@@ -11689,17 +11702,39 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + if (htab->params->power10_stubs != 0) + { + bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc; +- p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load); ++ p = build_power10_offset (obfd, p, off, odd, load); + } + else + { ++ if (htab->glink_eh_frame != NULL ++ && htab->glink_eh_frame->size != 0) ++ { ++ bfd_byte *base, *eh; ++ unsigned int lr_used, delta; ++ ++ base = (htab->glink_eh_frame->contents ++ + stub_entry->group->eh_base + 17); ++ eh = base + stub_entry->group->eh_size; ++ lr_used = stub_entry->stub_offset + (p - loc) + 8; ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->lr_restore = lr_used + 8; ++ eh = eh_advance (htab->elf.dynobj, eh, delta); ++ *eh++ = DW_CFA_register; ++ *eh++ = 65; ++ *eh++ = 12; ++ *eh++ = DW_CFA_advance_loc + 2; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; ++ } ++ + /* The notoc stubs calculate their target (either a PLT entry or + the global entry point of a function) relative to the PC + returned by the "bcl" two instructions past the start of the + sequence emitted by build_offset. The offset is therefore 8 + less than calculated from the start of the sequence. */ + off -= 8; +- p = build_offset (htab->params->stub_bfd, p, off, ++ p = build_offset (obfd, p, off, + stub_entry->stub_type >= ppc_stub_plt_call_notoc); + } + +@@ -11711,17 +11746,19 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + + stub_entry->group->stub_sec->output_offset + + stub_entry->group->stub_sec->output_section->vma + + (p - loc)); +- bfd_put_32 (htab->params->stub_bfd, +- B_DOT | ((targ - from) & 0x3fffffc), p); ++ bfd_put_32 (obfd, B_DOT | ((targ - from) & 0x3fffffc), p); + } + else + { +- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p); ++ bfd_put_32 (obfd, MTCTR_R12, p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, BCTR, p); ++ bfd_put_32 (obfd, BCTR, p); + } + p += 4; + ++ if (is_tga) ++ p = build_tls_get_addr_tail (htab, stub_entry, p, loc); ++ + if (info->emitrelocations) + { + bfd_vma roff = relp - stub_entry->group->stub_sec->contents; +@@ -11752,33 +11789,6 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + return FALSE; + } + } +- +- if (htab->params->power10_stubs == 0 +- && htab->glink_eh_frame != NULL +- && htab->glink_eh_frame->size != 0) +- { +- bfd_byte *base, *eh; +- unsigned int lr_used, delta; +- +- base = (htab->glink_eh_frame->contents +- + stub_entry->group->eh_base + 17); +- eh = base + stub_entry->group->eh_size; +- lr_used = stub_entry->stub_offset + 8; +- if (stub_entry->stub_type == ppc_stub_long_branch_both +- || stub_entry->stub_type == ppc_stub_plt_branch_both +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- lr_used += 4; +- delta = lr_used - stub_entry->group->lr_restore; +- stub_entry->group->lr_restore = lr_used + 8; +- eh = eh_advance (htab->elf.dynobj, eh, delta); +- *eh++ = DW_CFA_register; +- *eh++ = 65; +- *eh++ = 12; +- *eh++ = DW_CFA_advance_loc + 2; +- *eh++ = DW_CFA_restore_extended; +- *eh++ = 65; +- stub_entry->group->eh_size = eh - base; +- } + break; + + case ppc_stub_plt_call: +@@ -11847,12 +11857,20 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + r[0].r_offset += 2; + r[0].r_addend = targ; + } +- if (stub_entry->h != NULL +- && is_tls_get_addr (&stub_entry->h->elf, htab) +- && htab->params->tls_get_addr_opt) +- p = build_tls_get_addr_stub (htab, stub_entry, loc, off, r); +- else +- p = build_plt_stub (htab, stub_entry, loc, off, r); ++ p = loc; ++ obfd = htab->params->stub_bfd; ++ is_tga = (stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt); ++ if (is_tga) ++ { ++ p = build_tls_get_addr_head (htab, stub_entry, p); ++ if (r != NULL) ++ r[0].r_offset += p - loc; ++ } ++ p = build_plt_stub (htab, stub_entry, p, off, r); ++ if (is_tga) ++ p = build_tls_get_addr_tail (htab, stub_entry, p, loc); + break; + + case ppc_stub_save_res: +@@ -12148,11 +12166,18 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + + case ppc_stub_plt_call_notoc: + case ppc_stub_plt_call_both: +- off = (stub_entry->stub_offset +- + stub_entry->group->stub_sec->output_offset +- + stub_entry->group->stub_sec->output_section->vma); ++ lr_used = 0; ++ if (is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt) ++ { ++ lr_used += 7 * 4; ++ if (!htab->params->no_tls_get_addr_regsave) ++ lr_used += 11 * 4; ++ else if (stub_entry->stub_type == ppc_stub_plt_call_both) ++ lr_used += 2 * 4; ++ } + if (stub_entry->stub_type == ppc_stub_plt_call_both) +- off += 4; ++ lr_used += 4; + targ = stub_entry->plt_ent->plt.offset & ~1; + if (targ >= (bfd_vma) -2) + abort (); +@@ -12168,16 +12193,21 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + plt = htab->pltlocal; + } + targ += plt->output_offset + plt->output_section->vma; ++ off = (stub_entry->stub_offset ++ + stub_entry->group->stub_sec->output_offset ++ + stub_entry->group->stub_sec->output_section->vma ++ + lr_used); + odd = off & 4; + off = targ - off; + + if (htab->params->plt_stub_align != 0) + { +- unsigned pad = plt_stub_pad (htab, stub_entry, off); ++ unsigned pad = plt_stub_pad (htab, stub_entry, off, odd); + + stub_entry->group->stub_sec->size += pad; + stub_entry->stub_offset = stub_entry->group->stub_sec->size; + off -= pad; ++ odd ^= pad & 4; + } + + if (info->emitrelocations) +@@ -12191,15 +12221,13 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + stub_entry->group->stub_sec->flags |= SEC_RELOC; + } + +- size = plt_stub_size (htab, stub_entry, off); ++ size = plt_stub_size (htab, stub_entry, off, odd); + + if (htab->params->power10_stubs == 0) + { + /* After the bcl, lr has been modified so we need to emit + .eh_frame info saying the return address is in r12. */ +- lr_used = stub_entry->stub_offset + 8; +- if (stub_entry->stub_type == ppc_stub_plt_call_both) +- lr_used += 4; ++ lr_used += stub_entry->stub_offset + 8; + /* The eh_frame info will consist of a DW_CFA_advance_loc or + variant, DW_CFA_register, 65, 12, DW_CFA_advance_loc+2, + DW_CFA_restore_extended 65. */ +@@ -12207,6 +12235,29 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + stub_entry->group->eh_size += eh_advance_size (delta) + 6; + stub_entry->group->lr_restore = lr_used + 8; + } ++ if ((stub_entry->stub_type == ppc_stub_plt_call_notoc ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt) ++ { ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; ++ delta = cfa_updt - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta); ++ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; ++ stub_entry->group->lr_restore ++ = stub_entry->stub_offset + size - 4; ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ lr_used = stub_entry->stub_offset + size - 20; ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta) + 6; ++ stub_entry->group->lr_restore ++ = stub_entry->stub_offset + size - 4; ++ } ++ } + break; + + case ppc_stub_plt_call: +@@ -12232,7 +12283,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + + if (htab->params->plt_stub_align != 0) + { +- unsigned pad = plt_stub_pad (htab, stub_entry, off); ++ unsigned pad = plt_stub_pad (htab, stub_entry, off, 0); + + stub_entry->group->stub_sec->size += pad; + stub_entry->stub_offset = stub_entry->group->stub_sec->size; +@@ -12249,14 +12300,22 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + stub_entry->group->stub_sec->flags |= SEC_RELOC; + } + +- size = plt_stub_size (htab, stub_entry, off); ++ size = plt_stub_size (htab, stub_entry, off, 0); + + if (stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt + && stub_entry->stub_type == ppc_stub_plt_call_r2save) + { +- if (htab->params->no_tls_get_addr_regsave) ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ /* Adjustments to r1 need to be described. */ ++ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; ++ delta = cfa_updt - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta); ++ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; ++ } ++ else + { + lr_used = stub_entry->stub_offset + size - 20; + /* The eh_frame info will consist of a DW_CFA_advance_loc +@@ -12265,15 +12324,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + delta = lr_used - stub_entry->group->lr_restore; + stub_entry->group->eh_size += eh_advance_size (delta) + 6; + } +- else +- { +- /* Adjustments to r1 need to be described. */ +- unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; +- delta = cfa_updt - stub_entry->group->lr_restore; +- stub_entry->group->eh_size += eh_advance_size (delta); +- stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; +- } +- stub_entry->group->lr_restore = size - 4; ++ stub_entry->group->lr_restore = stub_entry->stub_offset + size - 4; + } + break; + +@@ -15885,22 +15936,25 @@ ppc64_elf_relocate_section (bfd *output_bfd, + addend = 0; + reloc_dest = DEST_STUB; + +- if (((stub_entry->stub_type == ppc_stub_plt_call +- && ALWAYS_EMIT_R2SAVE) +- || stub_entry->stub_type == ppc_stub_plt_call_r2save +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- && !(h != NULL +- && is_tls_get_addr (&h->elf, htab) +- && htab->params->tls_get_addr_opt) +- && rel + 1 < relend +- && rel[1].r_offset == rel->r_offset + 4 +- && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE) +- relocation += 4; +- else if ((stub_entry->stub_type == ppc_stub_long_branch_both +- || stub_entry->stub_type == ppc_stub_plt_branch_both +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- && r_type == R_PPC64_REL24_NOTOC) +- relocation += 4; ++ if ((((stub_entry->stub_type == ppc_stub_plt_call ++ && ALWAYS_EMIT_R2SAVE) ++ || stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && rel + 1 < relend ++ && rel[1].r_offset == rel->r_offset + 4 ++ && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE) ++ || ((stub_entry->stub_type == ppc_stub_long_branch_both ++ || stub_entry->stub_type == ppc_stub_plt_branch_both ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && r_type == R_PPC64_REL24_NOTOC)) ++ { ++ /* Skip over the r2 store at the start of the stub. */ ++ if (!(stub_entry->stub_type >= ppc_stub_plt_call ++ && htab->params->tls_get_addr_opt ++ && h != NULL ++ && is_tls_get_addr (&h->elf, htab))) ++ relocation += 4; ++ } + + if (r_type == R_PPC64_REL24_NOTOC + && (stub_entry->stub_type == ppc_stub_plt_call_notoc +-- +2.21.3 + diff --git a/0001-PowerPC64-no-pcrel-optimize.patch b/0001-PowerPC64-no-pcrel-optimize.patch new file mode 100644 index 0000000..0d5ef9d --- /dev/null +++ b/0001-PowerPC64-no-pcrel-optimize.patch @@ -0,0 +1,296 @@ +From c39dc246d44f9bc6e29bb4b2a0d692d27a0e913a Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Wed, 12 Aug 2020 23:31:28 +0930 +Subject: [PATCH] PowerPC64 --no-pcrel-optimize + +This new option effectively ignores R_PPC64_PCREL_OPT, disabling the +optimization of instructions marked by that relocation. The patch +also disables GOT indirect to GOT/TOC pointer relative code editing +when --no-toc-optimize. + +bfd/ + * elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt. + * elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc + optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT + optimization when --no-pcrel-optimize. +ld/ + * emultempl/ppc64elf.em (params): Init new field. + (enum ppc64_opt): Add OPTION_NO_PCREL_OPT. + (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS), + (PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize. + +(cherry picked from commit 6738c8a7c93cd77a0caa720c6cc21c422561be2c) +--- + bfd/ChangeLog | 9 +++ + bfd/elf64-ppc.c | 116 +++++++++++++++++++-------------------- + bfd/elf64-ppc.h | 3 + + ld/ChangeLog | 9 +++ + ld/emultempl/ppc64elf.em | 12 +++- + 5 files changed, 90 insertions(+), 59 deletions(-) + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 7608f9b0ba..825d5e6d4a 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,12 @@ ++2020-09-24 Alan Modra ++ ++ Apply from master ++ 2020-08-13 Alan Modra ++ * elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt. ++ * elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc ++ optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT ++ optimization when --no-pcrel-optimize. ++ + 2020-09-19 Nick Clifton + + * development.sh (development): Set to true. +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index 4bf37e1d98..faf4989659 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -15944,7 +15944,8 @@ ppc64_elf_relocate_section (bfd *output_bfd, + break; + + case R_PPC64_GOT16_DS: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = TOCstart + htab->sec_info[input_section->id].toc_off; + if (relocation + addend - from + 0x8000 < 0x10000 +@@ -15963,7 +15964,8 @@ ppc64_elf_relocate_section (bfd *output_bfd, + + case R_PPC64_GOT16_LO_DS: + case R_PPC64_GOT16_HA: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = TOCstart + htab->sec_info[input_section->id].toc_off; + if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL +@@ -15986,34 +15988,38 @@ ppc64_elf_relocate_section (bfd *output_bfd, + break; + + case R_PPC64_GOT_PCREL34: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = (rel->r_offset + + input_section->output_section->vma + + input_section->output_offset); +- if (relocation - from + (1ULL << 33) < 1ULL << 34 +- && SYMBOL_REFERENCES_LOCAL (info, &h->elf)) +- { +- offset = rel->r_offset; +- pinsn = bfd_get_32 (input_bfd, contents + offset); +- pinsn <<= 32; +- pinsn |= bfd_get_32 (input_bfd, contents + offset + 4); +- if ((pinsn & ((-1ULL << 50) | (63ULL << 26))) +- == ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */)) +- { +- /* Replace with paddi. */ +- pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26); +- r_type = R_PPC64_PCREL34; +- rel->r_info = ELF64_R_INFO (r_symndx, r_type); +- bfd_put_32 (input_bfd, pinsn >> 32, contents + offset); +- bfd_put_32 (input_bfd, pinsn, contents + offset + 4); +- goto pcrelopt; +- } +- } +- break; ++ if (!(relocation - from + (1ULL << 33) < 1ULL << 34 ++ && SYMBOL_REFERENCES_LOCAL (info, &h->elf))) ++ break; ++ ++ offset = rel->r_offset; ++ pinsn = bfd_get_32 (input_bfd, contents + offset); ++ pinsn <<= 32; ++ pinsn |= bfd_get_32 (input_bfd, contents + offset + 4); ++ if ((pinsn & ((-1ULL << 50) | (63ULL << 26))) ++ != ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */)) ++ break; ++ ++ /* Replace with paddi. */ ++ pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26); ++ r_type = R_PPC64_PCREL34; ++ rel->r_info = ELF64_R_INFO (r_symndx, r_type); ++ bfd_put_32 (input_bfd, pinsn >> 32, contents + offset); ++ bfd_put_32 (input_bfd, pinsn, contents + offset + 4); ++ /* Fall through. */ + + case R_PPC64_PCREL34: +- if (SYMBOL_REFERENCES_LOCAL (info, &h->elf)) ++ if (!htab->params->no_pcrel_opt ++ && rel + 1 < relend ++ && rel[1].r_offset == rel->r_offset ++ && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT) ++ && SYMBOL_REFERENCES_LOCAL (info, &h->elf)) + { + offset = rel->r_offset; + pinsn = bfd_get_32 (input_bfd, contents + offset); +@@ -16023,43 +16029,37 @@ ppc64_elf_relocate_section (bfd *output_bfd, + == ((1ULL << 58) | (2ULL << 56) | (1ULL << 52) + | (14ULL << 26) /* paddi */)) + { +- pcrelopt: +- if (rel + 1 < relend +- && rel[1].r_offset == offset +- && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT)) ++ bfd_vma off2 = rel[1].r_addend; ++ if (off2 == 0) ++ /* zero means next insn. */ ++ off2 = 8; ++ off2 += offset; ++ if (off2 + 4 <= input_section->size) + { +- bfd_vma off2 = rel[1].r_addend; +- if (off2 == 0) +- /* zero means next insn. */ +- off2 = 8; +- off2 += offset; +- if (off2 + 4 <= input_section->size) ++ uint64_t pinsn2; ++ bfd_signed_vma addend_off; ++ pinsn2 = bfd_get_32 (input_bfd, contents + off2); ++ pinsn2 <<= 32; ++ if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) + { +- uint64_t pinsn2; +- bfd_signed_vma addend_off; +- pinsn2 = bfd_get_32 (input_bfd, contents + off2); +- pinsn2 <<= 32; ++ if (off2 + 8 > input_section->size) ++ break; ++ pinsn2 |= bfd_get_32 (input_bfd, ++ contents + off2 + 4); ++ } ++ if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off)) ++ { ++ addend += addend_off; ++ rel->r_addend = addend; ++ bfd_put_32 (input_bfd, pinsn >> 32, ++ contents + offset); ++ bfd_put_32 (input_bfd, pinsn, ++ contents + offset + 4); ++ bfd_put_32 (input_bfd, pinsn2 >> 32, ++ contents + off2); + if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) +- { +- if (off2 + 8 > input_section->size) +- break; +- pinsn2 |= bfd_get_32 (input_bfd, +- contents + off2 + 4); +- } +- if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off)) +- { +- addend += addend_off; +- rel->r_addend = addend; +- bfd_put_32 (input_bfd, pinsn >> 32, +- contents + offset); +- bfd_put_32 (input_bfd, pinsn, +- contents + offset + 4); +- bfd_put_32 (input_bfd, pinsn2 >> 32, +- contents + off2); +- if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) +- bfd_put_32 (input_bfd, pinsn2, +- contents + off2 + 4); +- } ++ bfd_put_32 (input_bfd, pinsn2, ++ contents + off2 + 4); + } + } + } +diff --git a/bfd/elf64-ppc.h b/bfd/elf64-ppc.h +index 547971f8be..a7230de81c 100644 +--- a/bfd/elf64-ppc.h ++++ b/bfd/elf64-ppc.h +@@ -57,6 +57,9 @@ struct ppc64_elf_params + /* Whether to use power10 instructions in linkage stubs. */ + int power10_stubs; + ++ /* Whether R_PPC64_PCREL_OPT should be ignored. */ ++ int no_pcrel_opt; ++ + /* Whether to canonicalize .opd so that there are no overlapping + .opd entries. */ + int non_overlapping_opd; +diff --git a/ld/ChangeLog b/ld/ChangeLog +index 4eec7d2977..0ee333a860 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,12 @@ ++2020-09-24 Alan Modra ++ ++ Apply from master ++ 2020-08-13 Alan Modra ++ * emultempl/ppc64elf.em (params): Init new field. ++ (enum ppc64_opt): Add OPTION_NO_PCREL_OPT. ++ (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS), ++ (PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize. ++ + 2020-09-19 Nick Clifton + + This is the 2.35.1 point release. +diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em +index 1331d03113..42b9bd48fc 100644 +--- a/ld/emultempl/ppc64elf.em ++++ b/ld/emultempl/ppc64elf.em +@@ -38,7 +38,7 @@ static struct ppc64_elf_params params = { NULL, + &ppc_layout_sections_again, + 1, -1, -1, 0, + ${DEFAULT_PLT_STATIC_CHAIN-0}, -1, 5, +- -1, -1, 0, -1, -1, 0}; ++ -1, -1, 0, 0, -1, -1, 0}; + + /* Fake input file for stubs. */ + static lang_input_statement_type *stub_file; +@@ -686,6 +686,7 @@ enum ppc64_opt + OPTION_NO_PLT_LOCALENTRY, + OPTION_POWER10_STUBS, + OPTION_NO_POWER10_STUBS, ++ OPTION_NO_PCREL_OPT, + OPTION_STUBSYMS, + OPTION_NO_STUBSYMS, + OPTION_SAVRES, +@@ -717,6 +718,7 @@ PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}' + { "plt-localentry", optional_argument, NULL, OPTION_PLT_LOCALENTRY }, + { "no-plt-localentry", no_argument, NULL, OPTION_NO_PLT_LOCALENTRY }, + { "power10-stubs", optional_argument, NULL, OPTION_POWER10_STUBS }, ++ { "no-pcrel-optimize", no_argument, NULL, OPTION_NO_PCREL_OPT }, + { "no-power10-stubs", no_argument, NULL, OPTION_NO_POWER10_STUBS }, + { "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS }, + { "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS }, +@@ -776,6 +778,9 @@ PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}' + --power10-stubs [=auto] Use Power10 PLT call stubs (default auto)\n" + )); + fprintf (file, _("\ ++ --no-pcrel-optimize Don'\''t perform R_PPC64_PCREL_OPT optimization\n" ++ )); ++ fprintf (file, _("\ + --no-power10-stubs Don'\''t use Power10 PLT call stubs\n" + )); + fprintf (file, _("\ +@@ -909,6 +914,10 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}' + params.power10_stubs = 0; + break; + ++ case OPTION_NO_PCREL_OPT: ++ params.no_pcrel_opt = 1; ++ break; ++ + case OPTION_STUBSYMS: + params.emit_stub_syms = 1; + break; +@@ -985,6 +994,7 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}' + params.no_multi_toc = 1; + no_toc_sort = 1; + params.plt_static_chain = 1; ++ params.no_pcrel_opt = 1; + return FALSE; + ' + +-- +2.21.3 + diff --git a/0001-Prioritise-mtfprd-and-mtvrd-over-mtvsrd-in-PowerPC-d.patch b/0001-Prioritise-mtfprd-and-mtvrd-over-mtvsrd-in-PowerPC-d.patch new file mode 100644 index 0000000..a687e0c --- /dev/null +++ b/0001-Prioritise-mtfprd-and-mtvrd-over-mtvsrd-in-PowerPC-d.patch @@ -0,0 +1,501 @@ +From 904570fe6c56165183b07da6a3625538f56b0ccc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Mon, 10 Aug 2020 15:07:33 +0930 +Subject: [PATCH] Prioritise mtfprd and mtvrd over mtvsrd in PowerPC + disassembly + +gas/ + * testsuite/gas/ppc/power8.d: Update. + * testsuite/gas/ppc/vsx2.d: Update. +opcodes/ + * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over + mtvsrd, and similarly for mfvsrd. + +(cherry picked from commit 5fbec329ec3b21fab7e06cd1e4bf7068332a876c) +--- + gas/ChangeLog | 4 + + gas/testsuite/gas/ppc/power8.d | 290 ++++++++++++++++----------------- + gas/testsuite/gas/ppc/vsx2.d | 110 ++++++------- + opcodes/ChangeLog | 7 + + opcodes/ppc-opc.c | 4 +- + 5 files changed, 213 insertions(+), 202 deletions(-) + +diff --git a/gas/ChangeLog b/gas/ChangeLog +index 77b38a1cba..0062d877bd 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,6 +1,10 @@ + 2020-09-24 Alan Modra + + Apply from master ++ 2020-08-10 Alan Modra ++ * testsuite/gas/ppc/power8.d: Update. ++ * testsuite/gas/ppc/vsx2.d: Update. ++ + 2020-08-10 Alan Modra + * config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx, + stswi, or stswx in little-endian mode. +diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d +index dfd3345461..1439496462 100644 +--- a/gas/testsuite/gas/ppc/power8.d ++++ b/gas/testsuite/gas/ppc/power8.d +@@ -7,151 +7,151 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 05 07 1d|1d 07 05 7c) tabort\. r5 +- 4: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16 +- 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10 +- c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13 +- 10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5 +- 14: (7c 00 05 1d|1d 05 00 7c) tbegin\. +- 18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7 +- 1c: (7c 00 05 5d|5d 05 00 7c) tend\. +- 20: (7c 00 05 5d|5d 05 00 7c) tend\. +- 24: (7e 00 05 5d|5d 05 00 7e) tendall\. +- 28: (7e 00 05 5d|5d 05 00 7e) tendall\. +- 2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24 +- 30: (7c 00 07 dd|dd 07 00 7c) trechkpt\. +- 34: (7c 00 05 dd|dd 05 00 7c) tsuspend\. +- 38: (7c 00 05 dd|dd 05 00 7c) tsuspend\. +- 3c: (7c 20 05 dd|dd 05 20 7c) tresume\. +- 40: (7c 20 05 dd|dd 05 20 7c) tresume\. +- 44: (60 42 00 00|00 00 42 60) ori r2,r2,0 +- 48: (60 00 00 00|00 00 00 60) nop +- 4c: (60 42 00 00|00 00 42 60) ori r2,r2,0 +- 50: (4c 00 01 24|24 01 00 4c) rfebb 0 +- 54: (4c 00 09 24|24 09 00 4c) rfebb +- 58: (4c 00 09 24|24 09 00 4c) rfebb +- 5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5 +- 60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1 +- 64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3 +- 68: (4c e2 04 61|61 04 e2 4c) bnetarl\+ +- 6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1 +- 70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2 +- 74: (7c 00 00 3c|3c 00 00 7c) waitasec +- 78: (7c 00 41 1c|1c 41 00 7c) msgsndp r8 +- 7c: (7c 20 01 26|26 01 20 7c) mtsle 1 +- 80: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27 +- 84: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12 +- 88: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7 +- 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11 +- 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11 +- 94: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6 +- 98: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16 +- 9c: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7 +- a0: (7c 00 03 5c|5c 03 00 7c) clrbhrb +- a4: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23 +- a8: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4 +- ac: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2 +- b0: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19 +- b4: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29 +- b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13 +- bc: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26 +- c0: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28 +- c4: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1 +- c8: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1 +- cc: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11 +- d0: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30 +- d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13 +- d8: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4 +- dc: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4 +- e0: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21 +- e4: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19 +- e8: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15 +- ec: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2 +- f0: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9 +- f4: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11 +- f8: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11 +- fc: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1 +- 100: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12 +- 104: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1 +- 108: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16 +- 10c: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20 +- 110: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29 +- 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13 +- 118: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18 +- 11c: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22 +- 120: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7 +- 124: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22 +- 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13 +- 12c: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16 +- 130: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5 +- 134: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31 +- 138: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27 +- 13c: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23 +- 140: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9 +- 144: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27 +- 148: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24 +- 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13 +- 150: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7 +- 154: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0 +- 158: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26 +- 15c: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6 +- 160: (13 95 76 84|84 76 95 13) veqv v28,v21,v14 +- 164: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19 +- 168: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10 +- 16c: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14 +- 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13 +- 174: (11 c0 87 02|02 87 c0 11) vclzb v14,v16 +- 178: (12 80 df 03|03 df 80 12) vpopcntb v20,v27 +- 17c: (13 80 5f 42|42 5f 80 13) vclzh v28,v11 +- 180: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9 +- 184: (13 60 ff 82|82 ff 60 13) vclzw v27,v31 +- 188: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19 +- 18c: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29 +- 190: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22 +- 194: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29 +- 198: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27 +- 19c: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 +- 1a0: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 +- 1a4: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 +- 1a8: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 +- 1ac: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 1b0: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 1b4: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 +- 1b8: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 +- 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11 +- 1c0: (7f f7 01 a7|a7 01 f7 7f) mtvrwa v31,r23 +- 1c4: (7e 1a 01 e6|e6 01 1a 7e) mtfprwz f16,r26 +- 1c8: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 +- 1cc: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 +- 1d0: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 +- 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 +- 1d8: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 +- 1dc: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 +- 1e0: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 +- 1e4: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 +- 1e8: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 +- 1ec: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 +- 1f0: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 +- 1f4: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 +- 1f8: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 +- 1fc: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 +- 200: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 +- 204: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 +- 208: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 +- 20c: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 +- 210: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 +- 214: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 +- 218: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 +- 21c: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 +- 220: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 +- 224: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 +- 228: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 +- 22c: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 +- 230: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 +- 234: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 +- 238: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 +- 23c: (7c 00 71 9c|9c 71 00 7c) msgsnd r14 +- 240: (7c 00 b9 dc|dc b9 00 7c) msgclr r23 ++.*: (7c 05 07 1d|1d 07 05 7c) tabort\. r5 ++.*: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16 ++.*: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10 ++.*: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13 ++.*: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5 ++.*: (7c 00 05 1d|1d 05 00 7c) tbegin\. ++.*: (7f 80 05 9c|9c 05 80 7f) tcheck cr7 ++.*: (7c 00 05 5d|5d 05 00 7c) tend\. ++.*: (7c 00 05 5d|5d 05 00 7c) tend\. ++.*: (7e 00 05 5d|5d 05 00 7e) tendall\. ++.*: (7e 00 05 5d|5d 05 00 7e) tendall\. ++.*: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24 ++.*: (7c 00 07 dd|dd 07 00 7c) trechkpt\. ++.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\. ++.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\. ++.*: (7c 20 05 dd|dd 05 20 7c) tresume\. ++.*: (7c 20 05 dd|dd 05 20 7c) tresume\. ++.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 ++.*: (60 00 00 00|00 00 00 60) nop ++.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 ++.*: (4c 00 01 24|24 01 00 4c) rfebb 0 ++.*: (4c 00 09 24|24 09 00 4c) rfebb ++.*: (4c 00 09 24|24 09 00 4c) rfebb ++.*: (4d d5 04 60|60 04 d5 4d) bgttar- cr5 ++.*: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1 ++.*: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3 ++.*: (4c e2 04 61|61 04 e2 4c) bnetarl\+ ++.*: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1 ++.*: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2 ++.*: (7c 00 00 3c|3c 00 00 7c) waitasec ++.*: (7c 00 41 1c|1c 41 00 7c) msgsndp r8 ++.*: (7c 20 01 26|26 01 20 7c) mtsle 1 ++.*: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27 ++.*: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12 ++.*: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7 ++.*: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11 ++.*: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11 ++.*: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6 ++.*: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16 ++.*: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7 ++.*: (7c 00 03 5c|5c 03 00 7c) clrbhrb ++.*: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23 ++.*: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4 ++.*: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2 ++.*: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19 ++.*: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29 ++.*: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13 ++.*: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26 ++.*: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28 ++.*: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1 ++.*: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1 ++.*: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11 ++.*: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30 ++.*: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13 ++.*: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4 ++.*: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4 ++.*: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21 ++.*: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19 ++.*: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15 ++.*: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2 ++.*: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9 ++.*: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11 ++.*: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11 ++.*: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1 ++.*: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12 ++.*: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1 ++.*: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16 ++.*: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20 ++.*: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29 ++.*: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13 ++.*: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18 ++.*: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22 ++.*: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7 ++.*: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22 ++.*: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13 ++.*: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16 ++.*: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5 ++.*: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31 ++.*: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27 ++.*: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23 ++.*: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9 ++.*: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27 ++.*: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24 ++.*: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13 ++.*: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7 ++.*: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0 ++.*: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26 ++.*: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6 ++.*: (13 95 76 84|84 76 95 13) veqv v28,v21,v14 ++.*: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19 ++.*: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10 ++.*: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14 ++.*: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13 ++.*: (11 c0 87 02|02 87 c0 11) vclzb v14,v16 ++.*: (12 80 df 03|03 df 80 12) vpopcntb v20,v27 ++.*: (13 80 5f 42|42 5f 80 13) vclzh v28,v11 ++.*: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9 ++.*: (13 60 ff 82|82 ff 60 13) vclzw v27,v31 ++.*: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19 ++.*: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29 ++.*: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22 ++.*: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29 ++.*: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27 ++.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 ++.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 ++.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 ++.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 ++.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 ++.*: (7e 0b 01 67|67 01 0b 7e) (mtvrd v16,r11|mtvsrd vs48,r11) ++.*: (7f f7 01 a7|a7 01 f7 7f) (mtvrwa v31,r23|mtvsrwa vs63,r23) ++.*: (7e 1a 01 e6|e6 01 1a 7e) (mtfprwz f16,r26|mtvsrwz vs16,r26) ++.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 ++.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 ++.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 ++.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 ++.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 ++.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 ++.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 ++.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 ++.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 ++.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 ++.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 ++.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 ++.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 ++.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 ++.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 ++.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 ++.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 ++.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 ++.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 ++.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 ++.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 ++.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 ++.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 ++.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 ++.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 ++.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 ++.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 ++.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 ++.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 ++.*: (7c 00 71 9c|9c 71 00 7c) msgsnd r14 ++.*: (7c 00 b9 dc|dc b9 00 7c) msgclr r23 + .*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5 + .*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5 + .*: (7d 54 36 98|98 36 54 7d) lxvd2x vs10,r20,r6 +diff --git a/gas/testsuite/gas/ppc/vsx2.d b/gas/testsuite/gas/ppc/vsx2.d +index e7ea585262..4f0b25bd47 100644 +--- a/gas/testsuite/gas/ppc/vsx2.d ++++ b/gas/testsuite/gas/ppc/vsx2.d +@@ -7,59 +7,59 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 +- 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 +- 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 +- c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 +- 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30 +- 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30 +- 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12 +- 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12 +- 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 +- 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 +- 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28 +- 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28 +- 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29 +- 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29 +- 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22 +- 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22 +- 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23 +- 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23 +- 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27 +- 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27 +- 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28 +- 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28 +- 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 +- 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 +- 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 +- 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 +- 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 +- 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 +- 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 +- 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 +- 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 +- 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 +- 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 +- 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 +- 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 +- 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 +- a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 +- a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 +- a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 +- ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 +- b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 +- b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 +- b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 +- bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 +- c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 +- c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 +- c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 +- cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 +- d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 +- d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 +- d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 ++.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 ++.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 ++.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 ++.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 ++.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30) ++.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30) ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44) ++.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44) ++.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 ++.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 ++.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28) ++.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28) ++.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29) ++.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29) ++.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22) ++.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22) ++.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23) ++.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23) ++.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27) ++.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27) ++.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28) ++.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28) ++.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 ++.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 ++.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 ++.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 ++.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 ++.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 ++.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 ++.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 ++.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 ++.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 ++.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 ++.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 ++.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 ++.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 ++.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 ++.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 ++.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 ++.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 ++.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 ++.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 ++.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 ++.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 ++.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 ++.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 ++.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 ++.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 ++.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 ++.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 ++.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 + #pass +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index b53a2bba98..30593769d4 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,3 +1,10 @@ ++2020-09-24 Alan Modra ++ ++ Apply from master ++ 2020-08-10 Alan Modra ++ * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over ++ mtvsrd, and similarly for mfvsrd. ++ + 2020-09-19 Nick Clifton + + This is the 2.35.1 point release. +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index 6932e4e820..a830c4c0fd 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -6302,9 +6302,9 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}}, + {"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}}, + +-{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}}, + {"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}}, + {"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}}, ++{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}}, + {"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}}, + + {"lbarx", X(31,52), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}}, +@@ -6489,9 +6489,9 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}}, + +-{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}}, + {"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}}, + {"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}}, ++{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}}, + {"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}}, + + {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, +-- +2.21.3 + diff --git a/0001-Re-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv.patch b/0001-Re-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv.patch new file mode 100644 index 0000000..854ccc2 --- /dev/null +++ b/0001-Re-PR26656-power10-libstdc-.so-segfault-in-__cxxabiv.patch @@ -0,0 +1,66 @@ +From 39f2c1f7b80a30297e93f04c885b444e5a874372 Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Mon, 28 Sep 2020 09:30:19 +0930 +Subject: [PATCH] Re: PR26656, power10 libstdc++.so segfault in + __cxxabiv1::__cxa_throw + +Some missing NULL checks meant a stub for a local symbol used a stub +looking like the __tls_get_addr_opt stub. + + PR 26656 + * elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for + NULL stub_entry->h before calling is_tls_get_addr. + +(cherry picked from commit 12cf8b93da0ae155643d262235486fde5af72a80) +--- + bfd/ChangeLog | 6 ++++++ + bfd/elf64-ppc.c | 5 ++++- + 2 files changed, 10 insertions(+), 1 deletion(-) + +diff --git a/bfd/ChangeLog b/bfd/ChangeLog +index 01ccac443e..dd6d8fdd03 100644 +--- a/bfd/ChangeLog ++++ b/bfd/ChangeLog +@@ -1,3 +1,9 @@ ++2020-09-28 Alan Modra ++ ++ PR 26656 ++ * elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for ++ NULL stub_entry->h before calling is_tls_get_addr. ++ + 2020-09-26 Alan Modra + + * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0. +diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c +index f4d0c88c7a..0aeda47e57 100644 +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -11674,6 +11674,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + obfd = htab->params->stub_bfd; + is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc + || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt); + if (is_tga) +@@ -12184,7 +12185,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + case ppc_stub_plt_call_notoc: + case ppc_stub_plt_call_both: + lr_used = 0; +- if (is_tls_get_addr (&stub_entry->h->elf, htab) ++ if (stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt) + { + lr_used += 7 * 4; +@@ -12254,6 +12256,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) + } + if ((stub_entry->stub_type == ppc_stub_plt_call_notoc + || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt) + { +-- +2.21.3 + diff --git a/binutils-2.20.51.0.2-libtool-lib64.patch b/binutils-2.20.51.0.2-libtool-lib64.patch new file mode 100644 index 0000000..142fc7e --- /dev/null +++ b/binutils-2.20.51.0.2-libtool-lib64.patch @@ -0,0 +1,236 @@ +diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure +--- a/bfd/configure 2010-04-08 14:53:48.000000000 +0100 ++++ b/bfd/configure 2010-04-08 14:56:50.000000000 +0100 +@@ -10762,10 +10762,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure +--- a/binutils/configure 2010-04-08 14:53:45.000000000 +0100 ++++ b/binutils/configure 2010-04-08 14:56:21.000000000 +0100 +@@ -10560,10 +10560,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure +--- a/gas/configure 2010-04-08 14:53:47.000000000 +0100 ++++ b/gas/configure 2010-04-08 14:57:24.000000000 +0100 +@@ -10547,10 +10547,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure +--- a/gprof/configure 2010-04-08 14:53:45.000000000 +0100 ++++ b/gprof/configure 2010-04-08 14:57:50.000000000 +0100 +@@ -10485,10 +10485,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure +--- a/ld/configure 2010-04-08 14:53:44.000000000 +0100 ++++ b/ld/configure 2010-04-08 14:58:21.000000000 +0100 +@@ -10966,10 +10966,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on +Only in .: .#libtool.m4 +Only in .: #libtool.m4# +diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure +--- a/opcodes/configure 2010-04-08 14:53:45.000000000 +0100 ++++ b/opcodes/configure 2010-04-08 14:59:10.000000000 +0100 +@@ -10496,10 +10496,34 @@ + # before this can be enabled. + hardcode_into_libs=yes + ++ # find out which ABI we are using ++ libsuff= ++ case "$host_cpu" in ++ x86_64*|s390*|powerpc*|ppc*|sparc*) ++ echo 'int i;' > conftest.$ac_ext ++ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 ++ (eval $ac_compile) 2>&5 ++ ac_status=$? ++ echo "$as_me:$LINENO: \$? = $ac_status" >&5 ++ (exit $ac_status); }; then ++ case `/usr/bin/file conftest.$ac_objext` in ++ *64-bit*) ++ libsuff=64 ++ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then ++ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}" ++ fi ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}" ++ ;; ++ esac ++ fi ++ rm -rf conftest* ++ ;; ++ esac ++ + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` +- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" ++ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on diff --git a/binutils-2.22.52.0.4-no-config-h-check.patch b/binutils-2.22.52.0.4-no-config-h-check.patch new file mode 100644 index 0000000..c89195a --- /dev/null +++ b/binutils-2.22.52.0.4-no-config-h-check.patch @@ -0,0 +1,28 @@ +--- a/bfd/bfd-in.h 2012-08-02 10:56:34.561769686 +0100 ++++ b/bfd/bfd-in.h 2012-08-02 11:13:27.134797755 +0100 +@@ -25,11 +25,6 @@ + #ifndef __BFD_H_SEEN__ + #define __BFD_H_SEEN__ + +-/* PR 14072: Ensure that config.h is included first. */ +-#if !defined PACKAGE && !defined PACKAGE_VERSION +-#error config.h must be included before this header +-#endif +- + #ifdef __cplusplus + extern "C" { + #endif +--- a/bfd/bfd-in2.h 2012-08-02 10:56:34.349769680 +0100 ++++ b/bfd/bfd-in2.h 2012-08-02 11:13:40.015798113 +0100 +@@ -32,11 +32,6 @@ + #ifndef __BFD_H_SEEN__ + #define __BFD_H_SEEN__ + +-/* PR 14072: Ensure that config.h is included first. */ +-#if !defined PACKAGE && !defined PACKAGE_VERSION +-#error config.h must be included before this header +-#endif +- + #ifdef __cplusplus + extern "C" { + #endif diff --git a/binutils-2.25-set-long-long.patch b/binutils-2.25-set-long-long.patch new file mode 100644 index 0000000..1ea7418 --- /dev/null +++ b/binutils-2.25-set-long-long.patch @@ -0,0 +1,38 @@ +diff -up binutils-2.25.orig/bfd/configure.ac binutils-2.25/bfd/configure.ac +--- binutils-2.25.orig/bfd/configure.ac 2014-12-24 10:34:45.590491143 +0000 ++++ binutils-2.25/bfd/configure.ac 2014-12-24 10:36:12.997981992 +0000 +@@ -183,11 +183,13 @@ if test "x${ac_cv_sizeof_long}" = "x8"; + BFD_HOST_64BIT_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long" +-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then ++fi ++if test "x${ac_cv_sizeof_long_long}" = "x8"; then + BFD_HOST_64BIT_LONG_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long" +- if test "x${ac_cv_sizeof_void_p}" = "x8"; then ++ if test "x${ac_cv_sizeof_void_p}" = "x8" \ ++ -a "x${ac_cv_sizeof_long}" != "x8"; then + BFD_HOSTPTR_T="unsigned long long" + fi + fi +diff -up ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure +--- a/bfd/configure 2010-04-08 15:23:58.000000000 +0100 ++++ b/bfd/configure 2010-04-08 15:24:06.000000000 +0100 +@@ -12819,11 +12819,13 @@ + BFD_HOST_64BIT_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long" +-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then ++fi ++if test "x${ac_cv_sizeof_long_long}" = "x8"; then + BFD_HOST_64BIT_LONG_LONG=1 + test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long" + test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long" +- if test "x${ac_cv_sizeof_void_p}" = "x8"; then ++ if test "x${ac_cv_sizeof_void_p}" = "x8" \ ++ -a "x${ac_cv_sizeof_long}" != "x8"; then + BFD_HOSTPTR_T="unsigned long long" + fi + fi diff --git a/binutils-2.25-version.patch b/binutils-2.25-version.patch new file mode 100644 index 0000000..d97e81b --- /dev/null +++ b/binutils-2.25-version.patch @@ -0,0 +1,44 @@ +--- binutils-2.26.orig/bfd/Makefile.am 2016-01-25 10:11:33.505289018 +0000 ++++ binutils-2.26/bfd/Makefile.am 2016-01-25 10:13:23.489964145 +0000 +@@ -1043,8 +1043,8 @@ DISTCLEANFILES = $(BUILD_CFILES) $(BUILD + bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in + @echo "creating $@" + @bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ +- bfd_version_string="\"$(VERSION)\"" ;\ +- bfd_soversion="$(VERSION)" ;\ ++ bfd_version_string="\"$(VERSION)-%{release}\"" ;\ ++ bfd_soversion="$(VERSION)-%{release}" ;\ + bfd_version_package="\"$(PKGVERSION)\"" ;\ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + . $(srcdir)/development.sh ;\ +@@ -1055,7 +1055,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/ + fi ;\ + $(SED) -e "s,@bfd_version@,$$bfd_version," \ + -e "s,@bfd_version_string@,$$bfd_version_string," \ +- -e "s,@bfd_version_package@,$$bfd_version_package," \ ++ -e "s,@bfd_version_package@,\"version \"," \ + -e "s,@report_bugs_to@,$$report_bugs_to," \ + < $(srcdir)/version.h > $@; \ + echo "$${bfd_soversion}" > libtool-soversion +--- binutils-2.26.orig/bfd/Makefile.in 2016-01-25 10:11:33.505289018 +0000 ++++ binutils-2.26/bfd/Makefile.in 2016-01-25 10:14:17.818297941 +0000 +@@ -2111,8 +2111,8 @@ stmp-lcoff-h: $(LIBCOFF_H_FILES) + bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in + @echo "creating $@" + @bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ +- bfd_version_string="\"$(VERSION)\"" ;\ +- bfd_soversion="$(VERSION)" ;\ ++ bfd_version_string="\"$(VERSION)-%{release}\"" ;\ ++ bfd_soversion="$(VERSION)-%{release}" ;\ + bfd_version_package="\"$(PKGVERSION)\"" ;\ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + . $(srcdir)/development.sh ;\ +@@ -2123,7 +2123,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/ + fi ;\ + $(SED) -e "s,@bfd_version@,$$bfd_version," \ + -e "s,@bfd_version_string@,$$bfd_version_string," \ +- -e "s,@bfd_version_package@,$$bfd_version_package," \ ++ -e "s,@bfd_version_package@,\"version \"," \ + -e "s,@report_bugs_to@,$$report_bugs_to," \ + < $(srcdir)/version.h > $@; \ + echo "$${bfd_soversion}" > libtool-soversion diff --git a/binutils-2.27-aarch64-ifunc.patch b/binutils-2.27-aarch64-ifunc.patch new file mode 100644 index 0000000..562ef18 --- /dev/null +++ b/binutils-2.27-aarch64-ifunc.patch @@ -0,0 +1,11 @@ +diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.27/bfd/elfnn-aarch64.c +--- binutils.orig/bfd/elfnn-aarch64.c 2017-02-21 10:45:19.311956006 +0000 ++++ binutils-2.27/bfd/elfnn-aarch64.c 2017-02-21 11:55:07.517922655 +0000 +@@ -4947,6 +4947,7 @@ elfNN_aarch64_final_link_relocate (reloc + it here if it is defined in a non-shared object. */ + if (h != NULL + && h->type == STT_GNU_IFUNC ++ && (input_section->flags & SEC_ALLOC) + && h->def_regular) + { + asection *plt; diff --git a/binutils-2.29-filename-in-error-messages.patch b/binutils-2.29-filename-in-error-messages.patch new file mode 100644 index 0000000..60750a1 --- /dev/null +++ b/binutils-2.29-filename-in-error-messages.patch @@ -0,0 +1,123 @@ +--- binutils.orig/binutils/readelf.c 2020-07-24 14:55:25.163647522 +0100 ++++ binutils-2.35/binutils/readelf.c 2020-07-24 15:02:39.613851369 +0100 +@@ -20729,79 +20729,92 @@ process_file (char * file_name) + Filedata * filedata = NULL; + struct stat statbuf; + char armag[SARMAG]; +- bfd_boolean ret = TRUE; ++ bfd_boolean ret = FALSE; ++ char * name; ++ char * saved_program_name; ++ ++ /* Overload program_name to include file_name. Doing this means ++ that warning/error messages will positively identify the file ++ concerned even when multiple instances of readelf are running. */ ++ name = xmalloc (strlen (program_name) + strlen (file_name) + 3); ++ sprintf (name, "%s: %s", program_name, file_name); ++ saved_program_name = program_name; ++ program_name = name; + + if (stat (file_name, &statbuf) < 0) + { + if (errno == ENOENT) +- error (_("'%s': No such file\n"), file_name); ++ error (_("No such file\n")); + else +- error (_("Could not locate '%s'. System error message: %s\n"), +- file_name, strerror (errno)); +- return FALSE; ++ error (_("Could not locate file. System error message: %s\n"), ++ strerror (errno)); ++ goto done; + } + + if (! S_ISREG (statbuf.st_mode)) + { +- error (_("'%s' is not an ordinary file\n"), file_name); +- return FALSE; ++ error (_("Not an ordinary file\n")); ++ goto done; + } + + filedata = calloc (1, sizeof * filedata); + if (filedata == NULL) + { + error (_("Out of memory allocating file data structure\n")); +- return FALSE; ++ goto done; + } + + filedata->file_name = file_name; + filedata->handle = fopen (file_name, "rb"); + if (filedata->handle == NULL) + { +- error (_("Input file '%s' is not readable.\n"), file_name); +- free (filedata); +- return FALSE; ++ error (_("Not readable\n")); ++ goto done; + } + + if (fread (armag, SARMAG, 1, filedata->handle) != 1) + { +- error (_("%s: Failed to read file's magic number\n"), file_name); ++ error (_("Failed to read file's magic number\n")); + fclose (filedata->handle); +- free (filedata); +- return FALSE; ++ goto done; + } + + filedata->file_size = (bfd_size_type) statbuf.st_size; + + if (memcmp (armag, ARMAG, SARMAG) == 0) + { +- if (! process_archive (filedata, FALSE)) +- ret = FALSE; ++ if (process_archive (filedata, FALSE)) ++ ret = TRUE; + } + else if (memcmp (armag, ARMAGT, SARMAG) == 0) + { +- if ( ! process_archive (filedata, TRUE)) +- ret = FALSE; ++ if (process_archive (filedata, TRUE)) ++ ret = TRUE; + } + else + { + if (do_archive_index && !check_all) +- error (_("File %s is not an archive so its index cannot be displayed.\n"), +- file_name); ++ error (_("Not an archive so its index cannot be displayed.\n")); + + rewind (filedata->handle); + filedata->archive_file_size = filedata->archive_file_offset = 0; + +- if (! process_object (filedata)) +- ret = FALSE; ++ if (process_object (filedata)) ++ ret = TRUE; + } + +- fclose (filedata->handle); +- free (filedata->section_headers); +- free (filedata->program_headers); +- free (filedata->string_table); +- free (filedata->dump.dump_sects); +- free (filedata); ++ done: ++ if (filedata) ++ { ++ fclose (filedata->handle); ++ free (filedata->section_headers); ++ free (filedata->program_headers); ++ free (filedata->string_table); ++ free (filedata->dump.dump_sects); ++ free (filedata); ++ } ++ free (program_name); ++ program_name = saved_program_name; + + free (ba_cache.strtab); + ba_cache.strtab = NULL; diff --git a/binutils-2.29-revert-PLT-elision.patch b/binutils-2.29-revert-PLT-elision.patch new file mode 100644 index 0000000..746a551 --- /dev/null +++ b/binutils-2.29-revert-PLT-elision.patch @@ -0,0 +1,265 @@ +diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d +--- binutils.orig/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 13:32:39.335065263 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 15:03:55.649727195 +0000 +@@ -2,6 +2,7 @@ + #readelf: -S --wide + #as: --32 + ++#pass + #... + +\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.* + #... +diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d +--- binutils.orig/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 13:32:39.329065335 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 15:04:20.803430034 +0000 +@@ -3,7 +3,6 @@ + #readelf: -d --wide + #as: --32 + +-#failif + #... + +0x[0-9a-f]+ +\(PLTREL.* + #... +diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d +--- binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 13:32:39.336065251 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 15:03:00.413379749 +0000 +@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse + [0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func + [0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func + [0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func +- ++#... + Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size Type +Bind +Vis +Ndx Name + #... +diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d +--- binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 13:32:39.330065323 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 15:03:28.928042882 +0000 +@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse + [0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func + [0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func + [0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func +- ++#... + Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size Type +Bind +Vis +Ndx Name + #... +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d +--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 13:32:39.415064300 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 15:08:39.333375801 +0000 +@@ -2,8 +2,4 @@ + #readelf: -S --wide + #as: --64 + +-#... +- +\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.* +-#... +- +\[ *[0-9]+\] \.got\.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+18 +.* + #pass +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d +--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 13:32:39.404064432 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 15:08:59.031143095 +0000 +@@ -3,7 +3,6 @@ + #readelf: -d --wide + #as: --64 + +-#failif + #... + +0x[0-9a-f]+ +\(PLTREL.* + #... +diff -rup binutils.orig/ld/testsuite/ld-x86-64/plt-main-bnd.dd binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main-bnd.dd +--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-bnd.dd 2017-11-15 13:32:39.405064420 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main-bnd.dd 2017-11-15 15:06:53.694623801 +0000 +@@ -1,7 +1,4 @@ +-#... +-Disassembly of section .plt.got: + +-[a-f0-9]+ <[a-z_]+@plt>: +-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <.*> ++#... + [ ]*[a-f0-9]+: 90 nop + #pass +diff -rup binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd +--- binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 13:32:39.407064397 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 15:06:17.244054423 +0000 +@@ -1,4 +1,3 @@ +-#failif + #... + [0-9a-f ]+R_X86_64_JUMP_SLOT +0+ +bar \+ 0 + #... +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 13:32:39.412064336 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 15:15:09.918750288 +0000 +@@ -20,6 +20,7 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop ++#pass + + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4 + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 13:32:39.413064324 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 15:16:08.227055104 +0000 +@@ -20,6 +20,7 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop ++#pass + + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4 + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 13:32:39.413064324 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 15:16:20.115913358 +0000 +@@ -20,7 +20,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 13:32:39.411064348 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 15:16:29.012807282 +0000 +@@ -20,7 +20,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038a.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038a.d 2017-11-15 13:32:39.408064384 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a.d 2017-11-15 15:19:48.097433680 +0000 +@@ -19,7 +19,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038a-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a-now.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038a-now.d 2017-11-15 13:32:39.401064469 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038a-now.d 2017-11-15 15:10:56.077760324 +0000 +@@ -20,7 +20,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038b.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038b.d 2017-11-15 13:32:39.405064420 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b.d 2017-11-15 15:10:42.828916844 +0000 +@@ -19,6 +19,7 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop ++#pass + + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001d8..00000000000001dd + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038b-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b-now.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038b-now.d 2017-11-15 13:32:39.416064288 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038b-now.d 2017-11-15 15:11:11.550577531 +0000 +@@ -20,7 +20,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001d8..00000000000001dd + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038c.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038c.d 2017-11-15 13:32:39.411064348 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c.d 2017-11-15 15:09:52.664509478 +0000 +@@ -19,7 +19,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=0000000000000220..0000000000000231 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr21038c-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c-now.d +--- binutils.orig/ld/testsuite/ld-x86-64/pr21038c-now.d 2017-11-15 13:32:39.413064324 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr21038c-now.d 2017-11-15 15:11:22.975442559 +0000 +@@ -20,7 +20,8 @@ Contents of the .eh_frame section: + DW_CFA_offset: r16 \(rip\) at cfa-8 + DW_CFA_nop + DW_CFA_nop +- ++#pass ++ + 0+18 0000000000000014 0000001c FDE cie=00000000 pc=0000000000000220..0000000000000231 + DW_CFA_nop + DW_CFA_nop +diff -rup binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd +--- binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 13:32:39.417064276 +0000 ++++ binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 15:05:02.950932110 +0000 +@@ -14,6 +14,7 @@ Section Headers: + +\[[ 0-9]+\] .dynsym +.* + +\[[ 0-9]+\] .dynstr +.* + +\[[ 0-9]+\] .rela.dyn +.* ++#pass + +\[[ 0-9]+\] .plt +.* + +\[[ 0-9]+\] .plt.got +.* + +\[[ 0-9]+\] .text +PROGBITS +0+1000 0+1000 0+31a 00 +AX +0 +0 4096 +--- binutils.orig/bfd/elfxx-x86.c 2018-01-22 15:59:25.875788033 +0000 ++++ binutils-2.30.0/bfd/elfxx-x86.c 2018-01-22 16:00:20.789146597 +0000 +@@ -107,7 +107,7 @@ elf_x86_allocate_dynrelocs (struct elf_l + plt_entry_size = htab->plt.plt_entry_size; + + resolved_to_zero = UNDEFINED_WEAK_RESOLVED_TO_ZERO (info, eh); +- ++#if 0 + /* We can't use the GOT PLT if pointer equality is needed since + finish_dynamic_symbol won't clear symbol value and the dynamic + linker won't update the GOT slot. We will get into an infinite +@@ -125,7 +125,7 @@ elf_x86_allocate_dynrelocs (struct elf_l + /* Use the GOT PLT. */ + eh->plt_got.refcount = 1; + } +- ++#endif + /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it + here if it is defined and referenced in a non-shared object. */ + if (h->type == STT_GNU_IFUNC +--- binutils.orig/ld/testsuite/ld-i386/pr20830.d 2018-07-09 09:49:51.277239857 +0100 ++++ binutils-2.30.90/ld/testsuite/ld-i386/pr20830.d 2018-07-09 10:32:41.113356733 +0100 +@@ -19,7 +19,7 @@ Contents of the .eh_frame section: + DW_CFA_offset: r8 \(eip\) at cfa-4 + DW_CFA_nop + DW_CFA_nop +- ++#pass + 0+18 00000010 0000001c FDE cie=00000000 pc=00000128..00000133 + DW_CFA_nop + DW_CFA_nop +--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2020-07-24 14:55:25.370646189 +0100 ++++ binutils-2.35/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2020-07-24 15:06:58.124189348 +0100 +@@ -1,7 +1,3 @@ + #... +-Disassembly of section .plt.got: +- +-[a-f0-9]+ <[_a-z]+@plt>: + [ ]*[a-f0-9]+: f3 0f 1e fa endbr64 +-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <.*> + #pass diff --git a/binutils-CVE-2019-1010204.patch b/binutils-CVE-2019-1010204.patch new file mode 100644 index 0000000..56434b1 --- /dev/null +++ b/binutils-CVE-2019-1010204.patch @@ -0,0 +1,15 @@ +--- binutils.orig/gold/fileread.cc 2019-08-06 14:22:08.669313110 +0100 ++++ binutils-2.32/gold/fileread.cc 2019-08-06 14:22:28.799177543 +0100 +@@ -381,6 +381,12 @@ File_read::do_read(off_t start, section_ + ssize_t bytes; + if (this->whole_file_view_ != NULL) + { ++ // See PR 23765 for an example of a testcase that triggers this error. ++ if (((ssize_t) start) < 0) ++ gold_fatal(_("%s: read failed, starting offset (%#llx) less than zero"), ++ this->filename().c_str(), ++ static_cast(start)); ++ + bytes = this->size_ - start; + if (static_cast(bytes) >= size) + { diff --git a/binutils-LTO-fix.patch b/binutils-LTO-fix.patch new file mode 100644 index 0000000..d051ad5 --- /dev/null +++ b/binutils-LTO-fix.patch @@ -0,0 +1,2148 @@ +diff -rup binutils.orig/bfd/Makefile.am binutils-2.35/bfd/Makefile.am +--- binutils.orig/bfd/Makefile.am 2020-07-30 08:41:25.057236290 +0100 ++++ binutils-2.35/bfd/Makefile.am 2020-07-30 09:05:24.474019185 +0100 +@@ -946,8 +946,8 @@ DISTCLEANFILES = $(BUILD_CFILES) $(BUILD + bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in + @echo "creating $@" + @bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ +- bfd_version_string="\"$(VERSION)-3.fc33\"" ;\ +- bfd_soversion="$(VERSION)-3.fc33" ;\ ++ bfd_version_string="\"$(VERSION)-4.fc33\"" ;\ ++ bfd_soversion="$(VERSION)-4.fc33" ;\ + bfd_version_package="\"$(PKGVERSION)\"" ;\ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + . $(srcdir)/development.sh ;\ +diff -rup binutils.orig/bfd/Makefile.in binutils-2.35/bfd/Makefile.in +--- binutils.orig/bfd/Makefile.in 2020-07-30 08:41:25.043236381 +0100 ++++ binutils-2.35/bfd/Makefile.in 2020-07-30 09:05:24.476019172 +0100 +@@ -2058,8 +2058,8 @@ stmp-lcoff-h: $(LIBCOFF_H_FILES) + bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in + @echo "creating $@" + @bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\ +- bfd_version_string="\"$(VERSION)-3.fc33\"" ;\ +- bfd_soversion="$(VERSION)-3.fc33" ;\ ++ bfd_version_string="\"$(VERSION)-4.fc33\"" ;\ ++ bfd_soversion="$(VERSION)-4.fc33" ;\ + bfd_version_package="\"$(PKGVERSION)\"" ;\ + report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\ + . $(srcdir)/development.sh ;\ +diff -rup binutils.orig/bfd/elf-bfd.h binutils-2.35/bfd/elf-bfd.h +--- binutils.orig/bfd/elf-bfd.h 2020-07-30 08:41:25.041236395 +0100 ++++ binutils-2.35/bfd/elf-bfd.h 2020-07-30 09:06:39.392533879 +0100 +@@ -224,6 +224,10 @@ struct elf_link_hash_entry + a strong defined symbol alias. U.ALIAS points to a list of aliases, + the definition having is_weakalias clear. */ + unsigned int is_weakalias : 1; ++ /* There is relocation against symbol in the object. NB: It is only ++ set and used by elf_link_add_object_symbols after all LTO IR symbols ++ have been read. */ ++ unsigned int has_reloc_after_lto_all_symbols_read : 1; + + /* String table index in .dynstr if this is a dynamic symbol. */ + unsigned long dynstr_index; +@@ -549,6 +553,16 @@ enum elf_target_os + is_nacl /* Native Client. */ + }; + ++/* Used by bfd_sym_from_r_symndx to cache a small number of local ++ symbols. */ ++#define LOCAL_SYM_CACHE_SIZE 32 ++struct sym_cache ++{ ++ bfd *abfd; ++ unsigned long indx[LOCAL_SYM_CACHE_SIZE]; ++ Elf_Internal_Sym sym[LOCAL_SYM_CACHE_SIZE]; ++}; ++ + /* ELF linker hash table. */ + + struct elf_link_hash_table +@@ -676,6 +690,9 @@ struct elf_link_hash_table + /* A linked list of dynamic BFD's loaded in the link. */ + struct elf_link_loaded_list *dyn_loaded; + ++ /* Small local sym cache. */ ++ struct sym_cache sym_cache; ++ + /* Short-cuts to get to dynamic linker sections. */ + asection *sgot; + asection *sgotplt; +@@ -717,16 +734,6 @@ struct elf_link_hash_table + /* Returns TRUE if the hash table is a struct elf_link_hash_table. */ + #define is_elf_hash_table(htab) \ + (((struct bfd_link_hash_table *) (htab))->type == bfd_link_elf_hash_table) +- +-/* Used by bfd_sym_from_r_symndx to cache a small number of local +- symbols. */ +-#define LOCAL_SYM_CACHE_SIZE 32 +-struct sym_cache +-{ +- bfd *abfd; +- unsigned long indx[LOCAL_SYM_CACHE_SIZE]; +- Elf_Internal_Sym sym[LOCAL_SYM_CACHE_SIZE]; +-}; + + /* Constant information held for an ELF backend. */ + +diff -rup binutils.orig/bfd/elf32-arm.c binutils-2.35/bfd/elf32-arm.c +--- binutils.orig/bfd/elf32-arm.c 2020-07-30 08:41:25.051236329 +0100 ++++ binutils-2.35/bfd/elf32-arm.c 2020-07-30 09:06:39.393533872 +0100 +@@ -3390,9 +3390,6 @@ struct elf32_arm_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* For convenience in allocate_dynrelocs. */ + bfd * obfd; + +@@ -15316,7 +15313,7 @@ elf32_arm_check_relocs (bfd *abfd, struc + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -16871,7 +16868,8 @@ elf32_arm_size_dynamic_sections (bfd * o + s->size += 4; + } + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd, ++ symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-bfin.c binutils-2.35/bfd/elf32-bfin.c +--- binutils.orig/bfd/elf32-bfin.c 2020-07-30 08:41:25.051236329 +0100 ++++ binutils-2.35/bfd/elf32-bfin.c 2020-07-30 09:06:39.394533866 +0100 +@@ -4791,16 +4791,6 @@ struct bfin_link_hash_entry + struct bfin_pcrel_relocs_copied *pcrel_relocs_copied; + }; + +-/* bfin ELF linker hash table. */ +- +-struct bfin_link_hash_table +-{ +- struct elf_link_hash_table root; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +-}; +- + #define bfin_hash_entry(ent) ((struct bfin_link_hash_entry *) (ent)) + + static struct bfd_hash_entry * +@@ -4829,15 +4819,14 @@ bfin_link_hash_newfunc (struct bfd_hash_ + static struct bfd_link_hash_table * + bfin_link_hash_table_create (bfd * abfd) + { +- struct bfin_link_hash_table *ret; +- size_t amt = sizeof (struct bfin_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + + ret = bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, +- bfin_link_hash_newfunc, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, bfin_link_hash_newfunc, + sizeof (struct elf_link_hash_entry), + BFIN_ELF_DATA)) + { +@@ -4845,9 +4834,7 @@ bfin_link_hash_table_create (bfd * abfd) + return NULL; + } + +- ret->sym_cache.abfd = NULL; +- +- return &ret->root.root; ++ return &ret->root; + } + + /* The size in bytes of an entry in the procedure linkage table. */ +@@ -5418,10 +5405,6 @@ struct bfd_elf_special_section const elf + + #define bfd_elf32_bfd_is_local_label_name \ + bfin_is_local_label_name +-#define bfin_hash_table(p) \ +- ((struct bfin_link_hash_table *) (p)->hash) +- +- + + #define elf_backend_create_dynamic_sections \ + _bfd_elf_create_dynamic_sections +diff -rup binutils.orig/bfd/elf32-csky.c binutils-2.35/bfd/elf32-csky.c +--- binutils.orig/bfd/elf32-csky.c 2020-07-30 08:41:25.053236316 +0100 ++++ binutils-2.35/bfd/elf32-csky.c 2020-07-30 09:06:39.394533866 +0100 +@@ -1208,9 +1208,6 @@ struct csky_elf_link_hash_table + { + struct elf_link_hash_table elf; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for R_CKCORE_TLS_LDM32 relocations. */ + union + { +@@ -2477,7 +2474,7 @@ csky_elf_check_relocs (bfd * abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -2584,7 +2581,7 @@ csky_elf_check_relocs (bfd * abfd, + asection *s; + Elf_Internal_Sym *loc_isym; + +- loc_isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ loc_isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (loc_isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-hppa.c binutils-2.35/bfd/elf32-hppa.c +--- binutils.orig/bfd/elf32-hppa.c 2020-07-30 08:41:25.043236381 +0100 ++++ binutils-2.35/bfd/elf32-hppa.c 2020-07-30 09:06:39.394533866 +0100 +@@ -286,9 +286,6 @@ struct elf32_hppa_link_hash_table + /* Set if we need a .plt stub to support lazy dynamic linking. */ + unsigned int need_plt_stub:1; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for LDM relocations. */ + union + { +@@ -1465,7 +1462,7 @@ elf32_hppa_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -4038,7 +4035,7 @@ elf32_hppa_relocate_section (bfd *output + else + { + Elf_Internal_Sym *isym +- = bfd_sym_from_r_symndx (&htab->sym_cache, ++ = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + input_bfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-i386.c binutils-2.35/bfd/elf32-i386.c +--- binutils.orig/bfd/elf32-i386.c 2020-07-30 08:41:25.055236303 +0100 ++++ binutils-2.35/bfd/elf32-i386.c 2020-07-30 09:06:39.395533860 +0100 +@@ -1158,7 +1158,7 @@ elf_i386_tls_transition (struct bfd_link + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + name = bfd_elf_sym_name (abfd, symtab_hdr, isym, NULL); + } +@@ -1251,7 +1251,7 @@ elf_i386_convert_load_reloc (bfd *abfd, + else + { + local_ref = TRUE; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, + r_symndx); + abs_symbol = isym->st_shndx == SHN_ABS; + } +@@ -1529,7 +1529,7 @@ elf_i386_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +@@ -1859,7 +1859,7 @@ elf_i386_check_relocs (bfd *abfd, + void **vpp; + asection *s; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +diff -rup binutils.orig/bfd/elf32-m32r.c binutils-2.35/bfd/elf32-m32r.c +--- binutils.orig/bfd/elf32-m32r.c 2020-07-30 08:41:25.045236368 +0100 ++++ binutils-2.35/bfd/elf32-m32r.c 2020-07-30 09:06:39.395533860 +0100 +@@ -1498,20 +1498,6 @@ struct elf_m32r_pcrel_relocs_copied + bfd_size_type count; + }; + +-/* m32r ELF linker hash table. */ +- +-struct elf_m32r_link_hash_table +-{ +- struct elf_link_hash_table root; +- +- /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +-}; +- + /* Traverse an m32r ELF linker hash table. */ + + #define m32r_elf_link_hash_traverse(table, func, info) \ +@@ -1524,21 +1510,21 @@ struct elf_m32r_link_hash_table + + #define m32r_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ +- == M32R_ELF_DATA ? ((struct elf_m32r_link_hash_table *) ((p)->hash)) : NULL) ++ == M32R_ELF_DATA ? ((struct elf_link_hash_table *) ((p)->hash)) : NULL) + + /* Create an m32r ELF linker hash table. */ + + static struct bfd_link_hash_table * + m32r_elf_link_hash_table_create (bfd *abfd) + { +- struct elf_m32r_link_hash_table *ret; +- size_t amt = sizeof (struct elf_m32r_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + + ret = bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, + _bfd_elf_link_hash_newfunc, + sizeof (struct elf_link_hash_entry), + M32R_ELF_DATA)) +@@ -1547,7 +1533,7 @@ m32r_elf_link_hash_table_create (bfd *ab + return NULL; + } + +- return &ret->root.root; ++ return &ret->root; + } + + /* Create dynamic sections when linking against a dynamic object. */ +@@ -1555,7 +1541,7 @@ m32r_elf_link_hash_table_create (bfd *ab + static bfd_boolean + m32r_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + flagword flags, pltflags; + asection *s; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); +@@ -1578,7 +1564,7 @@ m32r_elf_create_dynamic_sections (bfd *a + pltflags |= SEC_READONLY; + + s = bfd_make_section_anyway_with_flags (abfd, ".plt", pltflags); +- htab->root.splt = s; ++ htab->splt = s; + if (s == NULL + || !bfd_set_section_alignment (s, bed->plt_alignment)) + return FALSE; +@@ -1598,7 +1584,7 @@ m32r_elf_create_dynamic_sections (bfd *a + h = (struct elf_link_hash_entry *) bh; + h->def_regular = 1; + h->type = STT_OBJECT; +- htab->root.hplt = h; ++ htab->hplt = h; + + if (bfd_link_pic (info) + && ! bfd_elf_link_record_dynamic_symbol (info, h)) +@@ -1609,12 +1595,12 @@ m32r_elf_create_dynamic_sections (bfd *a + bed->default_use_rela_p + ? ".rela.plt" : ".rel.plt", + flags | SEC_READONLY); +- htab->root.srelplt = s; ++ htab->srelplt = s; + if (s == NULL + || !bfd_set_section_alignment (s, ptralign)) + return FALSE; + +- if (htab->root.sgot == NULL ++ if (htab->sgot == NULL + && !_bfd_elf_create_got_section (abfd, info)) + return FALSE; + +@@ -1669,7 +1655,7 @@ static bfd_boolean + m32r_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + +@@ -1796,7 +1782,7 @@ static bfd_boolean + allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) + { + struct bfd_link_info *info; +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) +@@ -1807,7 +1793,7 @@ allocate_dynrelocs (struct elf_link_hash + if (htab == NULL) + return FALSE; + +- if (htab->root.dynamic_sections_created ++ if (htab->dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. +@@ -1821,7 +1807,7 @@ allocate_dynrelocs (struct elf_link_hash + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) + { +- asection *s = htab->root.splt; ++ asection *s = htab->splt; + + /* If this is the first .plt entry, make room for the special + first entry. */ +@@ -1847,10 +1833,10 @@ allocate_dynrelocs (struct elf_link_hash + + /* We also need to make an entry in the .got.plt section, which + will be placed in the .got section by the linker script. */ +- htab->root.sgotplt->size += 4; ++ htab->sgotplt->size += 4; + + /* We also need to make an entry in the .rel.plt section. */ +- htab->root.srelplt->size += sizeof (Elf32_External_Rela); ++ htab->srelplt->size += sizeof (Elf32_External_Rela); + } + else + { +@@ -1878,13 +1864,13 @@ allocate_dynrelocs (struct elf_link_hash + return FALSE; + } + +- s = htab->root.sgot; ++ s = htab->sgot; + + h->got.offset = s->size; + s->size += 4; +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)) +- htab->root.srelgot->size += sizeof (Elf32_External_Rela); ++ htab->srelgot->size += sizeof (Elf32_External_Rela); + } + else + h->got.offset = (bfd_vma) -1; +@@ -1944,7 +1930,7 @@ allocate_dynrelocs (struct elf_link_hash + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) +- || (htab->root.dynamic_sections_created ++ || (htab->dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { +@@ -1984,7 +1970,7 @@ static bfd_boolean + m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd_boolean relocs; +@@ -1998,10 +1984,10 @@ m32r_elf_size_dynamic_sections (bfd *out + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + BFD_ASSERT (dynobj != NULL); + +- if (htab->root.dynamic_sections_created) ++ if (htab->dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -2060,8 +2046,8 @@ m32r_elf_size_dynamic_sections (bfd *out + symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; +- s = htab->root.sgot; +- srel = htab->root.srelgot; ++ s = htab->sgot; ++ srel = htab->srelgot; + for (; local_got < end_local_got; ++local_got) + { + if (*local_got > 0) +@@ -2078,7 +2064,7 @@ m32r_elf_size_dynamic_sections (bfd *out + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ +- elf_link_hash_traverse (&htab->root, allocate_dynrelocs, info); ++ elf_link_hash_traverse (htab, allocate_dynrelocs, info); + + /* We now have determined the sizes of the various dynamic sections. + Allocate memory for them. */ +@@ -2088,9 +2074,9 @@ m32r_elf_size_dynamic_sections (bfd *out + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + +- if (s == htab->root.splt +- || s == htab->root.sgot +- || s == htab->root.sgotplt ++ if (s == htab->splt ++ || s == htab->sgot ++ || s == htab->sgotplt + || s == htab->sdynbss) + { + /* Strip this section if we don't need it; see the +@@ -2098,7 +2084,7 @@ m32r_elf_size_dynamic_sections (bfd *out + } + else if (CONST_STRNEQ (bfd_section_name (s), ".rela")) + { +- if (s->size != 0 && s != htab->root.srelplt) ++ if (s->size != 0 && s != htab->srelplt) + relocs = TRUE; + + /* We use the reloc_count field as a counter if we need +@@ -2188,7 +2174,7 @@ m32r_elf_relocate_section (bfd *output_b + Elf_Internal_Rela *rel, *relend; + /* Assume success. */ + bfd_boolean ret = TRUE; +- struct elf_m32r_link_hash_table *htab = m32r_elf_hash_table (info); ++ struct elf_link_hash_table *htab = m32r_elf_hash_table (info); + bfd_vma *local_got_offsets; + asection *sgot, *splt, *sreloc; + bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); +@@ -2198,8 +2184,8 @@ m32r_elf_relocate_section (bfd *output_b + + local_got_offsets = elf_local_got_offsets (input_bfd); + +- sgot = htab->root.sgot; +- splt = htab->root.splt; ++ sgot = htab->sgot; ++ splt = htab->splt; + sreloc = NULL; + + rel = relocs; +@@ -2295,7 +2281,7 @@ m32r_elf_relocate_section (bfd *output_b + bfd_boolean dyn; + sec = h->root.u.def.section; + +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + sec = h->root.u.def.section; + if (r_type == R_M32R_GOTPC24 + || (r_type == R_M32R_GOTPC_HI_ULO +@@ -2516,7 +2502,7 @@ m32r_elf_relocate_section (bfd *output_b + off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), + h) +@@ -2576,7 +2562,7 @@ m32r_elf_relocate_section (bfd *output_b + + /* We need to generate a R_M32R_RELATIVE reloc + for the dynamic linker. */ +- srelgot = htab->root.srelgot; ++ srelgot = htab->srelgot; + BFD_ASSERT (srelgot != NULL); + + outrel.r_offset = (sgot->output_section->vma +@@ -2892,7 +2878,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd_byte *loc; + + #ifdef DEBUG_PIC +@@ -2918,9 +2904,9 @@ m32r_elf_finish_dynamic_symbol (bfd *out + + BFD_ASSERT (h->dynindx != -1); + +- splt = htab->root.splt; +- sgot = htab->root.sgotplt; +- srela = htab->root.srelplt; ++ splt = htab->splt; ++ sgot = htab->sgotplt; ++ srela = htab->srelplt; + BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); + + /* Get the index in the procedure linkage table which +@@ -3014,8 +3000,8 @@ m32r_elf_finish_dynamic_symbol (bfd *out + /* This symbol has an entry in the global offset table. Set it + up. */ + +- sgot = htab->root.sgot; +- srela = htab->root.srelgot; ++ sgot = htab->sgot; ++ srela = htab->srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma +@@ -3063,7 +3049,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + && (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak)); + +- s = bfd_get_linker_section (htab->root.dynobj, ".rela.bss"); ++ s = bfd_get_linker_section (htab->dynobj, ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value +@@ -3078,7 +3064,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + } + + /* Mark some specially defined symbols as absolute. */ +- if (h == htab->root.hdynamic || h == htab->root.hgot) ++ if (h == htab->hdynamic || h == htab->hgot) + sym->st_shndx = SHN_ABS; + + return TRUE; +@@ -3091,7 +3077,7 @@ static bfd_boolean + m32r_elf_finish_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *sdyn; + asection *sgot; +@@ -3104,12 +3090,12 @@ m32r_elf_finish_dynamic_sections (bfd *o + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + +- sgot = htab->root.sgotplt; ++ sgot = htab->sgotplt; + sdyn = bfd_get_linker_section (dynobj, ".dynamic"); + +- if (htab->root.dynamic_sections_created) ++ if (htab->dynamic_sections_created) + { + asection *splt; + Elf32_External_Dyn *dyncon, *dynconend; +@@ -3132,17 +3118,17 @@ m32r_elf_finish_dynamic_sections (bfd *o + break; + + case DT_PLTGOT: +- s = htab->root.sgotplt; ++ s = htab->sgotplt; + goto get_vma; + case DT_JMPREL: +- s = htab->root.srelplt; ++ s = htab->srelplt; + get_vma: + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; + + case DT_PLTRELSZ: +- s = htab->root.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_val = s->size; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; +@@ -3150,7 +3136,7 @@ m32r_elf_finish_dynamic_sections (bfd *o + } + + /* Fill in the first entry in the procedure linkage table. */ +- splt = htab->root.splt; ++ splt = htab->splt; + if (splt && splt->size > 0) + { + if (bfd_link_pic (info)) +@@ -3369,7 +3355,7 @@ m32r_elf_check_relocs (bfd *abfd, + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; + const Elf_Internal_Rela *rel_end; +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *sreloc; + +@@ -3384,7 +3370,7 @@ m32r_elf_check_relocs (bfd *abfd, + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + + rel_end = relocs + sec->reloc_count; + for (rel = relocs; rel < rel_end; rel++) +@@ -3406,7 +3392,7 @@ m32r_elf_check_relocs (bfd *abfd, + } + + /* Some relocs require a global offset table. */ +- if (htab->root.sgot == NULL) ++ if (htab->sgot == NULL) + { + switch (r_type) + { +@@ -3423,7 +3409,7 @@ m32r_elf_check_relocs (bfd *abfd, + case R_M32R_GOTPC_LO: + case R_M32R_GOT24: + if (dynobj == NULL) +- htab->root.dynobj = dynobj = abfd; ++ htab->dynobj = dynobj = abfd; + if (!_bfd_elf_create_got_section (dynobj, info)) + return FALSE; + break; +@@ -3540,7 +3526,7 @@ m32r_elf_check_relocs (bfd *abfd, + struct elf_dyn_relocs **head; + + if (dynobj == NULL) +- htab->root.dynobj = dynobj = abfd; ++ htab->dynobj = dynobj = abfd; + + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc +diff -rup binutils.orig/bfd/elf32-m68hc1x.h binutils-2.35/bfd/elf32-m68hc1x.h +--- binutils.orig/bfd/elf32-m68hc1x.h 2020-07-30 08:41:25.053236316 +0100 ++++ binutils-2.35/bfd/elf32-m68hc1x.h 2020-07-30 09:06:39.395533860 +0100 +@@ -120,9 +120,6 @@ struct m68hc11_elf_link_hash_table + int top_index; + asection **input_list; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + bfd_boolean (* size_one_stub) (struct bfd_hash_entry*, void*); + bfd_boolean (* build_one_stub) (struct bfd_hash_entry*, void*); + }; +diff -rup binutils.orig/bfd/elf32-m68k.c binutils-2.35/bfd/elf32-m68k.c +--- binutils.orig/bfd/elf32-m68k.c 2020-07-30 08:41:25.038236414 +0100 ++++ binutils-2.35/bfd/elf32-m68k.c 2020-07-30 09:06:39.395533860 +0100 +@@ -889,9 +889,6 @@ struct elf_m68k_link_hash_table + { + struct elf_link_hash_table root; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* The PLT format used by this link, or NULL if the format has not + yet been chosen. */ + const struct elf_m68k_plt_info *plt_info; +@@ -2836,7 +2833,7 @@ elf_m68k_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&elf_m68k_hash_table (info)->sym_cache, ++ isym = bfd_sym_from_r_symndx (&elf_m68k_hash_table (info)->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-metag.c binutils-2.35/bfd/elf32-metag.c +--- binutils.orig/bfd/elf32-metag.c 2020-07-30 08:41:25.054236309 +0100 ++++ binutils-2.35/bfd/elf32-metag.c 2020-07-30 09:06:39.396533853 +0100 +@@ -823,9 +823,6 @@ struct elf_metag_link_hash_table + asection **input_list; + Elf_Internal_Sym **all_local_syms; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for LDM relocations. */ + union + { +@@ -2098,7 +2095,7 @@ elf_metag_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-microblaze.c binutils-2.35/bfd/elf32-microblaze.c +--- binutils.orig/bfd/elf32-microblaze.c 2020-07-30 08:41:25.042236388 +0100 ++++ binutils-2.35/bfd/elf32-microblaze.c 2020-07-30 09:06:39.396533853 +0100 +@@ -744,9 +744,6 @@ struct elf32_mb_link_hash_table + { + struct elf_link_hash_table elf; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_sec; +- + /* TLS Local Dynamic GOT Entry */ + union { + bfd_signed_vma refcount; +@@ -2523,7 +2520,7 @@ microblaze_elf_check_relocs (bfd * abfd, + Elf_Internal_Sym *isym; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_sec, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-nds32.c binutils-2.35/bfd/elf32-nds32.c +--- binutils.orig/bfd/elf32-nds32.c 2020-07-30 08:41:25.040236401 +0100 ++++ binutils-2.35/bfd/elf32-nds32.c 2020-07-30 09:06:39.397533847 +0100 +@@ -3696,8 +3696,6 @@ nds32_elf_link_hash_table_create (bfd *a + return NULL; + } + +- ret->sdynbss = NULL; +- ret->srelbss = NULL; + ret->sym_ld_script = NULL; + + return &ret->root.root; +@@ -3833,7 +3831,7 @@ nds32_elf_create_dynamic_sections (bfd * + initialize them at run time. The linker script puts the .dynbss + section into the .bss section of the final image. */ + s = bfd_make_section (abfd, ".dynbss"); +- htab->sdynbss = s; ++ htab->root.sdynbss = s; + if (s == NULL + || !bfd_set_section_flags (s, SEC_ALLOC | SEC_LINKER_CREATED)) + return FALSE; +@@ -3852,7 +3850,7 @@ nds32_elf_create_dynamic_sections (bfd * + { + s = bfd_make_section (abfd, (bed->default_use_rela_p + ? ".rela.bss" : ".rel.bss")); +- htab->srelbss = s; ++ htab->root.srelbss = s; + if (s == NULL + || !bfd_set_section_flags (s, flags | SEC_READONLY) + || !bfd_set_section_alignment (s, ptralign)) +@@ -3988,7 +3986,7 @@ nds32_elf_adjust_dynamic_symbol (struct + same memory location for the variable. */ + + htab = nds32_elf_hash_table (info); +- s = htab->sdynbss; ++ s = htab->root.sdynbss; + BFD_ASSERT (s != NULL); + + /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker +@@ -3999,7 +3997,7 @@ nds32_elf_adjust_dynamic_symbol (struct + { + asection *srel; + +- srel = htab->srelbss; ++ srel = htab->root.srelbss; + BFD_ASSERT (srel != NULL); + srel->size += sizeof (Elf32_External_Rela); + h->needs_copy = 1; +@@ -7277,7 +7275,8 @@ nds32_elf_check_relocs (bfd *abfd, struc + void *vpp; + + Elf_Internal_Sym *isym; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ++ abfd, r_symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-nds32.h binutils-2.35/bfd/elf32-nds32.h +--- binutils.orig/bfd/elf32-nds32.h 2020-07-30 08:41:25.053236316 +0100 ++++ binutils-2.35/bfd/elf32-nds32.h 2020-07-30 09:06:39.397533847 +0100 +@@ -122,13 +122,6 @@ struct elf_nds32_link_hash_table + { + struct elf_link_hash_table root; + +- /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +- + /* Target dependent options. */ + int relax_fp_as_gp; /* --mrelax-omit-fp. */ + int eliminate_gc_relocs; /* --meliminate-gc-relocs. */ +diff -rup binutils.orig/bfd/elf32-nios2.c binutils-2.35/bfd/elf32-nios2.c +--- binutils.orig/bfd/elf32-nios2.c 2020-07-30 08:41:25.049236342 +0100 ++++ binutils-2.35/bfd/elf32-nios2.c 2020-07-30 09:06:39.397533847 +0100 +@@ -1808,9 +1808,6 @@ struct elf32_nios2_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + bfd_vma res_n_size; + }; + +@@ -4902,7 +4899,7 @@ nios2_elf32_check_relocs (bfd *abfd, str + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-or1k.c binutils-2.35/bfd/elf32-or1k.c +--- binutils.orig/bfd/elf32-or1k.c 2020-07-30 08:41:25.046236362 +0100 ++++ binutils-2.35/bfd/elf32-or1k.c 2020-07-30 09:06:39.397533847 +0100 +@@ -916,9 +916,6 @@ struct elf_or1k_link_hash_table + { + struct elf_link_hash_table root; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_sec; +- + bfd_boolean saw_plta; + }; + +@@ -2151,7 +2148,7 @@ or1k_elf_check_relocs (bfd *abfd, + Elf_Internal_Sym *isym; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_sec, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-ppc.c binutils-2.35/bfd/elf32-ppc.c +--- binutils.orig/bfd/elf32-ppc.c 2020-07-30 08:41:25.054236309 +0100 ++++ binutils-2.35/bfd/elf32-ppc.c 2020-07-30 09:06:39.398533840 +0100 +@@ -2212,9 +2212,6 @@ struct ppc_elf_link_hash_table + int plt_slot_size; + /* The size of the first PLT entry. */ + int plt_initial_entry_size; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Rename some of the generic section flags to better document how they +@@ -2952,7 +2949,7 @@ ppc_elf_check_relocs (bfd *abfd, + ifunc = NULL; + if (h == NULL && htab->elf.target_os != is_vxworks) + { +- Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3335,7 +3332,7 @@ ppc_elf_check_relocs (bfd *abfd, + asection *s; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3495,7 +3492,7 @@ ppc_elf_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-s390.c binutils-2.35/bfd/elf32-s390.c +--- binutils.orig/bfd/elf32-s390.c 2020-07-30 08:41:25.051236329 +0100 ++++ binutils-2.35/bfd/elf32-s390.c 2020-07-30 09:06:39.398533840 +0100 +@@ -746,9 +746,6 @@ struct elf_s390_link_hash_table + bfd_signed_vma refcount; + bfd_vma offset; + } tls_ldm_got; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Get the s390 ELF linker hash table from a link_info structure. */ +@@ -930,7 +927,7 @@ elf_s390_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -1281,7 +1278,7 @@ elf_s390_check_relocs (bfd *abfd, + asection *s; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3722,7 +3719,7 @@ elf_s390_finish_dynamic_sections (bfd *o + if (local_plt[i].plt.offset != (bfd_vma) -1) + { + asection *sec = local_plt[i].sec; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, i); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, i); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-sh.c binutils-2.35/bfd/elf32-sh.c +--- binutils.orig/bfd/elf32-sh.c 2020-07-30 08:41:25.050236336 +0100 ++++ binutils-2.35/bfd/elf32-sh.c 2020-07-30 09:06:39.398533840 +0100 +@@ -2160,8 +2160,6 @@ struct elf_sh_link_hash_table + struct elf_link_hash_table root; + + /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; + asection *sfuncdesc; + asection *srelfuncdesc; + asection *srofixup; +@@ -2169,9 +2167,6 @@ struct elf_sh_link_hash_table + /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ + asection *srelplt2; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* A counter or offset to track a TLS got entry. */ + union + { +@@ -2439,7 +2434,7 @@ sh_elf_create_dynamic_sections (bfd *abf + section into the .bss section of the final image. */ + s = bfd_make_section_anyway_with_flags (abfd, ".dynbss", + SEC_ALLOC | SEC_LINKER_CREATED); +- htab->sdynbss = s; ++ htab->root.sdynbss = s; + if (s == NULL) + return FALSE; + +@@ -2460,7 +2455,7 @@ sh_elf_create_dynamic_sections (bfd *abf + (bed->default_use_rela_p + ? ".rela.bss" : ".rel.bss"), + flags | SEC_READONLY); +- htab->srelbss = s; ++ htab->root.srelbss = s; + if (s == NULL + || !bfd_set_section_alignment (s, ptralign)) + return FALSE; +@@ -2580,7 +2575,7 @@ sh_elf_adjust_dynamic_symbol (struct bfd + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + +- s = htab->sdynbss; ++ s = htab->root.sdynbss; + BFD_ASSERT (s != NULL); + + /* We must generate a R_SH_COPY reloc to tell the dynamic linker to +@@ -2591,7 +2586,7 @@ sh_elf_adjust_dynamic_symbol (struct bfd + { + asection *srel; + +- srel = htab->srelbss; ++ srel = htab->root.srelbss; + BFD_ASSERT (srel != NULL); + srel->size += sizeof (Elf32_External_Rela); + h->needs_copy = 1; +@@ -3151,7 +3146,7 @@ sh_elf_size_dynamic_sections (bfd *outpu + || s == htab->root.sgotplt + || s == htab->sfuncdesc + || s == htab->srofixup +- || s == htab->sdynbss) ++ || s == htab->root.sdynbss) + { + /* Strip this section if we don't need it; see the + comment below. */ +@@ -5679,7 +5674,7 @@ sh_elf_check_relocs (bfd *abfd, struct b + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-tic6x.c binutils-2.35/bfd/elf32-tic6x.c +--- binutils.orig/bfd/elf32-tic6x.c 2020-07-30 08:41:25.041236395 +0100 ++++ binutils-2.35/bfd/elf32-tic6x.c 2020-07-30 09:06:39.399533834 +0100 +@@ -46,9 +46,6 @@ struct elf32_tic6x_link_hash_table + /* C6X specific command line arguments. */ + struct elf32_tic6x_params params; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* The output BFD, for convenience. */ + bfd *obfd; + +@@ -2729,7 +2726,7 @@ elf32_tic6x_check_relocs (bfd *abfd, str + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-tilepro.c binutils-2.35/bfd/elf32-tilepro.c +--- binutils.orig/bfd/elf32-tilepro.c 2020-07-30 08:41:25.039236408 +0100 ++++ binutils-2.35/bfd/elf32-tilepro.c 2020-07-30 09:06:39.399533834 +0100 +@@ -727,19 +727,11 @@ tilepro_elf_mkobject (bfd *abfd) + #include "elf/common.h" + #include "elf/internal.h" + +-struct tilepro_elf_link_hash_table +-{ +- struct elf_link_hash_table elf; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +-}; +- + /* Get the Tilepro ELF linker hash table from a link_info structure. */ + #define tilepro_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ + == TILEPRO_ELF_DATA \ +- ? ((struct tilepro_elf_link_hash_table *) ((p)->hash)) : NULL) ++ ? ((struct elf_link_hash_table *) ((p)->hash)) : NULL) + + static reloc_howto_type * + tilepro_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, +@@ -1184,14 +1176,14 @@ link_hash_newfunc (struct bfd_hash_entry + static struct bfd_link_hash_table * + tilepro_elf_link_hash_table_create (bfd *abfd) + { +- struct tilepro_elf_link_hash_table *ret; +- size_t amt = sizeof (struct tilepro_elf_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + +- ret = (struct tilepro_elf_link_hash_table *) bfd_zmalloc (amt); ++ ret = (struct elf_link_hash_table *) bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, link_hash_newfunc, + sizeof (struct tilepro_elf_link_hash_entry), + TILEPRO_ELF_DATA)) + { +@@ -1199,7 +1191,7 @@ tilepro_elf_link_hash_table_create (bfd + return NULL; + } + +- return &ret->elf.root; ++ return &ret->root; + } + + /* Create the .got section. */ +@@ -1402,7 +1394,7 @@ static bfd_boolean + tilepro_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; +@@ -1423,8 +1415,8 @@ tilepro_elf_check_relocs (bfd *abfd, str + + BFD_ASSERT (is_tilepro_elf (abfd) || num_relocs == 0); + +- if (htab->elf.dynobj == NULL) +- htab->elf.dynobj = abfd; ++ if (htab->dynobj == NULL) ++ htab->dynobj = abfd; + + rel_end = relocs + num_relocs; + for (rel = relocs; rel < rel_end; rel++) +@@ -1569,9 +1561,9 @@ tilepro_elf_check_relocs (bfd *abfd, str + } + } + +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + { +- if (!tilepro_elf_create_got_section (htab->elf.dynobj, info)) ++ if (!tilepro_elf_create_got_section (htab->dynobj, info)) + return FALSE; + } + break; +@@ -1716,7 +1708,7 @@ tilepro_elf_check_relocs (bfd *abfd, str + if (sreloc == NULL) + { + sreloc = _bfd_elf_make_dynamic_reloc_section +- (sec, htab->elf.dynobj, 2, abfd, /*rela?*/ TRUE); ++ (sec, htab->dynobj, 2, abfd, /*rela?*/ TRUE); + + if (sreloc == NULL) + return FALSE; +@@ -1754,7 +1746,7 @@ tilepro_elf_check_relocs (bfd *abfd, str + { + size_t amt = sizeof *p; + p = ((struct elf_dyn_relocs *) +- bfd_alloc (htab->elf.dynobj, amt)); ++ bfd_alloc (htab->dynobj, amt)); + if (p == NULL) + return FALSE; + p->next = *head; +@@ -1850,14 +1842,14 @@ static bfd_boolean + tilepro_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + asection *s, *srel; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + /* Make sure we know what is going on here. */ +- BFD_ASSERT (htab->elf.dynobj != NULL ++ BFD_ASSERT (htab->dynobj != NULL + && (h->needs_plt + || h->is_weakalias + || (h->def_dynamic +@@ -1947,13 +1939,13 @@ tilepro_elf_adjust_dynamic_symbol (struc + .rel.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_READONLY) != 0) + { +- s = htab->elf.sdynrelro; +- srel = htab->elf.sreldynrelro; ++ s = htab->sdynrelro; ++ srel = htab->sreldynrelro; + } + else + { +- s = htab->elf.sdynbss; +- srel = htab->elf.srelbss; ++ s = htab->sdynbss; ++ srel = htab->srelbss; + } + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0) + { +@@ -1971,7 +1963,7 @@ static bfd_boolean + allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { + struct bfd_link_info *info; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) +@@ -1981,7 +1973,7 @@ allocate_dynrelocs (struct elf_link_hash + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + +- if (htab->elf.dynamic_sections_created ++ if (htab->dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. +@@ -1995,7 +1987,7 @@ allocate_dynrelocs (struct elf_link_hash + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) + { +- asection *s = htab->elf.splt; ++ asection *s = htab->splt; + + /* Allocate room for the header. */ + if (s->size == 0) +@@ -2021,10 +2013,10 @@ allocate_dynrelocs (struct elf_link_hash + s->size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section. */ +- htab->elf.sgotplt->size += GOT_ENTRY_SIZE; ++ htab->sgotplt->size += GOT_ENTRY_SIZE; + + /* We also need to make an entry in the .rela.plt section. */ +- htab->elf.srelplt->size += TILEPRO_ELF_RELA_BYTES; ++ htab->srelplt->size += TILEPRO_ELF_RELA_BYTES; + } + else + { +@@ -2060,22 +2052,22 @@ allocate_dynrelocs (struct elf_link_hash + return FALSE; + } + +- s = htab->elf.sgot; ++ s = htab->sgot; + h->got.offset = s->size; + s->size += TILEPRO_BYTES_PER_WORD; + /* R_TILEPRO_IMM16_Xn_TLS_GD entries need 2 consecutive GOT slots. */ + if (tls_type == GOT_TLS_GD) + s->size += TILEPRO_BYTES_PER_WORD; +- dyn = htab->elf.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + /* R_TILEPRO_IMM16_Xn_TLS_IE_xxx needs one dynamic relocation, + R_TILEPRO_IMM16_Xn_TLS_GD_xxx needs two if local symbol and two if + global. */ + if (tls_type == GOT_TLS_GD || tls_type == GOT_TLS_IE) +- htab->elf.srelgot->size += 2 * TILEPRO_ELF_RELA_BYTES; ++ htab->srelgot->size += 2 * TILEPRO_ELF_RELA_BYTES; + else if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), + h)) +- htab->elf.srelgot->size += TILEPRO_ELF_RELA_BYTES; ++ htab->srelgot->size += TILEPRO_ELF_RELA_BYTES; + } + else + h->got.offset = (bfd_vma) -1; +@@ -2134,7 +2126,7 @@ allocate_dynrelocs (struct elf_link_hash + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) +- || (htab->elf.dynamic_sections_created ++ || (htab->dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { +@@ -2195,14 +2187,14 @@ tilepro_elf_size_dynamic_sections (bfd * + { + (void)output_bfd; + +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd *ibfd; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = htab->elf.dynobj; ++ dynobj = htab->dynobj; + BFD_ASSERT (dynobj != NULL); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -2268,8 +2260,8 @@ tilepro_elf_size_dynamic_sections (bfd * + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + local_tls_type = _bfd_tilepro_elf_local_got_tls_type (ibfd); +- s = htab->elf.sgot; +- srel = htab->elf.srelgot; ++ s = htab->sgot; ++ srel = htab->srelgot; + for (; local_got < end_local_got; ++local_got, ++local_tls_type) + { + if (*local_got > 0) +@@ -2290,19 +2282,19 @@ tilepro_elf_size_dynamic_sections (bfd * + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ +- elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); ++ elf_link_hash_traverse (htab, allocate_dynrelocs, info); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* If the .got section is more than 0x8000 bytes, we add + 0x8000 to the value of _GLOBAL_OFFSET_TABLE_, so that 16 + bit relocations have a greater chance of working. */ +- if (htab->elf.sgot->size >= 0x8000 ++ if (htab->sgot->size >= 0x8000 + && elf_hash_table (info)->hgot->root.u.def.value == 0) + elf_hash_table (info)->hgot->root.u.def.value = 0x8000; + } + +- if (htab->elf.sgotplt) ++ if (htab->sgotplt) + { + struct elf_link_hash_entry *got; + got = elf_link_hash_lookup (elf_hash_table (info), +@@ -2313,14 +2305,14 @@ tilepro_elf_size_dynamic_sections (bfd * + entries and there is no refeence to _GLOBAL_OFFSET_TABLE_. */ + if ((got == NULL + || !got->ref_regular_nonweak) +- && (htab->elf.sgotplt->size ++ && (htab->sgotplt->size + == GOTPLT_HEADER_SIZE) +- && (htab->elf.splt == NULL +- || htab->elf.splt->size == 0) +- && (htab->elf.sgot == NULL +- || (htab->elf.sgot->size ++ && (htab->splt == NULL ++ || htab->splt->size == 0) ++ && (htab->sgot == NULL ++ || (htab->sgot->size + == get_elf_backend_data (output_bfd)->got_header_size))) +- htab->elf.sgotplt->size = 0; ++ htab->sgotplt->size = 0; + } + + /* The check_relocs and adjust_dynamic_symbol entry points have +@@ -2331,11 +2323,11 @@ tilepro_elf_size_dynamic_sections (bfd * + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + +- if (s == htab->elf.splt +- || s == htab->elf.sgot +- || s == htab->elf.sgotplt +- || s == htab->elf.sdynbss +- || s == htab->elf.sdynrelro) ++ if (s == htab->splt ++ || s == htab->sgot ++ || s == htab->sgotplt ++ || s == htab->sdynbss ++ || s == htab->sdynrelro) + { + /* Strip this section if we don't need it; see the + comment below. */ +@@ -2527,7 +2519,7 @@ tilepro_elf_relocate_section (bfd *outpu + Elf_Internal_Sym *local_syms, + asection **local_sections) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_vma *local_got_offsets; +@@ -2758,7 +2750,7 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X1_GOT_HA: + /* Relocation is to the entry for this symbol in the global + offset table. */ +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + abort (); + + if (h != NULL) +@@ -2792,7 +2784,7 @@ tilepro_elf_relocate_section (bfd *outpu + else + { + bfd_put_32 (output_bfd, relocation, +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + h->got.offset |= 1; + } + } +@@ -2820,11 +2812,11 @@ tilepro_elf_relocate_section (bfd *outpu + + /* We need to generate a R_TILEPRO_RELATIVE reloc + for the dynamic linker. */ +- s = htab->elf.srelgot; ++ s = htab->srelgot; + BFD_ASSERT (s != NULL); + +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + + off); + outrel.r_info = ELF32_R_INFO (0, R_TILEPRO_RELATIVE); + outrel.r_addend = relocation; +@@ -2833,7 +2825,7 @@ tilepro_elf_relocate_section (bfd *outpu + } + + bfd_put_32 (output_bfd, relocation, +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + local_got_offsets[r_symndx] |= 1; + } + } +@@ -2845,7 +2837,7 @@ tilepro_elf_relocate_section (bfd *outpu + procedure linkage table. */ + BFD_ASSERT (h != NULL); + +- if (h->plt.offset == (bfd_vma) -1 || htab->elf.splt == NULL) ++ if (h->plt.offset == (bfd_vma) -1 || htab->splt == NULL) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when +@@ -2853,8 +2845,8 @@ tilepro_elf_relocate_section (bfd *outpu + break; + } + +- relocation = (htab->elf.splt->output_section->vma +- + htab->elf.splt->output_offset ++ relocation = (htab->splt->output_section->vma ++ + htab->splt->output_offset + + h->plt.offset); + unresolved_reloc = FALSE; + break; +@@ -2993,7 +2985,7 @@ tilepro_elf_relocate_section (bfd *outpu + outrel.r_addend = relocation + rel->r_addend; + + if (is_plt) +- sec = htab->elf.splt; ++ sec = htab->splt; + + if (bfd_is_abs_section (sec)) + indx = 0; +@@ -3016,7 +3008,7 @@ tilepro_elf_relocate_section (bfd *outpu + + if (indx == 0) + { +- osec = htab->elf.text_index_section; ++ osec = htab->text_index_section; + indx = elf_section_data (osec)->dynindx; + } + +@@ -3142,7 +3134,7 @@ tilepro_elf_relocate_section (bfd *outpu + local_got_offsets[r_symndx] |= 1; + } + +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + abort (); + + if ((off & 1) != 0) +@@ -3153,13 +3145,13 @@ tilepro_elf_relocate_section (bfd *outpu + int indx = 0; + bfd_boolean need_relocs = FALSE; + +- if (htab->elf.srelgot == NULL) ++ if (htab->srelgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; +- dyn = htab->elf.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), +@@ -3190,18 +3182,18 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + if (need_relocs) { +- bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset + off); ++ bfd_put_32 (output_bfd, 0, htab->sgot->contents + off); ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + off); + outrel.r_addend = 0; + if (indx == 0) + outrel.r_addend = relocation - dtpoff_base (info); + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_TPOFF32); +- tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, ++ tilepro_elf_append_rela_32 (output_bfd, htab->srelgot, + &outrel); + } else { + bfd_put_32 (output_bfd, tpoff (info, relocation), +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + } + break; + +@@ -3214,31 +3206,31 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + if (need_relocs) { +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset + off); ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + off); + outrel.r_addend = 0; + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_DTPMOD32); +- bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); +- tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, ++ bfd_put_32 (output_bfd, 0, htab->sgot->contents + off); ++ tilepro_elf_append_rela_32 (output_bfd, htab->srelgot, + &outrel); + if (indx == 0) + { + BFD_ASSERT (! unresolved_reloc); + bfd_put_32 (output_bfd, + relocation - dtpoff_base (info), +- (htab->elf.sgot->contents + off + ++ (htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + } + else + { + bfd_put_32 (output_bfd, 0, +- (htab->elf.sgot->contents + off + ++ (htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + outrel.r_info = ELF32_R_INFO (indx, + R_TILEPRO_TLS_DTPOFF32); + outrel.r_offset += TILEPRO_BYTES_PER_WORD; + tilepro_elf_append_rela_32 (output_bfd, +- htab->elf.srelgot, &outrel); ++ htab->srelgot, &outrel); + } + } + +@@ -3249,9 +3241,9 @@ tilepro_elf_relocate_section (bfd *outpu + symbol binding locally. Mark it as belonging + to module 1, the executable. */ + bfd_put_32 (output_bfd, 1, +- htab->elf.sgot->contents + off ); ++ htab->sgot->contents + off ); + bfd_put_32 (output_bfd, relocation - dtpoff_base (info), +- htab->elf.sgot->contents + off + ++ htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD); + } + break; +@@ -3411,7 +3403,7 @@ tilepro_elf_finish_dynamic_symbol (bfd * + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +@@ -3431,9 +3423,9 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + BFD_ASSERT (h->dynindx != -1); + +- splt = htab->elf.splt; +- srela = htab->elf.srelplt; +- sgotplt = htab->elf.sgotplt; ++ splt = htab->splt; ++ srela = htab->srelplt; ++ sgotplt = htab->sgotplt; + + if (splt == NULL || srela == NULL) + abort (); +@@ -3481,8 +3473,8 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + /* This symbol has an entry in the GOT. Set it up. */ + +- sgot = htab->elf.sgot; +- srela = htab->elf.srelgot; ++ sgot = htab->sgot; ++ srela = htab->srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma +@@ -3528,16 +3520,16 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + h->root.u.def.section->output_offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_TILEPRO_COPY); + rela.r_addend = 0; +- if (h->root.u.def.section == htab->elf.sdynrelro) +- s = htab->elf.sreldynrelro; ++ if (h->root.u.def.section == htab->sdynrelro) ++ s = htab->sreldynrelro; + else +- s = htab->elf.srelbss; ++ s = htab->srelbss; + tilepro_elf_append_rela_32 (output_bfd, s, &rela); + } + + /* Mark some specially defined symbols as absolute. */ +- if (h == htab->elf.hdynamic +- || (h == htab->elf.hgot || h == htab->elf.hplt)) ++ if (h == htab->hdynamic ++ || (h == htab->hgot || h == htab->hplt)) + sym->st_shndx = SHN_ABS; + + return TRUE; +@@ -3551,7 +3543,7 @@ tilepro_finish_dyn (bfd *output_bfd, str + asection *splt ATTRIBUTE_UNUSED) + { + Elf32_External_Dyn *dyncon, *dynconend; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +@@ -3567,15 +3559,15 @@ tilepro_finish_dyn (bfd *output_bfd, str + switch (dyn.d_tag) + { + case DT_PLTGOT: +- s = htab->elf.sgotplt; ++ s = htab->sgotplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_JMPREL: +- s = htab->elf.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_PLTRELSZ: +- s = htab->elf.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_val = s->size; + break; + default: +@@ -3593,11 +3585,11 @@ tilepro_elf_finish_dynamic_sections (bfd + { + bfd *dynobj; + asection *sdyn; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = htab->elf.dynobj; ++ dynobj = htab->dynobj; + + sdyn = bfd_get_linker_section (dynobj, ".dynamic"); + +@@ -3606,7 +3598,7 @@ tilepro_elf_finish_dynamic_sections (bfd + asection *splt; + bfd_boolean ret; + +- splt = htab->elf.splt; ++ splt = htab->splt; + BFD_ASSERT (splt != NULL && sdyn != NULL); + + ret = tilepro_finish_dyn (output_bfd, info, dynobj, sdyn, splt); +@@ -3627,42 +3619,42 @@ tilepro_elf_finish_dynamic_sections (bfd + = PLT_ENTRY_SIZE; + } + +- if (htab->elf.sgotplt) ++ if (htab->sgotplt) + { +- if (bfd_is_abs_section (htab->elf.sgotplt->output_section)) ++ if (bfd_is_abs_section (htab->sgotplt->output_section)) + { + _bfd_error_handler +- (_("discarded output section: `%pA'"), htab->elf.sgotplt); ++ (_("discarded output section: `%pA'"), htab->sgotplt); + return FALSE; + } + +- if (htab->elf.sgotplt->size > 0) ++ if (htab->sgotplt->size > 0) + { + /* Write the first two entries in .got.plt, needed for the dynamic + linker. */ + bfd_put_32 (output_bfd, (bfd_vma) -1, +- htab->elf.sgotplt->contents); ++ htab->sgotplt->contents); + bfd_put_32 (output_bfd, (bfd_vma) 0, +- htab->elf.sgotplt->contents + GOT_ENTRY_SIZE); ++ htab->sgotplt->contents + GOT_ENTRY_SIZE); + } + +- elf_section_data (htab->elf.sgotplt->output_section)->this_hdr.sh_entsize ++ elf_section_data (htab->sgotplt->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + +- if (htab->elf.sgot) ++ if (htab->sgot) + { +- if (htab->elf.sgot->size > 0) ++ if (htab->sgot->size > 0) + { + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + bfd_vma val = (sdyn ? + sdyn->output_section->vma + sdyn->output_offset : + 0); +- bfd_put_32 (output_bfd, val, htab->elf.sgot->contents); ++ bfd_put_32 (output_bfd, val, htab->sgot->contents); + } + +- elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize ++ elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + +diff -rup binutils.orig/bfd/elf64-ppc.c binutils-2.35/bfd/elf64-ppc.c +--- binutils.orig/bfd/elf64-ppc.c 2020-07-30 08:41:25.038236414 +0100 ++++ binutils-2.35/bfd/elf64-ppc.c 2020-07-30 09:06:39.400533827 +0100 +@@ -3250,9 +3250,6 @@ struct ppc_link_hash_table + + /* Incremented every time we size stubs. */ + unsigned int stub_iteration; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Rename some of the generic section flags to better document how they +@@ -4383,7 +4380,8 @@ ppc64_elf_before_check_relocs (bfd *ibfd + Elf_Internal_Sym *isym; + asection *s; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, ++ r_symndx); + if (isym == NULL) + { + if (elf_section_data (opd)->relocs != relocs) +@@ -4684,7 +4682,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + } + else + { +- Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -4955,7 +4953,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -5231,7 +5229,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf64-s390.c binutils-2.35/bfd/elf64-s390.c +--- binutils.orig/bfd/elf64-s390.c 2020-07-30 08:41:25.044236375 +0100 ++++ binutils-2.35/bfd/elf64-s390.c 2020-07-30 09:06:39.400533827 +0100 +@@ -663,9 +663,6 @@ struct elf_s390_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Options passed from the linker. */ + struct s390_elf_params *params; + }; +@@ -852,7 +849,7 @@ elf_s390_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -1216,7 +1213,7 @@ elf_s390_check_relocs (bfd *abfd, + asection *s; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -2258,7 +2255,7 @@ elf_s390_relocate_section (bfd *output_b + & 0xff00f000) == 0xe300c000 + && bfd_get_8 (input_bfd, + contents + rel->r_offset + 3) == 0x04)) +- && (isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ && (isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + input_bfd, r_symndx)) + && isym->st_shndx != SHN_ABS + && h != htab->elf.hdynamic +@@ -3572,7 +3569,7 @@ elf_s390_finish_dynamic_sections (bfd *o + if (local_plt[i].plt.offset != (bfd_vma) -1) + { + asection *sec = local_plt[i].sec; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, i); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, i); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf64-x86-64.c binutils-2.35/bfd/elf64-x86-64.c +--- binutils.orig/bfd/elf64-x86-64.c 2020-07-30 08:41:25.040236401 +0100 ++++ binutils-2.35/bfd/elf64-x86-64.c 2020-07-30 09:06:39.401533821 +0100 +@@ -1371,7 +1371,7 @@ elf_x86_64_tls_transition (struct bfd_li + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + name = bfd_elf_sym_name (abfd, symtab_hdr, isym, NULL); + } +@@ -1559,7 +1559,7 @@ elf_x86_64_convert_load_reloc (bfd *abfd + if (h == NULL) + { + Elf_Internal_Sym *isym +- = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, r_symndx); + + /* Skip relocation against undefined symbols. */ + if (isym->st_shndx == SHN_UNDEF) +@@ -1907,7 +1907,7 @@ elf_x86_64_check_relocs (bfd *abfd, stru + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +@@ -2308,7 +2308,7 @@ elf_x86_64_check_relocs (bfd *abfd, stru + asection *s; + void **vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +diff -rup binutils.orig/bfd/elflink.c binutils-2.35/bfd/elflink.c +--- binutils.orig/bfd/elflink.c 2020-07-30 08:41:25.055236303 +0100 ++++ binutils-2.35/bfd/elflink.c 2020-07-30 09:06:39.401533821 +0100 +@@ -1228,6 +1228,17 @@ _bfd_elf_merge_symbol (bfd *abfd, + return TRUE; + } + ++ /* After all LTO IR symbols have been read, skip all undefined ++ symbols without relocation. */ ++ if (info->lto_all_symbols_read ++ && bfd_is_und_section (sec) ++ && (abfd->flags & DYNAMIC) == 0 ++ && !h->has_reloc_after_lto_all_symbols_read) ++ { ++ *skip = TRUE; ++ return TRUE; ++ } ++ + /* In cases involving weak versioned symbols, we may wind up trying + to merge a symbol with itself. Catch that here, to avoid the + confusion that results if we try to override a symbol with +@@ -4545,6 +4556,93 @@ elf_link_add_object_symbols (bfd *abfd, + (_("%pB: plugin needed to handle lto object"), abfd); + } + ++ /* Normally an undefined symbol is treated as a reference. Linker ++ will try to satisfy the reference. This feature is used to bring ++ a symbol definition into output without explicit relocation. If ++ there is no definition nor relocation, linker will remove undefined ++ symbol from symbol table in output (PR ld/4317). But GCC 10 LTO ++ may generate separate debug info files which contain undefined ++ symbols without relocations: ++ ++ https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96385 ++ ++ After all LTO IR symbols have been read, if there is a dinition in ++ LTO IR object, there is no relocation, and there is a definition ++ in a shared object, linker may resolve the undefined symbol to the ++ discarded section in LTO IR object. To avoid it, after all LTO IR ++ symbols have been read, skip undefined symbols without relocation. ++ */ ++ if (info->lto_all_symbols_read ++ && !bfd_link_relocatable (info) ++ && (abfd->flags & DYNAMIC) == 0 ++ && !just_syms ++ && extsymcount) ++ { ++ int r_sym_shift; ++ struct elf_link_hash_entry *h; ++ const char *name; ++ ++ if (bed->s->arch_size == 32) ++ r_sym_shift = 8; ++ else ++ r_sym_shift = 32; ++ ++ for (s = abfd->sections; s != NULL; s = s->next) ++ { ++ Elf_Internal_Rela *internal_relocs; ++ Elf_Internal_Rela *rel, *relend; ++ ++ /* Don't check relocations in excluded sections. */ ++ if ((s->flags & SEC_RELOC) == 0 ++ || s->reloc_count == 0 ++ || (s->flags & SEC_EXCLUDE) != 0 ++ || ((info->strip == strip_all ++ || info->strip == strip_debugger) ++ && (s->flags & SEC_DEBUGGING) != 0)) ++ continue; ++ ++ internal_relocs = _bfd_elf_link_read_relocs (abfd, s, NULL, ++ NULL, ++ info->keep_memory); ++ if (internal_relocs == NULL) ++ goto error_free_vers; ++ ++ rel = internal_relocs; ++ relend = rel + s->reloc_count; ++ for ( ; rel < relend; rel++) ++ { ++ unsigned long r_symndx = rel->r_info >> r_sym_shift; ++ ++ /* Skip local symbols. */ ++ if (r_symndx < extsymoff) ++ continue; ++ ++ isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, ++ r_symndx); ++ if (isym->st_shndx == SHN_UNDEF) ++ { ++ name = bfd_elf_string_from_elf_section (abfd, ++ hdr->sh_link, ++ isym->st_name); ++ h = ((struct elf_link_hash_entry *) ++ bfd_wrapped_link_hash_lookup (abfd, info, name, ++ TRUE, FALSE, ++ FALSE)); ++ if (h != NULL) ++ { ++ while (h->root.type == bfd_link_hash_indirect ++ || h->root.type == bfd_link_hash_warning) ++ h = (struct elf_link_hash_entry *) h->root.u.i.link; ++ h->has_reloc_after_lto_all_symbols_read = TRUE; ++ } ++ } ++ } ++ ++ if (elf_section_data (s)->relocs != internal_relocs) ++ free (internal_relocs); ++ } ++ } ++ + for (isym = isymbuf, isymend = isymbuf + extsymcount; + isym < isymend; + isym++, sym_hash++, ever = (ever != NULL ? ever + 1 : NULL)) +diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.35/bfd/elfnn-aarch64.c +--- binutils.orig/bfd/elfnn-aarch64.c 2020-07-30 08:41:25.046236362 +0100 ++++ binutils-2.35/bfd/elfnn-aarch64.c 2020-07-30 09:06:39.402533814 +0100 +@@ -2643,9 +2643,6 @@ struct elf_aarch64_link_hash_table + /* The bytes of the subsequent PLT entry. */ + const bfd_byte *plt_entry; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* For convenience in allocate_dynrelocs. */ + bfd *obfd; + +@@ -7611,7 +7608,7 @@ elfNN_aarch64_check_relocs (bfd *abfd, s + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -7838,7 +7835,7 @@ elfNN_aarch64_check_relocs (bfd *abfd, s + asection *s; + void **vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +Only in binutils-2.35/bfd: elfnn-aarch64.c.orig +diff -rup binutils.orig/bfd/elfnn-riscv.c binutils-2.35/bfd/elfnn-riscv.c +--- binutils.orig/bfd/elfnn-riscv.c 2020-07-30 08:41:25.039236408 +0100 ++++ binutils-2.35/bfd/elfnn-riscv.c 2020-07-30 09:06:39.402533814 +0100 +@@ -113,9 +113,6 @@ struct riscv_elf_link_hash_table + /* Short-cuts to get to dynamic linker sections. */ + asection *sdyntdata; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +- + /* The max alignment of output sections. */ + bfd_vma max_alignment; + }; +@@ -681,7 +678,7 @@ riscv_elf_check_relocs (bfd *abfd, struc + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elfxx-mips.c binutils-2.35/bfd/elfxx-mips.c +--- binutils.orig/bfd/elfxx-mips.c 2020-07-30 08:41:25.051236329 +0100 ++++ binutils-2.35/bfd/elfxx-mips.c 2020-07-30 09:06:39.403533808 +0100 +@@ -527,9 +527,6 @@ struct mips_elf_link_hash_table + returns null. */ + asection *(*add_stub_section) (const char *, asection *, asection *); + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Is the PLT header compressed? */ + unsigned int plt_header_is_comp : 1; + }; +@@ -4401,7 +4398,7 @@ mips_elf_resolve_got_page_ref (void **re + Elf_Internal_Sym *isym; + + /* Read in the symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ref->u.abfd, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ref->u.abfd, + ref->symndx); + if (isym == NULL) + { +diff -rup binutils.orig/bfd/elfxx-sparc.c binutils-2.35/bfd/elfxx-sparc.c +--- binutils.orig/bfd/elfxx-sparc.c 2020-07-30 08:41:25.035236434 +0100 ++++ binutils-2.35/bfd/elfxx-sparc.c 2020-07-30 09:06:39.404533801 +0100 +@@ -1391,7 +1391,8 @@ _bfd_sparc_elf_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, ++ r_symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elfxx-sparc.h binutils-2.35/bfd/elfxx-sparc.h +--- binutils.orig/bfd/elfxx-sparc.h 2020-07-30 08:41:25.042236388 +0100 ++++ binutils-2.35/bfd/elfxx-sparc.h 2020-07-30 09:06:39.404533801 +0100 +@@ -55,9 +55,6 @@ struct _bfd_sparc_elf_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Used by local STT_GNU_IFUNC symbols. */ + htab_t loc_hash_table; + void *loc_hash_memory; +diff -rup binutils.orig/bfd/elfxx-tilegx.c binutils-2.35/bfd/elfxx-tilegx.c +--- binutils.orig/bfd/elfxx-tilegx.c 2020-07-30 08:41:25.037236421 +0100 ++++ binutils-2.35/bfd/elfxx-tilegx.c 2020-07-30 09:06:39.404533801 +0100 +@@ -835,9 +835,6 @@ struct tilegx_elf_link_hash_table + /* Whether LE transition has been disabled for some of the + sections. */ + bfd_boolean disable_le_transition; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; + }; + + +@@ -1979,7 +1976,7 @@ tilegx_elf_check_relocs (bfd *abfd, stru + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elfxx-x86.h binutils-2.35/bfd/elfxx-x86.h +--- binutils.orig/bfd/elfxx-x86.h 2020-07-30 08:41:25.052236322 +0100 ++++ binutils-2.35/bfd/elfxx-x86.h 2020-07-30 09:06:39.404533801 +0100 +@@ -468,9 +468,6 @@ struct elf_x86_link_hash_table + /* The amount of space used by the jump slots in the GOT. */ + bfd_vma sgotplt_jump_table_size; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* _TLS_MODULE_BASE_ symbol. */ + struct bfd_link_hash_entry *tls_module_base; + +Only in binutils.orig: binutils-2.35 +diff -rup binutils.orig/gas/as.c binutils-2.35/gas/as.c +--- binutils.orig/gas/as.c 2020-07-30 08:41:25.034236441 +0100 ++++ binutils-2.35/gas/as.c 2020-07-30 09:05:24.370019859 +0100 +@@ -103,7 +103,7 @@ int verbose = 0; + int flag_dwarf_cie_version = -1; + + /* The maximum level of DWARF DEBUG information we should manufacture. */ +-unsigned int dwarf_level = 0; ++unsigned int dwarf_level = 4; + + #if defined OBJ_ELF || defined OBJ_MAYBE_ELF + int flag_use_elf_stt_common = DEFAULT_GENERATE_ELF_STT_COMMON; diff --git a/binutils-Power10-fixes.patch b/binutils-Power10-fixes.patch new file mode 100644 index 0000000..3f9e4bc --- /dev/null +++ b/binutils-Power10-fixes.patch @@ -0,0 +1,5925 @@ +diff -rup binutils.orig/bfd/elf64-ppc.c binutils-2.35.1/bfd/elf64-ppc.c +--- binutils.orig/bfd/elf64-ppc.c 2020-10-08 13:50:31.429909431 +0100 ++++ binutils-2.35.1/bfd/elf64-ppc.c 2020-10-08 13:56:26.045817623 +0100 +@@ -114,7 +114,7 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_func_desc_adjust ++#define elf_backend_always_size_sections ppc64_elf_edit + #define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections +@@ -211,9 +211,10 @@ static bfd_vma opd_entry_value + #define PLD_R12_PC 0x04100000e5800000ULL + #define PNOP 0x0700000000000000ULL + +-/* __glink_PLTresolve stub instructions. We enter with the index in R0. */ ++/* __glink_PLTresolve stub instructions. We enter with the index in ++ R0 for ELFv1, and the address of a glink branch in R12 for ELFv2. */ + #define GLINK_PLTRESOLVE_SIZE(htab) \ +- (8u + (htab->opd_abi ? 11 * 4 : 14 * 4)) ++ (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4)) + /* 0: */ + /* .quad plt0-1f */ + /* __glink: */ +@@ -229,11 +230,14 @@ static bfd_vma opd_entry_value + /* mtctr %12 */ + /* ld %11,16(%11) */ + /* bctr */ +-#define MFLR_R0 0x7c0802a6 /* mflr %r0 */ +-#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */ +-#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */ +-#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */ +-#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */ ++ ++#define MFLR_R0 0x7c0802a6 /* mflr %r0 */ ++#define MTLR_R0 0x7c0803a6 /* mtlr %r0 */ ++#define SUB_R12_R12_R11 0x7d8b6050 /* subf %r12,%r11,%r12 */ ++#define ADDI_R0_R12 0x380c0000 /* addi %r0,%r12,0 */ ++#define SRDI_R0_R0_2 0x7800f082 /* rldicl %r0,%r0,62,2 */ ++#define LD_R0_0R11 0xe80b0000 /* ld %r0,0(%r11) */ ++#define ADD_R11_R0_R11 0x7d605a14 /* add %r11,%r0,%r11 */ + + /* Pad with this. */ + #define NOP 0x60000000 +@@ -6338,13 +6342,13 @@ static const struct sfpr_def_parms save_ + }; + + /* Called near the start of bfd_elf_size_dynamic_sections. We use +- this hook to a) provide some gcc support functions, and b) transfer +- dynamic linking information gathered so far on function code symbol +- entries, to their corresponding function descriptor symbol entries. */ ++ this hook to a) run the edit functions in this file, b) provide ++ some gcc support functions, and c) transfer dynamic linking ++ information gathered so far on function code symbol entries, to ++ their corresponding function descriptor symbol entries. */ + + static bfd_boolean +-ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++ppc64_elf_edit (bfd *obfd ATTRIBUTE_UNUSED, struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + +@@ -6352,6 +6356,9 @@ ppc64_elf_func_desc_adjust (bfd *obfd AT + if (htab == NULL) + return FALSE; + ++ /* Call back into the linker, which then runs the edit functions. */ ++ htab->params->edit (); ++ + /* Provide any missing _save* and _rest* functions. */ + if (htab->sfpr != NULL) + { +@@ -7692,9 +7699,11 @@ ppc64_elf_inline_plt (struct bfd_link_in + return TRUE; + } + +-/* Set htab->tls_get_addr and call the generic ELF tls_setup function. */ ++/* Set htab->tls_get_addr and various other info specific to TLS. ++ This needs to run before dynamic symbols are processed in ++ bfd_elf_size_dynamic_sections. */ + +-asection * ++bfd_boolean + ppc64_elf_tls_setup (struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; +@@ -7702,7 +7711,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf + + htab = ppc_hash_table (info); + if (htab == NULL) +- return NULL; ++ return FALSE; + + if (abiversion (info->output_bfd) == 1) + htab->opd_abi = 1; +@@ -7728,6 +7737,19 @@ ppc64_elf_tls_setup (struct bfd_link_inf + --plt-localentry can cause trouble. */ + if (htab->params->plt_localentry0 < 0) + htab->params->plt_localentry0 = 0; ++ if (htab->params->plt_localentry0 && htab->has_power10_relocs) ++ { ++ /* The issue is that __glink_PLTresolve saves r2, which is done ++ because glibc ld.so _dl_runtime_resolve restores r2 to support ++ a glibc plt call optimisation where global entry code is ++ skipped on calls that resolve to the same binary. The ++ __glink_PLTresolve save of r2 is incompatible with code ++ making tail calls, because the tail call might go via the ++ resolver and thus overwrite the proper saved r2. */ ++ _bfd_error_handler (_("warning: --plt-localentry is incompatible with " ++ "power10 pc-relative code")); ++ htab->params->plt_localentry0 = 0; ++ } + if (htab->params->plt_localentry0 + && elf_link_hash_lookup (&htab->elf, "GLIBC_2.26", + FALSE, FALSE, FALSE) == NULL) +@@ -7824,7 +7846,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf + _bfd_elf_strtab_delref (elf_hash_table (info)->dynstr, + opt_fd->dynstr_index); + if (!bfd_elf_link_record_dynamic_symbol (info, opt_fd)) +- return NULL; ++ return FALSE; + } + if (tga_fd != NULL) + { +@@ -7883,7 +7905,7 @@ ppc64_elf_tls_setup (struct bfd_link_inf + && htab->params->no_tls_get_addr_regsave == -1) + htab->params->no_tls_get_addr_regsave = 0; + +- return _bfd_elf_tls_setup (info->output_bfd, info); ++ return TRUE; + } + + /* Return TRUE iff REL is a branch reloc with a global symbol matching +@@ -10832,62 +10854,60 @@ eh_advance_size (unsigned int delta) + static inline unsigned int + plt_stub_size (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_vma off) ++ bfd_vma off, ++ unsigned int odd) + { + unsigned size; + + if (stub_entry->stub_type >= ppc_stub_plt_call_notoc) + { + if (htab->params->power10_stubs != 0) +- { +- bfd_vma start = (stub_entry->stub_offset +- + stub_entry->group->stub_sec->output_offset +- + stub_entry->group->stub_sec->output_section->vma); +- if (stub_entry->stub_type > ppc_stub_plt_call_notoc) +- start += 4; +- size = 8 + size_power10_offset (off, start & 4); +- } ++ size = 8 + size_power10_offset (off, odd); + else + size = 8 + size_offset (off - 8); + if (stub_entry->stub_type > ppc_stub_plt_call_notoc) + size += 4; +- return size; + } +- +- size = 12; +- if (ALWAYS_EMIT_R2SAVE +- || stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 4; +- if (PPC_HA (off) != 0) +- size += 4; +- if (htab->opd_abi) ++ else + { +- size += 4; +- if (htab->params->plt_static_chain) ++ size = 12; ++ if (ALWAYS_EMIT_R2SAVE ++ || stub_entry->stub_type == ppc_stub_plt_call_r2save) + size += 4; +- if (htab->params->plt_thread_safe +- && htab->elf.dynamic_sections_created +- && stub_entry->h != NULL +- && stub_entry->h->elf.dynindx != -1) +- size += 8; +- if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) != PPC_HA (off)) ++ if (PPC_HA (off) != 0) + size += 4; ++ if (htab->opd_abi) ++ { ++ size += 4; ++ if (htab->params->plt_static_chain) ++ size += 4; ++ if (htab->params->plt_thread_safe ++ && htab->elf.dynamic_sections_created ++ && stub_entry->h != NULL ++ && stub_entry->h->elf.dynindx != -1) ++ size += 8; ++ if (PPC_HA (off + 8 + 8 * htab->params->plt_static_chain) ++ != PPC_HA (off)) ++ size += 4; ++ } + } + if (stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt) + { +- if (htab->params->no_tls_get_addr_regsave) ++ if (!htab->params->no_tls_get_addr_regsave) + { +- size += 7 * 4; +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 6 * 4; ++ size += 30 * 4; ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ size += 4; + } + else + { +- size += 30 * 4; +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- size += 4; ++ size += 7 * 4; ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ size += 6 * 4; + } + } + return size; +@@ -10902,7 +10922,8 @@ plt_stub_size (struct ppc_link_hash_tabl + static inline unsigned int + plt_stub_pad (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_vma plt_off) ++ bfd_vma plt_off, ++ unsigned int odd) + { + int stub_align; + unsigned stub_size; +@@ -10917,7 +10938,7 @@ plt_stub_pad (struct ppc_link_hash_table + } + + stub_align = 1 << -htab->params->plt_stub_align; +- stub_size = plt_stub_size (htab, stub_entry, plt_off); ++ stub_size = plt_stub_size (htab, stub_entry, plt_off, odd); + if (((stub_off + stub_size - 1) & -stub_align) - (stub_off & -stub_align) + > ((stub_size - 1) & -stub_align)) + return stub_align - (stub_off & (stub_align - 1)); +@@ -11112,14 +11133,12 @@ build_plt_stub (struct ppc_link_hash_tab + #define MR_R3_R0 0x7c030378 + #define BCTRL 0x4e800421 + +-static inline bfd_byte * +-build_tls_get_addr_stub (struct ppc_link_hash_table *htab, ++static bfd_byte * ++build_tls_get_addr_head (struct ppc_link_hash_table *htab, + struct ppc_stub_hash_entry *stub_entry, +- bfd_byte *p, bfd_vma offset, Elf_Internal_Rela *r) ++ bfd_byte *p) + { + bfd *obfd = htab->params->stub_bfd; +- bfd_byte *loc = p; +- unsigned int i; + + bfd_put_32 (obfd, LD_R0_0R3 + 0, p), p += 4; + bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4; +@@ -11128,21 +11147,43 @@ build_tls_get_addr_stub (struct ppc_link + bfd_put_32 (obfd, ADD_R3_R12_R13, p), p += 4; + bfd_put_32 (obfd, BEQLR, p), p += 4; + bfd_put_32 (obfd, MR_R3_R0, p), p += 4; +- if (htab->params->no_tls_get_addr_regsave) +- { +- if (r != NULL) +- r[0].r_offset += 7 * 4; +- if (stub_entry->stub_type != ppc_stub_plt_call_r2save) +- return build_plt_stub (htab, stub_entry, p, offset, r); + ++ if (!htab->params->no_tls_get_addr_regsave) ++ p = tls_get_addr_prologue (obfd, p, htab); ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { + bfd_put_32 (obfd, MFLR_R0, p); + p += 4; + bfd_put_32 (obfd, STD_R0_0R1 + STK_LINKER (htab), p); + p += 4; ++ } ++ return p; ++} + +- if (r != NULL) +- r[0].r_offset += 2 * 4; +- p = build_plt_stub (htab, stub_entry, p, offset, r); ++static bfd_byte * ++build_tls_get_addr_tail (struct ppc_link_hash_table *htab, ++ struct ppc_stub_hash_entry *stub_entry, ++ bfd_byte *p, ++ bfd_byte *loc) ++{ ++ bfd *obfd = htab->params->stub_bfd; ++ ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ bfd_put_32 (obfd, BCTRL, p - 4); ++ ++ if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); ++ p += 4; ++ } ++ p = tls_get_addr_epilogue (obfd, p, htab); ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { + bfd_put_32 (obfd, BCTRL, p - 4); + + bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); +@@ -11154,24 +11195,6 @@ build_tls_get_addr_stub (struct ppc_link + bfd_put_32 (obfd, BLR, p); + p += 4; + } +- else +- { +- p = tls_get_addr_prologue (obfd, p, htab); +- +- if (r != NULL) +- r[0].r_offset += 18 * 4; +- +- p = build_plt_stub (htab, stub_entry, p, offset, r); +- bfd_put_32 (obfd, BCTRL, p - 4); +- +- if (stub_entry->stub_type == ppc_stub_plt_call_r2save) +- { +- bfd_put_32 (obfd, LD_R2_0R1 + STK_TOC (htab), p); +- p += 4; +- } +- +- p = tls_get_addr_epilogue (obfd, p, htab); +- } + + if (htab->glink_eh_frame != NULL + && htab->glink_eh_frame->size != 0) +@@ -11180,21 +11203,11 @@ build_tls_get_addr_stub (struct ppc_link + + base = htab->glink_eh_frame->contents + stub_entry->group->eh_base + 17; + eh = base + stub_entry->group->eh_size; +- if (htab->params->no_tls_get_addr_regsave) +- { +- unsigned int lr_used, delta; +- lr_used = stub_entry->stub_offset + (p - 20 - loc); +- delta = lr_used - stub_entry->group->lr_restore; +- stub_entry->group->lr_restore = lr_used + 16; +- eh = eh_advance (htab->elf.dynobj, eh, delta); +- *eh++ = DW_CFA_offset_extended_sf; +- *eh++ = 65; +- *eh++ = -(STK_LINKER (htab) / 8) & 0x7f; +- *eh++ = DW_CFA_advance_loc + 4; +- } +- else ++ ++ if (!htab->params->no_tls_get_addr_regsave) + { +- unsigned int cfa_updt, delta; ++ unsigned int cfa_updt, delta, i; ++ + /* After the bctrl, lr has been modified so we need to emit + .eh_frame info saying the return address is on the stack. In + fact we must put the EH info at or before the call rather +@@ -11233,10 +11246,27 @@ build_tls_get_addr_stub (struct ppc_link + for (i = 4; i < 12; i++) + *eh++ = DW_CFA_restore + i; + *eh++ = DW_CFA_advance_loc + 2; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ unsigned int lr_used, delta; ++ ++ lr_used = stub_entry->stub_offset + (p - 20 - loc); ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->lr_restore = lr_used + 16; ++ eh = eh_advance (htab->elf.dynobj, eh, delta); ++ *eh++ = DW_CFA_offset_extended_sf; ++ *eh++ = 65; ++ *eh++ = -(STK_LINKER (htab) / 8) & 0x7f; ++ *eh++ = DW_CFA_advance_loc + 4; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; + } +- *eh++ = DW_CFA_restore_extended; +- *eh++ = 65; +- stub_entry->group->eh_size = eh - base; + } + return p; + } +@@ -11370,6 +11400,7 @@ ppc_build_one_stub (struct bfd_hash_entr + struct ppc_branch_hash_entry *br_entry; + struct bfd_link_info *info; + struct ppc_link_hash_table *htab; ++ bfd *obfd; + bfd_byte *loc; + bfd_byte *p, *relp; + bfd_vma targ, off; +@@ -11377,6 +11408,7 @@ ppc_build_one_stub (struct bfd_hash_entr + asection *plt; + int num_rel; + int odd; ++ bfd_boolean is_tga; + + /* Massage our args to the form they really have. */ + stub_entry = (struct ppc_stub_hash_entry *) gen_entry; +@@ -11426,6 +11458,7 @@ ppc_build_one_stub (struct bfd_hash_entr + off = targ - off; + + p = loc; ++ obfd = htab->params->stub_bfd; + if (stub_entry->stub_type == ppc_stub_long_branch_r2off) + { + bfd_vma r2off = get_r2off (info, stub_entry); +@@ -11435,23 +11468,21 @@ ppc_build_one_stub (struct bfd_hash_entr + htab->stub_error = TRUE; + return FALSE; + } +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + if (PPC_HA (r2off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R2_R2 | PPC_HA (r2off), p); ++ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p); + p += 4; + } + if (PPC_LO (r2off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDI_R2_R2 | PPC_LO (r2off), p); ++ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p); + p += 4; + } + off -= p - loc; + } +- bfd_put_32 (htab->params->stub_bfd, B_DOT | (off & 0x3fffffc), p); ++ bfd_put_32 (obfd, B_DOT | (off & 0x3fffffc), p); + p += 4; + + if (off + (1 << 25) >= (bfd_vma) (1 << 26)) +@@ -11577,19 +11608,17 @@ ppc_build_one_stub (struct bfd_hash_entr + } + + p = loc; ++ obfd = htab->params->stub_bfd; + if (stub_entry->stub_type != ppc_stub_plt_branch_r2off) + { + if (PPC_HA (off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R12_R2 | PPC_HA (off), p); ++ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R12 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p); + } + else +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R2 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p); + } + else + { +@@ -11601,36 +11630,32 @@ ppc_build_one_stub (struct bfd_hash_entr + return FALSE; + } + +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + if (PPC_HA (off) != 0) + { +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R12_R2 | PPC_HA (off), p); ++ bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (off), p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- LD_R12_0R12 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R12 | PPC_LO (off), p); + } + else +- bfd_put_32 (htab->params->stub_bfd, LD_R12_0R2 | PPC_LO (off), p); ++ bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (off), p); + + if (PPC_HA (r2off) != 0) + { + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- ADDIS_R2_R2 | PPC_HA (r2off), p); ++ bfd_put_32 (obfd, ADDIS_R2_R2 | PPC_HA (r2off), p); + } + if (PPC_LO (r2off) != 0) + { + p += 4; +- bfd_put_32 (htab->params->stub_bfd, +- ADDI_R2_R2 | PPC_LO (r2off), p); ++ bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (r2off), p); + } + } + p += 4; +- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p); ++ bfd_put_32 (obfd, MTCTR_R12, p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, BCTR, p); ++ bfd_put_32 (obfd, BCTR, p); + p += 4; + break; + +@@ -11644,12 +11669,23 @@ ppc_build_one_stub (struct bfd_hash_entr + off = (stub_entry->stub_offset + + stub_entry->group->stub_sec->output_offset + + stub_entry->group->stub_sec->output_section->vma); ++ obfd = htab->params->stub_bfd; ++ is_tga = ((stub_entry->stub_type == ppc_stub_plt_call_notoc ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt); ++ if (is_tga) ++ { ++ p = build_tls_get_addr_head (htab, stub_entry, p); ++ off += p - loc; ++ } + if (stub_entry->stub_type == ppc_stub_long_branch_both + || stub_entry->stub_type == ppc_stub_plt_branch_both + || stub_entry->stub_type == ppc_stub_plt_call_both) + { + off += 4; +- bfd_put_32 (htab->params->stub_bfd, STD_R2_0R1 + STK_TOC (htab), p); ++ bfd_put_32 (obfd, STD_R2_0R1 + STK_TOC (htab), p); + p += 4; + } + if (stub_entry->stub_type >= ppc_stub_plt_call_notoc) +@@ -11682,17 +11718,39 @@ ppc_build_one_stub (struct bfd_hash_entr + if (htab->params->power10_stubs != 0) + { + bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc; +- p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load); ++ p = build_power10_offset (obfd, p, off, odd, load); + } + else + { ++ if (htab->glink_eh_frame != NULL ++ && htab->glink_eh_frame->size != 0) ++ { ++ bfd_byte *base, *eh; ++ unsigned int lr_used, delta; ++ ++ base = (htab->glink_eh_frame->contents ++ + stub_entry->group->eh_base + 17); ++ eh = base + stub_entry->group->eh_size; ++ lr_used = stub_entry->stub_offset + (p - loc) + 8; ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->lr_restore = lr_used + 8; ++ eh = eh_advance (htab->elf.dynobj, eh, delta); ++ *eh++ = DW_CFA_register; ++ *eh++ = 65; ++ *eh++ = 12; ++ *eh++ = DW_CFA_advance_loc + 2; ++ *eh++ = DW_CFA_restore_extended; ++ *eh++ = 65; ++ stub_entry->group->eh_size = eh - base; ++ } ++ + /* The notoc stubs calculate their target (either a PLT entry or + the global entry point of a function) relative to the PC + returned by the "bcl" two instructions past the start of the + sequence emitted by build_offset. The offset is therefore 8 + less than calculated from the start of the sequence. */ + off -= 8; +- p = build_offset (htab->params->stub_bfd, p, off, ++ p = build_offset (obfd, p, off, + stub_entry->stub_type >= ppc_stub_plt_call_notoc); + } + +@@ -11704,17 +11762,19 @@ ppc_build_one_stub (struct bfd_hash_entr + + stub_entry->group->stub_sec->output_offset + + stub_entry->group->stub_sec->output_section->vma + + (p - loc)); +- bfd_put_32 (htab->params->stub_bfd, +- B_DOT | ((targ - from) & 0x3fffffc), p); ++ bfd_put_32 (obfd, B_DOT | ((targ - from) & 0x3fffffc), p); + } + else + { +- bfd_put_32 (htab->params->stub_bfd, MTCTR_R12, p); ++ bfd_put_32 (obfd, MTCTR_R12, p); + p += 4; +- bfd_put_32 (htab->params->stub_bfd, BCTR, p); ++ bfd_put_32 (obfd, BCTR, p); + } + p += 4; + ++ if (is_tga) ++ p = build_tls_get_addr_tail (htab, stub_entry, p, loc); ++ + if (info->emitrelocations) + { + bfd_vma roff = relp - stub_entry->group->stub_sec->contents; +@@ -11745,33 +11805,6 @@ ppc_build_one_stub (struct bfd_hash_entr + return FALSE; + } + } +- +- if (htab->params->power10_stubs == 0 +- && htab->glink_eh_frame != NULL +- && htab->glink_eh_frame->size != 0) +- { +- bfd_byte *base, *eh; +- unsigned int lr_used, delta; +- +- base = (htab->glink_eh_frame->contents +- + stub_entry->group->eh_base + 17); +- eh = base + stub_entry->group->eh_size; +- lr_used = stub_entry->stub_offset + 8; +- if (stub_entry->stub_type == ppc_stub_long_branch_both +- || stub_entry->stub_type == ppc_stub_plt_branch_both +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- lr_used += 4; +- delta = lr_used - stub_entry->group->lr_restore; +- stub_entry->group->lr_restore = lr_used + 8; +- eh = eh_advance (htab->elf.dynobj, eh, delta); +- *eh++ = DW_CFA_register; +- *eh++ = 65; +- *eh++ = 12; +- *eh++ = DW_CFA_advance_loc + 2; +- *eh++ = DW_CFA_restore_extended; +- *eh++ = 65; +- stub_entry->group->eh_size = eh - base; +- } + break; + + case ppc_stub_plt_call: +@@ -11840,12 +11873,20 @@ ppc_build_one_stub (struct bfd_hash_entr + r[0].r_offset += 2; + r[0].r_addend = targ; + } +- if (stub_entry->h != NULL +- && is_tls_get_addr (&stub_entry->h->elf, htab) +- && htab->params->tls_get_addr_opt) +- p = build_tls_get_addr_stub (htab, stub_entry, loc, off, r); +- else +- p = build_plt_stub (htab, stub_entry, loc, off, r); ++ p = loc; ++ obfd = htab->params->stub_bfd; ++ is_tga = (stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt); ++ if (is_tga) ++ { ++ p = build_tls_get_addr_head (htab, stub_entry, p); ++ if (r != NULL) ++ r[0].r_offset += p - loc; ++ } ++ p = build_plt_stub (htab, stub_entry, p, off, r); ++ if (is_tga) ++ p = build_tls_get_addr_tail (htab, stub_entry, p, loc); + break; + + case ppc_stub_save_res: +@@ -12141,11 +12182,19 @@ ppc_size_one_stub (struct bfd_hash_entry + + case ppc_stub_plt_call_notoc: + case ppc_stub_plt_call_both: +- off = (stub_entry->stub_offset +- + stub_entry->group->stub_sec->output_offset +- + stub_entry->group->stub_sec->output_section->vma); ++ lr_used = 0; ++ if (stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt) ++ { ++ lr_used += 7 * 4; ++ if (!htab->params->no_tls_get_addr_regsave) ++ lr_used += 11 * 4; ++ else if (stub_entry->stub_type == ppc_stub_plt_call_both) ++ lr_used += 2 * 4; ++ } + if (stub_entry->stub_type == ppc_stub_plt_call_both) +- off += 4; ++ lr_used += 4; + targ = stub_entry->plt_ent->plt.offset & ~1; + if (targ >= (bfd_vma) -2) + abort (); +@@ -12161,16 +12210,21 @@ ppc_size_one_stub (struct bfd_hash_entry + plt = htab->pltlocal; + } + targ += plt->output_offset + plt->output_section->vma; ++ off = (stub_entry->stub_offset ++ + stub_entry->group->stub_sec->output_offset ++ + stub_entry->group->stub_sec->output_section->vma ++ + lr_used); + odd = off & 4; + off = targ - off; + + if (htab->params->plt_stub_align != 0) + { +- unsigned pad = plt_stub_pad (htab, stub_entry, off); ++ unsigned pad = plt_stub_pad (htab, stub_entry, off, odd); + + stub_entry->group->stub_sec->size += pad; + stub_entry->stub_offset = stub_entry->group->stub_sec->size; + off -= pad; ++ odd ^= pad & 4; + } + + if (info->emitrelocations) +@@ -12184,15 +12238,13 @@ ppc_size_one_stub (struct bfd_hash_entry + stub_entry->group->stub_sec->flags |= SEC_RELOC; + } + +- size = plt_stub_size (htab, stub_entry, off); ++ size = plt_stub_size (htab, stub_entry, off, odd); + + if (htab->params->power10_stubs == 0) + { + /* After the bcl, lr has been modified so we need to emit + .eh_frame info saying the return address is in r12. */ +- lr_used = stub_entry->stub_offset + 8; +- if (stub_entry->stub_type == ppc_stub_plt_call_both) +- lr_used += 4; ++ lr_used += stub_entry->stub_offset + 8; + /* The eh_frame info will consist of a DW_CFA_advance_loc or + variant, DW_CFA_register, 65, 12, DW_CFA_advance_loc+2, + DW_CFA_restore_extended 65. */ +@@ -12200,6 +12252,30 @@ ppc_size_one_stub (struct bfd_hash_entry + stub_entry->group->eh_size += eh_advance_size (delta) + 6; + stub_entry->group->lr_restore = lr_used + 8; + } ++ if ((stub_entry->stub_type == ppc_stub_plt_call_notoc ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && stub_entry->h != NULL ++ && is_tls_get_addr (&stub_entry->h->elf, htab) ++ && htab->params->tls_get_addr_opt) ++ { ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; ++ delta = cfa_updt - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta); ++ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; ++ stub_entry->group->lr_restore ++ = stub_entry->stub_offset + size - 4; ++ } ++ else if (stub_entry->stub_type == ppc_stub_plt_call_both) ++ { ++ lr_used = stub_entry->stub_offset + size - 20; ++ delta = lr_used - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta) + 6; ++ stub_entry->group->lr_restore ++ = stub_entry->stub_offset + size - 4; ++ } ++ } + break; + + case ppc_stub_plt_call: +@@ -12225,7 +12301,7 @@ ppc_size_one_stub (struct bfd_hash_entry + + if (htab->params->plt_stub_align != 0) + { +- unsigned pad = plt_stub_pad (htab, stub_entry, off); ++ unsigned pad = plt_stub_pad (htab, stub_entry, off, 0); + + stub_entry->group->stub_sec->size += pad; + stub_entry->stub_offset = stub_entry->group->stub_sec->size; +@@ -12242,14 +12318,22 @@ ppc_size_one_stub (struct bfd_hash_entry + stub_entry->group->stub_sec->flags |= SEC_RELOC; + } + +- size = plt_stub_size (htab, stub_entry, off); ++ size = plt_stub_size (htab, stub_entry, off, 0); + + if (stub_entry->h != NULL + && is_tls_get_addr (&stub_entry->h->elf, htab) + && htab->params->tls_get_addr_opt + && stub_entry->stub_type == ppc_stub_plt_call_r2save) + { +- if (htab->params->no_tls_get_addr_regsave) ++ if (!htab->params->no_tls_get_addr_regsave) ++ { ++ /* Adjustments to r1 need to be described. */ ++ unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; ++ delta = cfa_updt - stub_entry->group->lr_restore; ++ stub_entry->group->eh_size += eh_advance_size (delta); ++ stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; ++ } ++ else + { + lr_used = stub_entry->stub_offset + size - 20; + /* The eh_frame info will consist of a DW_CFA_advance_loc +@@ -12258,15 +12342,7 @@ ppc_size_one_stub (struct bfd_hash_entry + delta = lr_used - stub_entry->group->lr_restore; + stub_entry->group->eh_size += eh_advance_size (delta) + 6; + } +- else +- { +- /* Adjustments to r1 need to be described. */ +- unsigned int cfa_updt = stub_entry->stub_offset + 18 * 4; +- delta = cfa_updt - stub_entry->group->lr_restore; +- stub_entry->group->eh_size += eh_advance_size (delta); +- stub_entry->group->eh_size += htab->opd_abi ? 36 : 35; +- } +- stub_entry->group->lr_restore = size - 4; ++ stub_entry->group->lr_restore = stub_entry->stub_offset + size - 4; + } + break; + +@@ -13812,11 +13888,11 @@ ppc64_elf_size_stubs (struct bfd_link_in + /* Augmentation. */ + p += 1; + +- *p++ = DW_CFA_advance_loc + 1; ++ *p++ = DW_CFA_advance_loc + (htab->has_plt_localentry0 ? 3 : 2); + *p++ = DW_CFA_register; + *p++ = 65; + *p++ = htab->opd_abi ? 12 : 0; +- *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 5 : 7); ++ *p++ = DW_CFA_advance_loc + (htab->opd_abi ? 4 : 2); + *p++ = DW_CFA_restore_extended; + *p++ = 65; + p += ((24 + align - 1) & -align) - 24; +@@ -14412,23 +14488,60 @@ ppc64_elf_build_stubs (struct bfd_link_i + } + else + { ++ unsigned int insn; ++ ++ /* 0: ++ . .quad plt0-1f # plt0 entry relative to 1: ++ # ++ # We get here with r12 initially @ a glink branch ++ # Load the address of _dl_runtime_resolve from plt0 and ++ # jump to it, with r0 set to the index of the PLT entry ++ # to be resolved and r11 the link map. ++ __glink_PLTresolve: ++ . std %r2,24(%r1) # optional ++ . mflr %r0 ++ . bcl 20,31,1f ++ 1: ++ . mflr %r11 ++ . mtlr %r0 ++ . ld %r0,(0b-1b)(%r11) ++ . sub %r12,%r12,%r11 ++ . add %r11,%r0,%r11 ++ . addi %r0,%r12,1b-2f ++ . ld %r12,0(%r11) ++ . srdi %r0,%r0,2 ++ . mtctr %r12 ++ . ld %r11,8(%r11) ++ . bctr ++ 2: ++ . b __glink_PLTresolve ++ . ... ++ . b __glink_PLTresolve */ ++ ++ if (htab->has_plt_localentry0) ++ { ++ bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p); ++ p += 4; ++ } + bfd_put_32 (htab->glink->owner, MFLR_R0, p); + p += 4; + bfd_put_32 (htab->glink->owner, BCL_20_31, p); + p += 4; + bfd_put_32 (htab->glink->owner, MFLR_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, STD_R2_0R1 + 24, p); +- p += 4; +- bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p); +- p += 4; + bfd_put_32 (htab->glink->owner, MTLR_R0, p); + p += 4; ++ if (htab->has_plt_localentry0) ++ insn = LD_R0_0R11 | (-20 & 0xfffc); ++ else ++ insn = LD_R0_0R11 | (-16 & 0xfffc); ++ bfd_put_32 (htab->glink->owner, insn, p); ++ p += 4; + bfd_put_32 (htab->glink->owner, SUB_R12_R12_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p); ++ bfd_put_32 (htab->glink->owner, ADD_R11_R0_R11, p); + p += 4; +- bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-48 & 0xffff), p); ++ bfd_put_32 (htab->glink->owner, ADDI_R0_R12 | (-44 & 0xffff), p); + p += 4; + bfd_put_32 (htab->glink->owner, LD_R12_0R11, p); + p += 4; +@@ -15878,22 +15991,25 @@ ppc64_elf_relocate_section (bfd *output_ + addend = 0; + reloc_dest = DEST_STUB; + +- if (((stub_entry->stub_type == ppc_stub_plt_call +- && ALWAYS_EMIT_R2SAVE) +- || stub_entry->stub_type == ppc_stub_plt_call_r2save +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- && !(h != NULL +- && is_tls_get_addr (&h->elf, htab) +- && htab->params->tls_get_addr_opt) +- && rel + 1 < relend +- && rel[1].r_offset == rel->r_offset + 4 +- && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE) +- relocation += 4; +- else if ((stub_entry->stub_type == ppc_stub_long_branch_both +- || stub_entry->stub_type == ppc_stub_plt_branch_both +- || stub_entry->stub_type == ppc_stub_plt_call_both) +- && r_type == R_PPC64_REL24_NOTOC) +- relocation += 4; ++ if ((((stub_entry->stub_type == ppc_stub_plt_call ++ && ALWAYS_EMIT_R2SAVE) ++ || stub_entry->stub_type == ppc_stub_plt_call_r2save ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && rel + 1 < relend ++ && rel[1].r_offset == rel->r_offset + 4 ++ && ELF64_R_TYPE (rel[1].r_info) == R_PPC64_TOCSAVE) ++ || ((stub_entry->stub_type == ppc_stub_long_branch_both ++ || stub_entry->stub_type == ppc_stub_plt_branch_both ++ || stub_entry->stub_type == ppc_stub_plt_call_both) ++ && r_type == R_PPC64_REL24_NOTOC)) ++ { ++ /* Skip over the r2 store at the start of the stub. */ ++ if (!(stub_entry->stub_type >= ppc_stub_plt_call ++ && htab->params->tls_get_addr_opt ++ && h != NULL ++ && is_tls_get_addr (&h->elf, htab))) ++ relocation += 4; ++ } + + if (r_type == R_PPC64_REL24_NOTOC + && (stub_entry->stub_type == ppc_stub_plt_call_notoc +@@ -15942,7 +16058,8 @@ ppc64_elf_relocate_section (bfd *output_ + break; + + case R_PPC64_GOT16_DS: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = TOCstart + htab->sec_info[input_section->id].toc_off; + if (relocation + addend - from + 0x8000 < 0x10000 +@@ -15961,7 +16078,8 @@ ppc64_elf_relocate_section (bfd *output_ + + case R_PPC64_GOT16_LO_DS: + case R_PPC64_GOT16_HA: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = TOCstart + htab->sec_info[input_section->id].toc_off; + if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL +@@ -15984,34 +16102,38 @@ ppc64_elf_relocate_section (bfd *output_ + break; + + case R_PPC64_GOT_PCREL34: +- if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC) ++ if ((h ? h->elf.type : ELF_ST_TYPE (sym->st_info)) == STT_GNU_IFUNC ++ || !htab->do_toc_opt) + break; + from = (rel->r_offset + + input_section->output_section->vma + + input_section->output_offset); +- if (relocation - from + (1ULL << 33) < 1ULL << 34 +- && SYMBOL_REFERENCES_LOCAL (info, &h->elf)) +- { +- offset = rel->r_offset; +- pinsn = bfd_get_32 (input_bfd, contents + offset); +- pinsn <<= 32; +- pinsn |= bfd_get_32 (input_bfd, contents + offset + 4); +- if ((pinsn & ((-1ULL << 50) | (63ULL << 26))) +- == ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */)) +- { +- /* Replace with paddi. */ +- pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26); +- r_type = R_PPC64_PCREL34; +- rel->r_info = ELF64_R_INFO (r_symndx, r_type); +- bfd_put_32 (input_bfd, pinsn >> 32, contents + offset); +- bfd_put_32 (input_bfd, pinsn, contents + offset + 4); +- goto pcrelopt; +- } +- } +- break; ++ if (!(relocation - from + (1ULL << 33) < 1ULL << 34 ++ && SYMBOL_REFERENCES_LOCAL (info, &h->elf))) ++ break; ++ ++ offset = rel->r_offset; ++ pinsn = bfd_get_32 (input_bfd, contents + offset); ++ pinsn <<= 32; ++ pinsn |= bfd_get_32 (input_bfd, contents + offset + 4); ++ if ((pinsn & ((-1ULL << 50) | (63ULL << 26))) ++ != ((1ULL << 58) | (1ULL << 52) | (57ULL << 26) /* pld */)) ++ break; ++ ++ /* Replace with paddi. */ ++ pinsn += (2ULL << 56) + (14ULL << 26) - (57ULL << 26); ++ r_type = R_PPC64_PCREL34; ++ rel->r_info = ELF64_R_INFO (r_symndx, r_type); ++ bfd_put_32 (input_bfd, pinsn >> 32, contents + offset); ++ bfd_put_32 (input_bfd, pinsn, contents + offset + 4); ++ /* Fall through. */ + + case R_PPC64_PCREL34: +- if (SYMBOL_REFERENCES_LOCAL (info, &h->elf)) ++ if (!htab->params->no_pcrel_opt ++ && rel + 1 < relend ++ && rel[1].r_offset == rel->r_offset ++ && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT) ++ && SYMBOL_REFERENCES_LOCAL (info, &h->elf)) + { + offset = rel->r_offset; + pinsn = bfd_get_32 (input_bfd, contents + offset); +@@ -16021,43 +16143,37 @@ ppc64_elf_relocate_section (bfd *output_ + == ((1ULL << 58) | (2ULL << 56) | (1ULL << 52) + | (14ULL << 26) /* paddi */)) + { +- pcrelopt: +- if (rel + 1 < relend +- && rel[1].r_offset == offset +- && rel[1].r_info == ELF64_R_INFO (0, R_PPC64_PCREL_OPT)) +- { +- bfd_vma off2 = rel[1].r_addend; +- if (off2 == 0) +- /* zero means next insn. */ +- off2 = 8; +- off2 += offset; +- if (off2 + 4 <= input_section->size) ++ bfd_vma off2 = rel[1].r_addend; ++ if (off2 == 0) ++ /* zero means next insn. */ ++ off2 = 8; ++ off2 += offset; ++ if (off2 + 4 <= input_section->size) ++ { ++ uint64_t pinsn2; ++ bfd_signed_vma addend_off; ++ pinsn2 = bfd_get_32 (input_bfd, contents + off2); ++ pinsn2 <<= 32; ++ if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) + { +- uint64_t pinsn2; +- bfd_signed_vma addend_off; +- pinsn2 = bfd_get_32 (input_bfd, contents + off2); +- pinsn2 <<= 32; ++ if (off2 + 8 > input_section->size) ++ break; ++ pinsn2 |= bfd_get_32 (input_bfd, ++ contents + off2 + 4); ++ } ++ if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off)) ++ { ++ addend += addend_off; ++ rel->r_addend = addend; ++ bfd_put_32 (input_bfd, pinsn >> 32, ++ contents + offset); ++ bfd_put_32 (input_bfd, pinsn, ++ contents + offset + 4); ++ bfd_put_32 (input_bfd, pinsn2 >> 32, ++ contents + off2); + if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) +- { +- if (off2 + 8 > input_section->size) +- break; +- pinsn2 |= bfd_get_32 (input_bfd, +- contents + off2 + 4); +- } +- if (xlate_pcrel_opt (&pinsn, &pinsn2, &addend_off)) +- { +- addend += addend_off; +- rel->r_addend = addend; +- bfd_put_32 (input_bfd, pinsn >> 32, +- contents + offset); +- bfd_put_32 (input_bfd, pinsn, +- contents + offset + 4); +- bfd_put_32 (input_bfd, pinsn2 >> 32, +- contents + off2); +- if ((pinsn2 & (63ULL << 58)) == 1ULL << 58) +- bfd_put_32 (input_bfd, pinsn2, +- contents + off2 + 4); +- } ++ bfd_put_32 (input_bfd, pinsn2, ++ contents + off2 + 4); + } + } + } +diff -rup binutils.orig/bfd/elf64-ppc.h binutils-2.35.1/bfd/elf64-ppc.h +--- binutils.orig/bfd/elf64-ppc.h 2020-10-08 13:50:31.430909427 +0100 ++++ binutils-2.35.1/bfd/elf64-ppc.h 2020-10-08 13:55:41.515954725 +0100 +@@ -27,6 +27,7 @@ struct ppc64_elf_params + /* Linker call-backs. */ + asection * (*add_stub_section) (const char *, asection *); + void (*layout_sections_again) (void); ++ void (*edit) (void); + + /* Maximum size of a group of input sections that can be handled by + one stub section. A value of +/-1 indicates the bfd back-end +@@ -57,6 +58,9 @@ struct ppc64_elf_params + /* Whether to use power10 instructions in linkage stubs. */ + int power10_stubs; + ++ /* Whether R_PPC64_PCREL_OPT should be ignored. */ ++ int no_pcrel_opt; ++ + /* Whether to canonicalize .opd so that there are no overlapping + .opd entries. */ + int non_overlapping_opd; +@@ -77,7 +81,7 @@ bfd_boolean ppc64_elf_edit_opd + (struct bfd_link_info *); + bfd_boolean ppc64_elf_inline_plt + (struct bfd_link_info *); +-asection *ppc64_elf_tls_setup ++bfd_boolean ppc64_elf_tls_setup + (struct bfd_link_info *); + bfd_boolean ppc64_elf_tls_optimize + (struct bfd_link_info *); +diff -rup binutils.orig/gas/config/tc-ppc.c binutils-2.35.1/gas/config/tc-ppc.c +--- binutils.orig/gas/config/tc-ppc.c 2020-10-08 13:50:31.069910539 +0100 ++++ binutils-2.35.1/gas/config/tc-ppc.c 2020-10-08 13:51:29.102731857 +0100 +@@ -3335,6 +3335,15 @@ md_assemble (char *str) + } + + insn = opcode->opcode; ++ if (!target_big_endian ++ && ((insn & ~(1 << 26)) == 46u << 26 ++ || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1))) ++ { ++ /* lmw, stmw, lswi, lswx, stswi, stswx */ ++ as_bad (_("`%s' invalid when little-endian"), str); ++ ppc_clear_labels (); ++ return; ++ } + + str = s; + while (ISSPACE (*str)) +diff -rup binutils.orig/gas/testsuite/gas/ppc/476.d binutils-2.35.1/gas/testsuite/gas/ppc/476.d +--- binutils.orig/gas/testsuite/gas/ppc/476.d 2020-10-08 13:50:31.313909788 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/476.d 2020-10-08 13:51:29.102731857 +0100 +@@ -7,491 +7,485 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5 +- 4: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5 +- 8: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5 +- c: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5 +- 10: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5 +- 14: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5 +- 18: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5 +- 1c: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5 +- 20: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5 +- 24: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5 +- 28: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128 +- 2c: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128 +- 30: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128 +- 34: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128 +- 38: (7c 64 01 d4|d4 01 64 7c) addme r3,r4 +- 3c: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4 +- 40: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4 +- 44: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4 +- 48: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5 +- 4c: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5 +- 50: (7c 64 01 94|94 01 64 7c) addze r3,r4 +- 54: (7c 64 01 95|95 01 64 7c) addze\. r3,r4 +- 58: (7c 64 05 94|94 05 64 7c) addzeo r3,r4 +- 5c: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4 +- 60: (7c 83 28 38|38 28 83 7c) and r3,r4,r5 +- 64: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5 +- 68: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15 +- 6c: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18 +- 70: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005 +- 74: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005 +- 78: (48 00 00 02|02 00 00 48) ba 0 +- 7c: (40 01 00 00|00 00 01 40) bdnzf gt,7c +- 80: (40 85 00 02|02 00 85 40) blea cr1,0 +- 84: (4d 80 04 20|20 04 80 4d) bltctr +- 88: (4c 8a 04 20|20 04 8a 4c) bnectr cr2 +- 8c: (4c 86 04 20|20 04 86 4c) bnectr cr1 +- 90: (4c 86 04 20|20 04 86 4c) bnectr cr1 +- 94: (4d 80 04 21|21 04 80 4d) bltctrl +- 98: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2 +- 9c: (4c 86 04 21|21 04 86 4c) bnectrl cr1 +- a0: (4c 86 04 21|21 04 86 4c) bnectrl cr1 +- a4: (40 43 00 01|01 00 43 40) bdzfl so,a4 +- a8: (4d 80 00 20|20 00 80 4d) bltlr +- ac: (4c 8a 00 20|20 00 8a 4c) bnelr cr2 +- b0: (4c 86 00 20|20 00 86 4c) bnelr cr1 +- b4: (4c 86 00 20|20 00 86 4c) bnelr cr1 +- b8: (4d 80 00 21|21 00 80 4d) bltlrl +- bc: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2 +- c0: (4c 86 00 21|21 00 86 4c) bnelrl cr1 +- c4: (4c 86 00 21|21 00 86 4c) bnelrl cr1 +- c8: (48 00 00 00|00 00 00 48) b c8 +- cc: (48 00 00 01|01 00 00 48) bl cc +- d0: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 +- d4: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 +- d8: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4 +- dc: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 +- e0: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 +- e4: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 +- e8: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167 +- ec: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 +- f0: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4 +- f4: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 +- f8: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167 +- fc: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 +- 100: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 +- 104: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 +- 108: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 +- 10c: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11 +- 110: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11 +- 114: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq +- 118: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt +- 11c: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt +- 120: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so +- 124: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq +- 128: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so +- 12c: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt +- 130: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt +- 134: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10 +- 138: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 +- 13c: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 +- 140: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7 +- 144: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6 +- 148: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7 +- 14c: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 +- 150: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 +- 154: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6 +- 158: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9 +- 15c: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 +- 160: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 +- 164: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7 +- 168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12 +- 16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2 +- 170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6 +- 174: (7c 00 03 8c|8c 03 00 7c) dccci +- 178: (7c 00 03 8c|8c 03 00 7c) dccci +- 17c: (7c 00 03 8c|8c 03 00 7c) dccci +- 180: (7c 20 03 8c|8c 03 20 7c) dci 1 +- 184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12 +- 188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13 +- 18c: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12 +- 190: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13 +- 194: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12 +- 198: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13 +- 19c: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12 +- 1a0: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13 +- 1a4: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5 +- 1a8: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5 +- 1ac: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12 +- 1b0: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12 +- 1b4: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 +- 1b8: (7c 83 07 74|74 07 83 7c) extsb r3,r4 +- 1bc: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4 +- 1c0: (7c 83 07 34|34 07 83 7c) extsh r3,r4 +- 1c4: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4 +- 1c8: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31 +- 1cc: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31 +- 1d0: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12 +- 1d4: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12 +- 1d8: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12 +- 1dc: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12 +- 1e0: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11 +- 1e4: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11 +- 1e8: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11 +- 1ec: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5 +- 1f0: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12 +- 1f4: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12 +- 1f8: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11 +- 1fc: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11 +- 200: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11 +- 204: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11 +- 208: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11 +- 20c: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11 +- 210: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11 +- 214: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11 +- 218: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12 +- 21c: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12 +- 220: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12 +- 224: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12 +- 228: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13 +- 22c: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13 +- 230: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13 +- 234: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13 +- 238: (fc 60 20 90|90 20 60 fc) fmr f3,f4 +- 23c: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4 +- 240: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13 +- 244: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13 +- 248: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13 +- 24c: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13 +- 250: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12 +- 254: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12 +- 258: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12 +- 25c: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12 +- 260: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30 +- 264: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30 +- 268: (fc 60 20 50|50 20 60 fc) fneg f3,f4 +- 26c: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4 +- 270: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13 +- 274: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13 +- 278: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13 +- 27c: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13 +- 280: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13 +- 284: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13 +- 288: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13 +- 28c: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13 +- 290: (fd c0 78 30|30 78 c0 fd) fre f14,f15 +- 294: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15 +- 298: (ed c0 78 30|30 78 c0 ed) fres f14,f15 +- 29c: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15 +- 2a0: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11 +- 2a4: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11 +- 2a8: (fd 40 5b 10|10 5b 40 fd) frin f10,f11 +- 2ac: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11 +- 2b0: (fd 40 5b 90|90 5b 40 fd) frip f10,f11 +- 2b4: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11 +- 2b8: (fd 40 5b 50|50 5b 40 fd) friz f10,f11 +- 2bc: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11 +- 2c0: (fc c0 38 18|18 38 c0 fc) frsp f6,f7 +- 2c4: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9 +- 2c8: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15 +- 2cc: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15 +- 2d0: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15 +- 2d4: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15 +- 2d8: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13 +- 2dc: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13 +- 2e0: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11 +- 2e4: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11 +- 2e8: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11 +- 2ec: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11 +- 2f0: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12 +- 2f4: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12 +- 2f8: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12 +- 2fc: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12 +- 300: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4 +- 304: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18 +- 308: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9 +- 30c: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15 +- 310: (7c 00 07 8c|8c 07 00 7c) iccci +- 314: (7c 00 07 8c|8c 07 00 7c) iccci +- 318: (7c 00 07 8c|8c 07 00 7c) iccci +- 31c: (7c 20 07 8c|8c 07 20 7c) ici 1 +- 320: (7c 03 27 cc|cc 27 03 7c) icread r3,r4 +- 324: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 +- 328: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28 +- 32c: (4c 00 01 2c|2c 01 00 4c) isync +- 330: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\) +- 334: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\) +- 338: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22 +- 33c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5 +- 340: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\) +- 344: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\) +- 348: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22 +- 34c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15 +- 350: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4 +- 354: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\) +- 358: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\) +- 35c: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12 +- 360: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12 +- 364: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\) +- 368: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\) +- 36c: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11 +- 370: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11 +- 374: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5 +- 378: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\) +- 37c: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\) +- 380: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24 +- 384: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25 +- 388: (b8 61 ff f0|f0 ff 61 b8) lmw r3,-16\(r1\) +- 38c: (7c a4 84 aa|aa 84 a4 7c) lswi r5,r4,16 +- 390: (7c 64 2c 2a|2a 2c 64 7c) lswx r3,r4,r5 +- 394: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 +- 398: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 +- 39c: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1 +- 3a0: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5 +- 3a4: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\) +- 3a8: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\) +- 3ac: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5 +- 3b0: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5 +- 3b4: (10 64 29 58|58 29 64 10) macchw r3,r4,r5 +- 3b8: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5 +- 3bc: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5 +- 3c0: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5 +- 3c4: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5 +- 3c8: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5 +- 3cc: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5 +- 3d0: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5 +- 3d4: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5 +- 3d8: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5 +- 3dc: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5 +- 3e0: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5 +- 3e4: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5 +- 3e8: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5 +- 3ec: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5 +- 3f0: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5 +- 3f4: (10 64 28 58|58 28 64 10) machhw r3,r4,r5 +- 3f8: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5 +- 3fc: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5 +- 400: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5 +- 404: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5 +- 408: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5 +- 40c: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5 +- 410: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5 +- 414: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5 +- 418: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5 +- 41c: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5 +- 420: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5 +- 424: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5 +- 428: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5 +- 42c: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5 +- 430: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5 +- 434: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5 +- 438: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5 +- 43c: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5 +- 440: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5 +- 444: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5 +- 448: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5 +- 44c: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5 +- 450: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5 +- 454: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5 +- 458: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5 +- 45c: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5 +- 460: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5 +- 464: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5 +- 468: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5 +- 46c: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5 +- 470: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5 +- 474: (7c 00 06 ac|ac 06 00 7c) mbar +- 478: (7c 00 06 ac|ac 06 00 7c) mbar +- 47c: (7c 20 06 ac|ac 06 20 7c) mbar 1 +- 480: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 +- 484: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 +- 488: (7d 80 04 00|00 04 80 7d) mcrxr cr3 +- 48c: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 490: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 494: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234 +- 498: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4 +- 49c: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5 +- 4a0: (ff c0 04 8e|8e 04 c0 ff) mffs f30 +- 4a4: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31 +- 4a8: (7e 60 00 a6|a6 00 60 7e) mfmsr r19 +- 4ac: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 4b0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128 +- 4b4: (7c 6c 42 a6|a6 42 6c 7c) mftb r3 +- 4b8: (7c 00 04 ac|ac 04 00 7c) msync +- 4bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 4c0: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 +- 4c4: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8 +- 4c8: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4 +- 4cc: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7 +- 4d0: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 +- 4d4: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 +- 4d8: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 +- 4dc: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 +- 4e0: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 +- 4e4: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 +- 4e8: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1 +- 4ec: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1 +- 4f0: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 +- 4f4: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 +- 4f8: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1 +- 4fc: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1 +- 500: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 504: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 508: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 50c: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1 +- 510: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 514: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 518: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 +- 51c: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1 +- 520: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 524: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 528: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3 +- 52c: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5 +- 530: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5 +- 534: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5 +- 538: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5 +- 53c: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5 +- 540: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5 +- 544: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5 +- 548: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5 +- 54c: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5 +- 550: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5 +- 554: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5 +- 558: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5 +- 55c: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5 +- 560: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5 +- 564: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5 +- 568: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5 +- 56c: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5 +- 570: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5 +- 574: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5 +- 578: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5 +- 57c: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5 +- 580: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30 +- 584: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30 +- 588: (7c 64 00 d0|d0 00 64 7c) neg r3,r4 +- 58c: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4 +- 590: (7e 11 04 d0|d0 04 11 7e) nego r16,r17 +- 594: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19 +- 598: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5 +- 59c: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5 +- 5a0: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5 +- 5a4: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5 +- 5a8: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5 +- 5ac: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5 +- 5b0: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5 +- 5b4: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5 +- 5b8: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5 +- 5bc: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5 +- 5c0: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5 +- 5c4: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5 +- 5c8: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5 +- 5cc: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5 +- 5d0: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5 +- 5d4: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5 +- 5d8: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5 +- 5dc: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5 +- 5e0: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5 +- 5e4: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5 +- 5e8: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5 +- 5ec: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5 +- 5f0: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5 +- 5f4: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5 +- 5f8: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 +- 5fc: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 +- 600: (7c 40 23 78|78 23 40 7c) or r0,r2,r4 +- 604: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16 +- 608: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17 +- 60c: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20 +- 610: (60 21 00 00|00 00 21 60) ori r1,r1,0 +- 614: (64 83 de ad|ad de 83 64) oris r3,r4,57005 +- 618: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4 +- 61c: (7c 83 01 34|34 01 83 7c) prtyw r3,r4 +- 620: (4c 00 00 66|66 00 00 4c) rfci +- 624: (4c 00 00 64|64 00 00 4c) rfi +- 628: (4c 00 00 4c|4c 00 00 4c) rfmci +- 62c: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 +- 630: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27 +- 634: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 +- 638: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 +- 63c: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 +- 640: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27 +- 644: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 +- 648: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 +- 64c: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 +- 650: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 +- 654: (44 00 00 02|02 00 00 44) sc +- 658: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5 +- 65c: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5 +- 660: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5 +- 664: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5 +- 668: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16 +- 66c: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16 +- 670: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5 +- 674: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5 +- 678: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 +- 67c: (99 61 00 02|02 00 61 99) stb r11,2\(r1\) +- 680: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\) +- 684: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15 +- 688: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5 +- 68c: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\) +- 690: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\) +- 694: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2 +- 698: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31 +- 69c: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4 +- 6a0: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\) +- 6a4: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\) +- 6a8: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28 +- 6ac: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25 +- 6b0: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\) +- 6b4: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8 +- 6b8: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\) +- 6bc: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23 +- 6c0: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14 +- 6c4: (bc c1 ff f0|f0 ff c1 bc) stmw r6,-16\(r1\) +- 6c8: (7c 64 85 aa|aa 85 64 7c) stswi r3,r4,16 +- 6cc: (7c 64 2d 2a|2a 2d 64 7c) stswx r3,r4,r5 +- 6d0: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\) +- 6d4: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5 +- 6d8: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5 +- 6dc: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\) +- 6e0: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5 +- 6e4: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5 +- 6e8: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5 +- 6ec: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5 +- 6f0: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5 +- 6f4: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5 +- 6f8: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5 +- 6fc: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5 +- 700: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5 +- 704: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5 +- 708: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5 +- 70c: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5 +- 710: (20 64 00 05|05 00 64 20) subfic r3,r4,5 +- 714: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4 +- 718: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4 +- 71c: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4 +- 720: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4 +- 724: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5 +- 728: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5 +- 72c: (7c 64 01 90|90 01 64 7c) subfze r3,r4 +- 730: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4 +- 734: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4 +- 738: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4 +- 73c: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8 +- 740: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7 +- 744: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12 +- 748: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14 +- 74c: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14 +- 750: (7c 00 04 6c|6c 04 00 7c) tlbsync +- 754: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 758: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 75c: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1 +- 760: (7f e0 00 08|08 00 e0 7f) trap +- 764: (7f e0 00 08|08 00 e0 7f) trap +- 768: (7c 83 20 08|08 20 83 7c) tweq r3,r4 +- 76c: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 +- 770: (7c 83 20 08|08 20 83 7c) tweq r3,r4 +- 774: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 +- 778: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 +- 77c: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 +- 780: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 +- 784: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 +- 788: (7c 60 01 06|06 01 60 7c) wrtee r3 +- 78c: (7c 00 81 46|46 81 00 7c) wrteei 1 +- 790: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31 +- 794: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31 +- 798: (68 83 de ad|ad de 83 68) xori r3,r4,57005 +- 79c: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005 ++.*: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5 ++.*: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5 ++.*: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5 ++.*: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5 ++.*: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5 ++.*: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5 ++.*: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5 ++.*: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5 ++.*: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5 ++.*: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5 ++.*: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128 ++.*: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128 ++.*: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128 ++.*: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128 ++.*: (7c 64 01 d4|d4 01 64 7c) addme r3,r4 ++.*: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4 ++.*: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4 ++.*: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4 ++.*: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5 ++.*: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5 ++.*: (7c 64 01 94|94 01 64 7c) addze r3,r4 ++.*: (7c 64 01 95|95 01 64 7c) addze\. r3,r4 ++.*: (7c 64 05 94|94 05 64 7c) addzeo r3,r4 ++.*: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4 ++.*: (7c 83 28 38|38 28 83 7c) and r3,r4,r5 ++.*: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5 ++.*: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15 ++.*: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18 ++.*: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005 ++.*: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005 ++.*: (48 00 00 02|02 00 00 48) ba 0 ++.*: (40 01 00 00|00 00 01 40) bdnzf gt,7c ++.*: (40 85 00 02|02 00 85 40) blea cr1,0 ++.*: (4d 80 04 20|20 04 80 4d) bltctr ++.*: (4c 8a 04 20|20 04 8a 4c) bnectr cr2 ++.*: (4c 86 04 20|20 04 86 4c) bnectr cr1 ++.*: (4c 86 04 20|20 04 86 4c) bnectr cr1 ++.*: (4d 80 04 21|21 04 80 4d) bltctrl ++.*: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2 ++.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1 ++.*: (4c 86 04 21|21 04 86 4c) bnectrl cr1 ++.*: (40 43 00 01|01 00 43 40) bdzfl so,a4 ++.*: (4d 80 00 20|20 00 80 4d) bltlr ++.*: (4c 8a 00 20|20 00 8a 4c) bnelr cr2 ++.*: (4c 86 00 20|20 00 86 4c) bnelr cr1 ++.*: (4c 86 00 20|20 00 86 4c) bnelr cr1 ++.*: (4d 80 00 21|21 00 80 4d) bltlrl ++.*: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2 ++.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1 ++.*: (4c 86 00 21|21 00 86 4c) bnelrl cr1 ++.*: (48 00 00 00|00 00 00 48) b c8 ++.*: (48 00 00 01|01 00 00 48) bl cc ++.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 ++.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 ++.*: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4 ++.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 ++.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5 ++.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 ++.*: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167 ++.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 ++.*: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4 ++.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 ++.*: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167 ++.*: (7c 03 20 40|40 20 03 7c) cmplw r3,r4 ++.*: (28 03 00 a7|a7 00 03 28) cmplwi r3,167 ++.*: (7c 03 20 00|00 20 03 7c) cmpw r3,r4 ++.*: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167 ++.*: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11 ++.*: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11 ++.*: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq ++.*: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt ++.*: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt ++.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so ++.*: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq ++.*: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so ++.*: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt ++.*: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt ++.*: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10 ++.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 ++.*: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7 ++.*: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7 ++.*: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6 ++.*: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7 ++.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 ++.*: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6 ++.*: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6 ++.*: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9 ++.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 ++.*: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7 ++.*: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7 ++.*: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12 ++.*: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2 ++.*: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6 ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 20 03 8c|8c 03 20 7c) dci 1 ++.*: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12 ++.*: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13 ++.*: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12 ++.*: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13 ++.*: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12 ++.*: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13 ++.*: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12 ++.*: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13 ++.*: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5 ++.*: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5 ++.*: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12 ++.*: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12 ++.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 ++.*: (7c 83 07 74|74 07 83 7c) extsb r3,r4 ++.*: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4 ++.*: (7c 83 07 34|34 07 83 7c) extsh r3,r4 ++.*: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4 ++.*: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31 ++.*: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31 ++.*: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12 ++.*: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12 ++.*: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12 ++.*: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12 ++.*: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11 ++.*: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11 ++.*: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11 ++.*: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5 ++.*: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12 ++.*: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12 ++.*: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11 ++.*: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11 ++.*: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11 ++.*: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11 ++.*: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11 ++.*: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11 ++.*: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11 ++.*: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11 ++.*: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12 ++.*: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12 ++.*: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12 ++.*: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12 ++.*: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13 ++.*: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13 ++.*: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13 ++.*: (fc 60 20 90|90 20 60 fc) fmr f3,f4 ++.*: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4 ++.*: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13 ++.*: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13 ++.*: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13 ++.*: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13 ++.*: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12 ++.*: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12 ++.*: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12 ++.*: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12 ++.*: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30 ++.*: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30 ++.*: (fc 60 20 50|50 20 60 fc) fneg f3,f4 ++.*: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4 ++.*: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13 ++.*: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13 ++.*: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13 ++.*: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13 ++.*: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13 ++.*: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13 ++.*: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13 ++.*: (fd c0 78 30|30 78 c0 fd) fre f14,f15 ++.*: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15 ++.*: (ed c0 78 30|30 78 c0 ed) fres f14,f15 ++.*: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15 ++.*: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11 ++.*: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11 ++.*: (fd 40 5b 10|10 5b 40 fd) frin f10,f11 ++.*: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11 ++.*: (fd 40 5b 90|90 5b 40 fd) frip f10,f11 ++.*: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11 ++.*: (fd 40 5b 50|50 5b 40 fd) friz f10,f11 ++.*: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11 ++.*: (fc c0 38 18|18 38 c0 fc) frsp f6,f7 ++.*: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9 ++.*: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15 ++.*: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15 ++.*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15 ++.*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15 ++.*: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13 ++.*: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13 ++.*: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11 ++.*: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11 ++.*: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11 ++.*: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11 ++.*: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12 ++.*: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12 ++.*: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12 ++.*: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12 ++.*: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4 ++.*: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18 ++.*: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9 ++.*: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15 ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 20 07 8c|8c 07 20 7c) ici 1 ++.*: (7c 03 27 cc|cc 27 03 7c) icread r3,r4 ++.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 ++.*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28 ++.*: (4c 00 01 2c|2c 01 00 4c) isync ++.*: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\) ++.*: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\) ++.*: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22 ++.*: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5 ++.*: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\) ++.*: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\) ++.*: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22 ++.*: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15 ++.*: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4 ++.*: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\) ++.*: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\) ++.*: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12 ++.*: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12 ++.*: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\) ++.*: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\) ++.*: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11 ++.*: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11 ++.*: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5 ++.*: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\) ++.*: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\) ++.*: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24 ++.*: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25 ++.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 ++.*: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5 ++.*: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1 ++.*: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5 ++.*: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\) ++.*: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\) ++.*: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5 ++.*: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5 ++.*: (10 64 29 58|58 29 64 10) macchw r3,r4,r5 ++.*: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5 ++.*: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5 ++.*: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5 ++.*: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5 ++.*: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5 ++.*: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5 ++.*: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5 ++.*: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5 ++.*: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5 ++.*: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5 ++.*: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5 ++.*: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5 ++.*: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5 ++.*: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5 ++.*: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5 ++.*: (10 64 28 58|58 28 64 10) machhw r3,r4,r5 ++.*: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5 ++.*: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5 ++.*: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5 ++.*: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5 ++.*: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5 ++.*: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5 ++.*: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5 ++.*: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5 ++.*: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5 ++.*: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5 ++.*: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5 ++.*: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5 ++.*: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5 ++.*: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5 ++.*: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5 ++.*: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5 ++.*: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5 ++.*: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5 ++.*: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5 ++.*: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5 ++.*: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5 ++.*: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5 ++.*: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5 ++.*: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5 ++.*: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5 ++.*: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5 ++.*: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5 ++.*: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5 ++.*: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5 ++.*: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5 ++.*: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5 ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 20 06 ac|ac 06 20 7c) mbar 1 ++.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 ++.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 ++.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234 ++.*: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4 ++.*: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5 ++.*: (ff c0 04 8e|8e 04 c0 ff) mffs f30 ++.*: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31 ++.*: (7e 60 00 a6|a6 00 60 7e) mfmsr r19 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128 ++.*: (7c 6c 42 a6|a6 42 6c 7c) mftb r3 ++.*: (7c 00 04 ac|ac 04 00 7c) msync ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 ++.*: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8 ++.*: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4 ++.*: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7 ++.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 ++.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 ++.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 ++.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 ++.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 ++.*: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10 ++.*: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1 ++.*: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1 ++.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 ++.*: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11 ++.*: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1 ++.*: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15 ++.*: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3 ++.*: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5 ++.*: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5 ++.*: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5 ++.*: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5 ++.*: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5 ++.*: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5 ++.*: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5 ++.*: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5 ++.*: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5 ++.*: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5 ++.*: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5 ++.*: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5 ++.*: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5 ++.*: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5 ++.*: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5 ++.*: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5 ++.*: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5 ++.*: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5 ++.*: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5 ++.*: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5 ++.*: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5 ++.*: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30 ++.*: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30 ++.*: (7c 64 00 d0|d0 00 64 7c) neg r3,r4 ++.*: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4 ++.*: (7e 11 04 d0|d0 04 11 7e) nego r16,r17 ++.*: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19 ++.*: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5 ++.*: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5 ++.*: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5 ++.*: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5 ++.*: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5 ++.*: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5 ++.*: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5 ++.*: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5 ++.*: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5 ++.*: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5 ++.*: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5 ++.*: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5 ++.*: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5 ++.*: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5 ++.*: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5 ++.*: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5 ++.*: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5 ++.*: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5 ++.*: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5 ++.*: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5 ++.*: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5 ++.*: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5 ++.*: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5 ++.*: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5 ++.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 ++.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 ++.*: (7c 40 23 78|78 23 40 7c) or r0,r2,r4 ++.*: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16 ++.*: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17 ++.*: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20 ++.*: (60 21 00 00|00 00 21 60) ori r1,r1,0 ++.*: (64 83 de ad|ad de 83 64) oris r3,r4,57005 ++.*: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4 ++.*: (7c 83 01 34|34 01 83 7c) prtyw r3,r4 ++.*: (4c 00 00 66|66 00 00 4c) rfci ++.*: (4c 00 00 64|64 00 00 4c) rfi ++.*: (4c 00 00 4c|4c 00 00 4c) rfmci ++.*: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27 ++.*: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27 ++.*: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27 ++.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 ++.*: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19 ++.*: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27 ++.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 ++.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 ++.*: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5 ++.*: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5 ++.*: (44 00 00 02|02 00 00 44) sc ++.*: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5 ++.*: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5 ++.*: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5 ++.*: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5 ++.*: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16 ++.*: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16 ++.*: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5 ++.*: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5 ++.*: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31 ++.*: (99 61 00 02|02 00 61 99) stb r11,2\(r1\) ++.*: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\) ++.*: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15 ++.*: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5 ++.*: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\) ++.*: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\) ++.*: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2 ++.*: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31 ++.*: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4 ++.*: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\) ++.*: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\) ++.*: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28 ++.*: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25 ++.*: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\) ++.*: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8 ++.*: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\) ++.*: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23 ++.*: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14 ++.*: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\) ++.*: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5 ++.*: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5 ++.*: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\) ++.*: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5 ++.*: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5 ++.*: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5 ++.*: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5 ++.*: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5 ++.*: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5 ++.*: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5 ++.*: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5 ++.*: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5 ++.*: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5 ++.*: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5 ++.*: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5 ++.*: (20 64 00 05|05 00 64 20) subfic r3,r4,5 ++.*: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4 ++.*: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4 ++.*: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4 ++.*: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4 ++.*: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5 ++.*: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5 ++.*: (7c 64 01 90|90 01 64 7c) subfze r3,r4 ++.*: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4 ++.*: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4 ++.*: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4 ++.*: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8 ++.*: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7 ++.*: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12 ++.*: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14 ++.*: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14 ++.*: (7c 00 04 6c|6c 04 00 7c) tlbsync ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1 ++.*: (7f e0 00 08|08 00 e0 7f) trap ++.*: (7f e0 00 08|08 00 e0 7f) trap ++.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4 ++.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 ++.*: (7c 83 20 08|08 20 83 7c) tweq r3,r4 ++.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 ++.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 ++.*: (0d 03 00 0f|0f 00 03 0d) twgti r3,15 ++.*: (7c a3 20 08|08 20 a3 7c) twlge r3,r4 ++.*: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15 ++.*: (7c 60 01 06|06 01 60 7c) wrtee r3 ++.*: (7c 00 81 46|46 81 00 7c) wrteei 1 ++.*: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31 ++.*: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31 ++.*: (68 83 de ad|ad de 83 68) xori r3,r4,57005 ++.*: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005 +diff -rup binutils.orig/gas/testsuite/gas/ppc/476.s binutils-2.35.1/gas/testsuite/gas/ppc/476.s +--- binutils.orig/gas/testsuite/gas/ppc/476.s 2020-10-08 13:50:31.310909797 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/476.s 2020-10-08 13:51:29.102731857 +0100 +@@ -226,9 +226,6 @@ ppc476: + lhzu 14,2(1) + lhzux 20,22,24 + lhzx 23,24,25 +- lmw 3,-16(1) +- lswi 5,4,16 +- lswx 3,4,5 + lwarx 3,4,5 + lwarx 3,4,5,0 + lwarx 3,4,5,1 +@@ -433,9 +430,6 @@ ppc476: + sthu 18,12(1) + sthux 21,22,23 + sthx 12,13,14 +- stmw 6,-16(1) +- stswi 3,4,16 +- stswx 3,4,5 + stw 6,-16(7) + stwbrx 3,4,5 + stwcx. 3,4,5 +diff -rup binutils.orig/gas/testsuite/gas/ppc/a2.d binutils-2.35.1/gas/testsuite/gas/ppc/a2.d +--- binutils.orig/gas/testsuite/gas/ppc/a2.d 2020-10-08 13:50:31.314909784 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/a2.d 2020-10-08 13:51:29.102731857 +0100 +@@ -9,577 +9,569 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6 +- 4: (7c 85 32 14|14 32 85 7c) add r4,r5,r6 +- 8: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6 +- c: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6 +- 10: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6 +- 14: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6 +- 18: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6 +- 1c: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6 +- 20: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6 +- 24: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6 +- 28: (38 85 00 0d|0d 00 85 38) addi r4,r5,13 +- 2c: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13 +- 30: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13 +- 34: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13 +- 38: (30 85 00 0d|0d 00 85 30) addic r4,r5,13 +- 3c: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13 +- 40: (3c 85 00 17|17 00 85 3c) addis r4,r5,23 +- 44: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23 +- 48: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5 +- 4c: (7c 85 01 d4|d4 01 85 7c) addme r4,r5 +- 50: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5 +- 54: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5 +- 58: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6 +- 5c: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6 +- 60: (7c 85 01 95|95 01 85 7c) addze\. r4,r5 +- 64: (7c 85 01 94|94 01 85 7c) addze r4,r5 +- 68: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5 +- 6c: (7c 85 05 94|94 05 85 7c) addzeo r4,r5 +- 70: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6 +- 74: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6 +- 78: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6 +- 7c: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6 +- 80: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6 +- 84: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6 +- 88: (00 00 02 00|00 02 00 00) attn +- 8c: (48 00 00 02|02 00 00 48) ba 0 +- 8c: R_PPC(|64)_ADDR24 label_abs +- 90: (40 8a 00 00|00 00 8a 40) bne cr2,90 +- 90: R_PPC(|64)_REL14 foo +- 94: (40 ca 00 00|00 00 ca 40) bne- cr2,94 +- 94: R_PPC(|64)_REL14 foo +- 98: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 +- 98: R_PPC(|64)_REL14 foo +- 9c: (40 85 00 02|02 00 85 40) blea cr1,0 +- 9c: R_PPC(|64)_ADDR14 foo_abs +- a0: (40 c5 00 02|02 00 c5 40) blea- cr1,0 +- a0: R_PPC(|64)_ADDR14 foo_abs +- a4: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 +- a4: R_PPC(|64)_ADDR14 foo_abs +- a8: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1 +- ac: (4c c6 04 20|20 04 c6 4c) bnectr- cr1 +- b0: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1 +- b4: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1 +- b8: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1 +- bc: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1 +- c0: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 +- c0: R_PPC(|64)_REL14 foo +- c4: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 +- c4: R_PPC(|64)_REL14 foo +- c8: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 +- c8: R_PPC(|64)_REL14 foo +- cc: (40 85 00 03|03 00 85 40) blela cr1,0 +- cc: R_PPC(|64)_ADDR14 foo_abs +- d0: (40 c5 00 03|03 00 c5 40) blela- cr1,0 +- d0: R_PPC(|64)_ADDR14 foo_abs +- d4: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 +- d4: R_PPC(|64)_ADDR14 foo_abs +- d8: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1 +- dc: (4c c6 00 20|20 00 c6 4c) bnelr- cr1 +- e0: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1 +- e4: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1 +- e8: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1 +- ec: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1 +- f0: (48 00 00 00|00 00 00 48) b f0 +- f0: R_PPC(|64)_REL24 label +- f4: (48 00 00 03|03 00 00 48) bla 0 +- f4: R_PPC(|64)_ADDR24 label_abs +- f8: (48 00 00 01|01 00 00 48) bl f8 +- f8: R_PPC(|64)_REL24 label +- fc: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12 +- 100: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8 +- 104: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12 +- 108: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13 +- 10c: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13 +- 110: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8 +- 114: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100 +- 118: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21 +- 11c: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21 +- 120: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21 +- 124: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21 +- 128: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so +- 12c: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so +- 130: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so +- 134: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so +- 138: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so +- 13c: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so +- 140: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so +- 144: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so +- 148: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11 +- 14c: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11 +- 150: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11 +- 154: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11 +- 158: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11 +- 15c: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11 +- 160: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11 +- 164: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11 +- 168: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11 +- 16c: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11 +- 170: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11 +- 174: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12 +- 178: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11 +- 17c: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11 +- 180: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11 +- 184: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11 +- 188: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12 +- 18c: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11 +- 190: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11 +- 194: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11 +- 198: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11 +- 19c: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a0: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a4: (7c 00 03 8c|8c 03 00 7c) dccci +- 1a8: (7d 40 03 8c|8c 03 40 7d) dci 10 +- 1ac: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22 +- 1b0: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22 +- 1b4: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22 +- 1b8: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22 +- 1bc: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22 +- 1c0: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22 +- 1c4: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22 +- 1c8: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22 +- 1cc: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22 +- 1d0: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22 +- 1d4: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22 +- 1d8: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22 +- 1dc: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22 +- 1e0: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22 +- 1e4: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22 +- 1e8: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22 +- 1ec: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22 +- 1f0: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22 +- 1f4: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11 +- 1f8: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11 +- 1fc: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11 +- 200: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12 +- 204: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0 +- 208: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3 +- 20c: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12 +- 210: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12 +- 214: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0 +- 218: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3 +- 21c: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11 +- 220: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11 +- 224: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11 +- 228: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11 +- 22c: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11 +- 230: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11 +- 234: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21 +- 238: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21 +- 23c: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22 +- 240: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22 +- 244: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22 +- 248: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22 +- 24c: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21 +- 250: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21 +- 254: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21 +- 258: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21 +- 25c: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21 +- 260: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21 +- 264: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22 +- 268: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22 +- 26c: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21 +- 270: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21 +- 274: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21 +- 278: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21 +- 27c: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21 +- 280: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21 +- 284: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21 +- 288: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21 +- 28c: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22 +- 290: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22 +- 294: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22 +- 298: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22 +- 29c: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23 +- 2a0: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23 +- 2a4: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23 +- 2a8: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23 +- 2ac: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21 +- 2b0: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21 +- 2b4: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23 +- 2b8: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23 +- 2bc: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23 +- 2c0: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23 +- 2c4: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22 +- 2c8: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22 +- 2cc: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22 +- 2d0: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22 +- 2d4: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21 +- 2d8: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21 +- 2dc: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21 +- 2e0: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21 +- 2e4: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23 +- 2e8: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23 +- 2ec: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23 +- 2f0: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23 +- 2f4: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23 +- 2f8: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23 +- 2fc: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23 +- 300: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23 +- 304: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 +- 308: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 +- 30c: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 +- 310: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 +- 314: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1 +- 318: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1 +- 31c: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 +- 320: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 +- 324: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 +- 328: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 +- 32c: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1 +- 330: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1 +- 334: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21 +- 338: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21 +- 33c: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21 +- 340: (fe 80 ab 10|10 ab 80 fe) frin f20,f21 +- 344: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21 +- 348: (fe 80 ab 90|90 ab 80 fe) frip f20,f21 +- 34c: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21 +- 350: (fe 80 ab 50|50 ab 80 fe) friz f20,f21 +- 354: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21 +- 358: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21 +- 35c: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 +- 360: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 +- 364: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 +- 368: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 +- 36c: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1 +- 370: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1 +- 374: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 +- 378: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 +- 37c: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 +- 380: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 +- 384: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1 +- 388: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1 +- 38c: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23 +- 390: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23 +- 394: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21 +- 398: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21 +- 39c: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21 +- 3a0: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21 +- 3a4: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22 +- 3a8: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22 +- 3ac: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22 +- 3b0: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22 +- 3b4: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11 +- 3b8: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11 +- 3bc: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11 +- 3c0: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11 +- 3c4: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11 +- 3c8: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11 +- 3cc: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d0: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d4: (7c 00 07 8c|8c 07 00 7c) iccci +- 3d8: (7d 40 07 8c|8c 07 40 7d) ici 10 +- 3dc: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12 +- 3e0: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12 +- 3e4: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23 +- 3e8: (4c 00 01 2c|2c 01 00 4c) isync +- 3ec: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12 +- 3f0: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\) +- 3f4: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\) +- 3f8: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\) +- 3fc: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\) +- 400: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13 +- 404: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13 +- 408: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\) +- 40c: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\) +- 410: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12 +- 414: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1 +- 418: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12 +- 41c: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12 +- 420: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\) +- 424: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\) +- 428: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12 +- 42c: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12 +- 430: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\) +- 434: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\) +- 438: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11 +- 43c: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\) +- 440: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\) +- 444: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11 +- 448: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11 +- 44c: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11 +- 450: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11 +- 454: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\) +- 458: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\) +- 45c: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\) +- 460: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\) +- 464: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11 +- 468: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11 +- 46c: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\) +- 470: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\) +- 474: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12 +- 478: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12 +- 47c: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12 +- 480: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12 +- 484: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\) +- 488: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\) +- 48c: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\) +- 490: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\) +- 494: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12 +- 498: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12 +- 49c: (ba 8a 00 10|10 00 8a ba) lmw r20,16\(r10\) +- 4a0: (7d 4b 0c aa|aa 0c 4b 7d) lswi r10,r11,1 +- 4a4: (7d 8b 04 aa|aa 04 8b 7d) lswi r12,r11,32 +- 4a8: (7d 4b 64 2a|2a 64 4b 7d) lswx r10,r11,r12 +- 4ac: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\) +- 4b0: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\) +- 4b4: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12 +- 4b8: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1 +- 4bc: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12 +- 4c0: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12 +- 4c4: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12 +- 4c8: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12 +- 4cc: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\) +- 4d0: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\) +- 4d4: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\) +- 4d8: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\) +- 4dc: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12 +- 4e0: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12 +- 4e4: (7c 00 06 ac|ac 06 00 7c) mbar +- 4e8: (7c 00 06 ac|ac 06 00 7c) mbar +- 4ec: (7c 00 06 ac|ac 06 00 7c) mbar +- 4f0: (7c 20 06 ac|ac 06 20 7c) mbar 1 +- 4f4: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 +- 4f8: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 +- 4fc: (7c 00 04 00|00 04 00 7c) mcrxr cr0 +- 500: (7d 80 04 00|00 04 80 7d) mcrxr cr3 +- 504: (7c 60 00 26|26 00 60 7c) mfcr r3 +- 508: (7c 70 20 26|26 20 70 7c) mfocrf r3,2 +- 50c: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 +- 510: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 514: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234 +- 518: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234 +- 51c: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11 +- 520: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11 +- 524: (fe 80 04 8f|8f 04 80 fe) mffs\. f20 +- 528: (fe 80 04 8e|8e 04 80 fe) mffs f20 +- 52c: (7d 40 00 a6|a6 00 40 7d) mfmsr r10 +- 530: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 +- 534: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 +- 538: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234 +- 53c: (7d 4c 42 a6|a6 42 4c 7d) mftb r10 +- 540: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10 +- 544: (7c 00 51 dc|dc 51 00 7c) msgclr r10 +- 548: (7c 00 51 9c|9c 51 00 7c) msgsnd r10 +- 54c: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3 +- 550: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 +- 554: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 558: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 +- 55c: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10 +- 560: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10 +- 564: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11 +- 568: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11 +- 56c: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 +- 570: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 +- 574: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 +- 578: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 +- 57c: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 +- 580: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 +- 584: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 +- 588: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 +- 58c: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1 +- 590: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1 +- 594: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0 +- 598: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 +- 59c: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13 +- 5a0: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13 +- 5a4: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1 +- 5a8: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1 +- 5ac: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 5b0: (7d 40 01 24|24 01 40 7d) mtmsr r10 +- 5b4: (7d 41 01 24|24 01 41 7d) mtmsr r10,1 +- 5b8: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 +- 5bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 +- 5c0: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10 +- 5c4: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22 +- 5c8: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22 +- 5cc: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22 +- 5d0: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22 +- 5d4: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22 +- 5d8: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22 +- 5dc: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22 +- 5e0: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22 +- 5e4: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22 +- 5e8: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22 +- 5ec: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22 +- 5f0: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22 +- 5f4: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100 +- 5f8: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100 +- 5fc: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22 +- 600: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22 +- 604: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22 +- 608: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22 +- 60c: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22 +- 610: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22 +- 614: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21 +- 618: (7e 95 00 d0|d0 00 95 7e) neg r20,r21 +- 61c: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21 +- 620: (7e 95 04 d0|d0 04 95 7e) nego r20,r21 +- 624: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 +- 628: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 +- 62c: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22 +- 630: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22 +- 634: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22 +- 638: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22 +- 63c: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096 +- 640: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096 +- 644: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11 +- 648: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11 +- 64c: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11 +- 650: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11 +- 654: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11 +- 658: (4c 00 00 66|66 00 00 4c) rfci +- 65c: (4c 00 00 cc|cc 00 00 4c) rfgi +- 660: (4c 00 00 64|64 00 00 4c) rfi +- 664: (4c 00 00 4c|4c 00 00 4c) rfmci +- 668: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63 +- 66c: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63 +- 670: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63 +- 674: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63 +- 678: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63 +- 67c: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63 +- 680: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63 +- 684: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63 +- 688: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63 +- 68c: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63 +- 690: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63 +- 694: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63 +- 698: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31 +- 69c: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31 +- 6a0: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23 +- 6a4: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23 +- 6a8: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23 +- 6ac: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23 +- 6b0: (44 00 00 02|02 00 00 44) sc +- 6b4: (44 00 0c 82|82 0c 00 44) sc 100 +- 6b8: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12 +- 6bc: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12 +- 6c0: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12 +- 6c4: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12 +- 6c8: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12 +- 6cc: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12 +- 6d0: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63 +- 6d4: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63 +- 6d8: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12 +- 6dc: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12 +- 6e0: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31 +- 6e4: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31 +- 6e8: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12 +- 6ec: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12 +- 6f0: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12 +- 6f4: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12 +- 6f8: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\) +- 6fc: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\) +- 700: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12 +- 704: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\) +- 708: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\) +- 70c: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12 +- 710: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12 +- 714: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\) +- 718: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\) +- 71c: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12 +- 720: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12 +- 724: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12 +- 728: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\) +- 72c: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\) +- 730: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12 +- 734: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12 +- 738: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\) +- 73c: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\) +- 740: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11 +- 744: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\) +- 748: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\) +- 74c: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11 +- 750: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11 +- 754: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11 +- 758: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\) +- 75c: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\) +- 760: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\) +- 764: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\) +- 768: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11 +- 76c: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11 +- 770: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\) +- 774: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\) +- 778: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\) +- 77c: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\) +- 780: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12 +- 784: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12 +- 788: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\) +- 78c: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\) +- 790: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12 +- 794: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12 +- 798: (be 8a 00 10|10 00 8a be) stmw r20,16\(r10\) +- 79c: (7d 4b 0d aa|aa 0d 4b 7d) stswi r10,r11,1 +- 7a0: (7d 4b 05 aa|aa 05 4b 7d) stswi r10,r11,32 +- 7a4: (7d 4b 65 2a|2a 65 4b 7d) stswx r10,r11,r12 +- 7a8: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12 +- 7ac: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12 +- 7b0: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12 +- 7b4: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\) +- 7b8: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\) +- 7bc: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12 +- 7c0: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12 +- 7c4: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22 +- 7c8: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22 +- 7cc: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22 +- 7d0: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22 +- 7d4: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22 +- 7d8: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22 +- 7dc: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22 +- 7e0: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22 +- 7e4: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22 +- 7e8: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22 +- 7ec: (22 95 00 64|64 00 95 22) subfic r20,r21,100 +- 7f0: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100 +- 7f4: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21 +- 7f8: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21 +- 7fc: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21 +- 800: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21 +- 804: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22 +- 808: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22 +- 80c: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21 +- 810: (7e 95 01 90|90 01 95 7e) subfze r20,r21 +- 814: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21 +- 818: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21 +- 81c: (7c 00 04 ac|ac 04 00 7c) hwsync +- 820: (7c 00 04 ac|ac 04 00 7c) hwsync +- 824: (7c 00 04 ac|ac 04 00 7c) hwsync +- 828: (7c 20 04 ac|ac 04 20 7c) lwsync +- 82c: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11 +- 830: (08 aa 00 64|64 00 aa 08) tdlgei r10,100 +- 834: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100 +- 838: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11 +- 83c: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11 +- 840: (7c 00 07 64|64 07 00 7c) tlbre +- 844: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7 +- 848: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11 +- 84c: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12 +- 850: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12 +- 854: (7c 00 04 6c|6c 04 00 7c) tlbsync +- 858: (7c 00 07 a4|a4 07 00 7c) tlbwe +- 85c: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7 +- 860: (7c aa 58 08|08 58 aa 7c) twlge r10,r11 +- 864: (0c aa 00 64|64 00 aa 0c) twlgei r10,100 +- 868: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100 +- 86c: (7c 00 00 7c|7c 00 00 7c) wait +- 870: (7c 00 00 7c|7c 00 00 7c) wait +- 874: (7c 20 00 7c|7c 00 20 7c) waitrsv +- 878: (7c 40 00 7c|7c 00 40 7c) waitimpl +- 87c: (7c 40 00 7c|7c 00 40 7c) waitimpl +- 880: (7c 20 00 7c|7c 00 20 7c) waitrsv +- 884: (7c 00 01 6c|6c 01 00 7c) wchkall +- 888: (7c 00 01 6c|6c 01 00 7c) wchkall +- 88c: (7d 80 01 6c|6c 01 80 7d) wchkall cr3 +- 890: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11 +- 894: (7c 20 07 4c|4c 07 20 7c) wclrall 1 +- 898: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11 +- 89c: (7d 40 01 06|06 01 40 7d) wrtee r10 +- 8a0: (7c 00 81 46|46 81 00 7c) wrteei 1 +- 8a4: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12 +- 8a8: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12 +- 8ac: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096 +- 8b0: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096 ++.*: (7c 85 32 15|15 32 85 7c) add\. r4,r5,r6 ++.*: (7c 85 32 14|14 32 85 7c) add r4,r5,r6 ++.*: (7c 85 30 15|15 30 85 7c) addc\. r4,r5,r6 ++.*: (7c 85 30 14|14 30 85 7c) addc r4,r5,r6 ++.*: (7c 85 34 15|15 34 85 7c) addco\. r4,r5,r6 ++.*: (7c 85 34 14|14 34 85 7c) addco r4,r5,r6 ++.*: (7c 85 31 15|15 31 85 7c) adde\. r4,r5,r6 ++.*: (7c 85 31 14|14 31 85 7c) adde r4,r5,r6 ++.*: (7c 85 35 15|15 35 85 7c) addeo\. r4,r5,r6 ++.*: (7c 85 35 14|14 35 85 7c) addeo r4,r5,r6 ++.*: (38 85 00 0d|0d 00 85 38) addi r4,r5,13 ++.*: (38 85 ff f3|f3 ff 85 38) addi r4,r5,-13 ++.*: (34 85 00 0d|0d 00 85 34) addic\. r4,r5,13 ++.*: (34 85 ff f3|f3 ff 85 34) addic\. r4,r5,-13 ++.*: (30 85 00 0d|0d 00 85 30) addic r4,r5,13 ++.*: (30 85 ff f3|f3 ff 85 30) addic r4,r5,-13 ++.*: (3c 85 00 17|17 00 85 3c) addis r4,r5,23 ++.*: (3c 85 ff e9|e9 ff 85 3c) addis r4,r5,-23 ++.*: (7c 85 01 d5|d5 01 85 7c) addme\. r4,r5 ++.*: (7c 85 01 d4|d4 01 85 7c) addme r4,r5 ++.*: (7c 85 05 d5|d5 05 85 7c) addmeo\. r4,r5 ++.*: (7c 85 05 d4|d4 05 85 7c) addmeo r4,r5 ++.*: (7c 85 36 15|15 36 85 7c) addo\. r4,r5,r6 ++.*: (7c 85 36 14|14 36 85 7c) addo r4,r5,r6 ++.*: (7c 85 01 95|95 01 85 7c) addze\. r4,r5 ++.*: (7c 85 01 94|94 01 85 7c) addze r4,r5 ++.*: (7c 85 05 95|95 05 85 7c) addzeo\. r4,r5 ++.*: (7c 85 05 94|94 05 85 7c) addzeo r4,r5 ++.*: (7c a4 30 39|39 30 a4 7c) and\. r4,r5,r6 ++.*: (7c a4 30 38|38 30 a4 7c) and r4,r5,r6 ++.*: (7c a4 30 79|79 30 a4 7c) andc\. r4,r5,r6 ++.*: (7c a4 30 78|78 30 a4 7c) andc r4,r5,r6 ++.*: (70 a4 00 06|06 00 a4 70) andi\. r4,r5,6 ++.*: (74 a4 00 06|06 00 a4 74) andis\. r4,r5,6 ++.*: (00 00 02 00|00 02 00 00) attn ++.*: (48 00 00 02|02 00 00 48) ba 0 ++.*: R_PPC(|64)_ADDR24 label_abs ++.*: (40 8a 00 00|00 00 8a 40) bne cr2,90 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ca 00 00|00 00 ca 40) bne- cr2,94 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ea 00 00|00 00 ea 40) bne\+ cr2,98 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 85 00 02|02 00 85 40) blea cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 c5 00 02|02 00 c5 40) blea- cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 e5 00 02|02 00 e5 40) blea\+ cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (4c 86 0c 20|20 0c 86 4c) bcctr 4,4\*cr1\+eq,1 ++.*: (4c c6 04 20|20 04 c6 4c) bnectr- cr1 ++.*: (4c e6 04 20|20 04 e6 4c) bnectr\+ cr1 ++.*: (4c 86 0c 21|21 0c 86 4c) bcctrl 4,4\*cr1\+eq,1 ++.*: (4c c6 04 21|21 04 c6 4c) bnectrl- cr1 ++.*: (4c e6 04 21|21 04 e6 4c) bnectrl\+ cr1 ++.*: (40 8a 00 01|01 00 8a 40) bnel cr2,c0 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ca 00 01|01 00 ca 40) bnel- cr2,c4 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 ea 00 01|01 00 ea 40) bnel\+ cr2,c8 ++.*: R_PPC(|64)_REL14 foo ++.*: (40 85 00 03|03 00 85 40) blela cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 c5 00 03|03 00 c5 40) blela- cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (40 e5 00 03|03 00 e5 40) blela\+ cr1,0 ++.*: R_PPC(|64)_ADDR14 foo_abs ++.*: (4c 86 08 20|20 08 86 4c) bclr 4,4\*cr1\+eq,1 ++.*: (4c c6 00 20|20 00 c6 4c) bnelr- cr1 ++.*: (4c e6 00 20|20 00 e6 4c) bnelr\+ cr1 ++.*: (4c 86 08 21|21 08 86 4c) bclrl 4,4\*cr1\+eq,1 ++.*: (4c c6 00 21|21 00 c6 4c) bnelrl- cr1 ++.*: (4c e6 00 21|21 00 e6 4c) bnelrl\+ cr1 ++.*: (48 00 00 00|00 00 00 48) b f0 ++.*: R_PPC(|64)_REL24 label ++.*: (48 00 00 03|03 00 00 48) bla 0 ++.*: R_PPC(|64)_ADDR24 label_abs ++.*: (48 00 00 01|01 00 00 48) bl f8 ++.*: R_PPC(|64)_REL24 label ++.*: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12 ++.*: (7c a7 40 00|00 40 a7 7c) cmpd cr1,r7,r8 ++.*: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12 ++.*: (2c aa 00 0d|0d 00 aa 2c) cmpdi cr1,r10,13 ++.*: (2c aa ff f3|f3 ff aa 2c) cmpdi cr1,r10,-13 ++.*: (7c a7 40 40|40 40 a7 7c) cmpld cr1,r7,r8 ++.*: (28 aa 00 64|64 00 aa 28) cmpldi cr1,r10,100 ++.*: (7e b4 00 75|75 00 b4 7e) cntlzd\. r20,r21 ++.*: (7e b4 00 74|74 00 b4 7e) cntlzd r20,r21 ++.*: (7e b4 00 35|35 00 b4 7e) cntlzw\. r20,r21 ++.*: (7e b4 00 34|34 00 b4 7e) cntlzw r20,r21 ++.*: (4c 22 1a 02|02 1a 22 4c) crand gt,eq,so ++.*: (4c 22 19 02|02 19 22 4c) crandc gt,eq,so ++.*: (4c 22 1a 42|42 1a 22 4c) creqv gt,eq,so ++.*: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so ++.*: (4c 22 18 42|42 18 22 4c) crnor gt,eq,so ++.*: (4c 22 1b 82|82 1b 22 4c) cror gt,eq,so ++.*: (4c 22 1b 42|42 1b 22 4c) crorc gt,eq,so ++.*: (4c 22 19 82|82 19 22 4c) crxor gt,eq,so ++.*: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11 ++.*: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11 ++.*: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11 ++.*: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11 ++.*: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11 ++.*: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11 ++.*: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11 ++.*: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11 ++.*: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11 ++.*: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11 ++.*: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11 ++.*: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12 ++.*: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11 ++.*: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11 ++.*: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11 ++.*: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11 ++.*: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12 ++.*: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11 ++.*: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11 ++.*: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11 ++.*: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11 ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7c 00 03 8c|8c 03 00 7c) dccci ++.*: (7d 40 03 8c|8c 03 40 7d) dci 10 ++.*: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22 ++.*: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22 ++.*: (7e 95 b7 d3|d3 b7 95 7e) divdo\. r20,r21,r22 ++.*: (7e 95 b7 d2|d2 b7 95 7e) divdo r20,r21,r22 ++.*: (7e 95 b3 93|93 b3 95 7e) divdu\. r20,r21,r22 ++.*: (7e 95 b3 92|92 b3 95 7e) divdu r20,r21,r22 ++.*: (7e 95 b7 93|93 b7 95 7e) divduo\. r20,r21,r22 ++.*: (7e 95 b7 92|92 b7 95 7e) divduo r20,r21,r22 ++.*: (7e 95 b3 d7|d7 b3 95 7e) divw\. r20,r21,r22 ++.*: (7e 95 b3 d6|d6 b3 95 7e) divw r20,r21,r22 ++.*: (7e 95 b7 d7|d7 b7 95 7e) divwo\. r20,r21,r22 ++.*: (7e 95 b7 d6|d6 b7 95 7e) divwo r20,r21,r22 ++.*: (7e 95 b3 97|97 b3 95 7e) divwu\. r20,r21,r22 ++.*: (7e 95 b3 96|96 b3 95 7e) divwu r20,r21,r22 ++.*: (7e 95 b7 97|97 b7 95 7e) divwuo\. r20,r21,r22 ++.*: (7e 95 b7 96|96 b7 95 7e) divwuo r20,r21,r22 ++.*: (7e b4 b2 39|39 b2 b4 7e) eqv\. r20,r21,r22 ++.*: (7e b4 b2 38|38 b2 b4 7e) eqv r20,r21,r22 ++.*: (7c 0a 58 66|66 58 0a 7c) eratilx 0,r10,r11 ++.*: (7c 2a 58 66|66 58 2a 7c) eratilx 1,r10,r11 ++.*: (7c ea 58 66|66 58 ea 7c) eratilx 7,r10,r11 ++.*: (7d 4b 66 66|66 66 4b 7d) erativax r10,r11,r12 ++.*: (7d 4b 01 66|66 01 4b 7d) eratre r10,r11,0 ++.*: (7d 4b 19 66|66 19 4b 7d) eratre r10,r11,3 ++.*: (7d 4b 61 27|27 61 4b 7d) eratsx\. r10,r11,r12 ++.*: (7d 4b 61 26|26 61 4b 7d) eratsx r10,r11,r12 ++.*: (7d 4b 01 a6|a6 01 4b 7d) eratwe r10,r11,0 ++.*: (7d 4b 19 a6|a6 19 4b 7d) eratwe r10,r11,3 ++.*: (7d 6a 07 75|75 07 6a 7d) extsb\. r10,r11 ++.*: (7d 6a 07 74|74 07 6a 7d) extsb r10,r11 ++.*: (7d 6a 07 35|35 07 6a 7d) extsh\. r10,r11 ++.*: (7d 6a 07 34|34 07 6a 7d) extsh r10,r11 ++.*: (7d 6a 07 b5|b5 07 6a 7d) extsw\. r10,r11 ++.*: (7d 6a 07 b4|b4 07 6a 7d) extsw r10,r11 ++.*: (fe 80 aa 11|11 aa 80 fe) fabs\. f20,f21 ++.*: (fe 80 aa 10|10 aa 80 fe) fabs f20,f21 ++.*: (fe 95 b0 2b|2b b0 95 fe) fadd\. f20,f21,f22 ++.*: (fe 95 b0 2a|2a b0 95 fe) fadd f20,f21,f22 ++.*: (ee 95 b0 2b|2b b0 95 ee) fadds\. f20,f21,f22 ++.*: (ee 95 b0 2a|2a b0 95 ee) fadds f20,f21,f22 ++.*: (fe 80 ae 9d|9d ae 80 fe) fcfid\. f20,f21 ++.*: (fe 80 ae 9c|9c ae 80 fe) fcfid f20,f21 ++.*: (fc 14 a8 40|40 a8 14 fc) fcmpo cr0,f20,f21 ++.*: (fc 94 a8 40|40 a8 94 fc) fcmpo cr1,f20,f21 ++.*: (fc 14 a8 00|00 a8 14 fc) fcmpu cr0,f20,f21 ++.*: (fc 94 a8 00|00 a8 94 fc) fcmpu cr1,f20,f21 ++.*: (fe 95 b0 11|11 b0 95 fe) fcpsgn\. f20,f21,f22 ++.*: (fe 95 b0 10|10 b0 95 fe) fcpsgn f20,f21,f22 ++.*: (fe 80 ae 5d|5d ae 80 fe) fctid\. f20,f21 ++.*: (fe 80 ae 5c|5c ae 80 fe) fctid f20,f21 ++.*: (fe 80 ae 5f|5f ae 80 fe) fctidz\. f20,f21 ++.*: (fe 80 ae 5e|5e ae 80 fe) fctidz f20,f21 ++.*: (fe 80 a8 1d|1d a8 80 fe) fctiw\. f20,f21 ++.*: (fe 80 a8 1c|1c a8 80 fe) fctiw f20,f21 ++.*: (fe 80 a8 1f|1f a8 80 fe) fctiwz\. f20,f21 ++.*: (fe 80 a8 1e|1e a8 80 fe) fctiwz f20,f21 ++.*: (fe 95 b0 25|25 b0 95 fe) fdiv\. f20,f21,f22 ++.*: (fe 95 b0 24|24 b0 95 fe) fdiv f20,f21,f22 ++.*: (ee 95 b0 25|25 b0 95 ee) fdivs\. f20,f21,f22 ++.*: (ee 95 b0 24|24 b0 95 ee) fdivs f20,f21,f22 ++.*: (fe 95 bd bb|bb bd 95 fe) fmadd\. f20,f21,f22,f23 ++.*: (fe 95 bd ba|ba bd 95 fe) fmadd f20,f21,f22,f23 ++.*: (ee 95 bd bb|bb bd 95 ee) fmadds\. f20,f21,f22,f23 ++.*: (ee 95 bd ba|ba bd 95 ee) fmadds f20,f21,f22,f23 ++.*: (fe 80 a8 91|91 a8 80 fe) fmr\. f20,f21 ++.*: (fe 80 a8 90|90 a8 80 fe) fmr f20,f21 ++.*: (fe 95 bd b9|b9 bd 95 fe) fmsub\. f20,f21,f22,f23 ++.*: (fe 95 bd b8|b8 bd 95 fe) fmsub f20,f21,f22,f23 ++.*: (ee 95 bd b9|b9 bd 95 ee) fmsubs\. f20,f21,f22,f23 ++.*: (ee 95 bd b8|b8 bd 95 ee) fmsubs f20,f21,f22,f23 ++.*: (fe 95 05 b3|b3 05 95 fe) fmul\. f20,f21,f22 ++.*: (fe 95 05 b2|b2 05 95 fe) fmul f20,f21,f22 ++.*: (ee 95 05 b3|b3 05 95 ee) fmuls\. f20,f21,f22 ++.*: (ee 95 05 b2|b2 05 95 ee) fmuls f20,f21,f22 ++.*: (fe 80 a9 11|11 a9 80 fe) fnabs\. f20,f21 ++.*: (fe 80 a9 10|10 a9 80 fe) fnabs f20,f21 ++.*: (fe 80 a8 51|51 a8 80 fe) fneg\. f20,f21 ++.*: (fe 80 a8 50|50 a8 80 fe) fneg f20,f21 ++.*: (fe 95 bd bf|bf bd 95 fe) fnmadd\. f20,f21,f22,f23 ++.*: (fe 95 bd be|be bd 95 fe) fnmadd f20,f21,f22,f23 ++.*: (ee 95 bd bf|bf bd 95 ee) fnmadds\. f20,f21,f22,f23 ++.*: (ee 95 bd be|be bd 95 ee) fnmadds f20,f21,f22,f23 ++.*: (fe 95 bd bd|bd bd 95 fe) fnmsub\. f20,f21,f22,f23 ++.*: (fe 95 bd bc|bc bd 95 fe) fnmsub f20,f21,f22,f23 ++.*: (ee 95 bd bd|bd bd 95 ee) fnmsubs\. f20,f21,f22,f23 ++.*: (ee 95 bd bc|bc bd 95 ee) fnmsubs f20,f21,f22,f23 ++.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 ++.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 ++.*: (fe 80 a8 31|31 a8 80 fe) fre\. f20,f21 ++.*: (fe 80 a8 30|30 a8 80 fe) fre f20,f21 ++.*: (fe 81 a8 31|31 a8 81 fe) fre\. f20,f21,1 ++.*: (fe 81 a8 30|30 a8 81 fe) fre f20,f21,1 ++.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 ++.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 ++.*: (ee 80 a8 31|31 a8 80 ee) fres\. f20,f21 ++.*: (ee 80 a8 30|30 a8 80 ee) fres f20,f21 ++.*: (ee 81 a8 31|31 a8 81 ee) fres\. f20,f21,1 ++.*: (ee 81 a8 30|30 a8 81 ee) fres f20,f21,1 ++.*: (fe 80 ab d1|d1 ab 80 fe) frim\. f20,f21 ++.*: (fe 80 ab d0|d0 ab 80 fe) frim f20,f21 ++.*: (fe 80 ab 11|11 ab 80 fe) frin\. f20,f21 ++.*: (fe 80 ab 10|10 ab 80 fe) frin f20,f21 ++.*: (fe 80 ab 91|91 ab 80 fe) frip\. f20,f21 ++.*: (fe 80 ab 90|90 ab 80 fe) frip f20,f21 ++.*: (fe 80 ab 51|51 ab 80 fe) friz\. f20,f21 ++.*: (fe 80 ab 50|50 ab 80 fe) friz f20,f21 ++.*: (fe 80 a8 19|19 a8 80 fe) frsp\. f20,f21 ++.*: (fe 80 a8 18|18 a8 80 fe) frsp f20,f21 ++.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 ++.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 ++.*: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21 ++.*: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21 ++.*: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1 ++.*: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1 ++.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 ++.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 ++.*: (ee 80 a8 34|34 a8 80 ee) frsqrtes f20,f21 ++.*: (ee 80 a8 35|35 a8 80 ee) frsqrtes\. f20,f21 ++.*: (ee 81 a8 34|34 a8 81 ee) frsqrtes f20,f21,1 ++.*: (ee 81 a8 35|35 a8 81 ee) frsqrtes\. f20,f21,1 ++.*: (fe 95 bd af|af bd 95 fe) fsel\. f20,f21,f22,f23 ++.*: (fe 95 bd ae|ae bd 95 fe) fsel f20,f21,f22,f23 ++.*: (fe 80 a8 2d|2d a8 80 fe) fsqrt\. f20,f21 ++.*: (fe 80 a8 2c|2c a8 80 fe) fsqrt f20,f21 ++.*: (ee 80 a8 2d|2d a8 80 ee) fsqrts\. f20,f21 ++.*: (ee 80 a8 2c|2c a8 80 ee) fsqrts f20,f21 ++.*: (fe 95 b0 29|29 b0 95 fe) fsub\. f20,f21,f22 ++.*: (fe 95 b0 28|28 b0 95 fe) fsub f20,f21,f22 ++.*: (ee 95 b0 29|29 b0 95 ee) fsubs\. f20,f21,f22 ++.*: (ee 95 b0 28|28 b0 95 ee) fsubs f20,f21,f22 ++.*: (7c 0a 5f ac|ac 5f 0a 7c) icbi r10,r11 ++.*: (7c 0a 5f be|be 5f 0a 7c) icbiep r10,r11 ++.*: (7c 0a 58 2c|2c 58 0a 7c) icbt r10,r11 ++.*: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11 ++.*: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11 ++.*: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11 ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7c 00 07 8c|8c 07 00 7c) iccci ++.*: (7d 40 07 8c|8c 07 40 7d) ici 10 ++.*: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12 ++.*: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12 ++.*: (7d 4b 65 de|de 65 4b 7d) isel r10,r11,r12,23 ++.*: (4c 00 01 2c|2c 01 00 4c) isync ++.*: (7d 4b 60 be|be 60 4b 7d) lbepx r10,r11,r12 ++.*: (89 4b ff ef|ef ff 4b 89) lbz r10,-17\(r11\) ++.*: (89 4b 00 11|11 00 4b 89) lbz r10,17\(r11\) ++.*: (8d 4b ff ff|ff ff 4b 8d) lbzu r10,-1\(r11\) ++.*: (8d 4b 00 01|01 00 4b 8d) lbzu r10,1\(r11\) ++.*: (7d 4b 68 ee|ee 68 4b 7d) lbzux r10,r11,r13 ++.*: (7d 4b 68 ae|ae 68 4b 7d) lbzx r10,r11,r13 ++.*: (e9 4b ff f8|f8 ff 4b e9) ld r10,-8\(r11\) ++.*: (e9 4b 00 08|08 00 4b e9) ld r10,8\(r11\) ++.*: (7d 4b 60 a8|a8 60 4b 7d) ldarx r10,r11,r12 ++.*: (7d 4b 60 a9|a9 60 4b 7d) ldarx r10,r11,r12,1 ++.*: (7d 4b 64 28|28 64 4b 7d) ldbrx r10,r11,r12 ++.*: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12 ++.*: (e9 4b ff f9|f9 ff 4b e9) ldu r10,-8\(r11\) ++.*: (e9 4b 00 09|09 00 4b e9) ldu r10,8\(r11\) ++.*: (7d 4b 60 6a|6a 60 4b 7d) ldux r10,r11,r12 ++.*: (7d 4b 60 2a|2a 60 4b 7d) ldx r10,r11,r12 ++.*: (ca 8a ff f8|f8 ff 8a ca) lfd f20,-8\(r10\) ++.*: (ca 8a 00 08|08 00 8a ca) lfd f20,8\(r10\) ++.*: (7e 8a 5c be|be 5c 8a 7e) lfdepx f20,r10,r11 ++.*: (ce 8a ff f8|f8 ff 8a ce) lfdu f20,-8\(r10\) ++.*: (ce 8a 00 08|08 00 8a ce) lfdu f20,8\(r10\) ++.*: (7e 8a 5c ee|ee 5c 8a 7e) lfdux f20,r10,r11 ++.*: (7e 8a 5c ae|ae 5c 8a 7e) lfdx f20,r10,r11 ++.*: (7e 8a 5e ae|ae 5e 8a 7e) lfiwax f20,r10,r11 ++.*: (7e 8a 5e ee|ee 5e 8a 7e) lfiwzx f20,r10,r11 ++.*: (c2 8a ff fc|fc ff 8a c2) lfs f20,-4\(r10\) ++.*: (c2 8a 00 04|04 00 8a c2) lfs f20,4\(r10\) ++.*: (c6 8a ff fc|fc ff 8a c6) lfsu f20,-4\(r10\) ++.*: (c6 8a 00 04|04 00 8a c6) lfsu f20,4\(r10\) ++.*: (7e 8a 5c 6e|6e 5c 8a 7e) lfsux f20,r10,r11 ++.*: (7e 8a 5c 2e|2e 5c 8a 7e) lfsx f20,r10,r11 ++.*: (a9 4b 00 02|02 00 4b a9) lha r10,2\(r11\) ++.*: (ad 4b ff fe|fe ff 4b ad) lhau r10,-2\(r11\) ++.*: (7d 4b 62 ee|ee 62 4b 7d) lhaux r10,r11,r12 ++.*: (7d 4b 62 ae|ae 62 4b 7d) lhax r10,r11,r12 ++.*: (7d 4b 66 2c|2c 66 4b 7d) lhbrx r10,r11,r12 ++.*: (7d 4b 62 3e|3e 62 4b 7d) lhepx r10,r11,r12 ++.*: (a1 4b ff fe|fe ff 4b a1) lhz r10,-2\(r11\) ++.*: (a1 4b 00 02|02 00 4b a1) lhz r10,2\(r11\) ++.*: (a5 4b ff fe|fe ff 4b a5) lhzu r10,-2\(r11\) ++.*: (a5 4b 00 02|02 00 4b a5) lhzu r10,2\(r11\) ++.*: (7d 4b 62 6e|6e 62 4b 7d) lhzux r10,r11,r12 ++.*: (7d 4b 62 2e|2e 62 4b 7d) lhzx r10,r11,r12 ++.*: (e9 4b ff fe|fe ff 4b e9) lwa r10,-4\(r11\) ++.*: (e9 4b 00 06|06 00 4b e9) lwa r10,4\(r11\) ++.*: (7d 4b 60 28|28 60 4b 7d) lwarx r10,r11,r12 ++.*: (7d 4b 60 29|29 60 4b 7d) lwarx r10,r11,r12,1 ++.*: (7d 4b 62 ea|ea 62 4b 7d) lwaux r10,r11,r12 ++.*: (7d 4b 62 aa|aa 62 4b 7d) lwax r10,r11,r12 ++.*: (7d 4b 64 2c|2c 64 4b 7d) lwbrx r10,r11,r12 ++.*: (7d 4b 60 3e|3e 60 4b 7d) lwepx r10,r11,r12 ++.*: (81 4b ff fc|fc ff 4b 81) lwz r10,-4\(r11\) ++.*: (81 4b 00 04|04 00 4b 81) lwz r10,4\(r11\) ++.*: (85 4b ff fc|fc ff 4b 85) lwzu r10,-4\(r11\) ++.*: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\) ++.*: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12 ++.*: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12 ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 00 06 ac|ac 06 00 7c) mbar ++.*: (7c 20 06 ac|ac 06 20 7c) mbar 1 ++.*: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1 ++.*: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4 ++.*: (7c 00 04 00|00 04 00 7c) mcrxr cr0 ++.*: (7d 80 04 00|00 04 80 7d) mcrxr cr3 ++.*: (7c 60 00 26|26 00 60 7c) mfcr r3 ++.*: (7c 70 20 26|26 20 70 7c) mfocrf r3,2 ++.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234 ++.*: (7d 4a 3a 86|86 3a 4a 7d) mfdcr r10,234 ++.*: (7d 4b 02 07|07 02 4b 7d) mfdcrx\. r10,r11 ++.*: (7d 4b 02 06|06 02 4b 7d) mfdcrx r10,r11 ++.*: (fe 80 04 8f|8f 04 80 fe) mffs\. f20 ++.*: (fe 80 04 8e|8e 04 80 fe) mffs f20 ++.*: (7d 40 00 a6|a6 00 40 7d) mfmsr r10 ++.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 ++.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 ++.*: (7d 4a 3a a6|a6 3a 4a 7d) mfspr r10,234 ++.*: (7d 4c 42 a6|a6 42 4c 7d) mftb r10 ++.*: (7d 4d 42 a6|a6 42 4d 7d) mftbu r10 ++.*: (7c 00 51 dc|dc 51 00 7c) msgclr r10 ++.*: (7c 00 51 9c|9c 51 00 7c) msgsnd r10 ++.*: (7c 60 01 20|20 01 60 7c) mtcrf 0,r3 ++.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 ++.*: (7d 4a 3b 87|87 3b 4a 7d) mtdcr\. 234,r10 ++.*: (7d 4a 3b 86|86 3b 4a 7d) mtdcr 234,r10 ++.*: (7d 6a 03 07|07 03 6a 7d) mtdcrx\. r10,r11 ++.*: (7d 6a 03 06|06 03 6a 7d) mtdcrx r10,r11 ++.*: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. 3 ++.*: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3 ++.*: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. 3 ++.*: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3 ++.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 ++.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 ++.*: (fc 0c a5 8f|8f a5 0c fc) mtfsf\. 6,f20 ++.*: (fc 0c a5 8e|8e a5 0c fc) mtfsf 6,f20 ++.*: (fe 0d a5 8f|8f a5 0d fe) mtfsf\. 6,f20,1,1 ++.*: (fe 0d a5 8e|8e a5 0d fe) mtfsf 6,f20,1,1 ++.*: (ff 00 01 0d|0d 01 00 ff) mtfsfi\. 6,0 ++.*: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0 ++.*: (ff 00 d1 0d|0d d1 00 ff) mtfsfi\. 6,13 ++.*: (ff 00 d1 0c|0c d1 00 ff) mtfsfi 6,13 ++.*: (ff 01 d1 0d|0d d1 01 ff) mtfsfi\. 6,13,1 ++.*: (ff 01 d1 0c|0c d1 01 ff) mtfsfi 6,13,1 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7d 40 01 24|24 01 40 7d) mtmsr r10 ++.*: (7d 41 01 24|24 01 41 7d) mtmsr r10,1 ++.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 ++.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 ++.*: (7d 4a 3b a6|a6 3b 4a 7d) mtspr 234,r10 ++.*: (7e 95 b0 93|93 b0 95 7e) mulhd\. r20,r21,r22 ++.*: (7e 95 b0 92|92 b0 95 7e) mulhd r20,r21,r22 ++.*: (7e 95 b0 13|13 b0 95 7e) mulhdu\. r20,r21,r22 ++.*: (7e 95 b0 12|12 b0 95 7e) mulhdu r20,r21,r22 ++.*: (7e 95 b0 97|97 b0 95 7e) mulhw\. r20,r21,r22 ++.*: (7e 95 b0 96|96 b0 95 7e) mulhw r20,r21,r22 ++.*: (7e 95 b0 17|17 b0 95 7e) mulhwu\. r20,r21,r22 ++.*: (7e 95 b0 16|16 b0 95 7e) mulhwu r20,r21,r22 ++.*: (7e 95 b1 d3|d3 b1 95 7e) mulld\. r20,r21,r22 ++.*: (7e 95 b1 d2|d2 b1 95 7e) mulld r20,r21,r22 ++.*: (7e 95 b5 d3|d3 b5 95 7e) mulldo\. r20,r21,r22 ++.*: (7e 95 b5 d2|d2 b5 95 7e) mulldo r20,r21,r22 ++.*: (1e 95 00 64|64 00 95 1e) mulli r20,r21,100 ++.*: (1e 95 ff 9c|9c ff 95 1e) mulli r20,r21,-100 ++.*: (7e 95 b1 d7|d7 b1 95 7e) mullw\. r20,r21,r22 ++.*: (7e 95 b1 d6|d6 b1 95 7e) mullw r20,r21,r22 ++.*: (7e 95 b5 d7|d7 b5 95 7e) mullwo\. r20,r21,r22 ++.*: (7e 95 b5 d6|d6 b5 95 7e) mullwo r20,r21,r22 ++.*: (7e b4 b3 b9|b9 b3 b4 7e) nand\. r20,r21,r22 ++.*: (7e b4 b3 b8|b8 b3 b4 7e) nand r20,r21,r22 ++.*: (7e 95 00 d1|d1 00 95 7e) neg\. r20,r21 ++.*: (7e 95 00 d0|d0 00 95 7e) neg r20,r21 ++.*: (7e 95 04 d1|d1 04 95 7e) nego\. r20,r21 ++.*: (7e 95 04 d0|d0 04 95 7e) nego r20,r21 ++.*: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22 ++.*: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22 ++.*: (7e b4 b3 79|79 b3 b4 7e) or\. r20,r21,r22 ++.*: (7e b4 b3 78|78 b3 b4 7e) or r20,r21,r22 ++.*: (7e b4 b3 39|39 b3 b4 7e) orc\. r20,r21,r22 ++.*: (7e b4 b3 38|38 b3 b4 7e) orc r20,r21,r22 ++.*: (62 b4 10 00|00 10 b4 62) ori r20,r21,4096 ++.*: (66 b4 10 00|00 10 b4 66) oris r20,r21,4096 ++.*: (7d 6a 00 f4|f4 00 6a 7d) popcntb r10,r11 ++.*: (7d 6a 03 f4|f4 03 6a 7d) popcntd r10,r11 ++.*: (7d 6a 02 f4|f4 02 6a 7d) popcntw r10,r11 ++.*: (7d 6a 01 74|74 01 6a 7d) prtyd r10,r11 ++.*: (7d 6a 01 34|34 01 6a 7d) prtyw r10,r11 ++.*: (4c 00 00 66|66 00 00 4c) rfci ++.*: (4c 00 00 cc|cc 00 00 4c) rfgi ++.*: (4c 00 00 64|64 00 00 4c) rfi ++.*: (4c 00 00 4c|4c 00 00 4c) rfmci ++.*: (79 6a 67 f1|f1 67 6a 79) rldcl\. r10,r11,r12,63 ++.*: (79 6a 67 f0|f0 67 6a 79) rldcl r10,r11,r12,63 ++.*: (79 6a 67 f3|f3 67 6a 79) rldcr\. r10,r11,r12,63 ++.*: (79 6a 67 f2|f2 67 6a 79) rldcr r10,r11,r12,63 ++.*: (79 6a bf e9|e9 bf 6a 79) rldic\. r10,r11,23,63 ++.*: (79 6a bf e8|e8 bf 6a 79) rldic r10,r11,23,63 ++.*: (79 6a bf e1|e1 bf 6a 79) rldicl\. r10,r11,23,63 ++.*: (79 6a bf e0|e0 bf 6a 79) rldicl r10,r11,23,63 ++.*: (79 6a bf e5|e5 bf 6a 79) rldicr\. r10,r11,23,63 ++.*: (79 6a bf e4|e4 bf 6a 79) rldicr r10,r11,23,63 ++.*: (79 6a bf ed|ed bf 6a 79) rldimi\. r10,r11,23,63 ++.*: (79 6a bf ec|ec bf 6a 79) rldimi r10,r11,23,63 ++.*: (51 6a b8 3f|3f b8 6a 51) rlwimi\. r10,r11,23,0,31 ++.*: (51 6a b8 3e|3e b8 6a 51) rlwimi r10,r11,23,0,31 ++.*: (55 6a b8 3f|3f b8 6a 55) rotlwi\. r10,r11,23 ++.*: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23 ++.*: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23 ++.*: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23 ++.*: (44 00 00 02|02 00 00 44) sc ++.*: (44 00 0c 82|82 0c 00 44) sc 100 ++.*: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12 ++.*: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12 ++.*: (7d 6a 60 31|31 60 6a 7d) slw\. r10,r11,r12 ++.*: (7d 6a 60 30|30 60 6a 7d) slw r10,r11,r12 ++.*: (7d 6a 66 35|35 66 6a 7d) srad\. r10,r11,r12 ++.*: (7d 6a 66 34|34 66 6a 7d) srad r10,r11,r12 ++.*: (7d 6a fe 77|77 fe 6a 7d) sradi\. r10,r11,63 ++.*: (7d 6a fe 76|76 fe 6a 7d) sradi r10,r11,63 ++.*: (7d 6a 66 31|31 66 6a 7d) sraw\. r10,r11,r12 ++.*: (7d 6a 66 30|30 66 6a 7d) sraw r10,r11,r12 ++.*: (7d 6a fe 71|71 fe 6a 7d) srawi\. r10,r11,31 ++.*: (7d 6a fe 70|70 fe 6a 7d) srawi r10,r11,31 ++.*: (7d 6a 64 37|37 64 6a 7d) srd\. r10,r11,r12 ++.*: (7d 6a 64 36|36 64 6a 7d) srd r10,r11,r12 ++.*: (7d 6a 64 31|31 64 6a 7d) srw\. r10,r11,r12 ++.*: (7d 6a 64 30|30 64 6a 7d) srw r10,r11,r12 ++.*: (99 4b ff ff|ff ff 4b 99) stb r10,-1\(r11\) ++.*: (99 4b 00 01|01 00 4b 99) stb r10,1\(r11\) ++.*: (7d 4b 61 be|be 61 4b 7d) stbepx r10,r11,r12 ++.*: (9d 4b ff ff|ff ff 4b 9d) stbu r10,-1\(r11\) ++.*: (9d 4b 00 01|01 00 4b 9d) stbu r10,1\(r11\) ++.*: (7d 4b 61 ee|ee 61 4b 7d) stbux r10,r11,r12 ++.*: (7d 4b 61 ae|ae 61 4b 7d) stbx r10,r11,r12 ++.*: (f9 4b ff f8|f8 ff 4b f9) std r10,-8\(r11\) ++.*: (f9 4b 00 08|08 00 4b f9) std r10,8\(r11\) ++.*: (7d 4b 65 28|28 65 4b 7d) stdbrx r10,r11,r12 ++.*: (7d 4b 61 ad|ad 61 4b 7d) stdcx\. r10,r11,r12 ++.*: (7d 4b 61 3a|3a 61 4b 7d) stdepx r10,r11,r12 ++.*: (f9 4b ff f9|f9 ff 4b f9) stdu r10,-8\(r11\) ++.*: (f9 4b 00 09|09 00 4b f9) stdu r10,8\(r11\) ++.*: (7d 4b 61 6a|6a 61 4b 7d) stdux r10,r11,r12 ++.*: (7d 4b 61 2a|2a 61 4b 7d) stdx r10,r11,r12 ++.*: (da 8a ff f8|f8 ff 8a da) stfd f20,-8\(r10\) ++.*: (da 8a 00 08|08 00 8a da) stfd f20,8\(r10\) ++.*: (7e 8a 5d be|be 5d 8a 7e) stfdepx f20,r10,r11 ++.*: (de 8a ff f8|f8 ff 8a de) stfdu f20,-8\(r10\) ++.*: (de 8a 00 08|08 00 8a de) stfdu f20,8\(r10\) ++.*: (7e 8a 5d ee|ee 5d 8a 7e) stfdux f20,r10,r11 ++.*: (7e 8a 5d ae|ae 5d 8a 7e) stfdx f20,r10,r11 ++.*: (7e 8a 5f ae|ae 5f 8a 7e) stfiwx f20,r10,r11 ++.*: (d2 8a ff fc|fc ff 8a d2) stfs f20,-4\(r10\) ++.*: (d2 8a 00 04|04 00 8a d2) stfs f20,4\(r10\) ++.*: (d6 8a ff fc|fc ff 8a d6) stfsu f20,-4\(r10\) ++.*: (d6 8a 00 04|04 00 8a d6) stfsu f20,4\(r10\) ++.*: (7e 8a 5d 6e|6e 5d 8a 7e) stfsux f20,r10,r11 ++.*: (7e 8a 5d 2e|2e 5d 8a 7e) stfsx f20,r10,r11 ++.*: (b1 4b ff fe|fe ff 4b b1) sth r10,-2\(r11\) ++.*: (b1 4b 00 02|02 00 4b b1) sth r10,2\(r11\) ++.*: (b1 4b ff fc|fc ff 4b b1) sth r10,-4\(r11\) ++.*: (b1 4b 00 04|04 00 4b b1) sth r10,4\(r11\) ++.*: (7d 4b 67 2c|2c 67 4b 7d) sthbrx r10,r11,r12 ++.*: (7d 4b 63 3e|3e 63 4b 7d) sthepx r10,r11,r12 ++.*: (b5 4b ff fe|fe ff 4b b5) sthu r10,-2\(r11\) ++.*: (b5 4b 00 02|02 00 4b b5) sthu r10,2\(r11\) ++.*: (7d 4b 63 6e|6e 63 4b 7d) sthux r10,r11,r12 ++.*: (7d 4b 63 2e|2e 63 4b 7d) sthx r10,r11,r12 ++.*: (7d 4b 65 2c|2c 65 4b 7d) stwbrx r10,r11,r12 ++.*: (7d 4b 61 2d|2d 61 4b 7d) stwcx\. r10,r11,r12 ++.*: (7d 4b 61 3e|3e 61 4b 7d) stwepx r10,r11,r12 ++.*: (95 4b ff fc|fc ff 4b 95) stwu r10,-4\(r11\) ++.*: (95 4b 00 04|04 00 4b 95) stwu r10,4\(r11\) ++.*: (7d 4b 61 6e|6e 61 4b 7d) stwux r10,r11,r12 ++.*: (7d 4b 61 2e|2e 61 4b 7d) stwx r10,r11,r12 ++.*: (7e 95 b0 51|51 b0 95 7e) subf\. r20,r21,r22 ++.*: (7e 95 b0 50|50 b0 95 7e) subf r20,r21,r22 ++.*: (7e 95 b0 11|11 b0 95 7e) subfc\. r20,r21,r22 ++.*: (7e 95 b0 10|10 b0 95 7e) subfc r20,r21,r22 ++.*: (7e 95 b4 11|11 b4 95 7e) subfco\. r20,r21,r22 ++.*: (7e 95 b4 10|10 b4 95 7e) subfco r20,r21,r22 ++.*: (7e 95 b1 11|11 b1 95 7e) subfe\. r20,r21,r22 ++.*: (7e 95 b1 10|10 b1 95 7e) subfe r20,r21,r22 ++.*: (7e 95 b5 11|11 b5 95 7e) subfeo\. r20,r21,r22 ++.*: (7e 95 b5 10|10 b5 95 7e) subfeo r20,r21,r22 ++.*: (22 95 00 64|64 00 95 22) subfic r20,r21,100 ++.*: (22 95 ff 9c|9c ff 95 22) subfic r20,r21,-100 ++.*: (7e 95 01 d1|d1 01 95 7e) subfme\. r20,r21 ++.*: (7e 95 01 d0|d0 01 95 7e) subfme r20,r21 ++.*: (7e 95 05 d1|d1 05 95 7e) subfmeo\. r20,r21 ++.*: (7e 95 05 d0|d0 05 95 7e) subfmeo r20,r21 ++.*: (7e 95 b4 51|51 b4 95 7e) subfo\. r20,r21,r22 ++.*: (7e 95 b4 50|50 b4 95 7e) subfo r20,r21,r22 ++.*: (7e 95 01 91|91 01 95 7e) subfze\. r20,r21 ++.*: (7e 95 01 90|90 01 95 7e) subfze r20,r21 ++.*: (7e 95 05 91|91 05 95 7e) subfzeo\. r20,r21 ++.*: (7e 95 05 90|90 05 95 7e) subfzeo r20,r21 ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 00 04 ac|ac 04 00 7c) hwsync ++.*: (7c 20 04 ac|ac 04 20 7c) lwsync ++.*: (7c aa 58 88|88 58 aa 7c) tdlge r10,r11 ++.*: (08 aa 00 64|64 00 aa 08) tdlgei r10,100 ++.*: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100 ++.*: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11 ++.*: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11 ++.*: (7c 00 07 64|64 07 00 7c) tlbre ++.*: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7 ++.*: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11 ++.*: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12 ++.*: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12 ++.*: (7c 00 04 6c|6c 04 00 7c) tlbsync ++.*: (7c 00 07 a4|a4 07 00 7c) tlbwe ++.*: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7 ++.*: (7c aa 58 08|08 58 aa 7c) twlge r10,r11 ++.*: (0c aa 00 64|64 00 aa 0c) twlgei r10,100 ++.*: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100 ++.*: (7c 00 00 7c|7c 00 00 7c) wait ++.*: (7c 00 00 7c|7c 00 00 7c) wait ++.*: (7c 20 00 7c|7c 00 20 7c) waitrsv ++.*: (7c 40 00 7c|7c 00 40 7c) waitimpl ++.*: (7c 40 00 7c|7c 00 40 7c) waitimpl ++.*: (7c 20 00 7c|7c 00 20 7c) waitrsv ++.*: (7c 00 01 6c|6c 01 00 7c) wchkall ++.*: (7c 00 01 6c|6c 01 00 7c) wchkall ++.*: (7d 80 01 6c|6c 01 80 7d) wchkall cr3 ++.*: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11 ++.*: (7c 20 07 4c|4c 07 20 7c) wclrall 1 ++.*: (7c 4a 5f 4c|4c 5f 4a 7c) wclrone r10,r11 ++.*: (7d 40 01 06|06 01 40 7d) wrtee r10 ++.*: (7c 00 81 46|46 81 00 7c) wrteei 1 ++.*: (7d 6a 62 79|79 62 6a 7d) xor\. r10,r11,r12 ++.*: (7d 6a 62 78|78 62 6a 7d) xor r10,r11,r12 ++.*: (69 6a 10 00|00 10 6a 69) xori r10,r11,4096 ++.*: (6d 6a 10 00|00 10 6a 6d) xoris r10,r11,4096 + #pass +diff -rup binutils.orig/gas/testsuite/gas/ppc/a2.s binutils-2.35.1/gas/testsuite/gas/ppc/a2.s +--- binutils.orig/gas/testsuite/gas/ppc/a2.s 2020-10-08 13:50:31.311909794 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/a2.s 2020-10-08 13:51:29.102731857 +0100 +@@ -295,10 +295,6 @@ start: + lhzu 10,2(11) + lhzux 10,11,12 + lhzx 10,11,12 +- lmw 20,16(10) +- lswi 10,11,1 +- lswi 12,11,32 +- lswx 10,11,12 + lwa 10,-4(11) + lwa 10,4(11) + lwarx 10,11,12,0 +@@ -486,10 +482,6 @@ start: + sthu 10,2(11) + sthux 10,11,12 + sthx 10,11,12 +- stmw 20,16(10) +- stswi 10,11,1 +- stswi 10,11,32 +- stswx 10,11,12 + stwbrx 10,11,12 + stwcx. 10,11,12 + stwepx 10,11,12 +diff -rup binutils.orig/gas/testsuite/gas/ppc/int128.d binutils-2.35.1/gas/testsuite/gas/ppc/int128.d +--- binutils.orig/gas/testsuite/gas/ppc/int128.d 2020-10-08 13:50:31.313909788 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/int128.d 2020-10-08 13:50:58.204826992 +0100 +@@ -20,7 +20,7 @@ Disassembly of section \.text: + .*: (13 9d f7 0b|0b f7 9d 13) vmodsq v28,v29,v30 + .*: (13 e0 0e 0b|0b 0e e0 13) vmoduq v31,v0,v1 + .*: (10 5b 1e 02|02 1e 5b 10) vextsd2q v2,v3 +-.*: (10 04 29 01|01 29 04 10) vcmpuq v4,v5 ++.*: (10 04 29 01|01 29 04 10) vcmpuq cr0,v4,v5 + .*: (10 86 39 41|41 39 86 10) vcmpsq cr1,v6,v7 + .*: (11 09 51 c7|c7 51 09 11) vcmpequq v8,v9,v10 + .*: (11 6c 6d c7|c7 6d 6c 11) vcmpequq. v11,v12,v13 +diff -rup binutils.orig/gas/testsuite/gas/ppc/int128.s binutils-2.35.1/gas/testsuite/gas/ppc/int128.s +--- binutils.orig/gas/testsuite/gas/ppc/int128.s 2020-10-08 13:50:31.313909788 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/int128.s 2020-10-08 13:50:58.204826992 +0100 +@@ -12,7 +12,7 @@ _start: + vmodsq 28,29,30 + vmoduq 31,0,1 + vextsd2q 2,3 +- vcmpuq 4,5 ++ vcmpuq 0,4,5 + vcmpsq 1,6,7 + vcmpequq 8,9,10 + vcmpequq. 11,12,13 +diff -rup binutils.orig/gas/testsuite/gas/ppc/power8.d binutils-2.35.1/gas/testsuite/gas/ppc/power8.d +--- binutils.orig/gas/testsuite/gas/ppc/power8.d 2020-10-08 13:50:31.311909794 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/power8.d 2020-10-08 13:56:18.490840878 +0100 +@@ -7,151 +7,151 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7c 05 07 1d|1d 07 05 7c) tabort\. r5 +- 4: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16 +- 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10 +- c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13 +- 10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5 +- 14: (7c 00 05 1d|1d 05 00 7c) tbegin\. +- 18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7 +- 1c: (7c 00 05 5d|5d 05 00 7c) tend\. +- 20: (7c 00 05 5d|5d 05 00 7c) tend\. +- 24: (7e 00 05 5d|5d 05 00 7e) tendall\. +- 28: (7e 00 05 5d|5d 05 00 7e) tendall\. +- 2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24 +- 30: (7c 00 07 dd|dd 07 00 7c) trechkpt\. +- 34: (7c 00 05 dd|dd 05 00 7c) tsuspend\. +- 38: (7c 00 05 dd|dd 05 00 7c) tsuspend\. +- 3c: (7c 20 05 dd|dd 05 20 7c) tresume\. +- 40: (7c 20 05 dd|dd 05 20 7c) tresume\. +- 44: (60 42 00 00|00 00 42 60) ori r2,r2,0 +- 48: (60 00 00 00|00 00 00 60) nop +- 4c: (60 42 00 00|00 00 42 60) ori r2,r2,0 +- 50: (4c 00 01 24|24 01 00 4c) rfebb 0 +- 54: (4c 00 09 24|24 09 00 4c) rfebb +- 58: (4c 00 09 24|24 09 00 4c) rfebb +- 5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5 +- 60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1 +- 64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3 +- 68: (4c e2 04 61|61 04 e2 4c) bnetarl\+ +- 6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1 +- 70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2 +- 74: (7c 00 00 3c|3c 00 00 7c) waitasec +- 78: (7c 00 41 1c|1c 41 00 7c) msgsndp r8 +- 7c: (7c 20 01 26|26 01 20 7c) mtsle 1 +- 80: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27 +- 84: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12 +- 88: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7 +- 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11 +- 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11 +- 94: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6 +- 98: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16 +- 9c: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7 +- a0: (7c 00 03 5c|5c 03 00 7c) clrbhrb +- a4: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23 +- a8: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4 +- ac: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2 +- b0: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19 +- b4: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29 +- b8: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13 +- bc: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26 +- c0: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28 +- c4: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1 +- c8: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1 +- cc: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11 +- d0: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30 +- d4: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13 +- d8: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4 +- dc: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4 +- e0: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21 +- e4: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19 +- e8: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15 +- ec: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2 +- f0: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9 +- f4: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11 +- f8: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11 +- fc: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1 +- 100: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12 +- 104: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1 +- 108: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16 +- 10c: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20 +- 110: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29 +- 114: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13 +- 118: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18 +- 11c: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22 +- 120: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7 +- 124: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22 +- 128: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13 +- 12c: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16 +- 130: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5 +- 134: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31 +- 138: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27 +- 13c: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23 +- 140: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9 +- 144: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27 +- 148: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24 +- 14c: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13 +- 150: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7 +- 154: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0 +- 158: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26 +- 15c: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6 +- 160: (13 95 76 84|84 76 95 13) veqv v28,v21,v14 +- 164: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19 +- 168: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10 +- 16c: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14 +- 170: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13 +- 174: (11 c0 87 02|02 87 c0 11) vclzb v14,v16 +- 178: (12 80 df 03|03 df 80 12) vpopcntb v20,v27 +- 17c: (13 80 5f 42|42 5f 80 13) vclzh v28,v11 +- 180: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9 +- 184: (13 60 ff 82|82 ff 60 13) vclzw v27,v31 +- 188: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19 +- 18c: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29 +- 190: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22 +- 194: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29 +- 198: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27 +- 19c: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 +- 1a0: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 +- 1a4: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 +- 1a8: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 +- 1ac: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 1b0: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 1b4: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 +- 1b8: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 +- 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11 +- 1c0: (7f f7 01 a7|a7 01 f7 7f) mtvrwa v31,r23 +- 1c4: (7e 1a 01 e6|e6 01 1a 7e) mtfprwz f16,r26 +- 1c8: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 +- 1cc: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 +- 1d0: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 +- 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 +- 1d8: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 +- 1dc: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 +- 1e0: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 +- 1e4: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 +- 1e8: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 +- 1ec: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 +- 1f0: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 +- 1f4: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 +- 1f8: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 +- 1fc: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 +- 200: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 +- 204: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 +- 208: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 +- 20c: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 +- 210: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 +- 214: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 +- 218: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 +- 21c: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 +- 220: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 +- 224: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 +- 228: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 +- 22c: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 +- 230: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 +- 234: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 +- 238: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 +- 23c: (7c 00 71 9c|9c 71 00 7c) msgsnd r14 +- 240: (7c 00 b9 dc|dc b9 00 7c) msgclr r23 ++.*: (7c 05 07 1d|1d 07 05 7c) tabort\. r5 ++.*: (7c e8 86 1d|1d 86 e8 7c) tabortwc\. 7,r8,r16 ++.*: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10 ++.*: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13 ++.*: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5 ++.*: (7c 00 05 1d|1d 05 00 7c) tbegin\. ++.*: (7f 80 05 9c|9c 05 80 7f) tcheck cr7 ++.*: (7c 00 05 5d|5d 05 00 7c) tend\. ++.*: (7c 00 05 5d|5d 05 00 7c) tend\. ++.*: (7e 00 05 5d|5d 05 00 7e) tendall\. ++.*: (7e 00 05 5d|5d 05 00 7e) tendall\. ++.*: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24 ++.*: (7c 00 07 dd|dd 07 00 7c) trechkpt\. ++.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\. ++.*: (7c 00 05 dd|dd 05 00 7c) tsuspend\. ++.*: (7c 20 05 dd|dd 05 20 7c) tresume\. ++.*: (7c 20 05 dd|dd 05 20 7c) tresume\. ++.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 ++.*: (60 00 00 00|00 00 00 60) nop ++.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 ++.*: (4c 00 01 24|24 01 00 4c) rfebb 0 ++.*: (4c 00 09 24|24 09 00 4c) rfebb ++.*: (4c 00 09 24|24 09 00 4c) rfebb ++.*: (4d d5 04 60|60 04 d5 4d) bgttar- cr5 ++.*: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1 ++.*: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3 ++.*: (4c e2 04 61|61 04 e2 4c) bnetarl\+ ++.*: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1 ++.*: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2 ++.*: (7c 00 00 3c|3c 00 00 7c) waitasec ++.*: (7c 00 41 1c|1c 41 00 7c) msgsndp r8 ++.*: (7c 20 01 26|26 01 20 7c) mtsle 1 ++.*: (7c 00 d9 5c|5c d9 00 7c) msgclrp r27 ++.*: (7d 4a 61 6d|6d 61 4a 7d) stqcx\. r10,r10,r12 ++.*: (7f 80 39 6d|6d 39 80 7f) stqcx\. r28,0,r7 ++.*: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11 ++.*: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11 ++.*: (7e 80 32 5c|5c 32 80 7e) mfbhrbe r20,6 ++.*: (7f b1 83 29|29 83 b1 7f) pbt\. r29,r17,r16 ++.*: (7d c0 3b 29|29 3b c0 7d) pbt\. r14,0,r7 ++.*: (7c 00 03 5c|5c 03 00 7c) clrbhrb ++.*: (11 6a 05 ed|ed 05 6a 11) vpermxor v11,v10,v0,v23 ++.*: (13 02 39 3c|3c 39 02 13) vaddeuqm v24,v2,v7,v4 ++.*: (11 4a 40 bd|bd 40 4a 11) vaddecuq v10,v10,v8,v2 ++.*: (10 af 44 fe|fe 44 af 10) vsubeuqm v5,v15,v8,v19 ++.*: (11 9f 87 7f|7f 87 9f 11) vsubecuq v12,v31,v16,v29 ++.*: (12 9d 68 88|88 68 9d 12) vmulouw v20,v29,v13 ++.*: (13 a0 d0 89|89 d0 a0 13) vmuluwm v29,v0,v26 ++.*: (11 15 e0 c0|c0 e0 15 11) vaddudm v8,v21,v28 ++.*: (10 3a 08 c2|c2 08 3a 10) vmaxud v1,v26,v1 ++.*: (12 83 08 c4|c4 08 83 12) vrld v20,v3,v1 ++.*: (10 93 58 c7|c7 58 93 10) vcmpequd v4,v19,v11 ++.*: (12 ee f1 00|00 f1 ee 12) vadduqm v23,v14,v30 ++.*: (11 08 69 40|40 69 08 11) vaddcuq v8,v8,v13 ++.*: (13 9b 21 88|88 21 9b 13) vmulosw v28,v27,v4 ++.*: (10 64 21 c2|c2 21 64 10) vmaxsd v3,v4,v4 ++.*: (10 13 aa 88|88 aa 13 10) vmuleuw v0,v19,v21 ++.*: (13 14 9a c2|c2 9a 14 13) vminud v24,v20,v19 ++.*: (10 1c 7a c7|c7 7a 1c 10) vcmpgtud v0,v28,v15 ++.*: (12 a0 13 88|88 13 a0 12) vmulesw v21,v0,v2 ++.*: (11 3a 4b c2|c2 4b 3a 11) vminsd v9,v26,v9 ++.*: (13 3d 5b c4|c4 5b 3d 13) vsrad v25,v29,v11 ++.*: (11 7c 5b c7|c7 5b 7c 11) vcmpgtsd v11,v28,v11 ++.*: (10 a8 d6 01|01 d6 a8 10) bcdadd\. v5,v8,v26,1 ++.*: (10 83 64 08|08 64 83 10) vpmsumb v4,v3,v12 ++.*: (13 5f ae 41|41 ae 5f 13) bcdsub\. v26,v31,v21,1 ++.*: (10 b1 84 48|48 84 b1 10) vpmsumh v5,v17,v16 ++.*: (12 f1 a4 4e|4e a4 f1 12) vpkudum v23,v17,v20 ++.*: (13 15 ec 88|88 ec 15 13) vpmsumw v24,v21,v29 ++.*: (11 36 6c c8|c8 6c 36 11) vpmsumd v9,v22,v13 ++.*: (12 53 94 ce|ce 94 53 12) vpkudus v18,v19,v18 ++.*: (13 d0 b5 00|00 b5 d0 13) vsubuqm v30,v16,v22 ++.*: (11 cb 3d 08|08 3d cb 11) vcipher v14,v11,v7 ++.*: (11 42 b5 09|09 b5 42 11) vcipherlast v10,v2,v22 ++.*: (12 e0 6d 0c|0c 6d e0 12) vgbbd v23,v13 ++.*: (12 19 85 40|40 85 19 12) vsubcuq v16,v25,v16 ++.*: (13 e1 2d 44|44 2d e1 13) vorc v31,v1,v5 ++.*: (10 91 fd 48|48 fd 91 10) vncipher v4,v17,v31 ++.*: (13 02 dd 49|49 dd 02 13) vncipherlast v24,v2,v27 ++.*: (12 f5 bd 4c|4c bd f5 12) vbpermq v23,v21,v23 ++.*: (13 72 4d 4e|4e 4d 72 13) vpksdus v27,v18,v9 ++.*: (13 7d dd 84|84 dd 7d 13) vnand v27,v29,v27 ++.*: (12 73 c5 c4|c4 c5 73 12) vsld v19,v19,v24 ++.*: (10 ad 05 c8|c8 05 ad 10) vsbox v5,v13 ++.*: (13 23 3d ce|ce 3d 23 13) vpksdss v25,v3,v7 ++.*: (13 88 04 c7|c7 04 88 13) vcmpequd\. v28,v8,v0 ++.*: (13 40 d6 4e|4e d6 40 13) vupkhsw v26,v26 ++.*: (10 a7 36 82|82 36 a7 10) vshasigmaw v5,v7,0,6 ++.*: (13 95 76 84|84 76 95 13) veqv v28,v21,v14 ++.*: (10 28 9e 8c|8c 9e 28 10) vmrgow v1,v8,v19 ++.*: (10 0a 56 c2|c2 56 0a 10) vshasigmad v0,v10,0,10 ++.*: (10 bb 76 c4|c4 76 bb 10) vsrd v5,v27,v14 ++.*: (11 60 6e ce|ce 6e 60 11) vupklsw v11,v13 ++.*: (11 c0 87 02|02 87 c0 11) vclzb v14,v16 ++.*: (12 80 df 03|03 df 80 12) vpopcntb v20,v27 ++.*: (13 80 5f 42|42 5f 80 13) vclzh v28,v11 ++.*: (13 00 4f 43|43 4f 00 13) vpopcnth v24,v9 ++.*: (13 60 ff 82|82 ff 60 13) vclzw v27,v31 ++.*: (12 20 9f 83|83 9f 20 12) vpopcntw v17,v19 ++.*: (11 80 ef c2|c2 ef 80 11) vclzd v12,v29 ++.*: (12 e0 b7 c3|c3 b7 e0 12) vpopcntd v23,v22 ++.*: (13 14 ee c7|c7 ee 14 13) vcmpgtud\. v24,v20,v29 ++.*: (11 26 df c7|c7 df 26 11) vcmpgtsd\. v9,v6,v27 ++.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 ++.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 ++.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 ++.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 ++.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 ++.*: (7e 0b 01 67|67 01 0b 7e) (mtvrd v16,r11|mtvsrd vs48,r11) ++.*: (7f f7 01 a7|a7 01 f7 7f) (mtvrwa v31,r23|mtvsrwa vs63,r23) ++.*: (7e 1a 01 e6|e6 01 1a 7e) (mtfprwz f16,r26|mtvsrwz vs16,r26) ++.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 ++.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 ++.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 ++.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 ++.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 ++.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 ++.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 ++.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 ++.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 ++.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 ++.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 ++.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 ++.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 ++.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 ++.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 ++.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 ++.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 ++.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 ++.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 ++.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 ++.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 ++.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 ++.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 ++.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 ++.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 ++.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 ++.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 ++.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 ++.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 ++.*: (7c 00 71 9c|9c 71 00 7c) msgsnd r14 ++.*: (7c 00 b9 dc|dc b9 00 7c) msgclr r23 + .*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5 + .*: (7d 00 2e 99|99 2e 00 7d) lxvd2x vs40,0,r5 + .*: (7d 54 36 98|98 36 54 7d) lxvd2x vs10,r20,r6 +@@ -310,4 +310,6 @@ Disassembly of section \.text: + .*: (4d 89 04 61|61 04 89 4d) bgttarl cr2 + .*: (4d 89 04 61|61 04 89 4d) bgttarl cr2 + .*: (4d 89 1c 61|61 1c 89 4d) bctarl 12,4\*cr2\+gt,3 ++.*: (7f 5a d3 78|78 d3 5a 7f) miso ++.*: (7f 5a d3 78|78 d3 5a 7f) miso + #pass +diff -rup binutils.orig/gas/testsuite/gas/ppc/power8.s binutils-2.35.1/gas/testsuite/gas/ppc/power8.s +--- binutils.orig/gas/testsuite/gas/ppc/power8.s 2020-10-08 13:50:31.310909797 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/power8.s 2020-10-08 13:56:18.491840875 +0100 +@@ -302,3 +302,5 @@ power8: + bctarl 0b01100,4*cr2+gt + bctarl 0b01100,4*cr2+gt,0 + bctarl 0b01100,4*cr2+gt,3 ++ or 26,26,26 ++ miso +diff -rup binutils.orig/gas/testsuite/gas/ppc/power9.d binutils-2.35.1/gas/testsuite/gas/ppc/power9.d +--- binutils.orig/gas/testsuite/gas/ppc/power9.d 2020-10-08 13:50:31.312909791 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/power9.d 2020-10-08 13:56:18.491840875 +0100 +@@ -399,4 +399,8 @@ Disassembly of section \.text: + .*: (7c 20 20 ac|ac 20 20 7c) dcbfl 0,r4 + .*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5 + .*: (7c 60 28 ac|ac 28 60 7c) dcbflp 0,r5 ++.*: (63 ff 00 00|00 00 ff 63) exser ++.*: (63 ff 00 00|00 00 ff 63) exser ++.*: (7c 00 18 9c|9c 18 00 7c) msgsndu r3 ++.*: (7c 00 d8 dc|dc d8 00 7c) msgclru r27 + #pass +diff -rup binutils.orig/gas/testsuite/gas/ppc/power9.s binutils-2.35.1/gas/testsuite/gas/ppc/power9.s +--- binutils.orig/gas/testsuite/gas/ppc/power9.s 2020-10-08 13:50:31.314909784 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/power9.s 2020-10-08 13:56:18.492840872 +0100 +@@ -390,3 +390,7 @@ power9: + dcbf 0,4,1 + dcbflp 0,5 + dcbf 0,5,3 ++ ori 31,31,0 ++ exser ++ msgsndu 3 ++ msgclru 27 +diff -rup binutils.orig/gas/testsuite/gas/ppc/ppc.exp binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp +--- binutils.orig/gas/testsuite/gas/ppc/ppc.exp 2020-10-08 13:50:31.314909784 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/ppc.exp 2020-10-08 13:51:29.102731857 +0100 +@@ -76,6 +76,8 @@ if { [istarget powerpc64*-*-*] || [istar + run_dump_test "common" + run_dump_test "476" + run_dump_test "a2" ++run_dump_test "be" ++run_dump_test "le_error" + run_dump_test "pr21303" + run_dump_test "vle" + run_dump_test "vle-reloc" +diff -rup binutils.orig/gas/testsuite/gas/ppc/vsx2.d binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d +--- binutils.orig/gas/testsuite/gas/ppc/vsx2.d 2020-10-08 13:50:31.312909791 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/vsx2.d 2020-10-08 13:56:07.796873810 +0100 +@@ -7,59 +7,59 @@ + Disassembly of section \.text: + + 0+00 : +- 0: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 +- 4: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 +- 8: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 +- c: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 +- 10: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30 +- 14: (7f cc 00 66|66 00 cc 7f) mfvsrd r12,vs30 +- 18: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 1c: (7f cc 00 67|67 00 cc 7f) mfvsrd r12,vs62 +- 20: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 24: (7d 94 00 e6|e6 00 94 7d) mffprwz r20,f12 +- 28: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12 +- 2c: (7d 95 00 e7|e7 00 95 7d) mfvrwz r21,v12 +- 30: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 +- 34: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 +- 38: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28 +- 3c: (7d 7c 01 66|66 01 7c 7d) mtvsrd vs11,r28 +- 40: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29 +- 44: (7d 7d 01 67|67 01 7d 7d) mtvsrd vs43,r29 +- 48: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22 +- 4c: (7f 16 01 a6|a6 01 16 7f) mtfprwa f24,r22 +- 50: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23 +- 54: (7f 37 01 a7|a7 01 37 7f) mtvrwa v25,r23 +- 58: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27 +- 5c: (7f 5b 01 e6|e6 01 5b 7f) mtfprwz f26,r27 +- 60: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28 +- 64: (7f 7c 01 e7|e7 01 7c 7f) mtvrwz v27,r28 +- 68: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 +- 6c: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 +- 70: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 +- 74: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 +- 78: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 +- 7c: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 +- 80: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 +- 84: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 +- 88: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 +- 8c: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 +- 90: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 +- 94: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 +- 98: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 +- 9c: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 +- a0: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 +- a4: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 +- a8: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 +- ac: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 +- b0: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 +- b4: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 +- b8: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 +- bc: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 +- c0: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 +- c4: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 +- c8: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 +- cc: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 +- d0: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 +- d4: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 +- d8: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 ++.*: (7f ce d0 19|19 d0 ce 7f) lxsiwzx vs62,r14,r26 ++.*: (7d 00 c8 19|19 c8 00 7d) lxsiwzx vs40,0,r25 ++.*: (7f 20 d0 98|98 d0 20 7f) lxsiwax vs25,0,r26 ++.*: (7c 60 18 98|98 18 60 7c) lxsiwax vs3,0,r3 ++.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30) ++.*: (7f cc 00 66|66 00 cc 7f) (mffprd r12,f30|mfvsrd r12,vs30) ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7f cc 00 67|67 00 cc 7f) (mfvrd r12,v30|mfvsrd r12,vs62) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d 94 00 e6|e6 00 94 7d) (mffprwz r20,f12|mfvsrwz r20,vs12) ++.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44) ++.*: (7d 95 00 e7|e7 00 95 7d) (mfvrwz r21,v12|mfvsrwz r21,vs44) ++.*: (7d c9 71 18|18 71 c9 7d) stxsiwx vs14,r9,r14 ++.*: (7e a0 41 18|18 41 a0 7e) stxsiwx vs21,0,r8 ++.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28) ++.*: (7d 7c 01 66|66 01 7c 7d) (mtfprd f11,r28|mtvsrd vs11,r28) ++.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29) ++.*: (7d 7d 01 67|67 01 7d 7d) (mtvrd v11,r29|mtvsrd vs43,r29) ++.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22) ++.*: (7f 16 01 a6|a6 01 16 7f) (mtfprwa f24,r22|mtvsrwa vs24,r22) ++.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23) ++.*: (7f 37 01 a7|a7 01 37 7f) (mtvrwa v25,r23|mtvsrwa vs57,r23) ++.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27) ++.*: (7f 5b 01 e6|e6 01 5b 7f) (mtfprwz f26,r27|mtvsrwz vs26,r27) ++.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28) ++.*: (7f 7c 01 e7|e7 01 7c 7f) (mtvrwz v27,r28|mtvsrwz vs59,r28) ++.*: (7d b3 6c 18|18 6c b3 7d) lxsspx vs13,r19,r13 ++.*: (7e 40 6c 18|18 6c 40 7e) lxsspx vs18,0,r13 ++.*: (7d 62 25 19|19 25 62 7d) stxsspx vs43,r2,r4 ++.*: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11 ++.*: (f2 d0 c8 05|05 c8 d0 f2) xsaddsp vs54,vs48,vs25 ++.*: (f1 d2 08 0c|0c 08 d2 f1) xsmaddasp vs14,vs50,vs1 ++.*: (f3 56 50 42|42 50 56 f3) xssubsp vs26,vs22,vs42 ++.*: (f3 75 a0 4e|4e a0 75 f3) xsmaddmsp vs27,vs53,vs52 ++.*: (f1 00 d8 2a|2a d8 00 f1) xsrsqrtesp vs8,vs59 ++.*: (f1 80 48 2e|2e 48 80 f1) xssqrtsp vs12,vs41 ++.*: (f3 2b 00 83|83 00 2b f3) xsmulsp vs57,vs11,vs32 ++.*: (f0 d4 d0 89|89 d0 d4 f0) xsmsubasp vs38,vs20,vs26 ++.*: (f3 53 30 c0|c0 30 53 f3) xsdivsp vs26,vs19,vs6 ++.*: (f0 65 b8 cf|cf b8 65 f0) xsmsubmsp vs35,vs37,vs55 ++.*: (f3 60 40 69|69 40 60 f3) xsresp vs59,vs8 ++.*: (f1 81 0c 0f|0f 0c 81 f1) xsnmaddasp vs44,vs33,vs33 ++.*: (f2 3e f4 4c|4c f4 3e f2) xsnmaddmsp vs17,vs62,vs30 ++.*: (f2 d4 fc 8d|8d fc d4 f2) xsnmsubasp vs54,vs52,vs31 ++.*: (f0 a5 d4 cb|cb d4 a5 f0) xsnmsubmsp vs37,vs5,vs58 ++.*: (f3 d6 65 56|56 65 d6 f3) xxlorc vs30,vs54,vs44 ++.*: (f2 2e ed 91|91 ed 2e f2) xxlnand vs49,vs14,vs29 ++.*: (f3 d6 f5 d1|d1 f5 d6 f3) xxleqv vs62,vs22,vs30 ++.*: (f3 80 b4 2f|2f b4 80 f3) xscvdpspn vs60,vs54 ++.*: (f2 c0 6c 66|66 6c c0 f2) xsrsp vs22,vs45 ++.*: (f3 40 dc a2|a2 dc 40 f3) xscvuxdsp vs26,vs59 ++.*: (f0 c0 8c e3|e3 8c c0 f0) xscvsxdsp vs38,vs49 ++.*: (f3 60 d5 2d|2d d5 60 f3) xscvspdpn vs59,vs26 ++.*: (ff 0e 16 8c|8c 16 0e ff) fmrgow f24,f14,f2 ++.*: (fe c7 2f 8c|8c 2f c7 fe) fmrgew f22,f7,f5 + #pass +diff -rup binutils.orig/gas/testsuite/gas/ppc/xvtlsbb.d binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d +--- binutils.orig/gas/testsuite/gas/ppc/xvtlsbb.d 2020-10-08 13:50:31.314909784 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/xvtlsbb.d 2020-10-08 13:50:58.204826992 +0100 +@@ -7,7 +7,7 @@ + Disassembly of section \.text: + + 0+0 <_start>: +-.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb vs63 ++.*: (f0 02 ff 6e|6e ff 02 f0) xvtlsbb cr0,vs63 + .*: (f0 82 07 6c|6c 07 82 f0) xvtlsbb cr1,vs0 + .*: (f1 02 f7 6e|6e f7 02 f1) xvtlsbb cr2,vs62 + .*: (f1 82 0f 6c|6c 0f 82 f1) xvtlsbb cr3,vs1 +diff -rup binutils.orig/gold/options.cc binutils-2.35.1/gold/options.cc +--- binutils.orig/gold/options.cc 2020-10-08 13:50:31.446909378 +0100 ++++ binutils-2.35.1/gold/options.cc 2020-10-08 13:54:38.747147982 +0100 +@@ -465,6 +465,14 @@ General_options::parse_plugin_opt(const + } + + void ++General_options::parse_no_power10_stubs(const char*, const char*, ++ Command_line*) ++{ ++ this->set_power10_stubs("no"); ++ this->set_user_set_power10_stubs(); ++} ++ ++void + General_options::parse_R(const char* option, const char* arg, + Command_line* cmdline) + { +@@ -1183,6 +1191,27 @@ General_options::finalize() + this->set_start_stop_visibility_enum(elfcpp::STV_PROTECTED); + } + ++ // Parse the --power10-stubs argument. ++ if (!this->user_set_power10_stubs()) ++ { ++ // --power10-stubs without an arg is equivalent to --power10-stubs=yes ++ // but not specifying --power10-stubs at all should be equivalent to ++ // --power10-stubs=auto. This doesn't fit into the notion of ++ // "default_value", used both as a static initializer and to provide ++ // a missing optional arg. Fix it here. ++ this->set_power10_stubs("auto"); ++ this->set_power10_stubs_enum(POWER10_STUBS_AUTO); ++ } ++ else ++ { ++ if (strcmp(this->power10_stubs(), "auto") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_AUTO); ++ else if (strcmp(this->power10_stubs(), "no") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_NO); ++ else if (strcmp(this->power10_stubs(), "yes") == 0) ++ this->set_power10_stubs_enum(POWER10_STUBS_YES); ++ } ++ + // -M is equivalent to "-Map -". + if (this->print_map() && !this->user_set_Map()) + { +diff -rup binutils.orig/gold/options.h binutils-2.35.1/gold/options.h +--- binutils.orig/gold/options.h 2020-10-08 13:50:31.447909375 +0100 ++++ binutils-2.35.1/gold/options.h 2020-10-08 13:54:38.748147979 +0100 +@@ -481,9 +481,9 @@ struct Struct_special : public Struct_va + // After helparg__ should come an initializer list, like + // {"foo", "bar", "baz"} + #define DEFINE_enum(varname__, dashes__, shortname__, default_value__, \ +- helpstring__, helparg__, ...) \ ++ helpstring__, helparg__, optional_arg__, ...) \ + DEFINE_var(varname__, dashes__, shortname__, default_value__, \ +- default_value__, helpstring__, helparg__, false, \ ++ default_value__, helpstring__, helparg__, optional_arg__, \ + const char*, const char*, parse_choices_##varname__, false) \ + private: \ + static void parse_choices_##varname__(const char* option_name, \ +@@ -703,7 +703,7 @@ class General_options + N_("Use DT_NEEDED for all shared libraries")); + + DEFINE_enum(assert, options::ONE_DASH, '\0', NULL, +- N_("Ignored"), N_("[ignored]"), ++ N_("Ignored"), N_("[ignored]"), false, + {"definitions", "nodefinitions", "nosymbolic", "pure-text"}); + + // b +@@ -761,7 +761,7 @@ class General_options + + DEFINE_enum(compress_debug_sections, options::TWO_DASHES, '\0', "none", + N_("Compress .debug_* sections in the output file"), +- ("[none,zlib,zlib-gnu,zlib-gabi]"), ++ ("[none,zlib,zlib-gnu,zlib-gabi]"), false, + {"none", "zlib", "zlib-gnu", "zlib-gabi"}); + + DEFINE_bool(copy_dt_needed_entries, options::TWO_DASHES, '\0', false, +@@ -934,7 +934,7 @@ class General_options + N_("FRACTION")); + + DEFINE_enum(hash_style, options::TWO_DASHES, '\0', DEFAULT_HASH_STYLE, +- N_("Dynamic hash style"), N_("[sysv,gnu,both]"), ++ N_("Dynamic hash style"), N_("[sysv,gnu,both]"), false, + {"sysv", "gnu", "both"}); + + // i +@@ -946,7 +946,7 @@ class General_options + N_("Identical Code Folding. " + "\'--icf=safe\' Folds ctors, dtors and functions whose" + " pointers are definitely not taken"), +- ("[none,all,safe]"), ++ ("[none,all,safe]"), false, + {"none", "all", "safe"}); + + DEFINE_uint(icf_iterations, options::TWO_DASHES , '\0', 0, +@@ -1086,7 +1086,7 @@ class General_options + + DEFINE_enum(orphan_handling, options::TWO_DASHES, '\0', "place", + N_("Orphan section handling"), N_("[place,discard,warn,error]"), +- {"place", "discard", "warn", "error"}); ++ false, {"place", "discard", "warn", "error"}); + + // p + +@@ -1141,6 +1141,12 @@ class General_options + N_("Use posix_fallocate to reserve space in the output file"), + N_("Use fallocate or ftruncate to reserve space")); + ++ DEFINE_enum(power10_stubs, options::TWO_DASHES, '\0', "yes", ++ N_("(PowerPC64 only) stubs use power10 insns"), ++ N_("[=auto,no,yes]"), true, {"auto", "no", "yes"}); ++ DEFINE_special(no_power10_stubs, options::TWO_DASHES, '\0', ++ N_("(PowerPC64 only) stubs do not use power10 insns"), NULL); ++ + DEFINE_bool(preread_archive_symbols, options::TWO_DASHES, '\0', false, + N_("Preread archive symbols when multi-threaded"), NULL); + +@@ -1236,7 +1242,7 @@ class General_options + DEFINE_enum(sort_section, options::TWO_DASHES, '\0', "none", + N_("Sort sections by name. \'--no-text-reorder\'" + " will override \'--sort-section=name\' for .text"), +- N_("[none,name]"), ++ N_("[none,name]"), false, + {"none", "name"}); + + DEFINE_uint(spare_dynamic_tags, options::TWO_DASHES, '\0', 5, +@@ -1287,7 +1293,7 @@ class General_options + NULL); + DEFINE_enum(target2, options::TWO_DASHES, '\0', NULL, + N_("(ARM only) Set R_ARM_TARGET2 relocation type"), +- N_("[rel, abs, got-rel"), ++ N_("[rel, abs, got-rel"), false, + {"rel", "abs", "got-rel"}); + + DEFINE_bool(text_reorder, options::TWO_DASHES, '\0', true, +@@ -1344,7 +1350,7 @@ class General_options + DEFINE_enum(unresolved_symbols, options::TWO_DASHES, '\0', NULL, + N_("How to handle unresolved symbols"), + ("ignore-all,report-all,ignore-in-object-files," +- "ignore-in-shared-libs"), ++ "ignore-in-shared-libs"), false, + {"ignore-all", "report-all", "ignore-in-object-files", + "ignore-in-shared-libs"}); + +@@ -1507,7 +1513,7 @@ class General_options + DEFINE_enum(start_stop_visibility, options::DASH_Z, '\0', "protected", + N_("ELF symbol visibility for synthesized " + "__start_* and __stop_* symbols"), +- ("[default,internal,hidden,protected]"), ++ ("[default,internal,hidden,protected]"), false, + {"default", "internal", "hidden", "protected"}); + DEFINE_bool(text, options::DASH_Z, '\0', false, + N_("Do not permit relocations in read-only segments"), +@@ -1763,6 +1769,20 @@ class General_options + start_stop_visibility_enum() const + { return this->start_stop_visibility_enum_; } + ++ enum Power10_stubs ++ { ++ // Use Power10 insns on @notoc calls/branches, non-Power10 elsewhere. ++ POWER10_STUBS_AUTO, ++ // Don't use Power10 insns ++ POWER10_STUBS_NO, ++ // Always use Power10 insns ++ POWER10_STUBS_YES ++ }; ++ ++ Power10_stubs ++ power10_stubs_enum() const ++ { return this->power10_stubs_enum_; } ++ + private: + // Don't copy this structure. + General_options(const General_options&); +@@ -1826,6 +1846,10 @@ class General_options + set_start_stop_visibility_enum(elfcpp::STV value) + { this->start_stop_visibility_enum_ = value; } + ++ void ++ set_power10_stubs_enum(Power10_stubs value) ++ { this->power10_stubs_enum_ = value; } ++ + // These are called by finalize() to set up the search-path correctly. + void + add_to_library_path_with_sysroot(const std::string& arg) +@@ -1895,6 +1919,8 @@ class General_options + Orphan_handling orphan_handling_enum_; + // Symbol visibility for __start_* / __stop_* magic symbols. + elfcpp::STV start_stop_visibility_enum_; ++ // Power10 stubs option ++ Power10_stubs power10_stubs_enum_; + }; + + // The position-dependent options. We use this to store the state of +diff -rup binutils.orig/gold/powerpc.cc binutils-2.35.1/gold/powerpc.cc +--- binutils.orig/gold/powerpc.cc 2020-10-08 13:50:31.445909381 +0100 ++++ binutils-2.35.1/gold/powerpc.cc 2020-10-08 13:55:52.171921920 +0100 +@@ -647,7 +647,7 @@ class Target_powerpc : public Sized_targ + glink_(NULL), rela_dyn_(NULL), copy_relocs_(), + tlsld_got_offset_(-1U), + stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(), +- power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false), ++ power10_relocs_(false), plt_thread_safe_(false), plt_localentry0_(false), + plt_localentry0_init_(false), has_localentry0_(false), + has_tls_get_addr_opt_(false), + tprel_opt_(parameters->options().tls_optimize()), +@@ -1079,14 +1079,25 @@ class Target_powerpc : public Sized_targ + sym->set_dynsym_index(-1U); + } + ++ void ++ set_power10_relocs() ++ { ++ this->power10_relocs_ = true; ++ } ++ + bool + power10_stubs() const +- { return this->power10_stubs_; } ++ { ++ return (this->power10_relocs_ ++ && (parameters->options().power10_stubs_enum() ++ != General_options::POWER10_STUBS_NO)); ++ } + +- void +- set_power10_stubs() ++ bool ++ power10_stubs_auto() const + { +- this->power10_stubs_ = true; ++ return (parameters->options().power10_stubs_enum() ++ == General_options::POWER10_STUBS_AUTO); + } + + bool +@@ -1097,6 +1108,10 @@ class Target_powerpc : public Sized_targ + plt_localentry0() const + { return this->plt_localentry0_; } + ++ bool ++ has_localentry0() const ++ { return this->has_localentry0_; } ++ + void + set_has_localentry0() + { +@@ -1696,7 +1711,7 @@ class Target_powerpc : public Sized_targ + Branches branch_info_; + Tocsave_loc tocsave_loc_; + +- bool power10_stubs_; ++ bool power10_relocs_; + bool plt_thread_safe_; + bool plt_localentry0_; + bool plt_localentry0_init_; +@@ -4181,6 +4196,7 @@ static const uint32_t cmpwi_11_0 = 0x2c0 + static const uint32_t cror_15_15_15 = 0x4def7b82; + static const uint32_t cror_31_31_31 = 0x4ffffb82; + static const uint32_t ld_0_1 = 0xe8010000; ++static const uint32_t ld_0_11 = 0xe80b0000; + static const uint32_t ld_0_12 = 0xe80c0000; + static const uint32_t ld_2_1 = 0xe8410000; + static const uint32_t ld_2_2 = 0xe8420000; +@@ -4563,9 +4579,9 @@ static const unsigned char glink_eh_fram + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. +- elfcpp::DW_CFA_advance_loc + 1, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_register, 65, 12, +- elfcpp::DW_CFA_advance_loc + 5, ++ elfcpp::DW_CFA_advance_loc + 4, + elfcpp::DW_CFA_restore_extended, 65 + }; + +@@ -4575,9 +4591,20 @@ static const unsigned char glink_eh_fram + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. +- elfcpp::DW_CFA_advance_loc + 1, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_register, 65, 0, +- elfcpp::DW_CFA_advance_loc + 7, ++ elfcpp::DW_CFA_advance_loc + 2, ++ elfcpp::DW_CFA_restore_extended, 65 ++}; ++ ++static const unsigned char glink_eh_frame_fde_64v2_localentry0[] = ++{ ++ 0, 0, 0, 0, // Replaced with offset to .glink. ++ 0, 0, 0, 0, // Replaced with size of .glink. ++ 0, // Augmentation size. ++ elfcpp::DW_CFA_advance_loc + 3, ++ elfcpp::DW_CFA_register, 65, 0, ++ elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_restore_extended, 65 + }; + +@@ -4631,26 +4658,32 @@ class Stub_table : public Output_relaxed + struct Plt_stub_ent + { + Plt_stub_ent(unsigned int off, unsigned int indx) +- : off_(off), indx_(indx), iter_(0), notoc_(0), r2save_(0), localentry0_(0) ++ : off_(off), indx_(indx), iter_(0), notoc_(0), toc_(0), ++ r2save_(0), localentry0_(0), tocoff_(0) + { } + + unsigned int off_; +- unsigned int indx_ : 28; ++ unsigned int indx_; + unsigned int iter_ : 1; + unsigned int notoc_ : 1; ++ unsigned int toc_ : 1; + unsigned int r2save_ : 1; + unsigned int localentry0_ : 1; ++ unsigned int tocoff_ : 8; + }; + struct Branch_stub_ent + { + Branch_stub_ent(unsigned int off, bool notoc, bool save_res) +- : off_(off), iter_(false), notoc_(notoc), save_res_(save_res) ++ : off_(off), iter_(0), notoc_(notoc), toc_(0), save_res_(save_res), ++ tocoff_(0) + { } + + unsigned int off_; +- bool iter_; +- bool notoc_; +- bool save_res_; ++ unsigned int iter_ : 1; ++ unsigned int notoc_ : 1; ++ unsigned int toc_ : 1; ++ unsigned int save_res_ : 1; ++ unsigned int tocoff_ : 8; + }; + typedef typename elfcpp::Elf_types::Elf_Addr Address; + static const Address invalid_address = static_cast
(0) - 1; +@@ -4898,7 +4931,7 @@ class Stub_table : public Output_relaxed + + // Size of a given plt call stub. + unsigned int +- plt_call_size(typename Plt_stub_entries::const_iterator p) const; ++ plt_call_size(typename Plt_stub_entries::iterator p) const; + + unsigned int + plt_call_align(unsigned int bytes) const +@@ -4909,16 +4942,14 @@ class Stub_table : public Output_relaxed + + // Return long branch stub size. + unsigned int +- branch_stub_size(typename Branch_stub_entries::const_iterator p, ++ branch_stub_size(typename Branch_stub_entries::iterator p, + bool* need_lt); + +- bool +- build_tls_opt_head(unsigned char** pp, +- typename Plt_stub_entries::const_iterator cs); ++ void ++ build_tls_opt_head(unsigned char** pp, bool save_lr); + +- bool +- build_tls_opt_tail(unsigned char* p, +- typename Plt_stub_entries::const_iterator cs); ++ void ++ build_tls_opt_tail(unsigned char* p); + + void + plt_error(const Plt_stub_key& p); +@@ -5083,15 +5114,22 @@ Stub_table::add_plt_ca + if (r_type == elfcpp::R_PPC64_REL24_NOTOC) + { + if (!p.second && !p.first->second.notoc_ +- && !this->targ_->power10_stubs()) ++ && (!this->targ_->power10_stubs() ++ || this->targ_->power10_stubs_auto())) + this->need_resize_ = true; + p.first->second.notoc_ = 1; + } +- else if (!tocsave && !p.first->second.localentry0_) ++ else + { +- if (!p.second && !p.first->second.r2save_) ++ if (!p.second && !p.first->second.toc_) + this->need_resize_ = true; +- p.first->second.r2save_ = 1; ++ p.first->second.toc_ = 1; ++ if (!tocsave && !p.first->second.localentry0_) ++ { ++ if (!p.second && !p.first->second.r2save_) ++ this->need_resize_ = true; ++ p.first->second.r2save_ = 1; ++ } + } + } + if (p.second || (this->resizing_ && !p.first->second.iter_)) +@@ -5134,15 +5172,22 @@ Stub_table::add_plt_ca + if (r_type == elfcpp::R_PPC64_REL24_NOTOC) + { + if (!p.second && !p.first->second.notoc_ +- && !this->targ_->power10_stubs()) ++ && (!this->targ_->power10_stubs() ++ || this->targ_->power10_stubs_auto())) + this->need_resize_ = true; + p.first->second.notoc_ = 1; + } +- else if (!tocsave && !p.first->second.localentry0_) ++ else + { +- if (!p.second && !p.first->second.r2save_) ++ if (!p.second && !p.first->second.toc_) + this->need_resize_ = true; +- p.first->second.r2save_ = 1; ++ p.first->second.toc_ = 1; ++ if (!tocsave && !p.first->second.localentry0_) ++ { ++ if (!p.second && !p.first->second.r2save_) ++ this->need_resize_ = true; ++ p.first->second.r2save_ = 1; ++ } + } + } + if (p.second || (this->resizing_ && !p.first->second.iter_)) +@@ -5231,11 +5276,18 @@ Stub_table::add_long_b + Branch_stub_ent ent(this->branch_size_, notoc, save_res); + std::pair p + = this->long_branch_stubs_.insert(std::make_pair(key, ent)); +- if (notoc && !p.first->second.notoc_) ++ if (notoc) + { +- this->need_resize_ = true; ++ if (!p.second && !p.first->second.notoc_) ++ this->need_resize_ = true; + p.first->second.notoc_ = true; + } ++ else ++ { ++ if (!p.second && !p.first->second.toc_) ++ this->need_resize_ = true; ++ p.first->second.toc_ = true; ++ } + gold_assert(save_res == p.first->second.save_res_); + if (p.second || (this->resizing_ && !p.first->second.iter_)) + { +@@ -5330,7 +5382,7 @@ Stub_table::add_eh_fra + if (!this->targ_->has_glink()) + return; + +- typedef typename Plt_stub_entries::const_iterator plt_iter; ++ typedef typename Plt_stub_entries::iterator plt_iter; + std::vector calls; + if (!this->plt_call_stubs_.empty()) + for (plt_iter cs = this->plt_call_stubs_.begin(); +@@ -5491,7 +5543,8 @@ class Output_data_glink : public Output_ + { + if (size == 64) + return (8 +- + (this->targ_->abiversion() < 2 ? 11 * 4 : 14 * 4)); ++ + (this->targ_->abiversion() < 2 ? 11 * 4 ++ : this->targ_->has_localentry0() ? 14 * 4 : 13 * 4)); + return 16 * 4; + } + +@@ -5534,6 +5587,12 @@ Output_data_glink::add + sizeof (Eh_cie<64>::eh_frame_cie), + glink_eh_frame_fde_64v1, + sizeof (glink_eh_frame_fde_64v1)); ++ else if (this->targ_->has_localentry0()) ++ layout->add_eh_frame_for_plt(this, ++ Eh_cie<64>::eh_frame_cie, ++ sizeof (Eh_cie<64>::eh_frame_cie), ++ glink_eh_frame_fde_64v2_localentry0, ++ sizeof (glink_eh_frame_fde_64v2)); + else + layout->add_eh_frame_for_plt(this, + Eh_cie<64>::eh_frame_cie, +@@ -5632,7 +5691,7 @@ Stub_table::define_stu + // output .symtab ordering depends on the order in which symbols + // are added to the linker symtab. We want reproducible output + // so must sort the call stub symbols. +- typedef typename Plt_stub_entries::const_iterator plt_iter; ++ typedef typename Plt_stub_entries::iterator plt_iter; + std::vector sorted; + sorted.resize(this->plt_call_stubs_.size()); + +@@ -5676,7 +5735,7 @@ Stub_table::define_stu + } + } + +- typedef typename Branch_stub_entries::const_iterator branch_iter; ++ typedef typename Branch_stub_entries::iterator branch_iter; + for (branch_iter bs = this->long_branch_stubs_.begin(); + bs != this->long_branch_stubs_.end(); + ++bs) +@@ -5698,88 +5757,72 @@ Stub_table::define_stu + // Emit the start of a __tls_get_addr_opt plt call stub. + + template +-bool +-Stub_table::build_tls_opt_head( +- unsigned char** pp, +- typename Plt_stub_entries::const_iterator cs) ++void ++Stub_table::build_tls_opt_head(unsigned char** pp, ++ bool save_lr) + { +- if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ unsigned char* p = *pp; ++ if (size == 64) + { +- unsigned char* p = *pp; +- if (size == 64) +- { +- write_insn(p, ld_11_3 + 0); +- p += 4; +- write_insn(p, ld_12_3 + 8); +- p += 4; +- write_insn(p, mr_0_3); +- p += 4; +- write_insn(p, cmpdi_11_0); +- p += 4; +- write_insn(p, add_3_12_13); +- p += 4; +- write_insn(p, beqlr); +- p += 4; +- write_insn(p, mr_3_0); +- p += 4; +- if (cs->second.r2save_ && !cs->second.localentry0_) +- { +- write_insn(p, mflr_11); +- p += 4; +- write_insn(p, (std_11_1 + this->targ_->stk_linker())); +- p += 4; +- } +- } +- else ++ write_insn(p, ld_11_3 + 0); ++ p += 4; ++ write_insn(p, ld_12_3 + 8); ++ p += 4; ++ write_insn(p, mr_0_3); ++ p += 4; ++ write_insn(p, cmpdi_11_0); ++ p += 4; ++ write_insn(p, add_3_12_13); ++ p += 4; ++ write_insn(p, beqlr); ++ p += 4; ++ write_insn(p, mr_3_0); ++ p += 4; ++ if (save_lr) + { +- write_insn(p, lwz_11_3 + 0); +- p += 4; +- write_insn(p, lwz_12_3 + 4); ++ write_insn(p, mflr_11); + p += 4; +- write_insn(p, mr_0_3); +- p += 4; +- write_insn(p, cmpwi_11_0); +- p += 4; +- write_insn(p, add_3_12_2); +- p += 4; +- write_insn(p, beqlr); +- p += 4; +- write_insn(p, mr_3_0); +- p += 4; +- write_insn(p, nop); ++ write_insn(p, (std_11_1 + this->targ_->stk_linker())); + p += 4; + } +- *pp = p; +- return true; + } +- return false; +-} +- +-// Emit the tail of a __tls_get_addr_opt plt call stub. +- +-template +-bool +-Stub_table::build_tls_opt_tail( +- unsigned char* p, +- typename Plt_stub_entries::const_iterator cs) +-{ +- if (size == 64 +- && cs->second.r2save_ +- && !cs->second.localentry0_ +- && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ else + { +- write_insn(p, bctrl); ++ write_insn(p, lwz_11_3 + 0); + p += 4; +- write_insn(p, ld_2_1 + this->targ_->stk_toc()); ++ write_insn(p, lwz_12_3 + 4); + p += 4; +- write_insn(p, ld_11_1 + this->targ_->stk_linker()); ++ write_insn(p, mr_0_3); + p += 4; +- write_insn(p, mtlr_11); ++ write_insn(p, cmpwi_11_0); ++ p += 4; ++ write_insn(p, add_3_12_2); ++ p += 4; ++ write_insn(p, beqlr); ++ p += 4; ++ write_insn(p, mr_3_0); ++ p += 4; ++ write_insn(p, nop); + p += 4; +- write_insn(p, blr); +- return true; + } +- return false; ++ *pp = p; ++} ++ ++// Emit the tail of a __tls_get_addr_opt plt call stub. ++ ++template ++void ++Stub_table::build_tls_opt_tail(unsigned char* p) ++{ ++ write_insn(p, bctrl); ++ p += 4; ++ write_insn(p, ld_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ write_insn(p, ld_11_1 + this->targ_->stk_linker()); ++ p += 4; ++ write_insn(p, mtlr_11); ++ p += 4; ++ write_insn(p, blr); + } + + // Emit pc-relative plt call stub code. +@@ -5949,7 +5992,7 @@ build_notoc_offset(unsigned char* p, uin + template + unsigned int + Stub_table::plt_call_size( +- typename Plt_stub_entries::const_iterator p) const ++ typename Plt_stub_entries::iterator p) const + { + if (size == 32) + { +@@ -5961,77 +6004,122 @@ Stub_table::plt_call_s + const Output_data_plt_powerpc* plt; + uint64_t plt_addr = this->plt_off(p, &plt); + plt_addr += plt->address(); +- unsigned int bytes = 0; +- const Symbol* gsym = p->first.sym_; +- if (this->targ_->is_tls_get_addr_opt(gsym)) ++ if (this->targ_->power10_stubs() ++ && this->targ_->power10_stubs_auto()) + { +- if (p->second.r2save_ && !p->second.localentry0_) +- bytes = 13 * 4; +- else +- bytes = 7 * 4; ++ unsigned int bytes = 0; ++ if (p->second.notoc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ bytes = 7 * 4; ++ uint64_t from = this->stub_address() + p->second.off_ + bytes; ++ uint64_t odd = from & 4; ++ uint64_t off = plt_addr - from; ++ if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes += odd + 4 * 4; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes += 7 * 4; ++ else ++ bytes += 8 * 4; ++ bytes = this->plt_call_align(bytes); ++ } ++ unsigned int tail = 0; ++ if (p->second.toc_) ++ { ++ p->second.tocoff_ = bytes; ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ { ++ bytes += 7 * 4; ++ if (p->second.r2save_ && !p->second.localentry0_) ++ { ++ bytes += 2 * 4; ++ tail = 4 * 4; ++ } ++ } ++ if (p->second.r2save_) ++ bytes += 4; ++ uint64_t got_addr ++ = this->targ_->got_section()->output_section()->address(); ++ const Powerpc_relobj* ppcobj = static_cast ++ *>(p->first.object_); ++ got_addr += ppcobj->toc_base_offset(); ++ uint64_t off = plt_addr - got_addr; ++ bytes += 3 * 4 + 4 * (ha(off) != 0); ++ } ++ return bytes + tail; + } +- +- if (p->second.r2save_) +- bytes += 4; +- +- if (this->targ_->power10_stubs()) ++ else + { +- uint64_t from = this->stub_address() + p->second.off_ + bytes; +- if (bytes > 8 * 4) +- from -= 4 * 4; +- uint64_t odd = from & 4; +- uint64_t off = plt_addr - from; +- if (off - odd + (1ULL << 33) < 1ULL << 34) +- bytes += odd + 4 * 4; +- else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) +- bytes += 7 * 4; +- else +- bytes += 8 * 4; +- return bytes; +- } ++ unsigned int bytes = 0; ++ unsigned int tail = 0; ++ if (this->targ_->is_tls_get_addr_opt(p->first.sym_)) ++ { ++ bytes = 7 * 4; ++ if (p->second.r2save_ && !p->second.localentry0_) ++ { ++ bytes = 9 * 4; ++ tail = 4 * 4; ++ } ++ } + +- if (p->second.notoc_) +- { +- uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4; +- if (bytes > 32) +- from -= 4 * 4; +- uint64_t off = plt_addr - from; +- if (off + 0x8000 < 0x10000) +- bytes += 7 * 4; +- else if (off + 0x80008000ULL < 0x100000000ULL) +- bytes += 8 * 4; +- else ++ if (p->second.r2save_) ++ bytes += 4; ++ ++ if (this->targ_->power10_stubs()) + { +- bytes += 8 * 4; +- if (off + 0x800000000000ULL >= 0x1000000000000ULL +- && ((off >> 32) & 0xffff) != 0) +- bytes += 4; +- if (((off >> 32) & 0xffffffffULL) != 0) +- bytes += 4; +- if (hi(off) != 0) +- bytes += 4; +- if (l(off) != 0) +- bytes += 4; ++ uint64_t from = this->stub_address() + p->second.off_ + bytes; ++ uint64_t odd = from & 4; ++ uint64_t off = plt_addr - from; ++ if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes += odd + 4 * 4; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes += 7 * 4; ++ else ++ bytes += 8 * 4; ++ return bytes + tail; + } +- return bytes; +- } + +- uint64_t got_addr = this->targ_->got_section()->output_section()->address(); +- const Powerpc_relobj* ppcobj = static_cast +- *>(p->first.object_); +- got_addr += ppcobj->toc_base_offset(); +- uint64_t off = plt_addr - got_addr; +- bytes += 3 * 4 + 4 * (ha(off) != 0); +- if (this->targ_->abiversion() < 2) +- { +- bool static_chain = parameters->options().plt_static_chain(); +- bool thread_safe = this->targ_->plt_thread_safe(); +- bytes += (4 +- + 4 * static_chain +- + 8 * thread_safe +- + 4 * (ha(off + 8 + 8 * static_chain) != ha(off))); ++ if (p->second.notoc_) ++ { ++ uint64_t from = this->stub_address() + p->second.off_ + bytes + 2 * 4; ++ uint64_t off = plt_addr - from; ++ if (off + 0x8000 < 0x10000) ++ bytes += 7 * 4; ++ else if (off + 0x80008000ULL < 0x100000000ULL) ++ bytes += 8 * 4; ++ else ++ { ++ bytes += 8 * 4; ++ if (off + 0x800000000000ULL >= 0x1000000000000ULL ++ && ((off >> 32) & 0xffff) != 0) ++ bytes += 4; ++ if (((off >> 32) & 0xffffffffULL) != 0) ++ bytes += 4; ++ if (hi(off) != 0) ++ bytes += 4; ++ if (l(off) != 0) ++ bytes += 4; ++ } ++ return bytes + tail; ++ } ++ ++ uint64_t got_addr = this->targ_->got_section()->output_section()->address(); ++ const Powerpc_relobj* ppcobj = static_cast ++ *>(p->first.object_); ++ got_addr += ppcobj->toc_base_offset(); ++ uint64_t off = plt_addr - got_addr; ++ bytes += 3 * 4 + 4 * (ha(off) != 0); ++ if (this->targ_->abiversion() < 2) ++ { ++ bool static_chain = parameters->options().plt_static_chain(); ++ bool thread_safe = this->targ_->plt_thread_safe(); ++ bytes += (4 ++ + 4 * static_chain ++ + 8 * thread_safe ++ + 4 * (ha(off + 8 + 8 * static_chain) != ha(off))); ++ } ++ return bytes + tail; + } +- return bytes; + } + + // Return long branch stub size. +@@ -6039,7 +6127,7 @@ Stub_table::plt_call_s + template + unsigned int + Stub_table::branch_stub_size( +- typename Branch_stub_entries::const_iterator p, ++ typename Branch_stub_entries::iterator p, + bool* need_lt) + { + Address loc = this->stub_address() + this->last_plt_size_ + p->second.off_; +@@ -6053,46 +6141,56 @@ Stub_table::branch_stu + } + + uint64_t off = p->first.dest_ - loc; ++ unsigned int bytes = 0; + if (p->second.notoc_) + { + if (this->targ_->power10_stubs()) + { + Address odd = loc & 4; + if (off + (1 << 25) < 2 << 25) +- return odd + 12; +- if (off - odd + (1ULL << 33) < 1ULL << 34) +- return odd + 16; +- if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) +- return 28; +- return 32; +- } +- off -= 8; +- if (off + 0x8000 < 0x10000) +- return 24; +- if (off + 0x80008000ULL < 0x100000000ULL) +- { +- if (off + 24 + (1 << 25) < 2 << 25) +- return 28; +- return 32; +- } +- unsigned int bytes = 32; +- if (off + 0x800000000000ULL >= 0x1000000000000ULL +- && ((off >> 32) & 0xffff) != 0) +- bytes += 4; +- if (((off >> 32) & 0xffffffffULL) != 0) +- bytes += 4; +- if (hi(off) != 0) +- bytes += 4; +- if (l(off) != 0) +- bytes += 4; +- return bytes; ++ bytes = odd + 12; ++ else if (off - odd + (1ULL << 33) < 1ULL << 34) ++ bytes = odd + 16; ++ else if (off - (8 - odd) + (0x20002ULL << 32) < 0x40004ULL << 32) ++ bytes = 28; ++ else ++ bytes = 32; ++ if (!(p->second.toc_ && this->targ_->power10_stubs_auto())) ++ return bytes; ++ p->second.tocoff_ = bytes; ++ } ++ else ++ { ++ off -= 8; ++ if (off + 0x8000 < 0x10000) ++ return 24; ++ if (off + 0x80008000ULL < 0x100000000ULL) ++ { ++ if (off + 24 + (1 << 25) < 2 << 25) ++ return 28; ++ return 32; ++ } ++ ++ bytes = 32; ++ if (off + 0x800000000000ULL >= 0x1000000000000ULL ++ && ((off >> 32) & 0xffff) != 0) ++ bytes += 4; ++ if (((off >> 32) & 0xffffffffULL) != 0) ++ bytes += 4; ++ if (hi(off) != 0) ++ bytes += 4; ++ if (l(off) != 0) ++ bytes += 4; ++ return bytes; ++ } + } + + if (off + (1 << 25) < 2 << 25) +- return 4; +- if (!this->targ_->power10_stubs()) ++ return bytes + 4; ++ if (!this->targ_->power10_stubs() ++ || (p->second.toc_ && this->targ_->power10_stubs_auto())) + *need_lt = true; +- return 16; ++ return bytes + 16; + } + + template +@@ -6128,6 +6226,10 @@ Stub_table::do_write(O + if (size == 64 + && this->targ_->power10_stubs()) + { ++ const Output_data_got_powerpc* got ++ = this->targ_->got_section(); ++ Address got_os_addr = got->output_section()->address(); ++ + if (!this->plt_call_stubs_.empty()) + { + // Write out plt call stubs. +@@ -6137,22 +6239,94 @@ Stub_table::do_write(O + ++cs) + { + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); +- if (cs->second.r2save_) +- { +- write_insn(p, std_2_1 + this->targ_->stk_toc()); +- p += 4; +- } + const Output_data_plt_powerpc* plt; + Address pltoff = this->plt_off(cs, &plt); + Address plt_addr = pltoff + plt->address(); +- Address from = this->stub_address() + (p - oview); +- Address delta = plt_addr - from; +- p = build_power10_offset(p, delta, from & 4, true); +- write_insn(p, mtctr_12); +- p += 4; +- if (!this->build_tls_opt_tail(p, cs)) +- write_insn(p, bctr); ++ if (this->targ_->power10_stubs_auto()) ++ { ++ if (cs->second.notoc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_head(&p, false); ++ Address from = this->stub_address() + (p - oview); ++ Address delta = plt_addr - from; ++ p = build_power10_offset(p, delta, from & 4, ++ true); ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ p += 4; ++ p = oview + this->plt_call_align(p - oview); ++ } ++ if (cs->second.toc_) ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr ++ = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } ++ const Powerpc_relobj* ppcobj ++ = static_cast*>( ++ cs->first.object_); ++ Address got_addr = got_os_addr + ppcobj->toc_base_offset(); ++ Address off = plt_addr - got_addr; ++ ++ if (off + 0x80008000 > 0xffffffff || (off & 7) != 0) ++ this->plt_error(cs->first); ++ ++ if (cs->second.r2save_) ++ { ++ write_insn(p, std_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ } ++ if (ha(off) != 0) ++ { ++ write_insn(p, addis_12_2 + ha(off)); ++ p += 4; ++ write_insn(p, ld_12_12 + l(off)); ++ p += 4; ++ } ++ else ++ { ++ write_insn(p, ld_12_2 + l(off)); ++ p += 4; ++ } ++ write_insn(p, mtctr_12); ++ p += 4; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else ++ write_insn(p, bctr); ++ } ++ } ++ else ++ { ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr ++ = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } ++ if (cs->second.r2save_) ++ { ++ write_insn(p, std_2_1 + this->targ_->stk_toc()); ++ p += 4; ++ } ++ Address from = this->stub_address() + (p - oview); ++ Address delta = plt_addr - from; ++ p = build_power10_offset(p, delta, from & 4, true); ++ write_insn(p, mtctr_12); ++ p += 4; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else ++ write_insn(p, bctr); ++ } + } + } + +@@ -6168,19 +6342,76 @@ Stub_table::do_write(O + p = oview + off; + Address loc = this->stub_address() + off; + Address delta = bs->first.dest_ - loc; +- if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25) ++ if (this->targ_->power10_stubs_auto()) + { +- unsigned char* startp = p; +- p = build_power10_offset(p, delta, loc & 4, false); +- delta -= p - startp; ++ if (bs->second.notoc_) ++ { ++ unsigned char* startp = p; ++ p = build_power10_offset(p, delta, ++ loc & 4, false); ++ delta -= p - startp; ++ startp = p; ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } ++ p += 4; ++ delta -= p - startp; ++ } ++ if (bs->second.toc_) ++ { ++ if (delta + (1 << 25) >= 2 << 25) ++ { ++ Address brlt_addr ++ = this->targ_->find_branch_lookup_table(bs->first.dest_); ++ gold_assert(brlt_addr != invalid_address); ++ brlt_addr += this->targ_->brlt_section()->address(); ++ Address got_addr = got_os_addr + bs->first.toc_base_off_; ++ Address brltoff = brlt_addr - got_addr; ++ if (ha(brltoff) == 0) ++ { ++ write_insn(p, ld_12_2 + l(brltoff)); ++ p += 4; ++ } ++ else ++ { ++ write_insn(p, addis_12_2 + ha(brltoff)); ++ p += 4; ++ write_insn(p, ld_12_12 + l(brltoff)); ++ p += 4; ++ } ++ } ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } ++ } + } +- if (delta + (1 << 25) < 2 << 25) +- write_insn(p, b | (delta & 0x3fffffc)); + else + { +- write_insn(p, mtctr_12); +- p += 4; +- write_insn(p, bctr); ++ if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25) ++ { ++ unsigned char* startp = p; ++ p = build_power10_offset(p, delta, ++ loc & 4, false); ++ delta -= p - startp; ++ } ++ if (delta + (1 << 25) < 2 << 25) ++ write_insn(p, b | (delta & 0x3fffffc)); ++ else ++ { ++ write_insn(p, mtctr_12); ++ p += 4; ++ write_insn(p, bctr); ++ } + } + } + } +@@ -6204,7 +6435,11 @@ Stub_table::do_write(O + Address plt_addr = pltoff + plt->address(); + + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ } + if (cs->second.r2save_) + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); +@@ -6241,7 +6476,11 @@ Stub_table::do_write(O + } + write_insn(p, mtctr_12); + p += 4; +- if (!this->build_tls_opt_tail(p, cs)) ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); ++ else + write_insn(p, bctr); + } + } +@@ -6292,8 +6531,12 @@ Stub_table::do_write(O + } + + p = oview + cs->second.off_; +- if (this->build_tls_opt_head(&p, cs)) +- use_fake_dep = thread_safe; ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ { ++ bool save_lr = cs->second.r2save_ && !cs->second.localentry0_; ++ this->build_tls_opt_head(&p, save_lr); ++ use_fake_dep = thread_safe; ++ } + if (cs->second.r2save_) + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); +@@ -6355,8 +6598,10 @@ Stub_table::do_write(O + write_insn(p, ld_2_2 + l(off + 8)); + p += 4; + } +- if (this->build_tls_opt_tail(p, cs)) +- ; ++ if (cs->second.r2save_ ++ && !cs->second.localentry0_ ++ && this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_tail(p); + else if (thread_safe && !use_fake_dep) + { + write_insn(p, cmpldi_2_0); +@@ -6437,7 +6682,8 @@ Stub_table::do_write(O + plt_addr += plt->address(); + + p = oview + cs->second.off_; +- this->build_tls_opt_head(&p, cs); ++ if (this->targ_->is_tls_get_addr_opt(cs->first.sym_)) ++ this->build_tls_opt_head(&p, false); + if (parameters->options().output_is_position_independent()) + { + Address got_addr; +@@ -6577,15 +6823,25 @@ Output_data_glink::do_ + } + else + { ++ if (this->targ_->has_localentry0()) ++ { ++ write_insn(p, std_2_1 + 24), p += 4; ++ } + write_insn(p, mflr_0), p += 4; + write_insn(p, bcl_20_31), p += 4; + write_insn(p, mflr_11), p += 4; +- write_insn(p, std_2_1 + 24), p += 4; +- write_insn(p, ld_2_11 + l(-16)), p += 4; + write_insn(p, mtlr_0), p += 4; ++ if (this->targ_->has_localentry0()) ++ { ++ write_insn(p, ld_0_11 + l(-20)), p += 4; ++ } ++ else ++ { ++ write_insn(p, ld_0_11 + l(-16)), p += 4; ++ } + write_insn(p, sub_12_12_11), p += 4; +- write_insn(p, add_11_2_11), p += 4; +- write_insn(p, addi_0_12 + l(-48)), p += 4; ++ write_insn(p, add_11_0_11), p += 4; ++ write_insn(p, addi_0_12 + l(-44)), p += 4; + write_insn(p, ld_12_11 + 0), p += 4; + write_insn(p, srdi_0_0_2), p += 4; + write_insn(p, mtctr_12), p += 4; +@@ -8230,7 +8486,7 @@ Target_powerpc::Scan:: + case elfcpp::R_PPC64_GOT_TLSLD_PCREL34: + case elfcpp::R_PPC64_GOT_DTPREL_PCREL34: + case elfcpp::R_PPC64_GOT_TPREL_PCREL34: +- target->set_power10_stubs(); ++ target->set_power10_relocs(); + break; + default: + break; +@@ -9027,7 +9283,7 @@ Target_powerpc::Scan:: + case elfcpp::R_PPC64_GOT_TLSLD_PCREL34: + case elfcpp::R_PPC64_GOT_DTPREL_PCREL34: + case elfcpp::R_PPC64_GOT_TPREL_PCREL34: +- target->set_power10_stubs(); ++ target->set_power10_relocs(); + break; + default: + break; +@@ -9369,6 +9625,13 @@ Target_powerpc::scan_r + needs_special_offset_handling, + local_symbol_count, + plocal_symbols); ++ ++ if (this->plt_localentry0_ && this->power10_relocs_) ++ { ++ gold_warning(_("--plt-localentry is incompatible with " ++ "power10 pc-relative code")); ++ this->plt_localentry0_ = false; ++ } + } + + // Functor class for processing the global symbol table. +@@ -10176,18 +10439,28 @@ Target_powerpc::Reloca + elfcpp::Shdr shdr(relinfo->reloc_shdr); + size_t reloc_count = shdr.get_sh_size() / reloc_size; + if (size == 64 ++ && r_type != elfcpp::R_PPC64_REL24_NOTOC) ++ value += ent->tocoff_; ++ if (size == 64 + && ent->r2save_ +- && r_type == elfcpp::R_PPC64_REL24_NOTOC) +- value += 4; +- else if (size == 64 +- && ent->r2save_ +- && relnum < reloc_count - 1) ++ && !(gsym != NULL ++ && target->is_tls_get_addr_opt(gsym))) + { +- Reltype next_rela(preloc + reloc_size); +- if (elfcpp::elf_r_type(next_rela.get_r_info()) +- == elfcpp::R_PPC64_TOCSAVE +- && next_rela.get_r_offset() == rela.get_r_offset() + 4) +- value += 4; ++ if (r_type == elfcpp::R_PPC64_REL24_NOTOC) ++ { ++ if (!(target->power10_stubs() ++ && target->power10_stubs_auto())) ++ value += 4; ++ } ++ else if (relnum < reloc_count - 1) ++ { ++ Reltype next_rela(preloc + reloc_size); ++ if (elfcpp::elf_r_type(next_rela.get_r_info()) ++ == elfcpp::R_PPC64_TOCSAVE ++ && (next_rela.get_r_offset() ++ == rela.get_r_offset() + 4)) ++ value += 4; ++ } + } + localentry0 = ent->localentry0_; + has_stub_value = true; +@@ -10795,8 +11068,14 @@ Target_powerpc::Reloca + value = (value - target->savres_section()->address() + + stub_table->branch_size()); + else +- value = (stub_table->stub_address() + stub_table->plt_size() +- + ent->off_); ++ { ++ value = (stub_table->stub_address() ++ + stub_table->plt_size() ++ + ent->off_); ++ if (size == 64 ++ && r_type != elfcpp::R_PPC64_REL24_NOTOC) ++ value += ent->tocoff_; ++ } + has_stub_value = true; + } + } +diff -rup binutils.orig/ld/emultempl/ppc64elf.em binutils-2.35.1/ld/emultempl/ppc64elf.em +--- binutils.orig/ld/emultempl/ppc64elf.em 2020-10-08 13:50:30.728911588 +0100 ++++ binutils-2.35.1/ld/emultempl/ppc64elf.em 2020-10-08 13:55:41.516954722 +0100 +@@ -32,13 +32,15 @@ fragment <tls_sec != NULL + && !no_tls_opt) + { + /* Size the sections. This is premature, but we want to know the +@@ -323,8 +337,6 @@ ppc_before_allocation (void) + sort_toc_sections (&toc_os->children, NULL, NULL); + } + } +- +- gld${EMULATION_NAME}_before_allocation (); + } + + struct hook_stub_info +@@ -686,6 +698,7 @@ enum ppc64_opt + OPTION_NO_PLT_LOCALENTRY, + OPTION_POWER10_STUBS, + OPTION_NO_POWER10_STUBS, ++ OPTION_NO_PCREL_OPT, + OPTION_STUBSYMS, + OPTION_NO_STUBSYMS, + OPTION_SAVRES, +@@ -717,6 +730,7 @@ PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST + { "plt-localentry", optional_argument, NULL, OPTION_PLT_LOCALENTRY }, + { "no-plt-localentry", no_argument, NULL, OPTION_NO_PLT_LOCALENTRY }, + { "power10-stubs", optional_argument, NULL, OPTION_POWER10_STUBS }, ++ { "no-pcrel-optimize", no_argument, NULL, OPTION_NO_PCREL_OPT }, + { "no-power10-stubs", no_argument, NULL, OPTION_NO_POWER10_STUBS }, + { "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS }, + { "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS }, +@@ -776,6 +790,9 @@ PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_ + --power10-stubs [=auto] Use Power10 PLT call stubs (default auto)\n" + )); + fprintf (file, _("\ ++ --no-pcrel-optimize Don'\''t perform R_PPC64_PCREL_OPT optimization\n" ++ )); ++ fprintf (file, _("\ + --no-power10-stubs Don'\''t use Power10 PLT call stubs\n" + )); + fprintf (file, _("\ +@@ -909,6 +926,10 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI + params.power10_stubs = 0; + break; + ++ case OPTION_NO_PCREL_OPT: ++ params.no_pcrel_opt = 1; ++ break; ++ + case OPTION_STUBSYMS: + params.emit_stub_syms = 1; + break; +@@ -985,6 +1006,7 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI + params.no_multi_toc = 1; + no_toc_sort = 1; + params.plt_static_chain = 1; ++ params.no_pcrel_opt = 1; + return FALSE; + ' + +diff -rup binutils.orig/ld/testsuite/ld-powerpc/elfv2so.d binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d +--- binutils.orig/ld/testsuite/ld-powerpc/elfv2so.d 2020-10-08 13:50:30.844911231 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/elfv2so.d 2020-10-08 13:51:12.622782597 +0100 +@@ -74,12 +74,11 @@ Disassembly of section \.text: + .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 + .*: (42 9f 00 05|05 00 9f 42) bcl .* + .*: (7d 68 02 a6|a6 02 68 7d) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) + .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 ++.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\) + .*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12 +-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11 +-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48 ++.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 ++.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44 + .*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\) + .*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2 + .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 +@@ -87,16 +86,16 @@ Disassembly of section \.text: + .*: (4e 80 04 20|20 04 80 4e) bctr + + .* : +-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve> + + .* : +-.*: (4b ff ff b8|b8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve> +diff -rup binutils.orig/ld/testsuite/ld-powerpc/notoc2.d binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d +--- binutils.orig/ld/testsuite/ld-powerpc/notoc2.d 2020-10-08 13:50:30.846911225 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/notoc2.d 2020-10-08 13:51:12.622782597 +0100 +@@ -22,8 +22,8 @@ Disassembly of section \.text: + .*: (39 80 ff ff|ff ff 80 39) + .*: (06 10 00 00|00 00 10 06) pla r12,0 + .*: (39 80 00 00|00 00 80 39) +-.*: (06 10 00 00|00 00 10 06) pla r3,92 +-.*: (38 60 00 5c|5c 00 60 38) ++.*: (06 10 00 00|00 00 10 06) pla r3,88 ++.*: (38 60 00 58|58 00 60 38) + .*: (4b ff ff 99|99 ff ff 4b) bl .* <.*\.plt_call\.puts> + .*: (60 00 00 00|00 00 00 60) nop + #pass +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsdesc.wf binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf +--- binutils.orig/ld/testsuite/ld-powerpc/tlsdesc.wf 2020-10-08 13:50:30.848911219 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc.wf 2020-10-08 13:51:12.622782597 +0100 +@@ -38,9 +38,9 @@ Contents of the \.eh_frame section: + DW_CFA_nop + + 0+4c 0+14 0+50 FDE cie=0+ pc=0+2f8\.\.0+32c +- DW_CFA_advance_loc: 4 to 0+2fc ++ DW_CFA_advance_loc: 8 to 0+300 + DW_CFA_register: r65 in r12 +- DW_CFA_advance_loc: 20 to 0+310 ++ DW_CFA_advance_loc: 16 to 0+310 + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=0+2e0\.\.0+2ec +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsdesc2.d binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d +--- binutils.orig/ld/testsuite/ld-powerpc/tlsdesc2.d 2020-10-08 13:50:30.846911225 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.d 2020-10-08 13:51:12.622782597 +0100 +@@ -53,12 +53,11 @@ Disassembly of section \.text: + .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 + .*: (42 9f 00 05|05 00 9f 42) bcl .* + .*: (7d 68 02 a6|a6 02 68 7d) mflr r11 +-.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\) +-.*: (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) + .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 ++.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\) + .*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12 +-.*: (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11 +-.*: (38 0c ff d0|d0 ff 0c 38) addi r0,r12,-48 ++.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 ++.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44 + .*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\) + .*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2 + .*: (7d 89 03 a6|a6 03 89 7d) mtctr r12 +@@ -66,4 +65,4 @@ Disassembly of section \.text: + .*: (4e 80 04 20|20 04 80 4e) bctr + + .* <__tls_get_addr_opt@plt>: +-.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve> ++.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve> +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsdesc2.wf binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf +--- binutils.orig/ld/testsuite/ld-powerpc/tlsdesc2.wf 2020-10-08 13:50:30.850911213 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsdesc2.wf 2020-10-08 13:51:12.622782597 +0100 +@@ -37,10 +37,10 @@ Contents of the \.eh_frame section: + DW_CFA_nop + DW_CFA_nop + +-0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+354 +- DW_CFA_advance_loc: 4 to 0+31c ++0+4c 0+14 0+50 FDE cie=0+ pc=0+318\.\.0+350 ++ DW_CFA_advance_loc: 8 to 0+320 + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to 0+338 ++ DW_CFA_advance_loc: 8 to 0+328 + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=0+300\.\.0+30c +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsopt5.d binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d +--- binutils.orig/ld/testsuite/ld-powerpc/tlsopt5.d 2020-10-08 13:50:30.843911234 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.d 2020-10-08 13:51:12.623782594 +0100 +@@ -49,12 +49,11 @@ Disassembly of section \.text: + .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 + .*: (05 00 9f 42|42 9f 00 05) bcl .* + .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\) + .*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 ++.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\) + .*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12 +-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11 +-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48 ++.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11 ++.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44 + .*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\) + .*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2 + .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +@@ -62,7 +61,7 @@ Disassembly of section \.text: + .*: (20 04 80 4e|4e 80 04 20) bctr + + .* <__tls_get_addr_opt@plt>: +-.* (c8 ff ff 4b|4b ff ff c8) b .* ++.* (cc ff ff 4b|4b ff ff cc) b .* + + .* : +-.*: (c4 ff ff 4b|4b ff ff c4) b .* ++.*: (c8 ff ff 4b|4b ff ff c8) b .* +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsopt5.wf binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf +--- binutils.orig/ld/testsuite/ld-powerpc/tlsopt5.wf 2020-10-08 13:50:30.844911231 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt5.wf 2020-10-08 13:51:12.623782594 +0100 +@@ -16,9 +16,9 @@ Contents of the \.eh_frame section: + DW_CFA_restore_extended: r65 + + 0+2c 0+14 0+30 FDE cie=0+ pc=.* +- DW_CFA_advance_loc: 4 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_restore_extended: r65 + + 0+44 0+10 0+48 FDE cie=0+ pc=.* +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsopt6.d binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d +--- binutils.orig/ld/testsuite/ld-powerpc/tlsopt6.d 2020-10-08 13:50:30.848911219 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.d 2020-10-08 13:51:12.623782594 +0100 +@@ -67,12 +67,11 @@ Disassembly of section \.text: + .*: (a6 02 08 7c|7c 08 02 a6) mflr r0 + .*: (05 00 9f 42|42 9f 00 05) bcl .* + .*: (a6 02 68 7d|7d 68 02 a6) mflr r11 +-.*: (18 00 41 f8|f8 41 00 18) std r2,24\(r1\) +-.*: (f0 ff 4b e8|e8 4b ff f0) ld r2,-16\(r11\) + .*: (a6 03 08 7c|7c 08 03 a6) mtlr r0 ++.*: (f0 ff 0b e8|e8 0b ff f0) ld r0,-16\(r11\) + .*: (50 60 8b 7d|7d 8b 60 50) subf r12,r11,r12 +-.*: (14 5a 62 7d|7d 62 5a 14) add r11,r2,r11 +-.*: (d0 ff 0c 38|38 0c ff d0) addi r0,r12,-48 ++.*: (14 5a 60 7d|7d 60 5a 14) add r11,r0,r11 ++.*: (d4 ff 0c 38|38 0c ff d4) addi r0,r12,-44 + .*: (00 00 8b e9|e9 8b 00 00) ld r12,0\(r11\) + .*: (82 f0 00 78|78 00 f0 82) rldicl r0,r0,62,2 + .*: (a6 03 89 7d|7d 89 03 a6) mtctr r12 +@@ -80,7 +79,7 @@ Disassembly of section \.text: + .*: (20 04 80 4e|4e 80 04 20) bctr + + .* <__tls_get_addr_opt@plt>: +-.* (c8 ff ff 4b|4b ff ff c8) b .* ++.* (cc ff ff 4b|4b ff ff cc) b .* + + .* : +-.*: (c4 ff ff 4b|4b ff ff c4) b .* ++.*: (c8 ff ff 4b|4b ff ff c8) b .* +diff -rup binutils.orig/ld/testsuite/ld-powerpc/tlsopt6.wf binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf +--- binutils.orig/ld/testsuite/ld-powerpc/tlsopt6.wf 2020-10-08 13:50:30.845911228 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-powerpc/tlsopt6.wf 2020-10-08 13:51:12.623782594 +0100 +@@ -38,9 +38,9 @@ Contents of the \.eh_frame section: + DW_CFA_nop + + 0+4c 0+14 0+50 FDE cie=0+ pc=.* +- DW_CFA_advance_loc: 4 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_register: r65 in r0 +- DW_CFA_advance_loc: 28 to .* ++ DW_CFA_advance_loc: 8 to .* + DW_CFA_restore_extended: r65 + + 0+64 0+10 0+68 FDE cie=0+ pc=.* +diff -rup binutils.orig/opcodes/ppc-opc.c binutils-2.35.1/opcodes/ppc-opc.c +--- binutils.orig/opcodes/ppc-opc.c 2020-10-08 13:50:31.025910674 +0100 ++++ binutils-2.35.1/opcodes/ppc-opc.c 2020-10-08 13:56:36.923784122 +0100 +@@ -4441,7 +4441,7 @@ const struct powerpc_opcode powerpc_opco + {"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}}, +-{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {OBF, VA, VB}}, ++{"vcmpuq", VX (4, 257), VXBF_MASK, POWER10, 0, {BF, VA, VB}}, + {"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslq", VX (4, 261), VX_MASK, POWER10, 0, {VD, VA, VB}}, +@@ -4459,7 +4459,7 @@ const struct powerpc_opcode powerpc_opco + {"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}}, + {"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}}, +-{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {OBF, VA, VB}}, ++{"vcmpsq", VX (4, 321), VXBF_MASK, POWER10, 0, {BF, VA, VB}}, + {"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, + {"vrlqnm", VX (4, 325), VX_MASK, POWER10, 0, {VD, VA, VB}}, +@@ -6114,6 +6114,7 @@ const struct powerpc_opcode powerpc_opco + {"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, + + {"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}}, ++{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}}, + {"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}}, + {"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}}, + +@@ -6236,7 +6237,7 @@ const struct powerpc_opcode powerpc_opco + + {"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}}, + +-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}}, ++{"icbt", X(31,22), X_MASK, POWER5|BOOKE|PPCE300, 0, {CT, RA0, RB}}, + + {"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}}, + {"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}}, +@@ -6302,9 +6303,9 @@ const struct powerpc_opcode powerpc_opco + {"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}}, + {"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}}, + +-{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}}, + {"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}}, + {"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}}, ++{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}}, + {"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}}, + + {"lbarx", X(31,52), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}}, +@@ -6354,6 +6355,7 @@ const struct powerpc_opcode powerpc_opco + {"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}}, + {"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}}, + ++{"msgsndu", XRTRA(31,78,0,0), XRTRA_MASK, POWER9, 0, {RB}}, + {"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}}, + {"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA, RS, RB}}, + +@@ -6387,6 +6389,7 @@ const struct powerpc_opcode powerpc_opco + + {"lxvrdx", X(31,109), XX1_MASK, POWER10, 0, {XT6, RA0, RB}}, + ++{"msgclru", XRTRA(31,110,0,0), XRTRA_MASK, POWER9, 0, {RB}}, + {"mvidsplt", X(31,110), X_MASK, E6500, 0, {VD, RA, RB}}, + + {"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}}, +@@ -6489,9 +6492,9 @@ const struct powerpc_opcode powerpc_opco + + {"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}}, + +-{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}}, + {"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}}, + {"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}}, ++{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}}, + {"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}}, + + {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, +@@ -6738,11 +6741,13 @@ const struct powerpc_opcode powerpc_opco + + {"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}}, + {"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}}, ++{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}}, + {"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}}, + {"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}}, + {"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}}, + {"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}}, + {"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}}, ++{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}}, + {"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}}, + {"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}}, + {"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}}, +@@ -6753,9 +6758,12 @@ const struct powerpc_opcode powerpc_opco + {"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}}, + {"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}}, + {"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}}, ++{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}}, + {"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}}, +@@ -6769,16 +6777,28 @@ const struct powerpc_opcode powerpc_opco + {"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}}, ++{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}}, + {"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}}, + {"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}}, + {"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}}, + {"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}}, + {"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}}, + {"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}}, + {"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}}, + {"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}}, ++{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}}, + {"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, + {"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, + {"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}}, +@@ -6794,20 +6814,37 @@ const struct powerpc_opcode powerpc_opco + {"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}}, + {"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}}, ++{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}}, + {"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}}, + {"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}}, + {"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}}, + {"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}}, + {"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}}, +@@ -6824,6 +6861,14 @@ const struct powerpc_opcode powerpc_opco + {"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}}, + {"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}}, ++{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfuspgr0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfuspgr1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}}, ++{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}}, + {"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}}, + {"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}}, + {"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}}, +@@ -6848,18 +6893,36 @@ const struct powerpc_opcode powerpc_opco + {"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}}, + {"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}}, + {"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}}, ++{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}}, + {"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}}, + {"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}}, +-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}}, ++{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}}, ++{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}}, ++{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}}, + {"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}}, +@@ -6873,12 +6936,25 @@ const struct powerpc_opcode powerpc_opco + {"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}}, + {"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}}, ++{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}}, ++{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}}, + {"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}}, + {"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}}, + {"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}}, ++{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}}, ++{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}}, ++{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}}, + {"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}}, + {"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}}, + {"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}}, +@@ -7051,14 +7127,15 @@ const struct powerpc_opcode powerpc_opco + + {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}}, + +-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}}, +- +-{"miso", 0x7f5ad378, 0xffffffff, E6500, 0, {0}}, +- +-/* The "yield", "mdoio" and "mdoom" instructions are extended mnemonics for +- "or rX,rX,rX", with rX being r27, r29 and r30 respectively. */ ++/* or 26,26,26 */ ++{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}}, ++/* or 27,27,27 */ + {"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}}, ++/* or 28,28,28 */ ++{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}}, ++/* or 29,29,29 */ + {"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}}, ++/* or 30,30,30 */ + {"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}}, + {"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}}, + {"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}}, +@@ -7124,8 +7201,10 @@ const struct powerpc_opcode powerpc_opco + + {"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}}, + {"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}}, ++{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}}, + {"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}}, + {"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}}, ++{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}}, + {"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}}, + {"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}}, + {"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}}, +@@ -7138,13 +7217,20 @@ const struct powerpc_opcode powerpc_opco + {"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}}, + {"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}}, + {"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}}, ++{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}}, + {"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}}, + {"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}}, +@@ -7155,13 +7241,24 @@ const struct powerpc_opcode powerpc_opco + {"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}}, + {"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}}, + {"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}}, + {"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}}, + {"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}}, + {"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}}, + {"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}}, + {"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}}, + {"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}}, ++{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}}, + {"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}}, + {"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}}, +@@ -7177,20 +7274,38 @@ const struct powerpc_opcode powerpc_opco + {"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}}, + {"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}}, + {"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}}, ++{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}}, ++{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}}, + {"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}}, + {"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}}, + {"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}}, + {"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}}, + {"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}}, +@@ -7207,6 +7322,13 @@ const struct powerpc_opcode powerpc_opco + {"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}}, + {"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}}, ++{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtuspgr0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtuspgr1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}}, ++{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}}, + {"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}}, + {"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}}, + {"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}}, +@@ -7221,12 +7343,44 @@ const struct powerpc_opcode powerpc_opco + {"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}}, + {"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}}, + {"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}}, ++{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}}, + {"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}}, ++{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}}, ++{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}}, ++{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}}, ++{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}}, ++{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}}, ++{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}}, + {"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}}, + {"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}}, + {"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}}, +@@ -8301,7 +8455,7 @@ const struct powerpc_opcode powerpc_opco + {"xxgenpcvdm", X(60,949), XX1_MASK, POWER10, PPCVLE, {XT6, VB, UIMM}}, + {"xvxexpdp", XX2VA(60,475,0),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxsigdp", XX2VA(60,475,1),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, +-{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {OBF, XB6}}, ++{"xvtlsbb", XX2VA(60,475,2),XX2BF_MASK, POWER10, PPCVLE, {BF, XB6}}, + {"xxbrh", XX2VA(60,475,7),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, + {"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, +--- /dev/null 2020-10-08 09:15:33.282859415 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/be.d 2020-10-08 13:51:29.102731857 +0100 +@@ -0,0 +1,17 @@ ++#objdump: -d -Mcom ++#as: -mcom -be ++#name: BE only instructions ++ ++.* ++ ++Disassembly of section \.text: ++ ++0+00 : ++.*: ba 8a 00 10 lmw r20,16\(r10\) ++.*: 7d 4b 0c aa lswi r10,r11,1 ++.*: 7d 8b 04 aa lswi r12,r11,32 ++.*: 7d 4b 64 2a lswx r10,r11,r12 ++.*: be 8a 00 10 stmw r20,16\(r10\) ++.*: 7d 4b 0d aa stswi r10,r11,1 ++.*: 7d 4b 05 aa stswi r10,r11,32 ++.*: 7d 4b 65 2a stswx r10,r11,r12 +--- /dev/null 2020-10-08 09:15:33.282859415 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/be.s 2020-10-08 13:51:29.102731857 +0100 +@@ -0,0 +1,10 @@ ++ .text ++start: ++ lmw 20,16(10) ++ lswi 10,11,1 ++ lswi 12,11,32 ++ lswx 10,11,12 ++ stmw 20,16(10) ++ stswi 10,11,1 ++ stswi 10,11,32 ++ stswx 10,11,12 +--- /dev/null 2020-10-08 09:15:33.282859415 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/le_error.d 2020-10-08 13:51:29.102731857 +0100 +@@ -0,0 +1,3 @@ ++#as: -mcom -le ++#source: be.s ++#error_output: le_error.l +--- /dev/null 2020-10-08 09:15:33.282859415 +0100 ++++ binutils-2.35.1/gas/testsuite/gas/ppc/le_error.l 2020-10-08 13:51:29.102731857 +0100 +@@ -0,0 +1,9 @@ ++.*Assembler messages: ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian ++.*invalid when little-endian diff --git a/binutils-aarch64-condbranch-relocs.patch b/binutils-aarch64-condbranch-relocs.patch new file mode 100644 index 0000000..b12070f --- /dev/null +++ b/binutils-aarch64-condbranch-relocs.patch @@ -0,0 +1,93 @@ +diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.35/bfd/elfnn-aarch64.c +--- binutils.orig/bfd/elfnn-aarch64.c 2020-09-10 17:03:31.738458044 +0100 ++++ binutils-2.35/bfd/elfnn-aarch64.c 2020-09-10 17:04:03.643344898 +0100 +@@ -5445,7 +5445,6 @@ elfNN_aarch64_final_link_relocate (reloc + bfd_vma orig_value = value; + bfd_boolean resolved_to_zero; + bfd_boolean abs_symbol_p; +- bfd_boolean via_plt_p; + + globals = elf_aarch64_hash_table (info); + +@@ -5467,8 +5466,6 @@ elfNN_aarch64_final_link_relocate (reloc + : bfd_is_und_section (sym_sec)); + abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root); + +- via_plt_p = (globals->root.splt != NULL && h != NULL +- && h->plt.offset != (bfd_vma) - 1); + + /* Since STT_GNU_IFUNC symbol must go through PLT, we handle + it here if it is defined in a non-shared object. */ +@@ -5805,23 +5802,12 @@ elfNN_aarch64_final_link_relocate (reloc + value += signed_addend; + break; + +- case BFD_RELOC_AARCH64_BRANCH19: +- case BFD_RELOC_AARCH64_TSTBR14: +- /* A conditional branch to an undefined weak symbol is converted to a +- branch to itself. */ +- if (weak_undef_p && !via_plt_p) +- { +- value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type, +- place, value, +- signed_addend, +- weak_undef_p); +- break; +- } +- /* Fall through. */ + case BFD_RELOC_AARCH64_CALL26: + case BFD_RELOC_AARCH64_JUMP26: + { + asection *splt = globals->root.splt; ++ bfd_boolean via_plt_p = ++ splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1; + + /* A call to an undefined weak symbol is converted to a jump to + the next instruction unless a PLT entry will be created. +@@ -5902,6 +5888,23 @@ elfNN_aarch64_final_link_relocate (reloc + bfd_set_error (bfd_error_bad_value); + return bfd_reloc_notsupported; + } ++ value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type, ++ place, value, ++ signed_addend, ++ weak_undef_p); ++ break; ++ ++ case BFD_RELOC_AARCH64_BRANCH19: ++ case BFD_RELOC_AARCH64_TSTBR14: ++ if (h && h->root.type == bfd_link_hash_undefined) ++ { ++ _bfd_error_handler ++ /* xgettext:c-format */ ++ (_("%pB: conditional branch to undefined symbol `%s' " ++ "not allowed"), input_bfd, h->root.root.string); ++ bfd_set_error (bfd_error_bad_value); ++ return bfd_reloc_notsupported; ++ } + /* Fall through. */ + + case BFD_RELOC_AARCH64_16: +@@ -7967,8 +7970,6 @@ elfNN_aarch64_check_relocs (bfd *abfd, s + break; + } + +- case BFD_RELOC_AARCH64_BRANCH19: +- case BFD_RELOC_AARCH64_TSTBR14: + case BFD_RELOC_AARCH64_CALL26: + case BFD_RELOC_AARCH64_JUMP26: + /* If this is a local symbol then we resolve it +Only in binutils-2.35/bfd: elfnn-aarch64.c.orig +diff -rup binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d +--- binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:03:31.067460424 +0100 ++++ binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:04:03.644344895 +0100 +@@ -1,8 +1,3 @@ + #source: emit-relocs-560.s + #ld: -shared +-#readelf: -r +- +-Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 2 entries: +- Offset Info Type Sym. Value Sym. Name \+ Addend +-[0-9a-f]+ 000100000402 R_AARCH64_JUMP_SL 0000000000000000 baz \+ 0 +-[0-9a-f]+ 000200000402 R_AARCH64_JUMP_SL 0000000000000000 bar \+ 0 ++#error: .*: conditional branch to undefined symbol `bar' not allowed diff --git a/binutils-add-sym-cache-to-elf-link-hash.patch b/binutils-add-sym-cache-to-elf-link-hash.patch new file mode 100644 index 0000000..85b2006 --- /dev/null +++ b/binutils-add-sym-cache-to-elf-link-hash.patch @@ -0,0 +1,1981 @@ +diff -rup binutils.orig/bfd/elf-bfd.h binutils-2.35/bfd/elf-bfd.h +--- binutils.orig/bfd/elf-bfd.h 2020-07-30 15:04:05.366466702 +0100 ++++ binutils-2.35/bfd/elf-bfd.h 2020-07-30 15:04:16.707393960 +0100 +@@ -549,6 +549,16 @@ enum elf_target_os + is_nacl /* Native Client. */ + }; + ++/* Used by bfd_sym_from_r_symndx to cache a small number of local ++ symbols. */ ++#define LOCAL_SYM_CACHE_SIZE 32 ++struct sym_cache ++{ ++ bfd *abfd; ++ unsigned long indx[LOCAL_SYM_CACHE_SIZE]; ++ Elf_Internal_Sym sym[LOCAL_SYM_CACHE_SIZE]; ++}; ++ + /* ELF linker hash table. */ + + struct elf_link_hash_table +@@ -676,6 +686,9 @@ struct elf_link_hash_table + /* A linked list of dynamic BFD's loaded in the link. */ + struct elf_link_loaded_list *dyn_loaded; + ++ /* Small local sym cache. */ ++ struct sym_cache sym_cache; ++ + /* Short-cuts to get to dynamic linker sections. */ + asection *sgot; + asection *sgotplt; +@@ -717,16 +730,6 @@ struct elf_link_hash_table + /* Returns TRUE if the hash table is a struct elf_link_hash_table. */ + #define is_elf_hash_table(htab) \ + (((struct bfd_link_hash_table *) (htab))->type == bfd_link_elf_hash_table) +- +-/* Used by bfd_sym_from_r_symndx to cache a small number of local +- symbols. */ +-#define LOCAL_SYM_CACHE_SIZE 32 +-struct sym_cache +-{ +- bfd *abfd; +- unsigned long indx[LOCAL_SYM_CACHE_SIZE]; +- Elf_Internal_Sym sym[LOCAL_SYM_CACHE_SIZE]; +-}; + + /* Constant information held for an ELF backend. */ + +diff -rup binutils.orig/bfd/elf32-arm.c binutils-2.35/bfd/elf32-arm.c +--- binutils.orig/bfd/elf32-arm.c 2020-07-30 15:04:05.376466638 +0100 ++++ binutils-2.35/bfd/elf32-arm.c 2020-07-30 15:04:16.708393953 +0100 +@@ -3390,9 +3390,6 @@ struct elf32_arm_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* For convenience in allocate_dynrelocs. */ + bfd * obfd; + +@@ -15316,7 +15313,7 @@ elf32_arm_check_relocs (bfd *abfd, struc + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -16871,7 +16868,8 @@ elf32_arm_size_dynamic_sections (bfd * o + s->size += 4; + } + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd, ++ symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-bfin.c binutils-2.35/bfd/elf32-bfin.c +--- binutils.orig/bfd/elf32-bfin.c 2020-07-30 15:04:05.377466632 +0100 ++++ binutils-2.35/bfd/elf32-bfin.c 2020-07-30 15:04:16.709393947 +0100 +@@ -4791,16 +4791,6 @@ struct bfin_link_hash_entry + struct bfin_pcrel_relocs_copied *pcrel_relocs_copied; + }; + +-/* bfin ELF linker hash table. */ +- +-struct bfin_link_hash_table +-{ +- struct elf_link_hash_table root; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +-}; +- + #define bfin_hash_entry(ent) ((struct bfin_link_hash_entry *) (ent)) + + static struct bfd_hash_entry * +@@ -4829,15 +4819,14 @@ bfin_link_hash_newfunc (struct bfd_hash_ + static struct bfd_link_hash_table * + bfin_link_hash_table_create (bfd * abfd) + { +- struct bfin_link_hash_table *ret; +- size_t amt = sizeof (struct bfin_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + + ret = bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, +- bfin_link_hash_newfunc, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, bfin_link_hash_newfunc, + sizeof (struct elf_link_hash_entry), + BFIN_ELF_DATA)) + { +@@ -4845,9 +4834,7 @@ bfin_link_hash_table_create (bfd * abfd) + return NULL; + } + +- ret->sym_cache.abfd = NULL; +- +- return &ret->root.root; ++ return &ret->root; + } + + /* The size in bytes of an entry in the procedure linkage table. */ +@@ -5418,10 +5405,6 @@ struct bfd_elf_special_section const elf + + #define bfd_elf32_bfd_is_local_label_name \ + bfin_is_local_label_name +-#define bfin_hash_table(p) \ +- ((struct bfin_link_hash_table *) (p)->hash) +- +- + + #define elf_backend_create_dynamic_sections \ + _bfd_elf_create_dynamic_sections +diff -rup binutils.orig/bfd/elf32-csky.c binutils-2.35/bfd/elf32-csky.c +--- binutils.orig/bfd/elf32-csky.c 2020-07-30 15:04:05.378466625 +0100 ++++ binutils-2.35/bfd/elf32-csky.c 2020-07-30 15:04:16.709393947 +0100 +@@ -1208,9 +1208,6 @@ struct csky_elf_link_hash_table + { + struct elf_link_hash_table elf; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for R_CKCORE_TLS_LDM32 relocations. */ + union + { +@@ -2477,7 +2474,7 @@ csky_elf_check_relocs (bfd * abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -2584,7 +2581,7 @@ csky_elf_check_relocs (bfd * abfd, + asection *s; + Elf_Internal_Sym *loc_isym; + +- loc_isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ loc_isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (loc_isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-hppa.c binutils-2.35/bfd/elf32-hppa.c +--- binutils.orig/bfd/elf32-hppa.c 2020-07-30 15:04:05.368466689 +0100 ++++ binutils-2.35/bfd/elf32-hppa.c 2020-07-30 15:04:16.709393947 +0100 +@@ -286,9 +286,6 @@ struct elf32_hppa_link_hash_table + /* Set if we need a .plt stub to support lazy dynamic linking. */ + unsigned int need_plt_stub:1; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for LDM relocations. */ + union + { +@@ -1465,7 +1462,7 @@ elf32_hppa_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -4038,7 +4035,7 @@ elf32_hppa_relocate_section (bfd *output + else + { + Elf_Internal_Sym *isym +- = bfd_sym_from_r_symndx (&htab->sym_cache, ++ = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + input_bfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-i386.c binutils-2.35/bfd/elf32-i386.c +--- binutils.orig/bfd/elf32-i386.c 2020-07-30 15:04:05.380466612 +0100 ++++ binutils-2.35/bfd/elf32-i386.c 2020-07-30 15:04:16.710393941 +0100 +@@ -1158,7 +1158,7 @@ elf_i386_tls_transition (struct bfd_link + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + name = bfd_elf_sym_name (abfd, symtab_hdr, isym, NULL); + } +@@ -1251,7 +1251,7 @@ elf_i386_convert_load_reloc (bfd *abfd, + else + { + local_ref = TRUE; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, + r_symndx); + abs_symbol = isym->st_shndx == SHN_ABS; + } +@@ -1529,7 +1529,7 @@ elf_i386_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +@@ -1859,7 +1859,7 @@ elf_i386_check_relocs (bfd *abfd, + void **vpp; + asection *s; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +diff -rup binutils.orig/bfd/elf32-m32r.c binutils-2.35/bfd/elf32-m32r.c +--- binutils.orig/bfd/elf32-m32r.c 2020-07-30 15:04:05.370466676 +0100 ++++ binutils-2.35/bfd/elf32-m32r.c 2020-07-30 15:04:16.710393941 +0100 +@@ -1498,20 +1498,6 @@ struct elf_m32r_pcrel_relocs_copied + bfd_size_type count; + }; + +-/* m32r ELF linker hash table. */ +- +-struct elf_m32r_link_hash_table +-{ +- struct elf_link_hash_table root; +- +- /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +-}; +- + /* Traverse an m32r ELF linker hash table. */ + + #define m32r_elf_link_hash_traverse(table, func, info) \ +@@ -1524,21 +1510,21 @@ struct elf_m32r_link_hash_table + + #define m32r_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ +- == M32R_ELF_DATA ? ((struct elf_m32r_link_hash_table *) ((p)->hash)) : NULL) ++ == M32R_ELF_DATA ? ((struct elf_link_hash_table *) ((p)->hash)) : NULL) + + /* Create an m32r ELF linker hash table. */ + + static struct bfd_link_hash_table * + m32r_elf_link_hash_table_create (bfd *abfd) + { +- struct elf_m32r_link_hash_table *ret; +- size_t amt = sizeof (struct elf_m32r_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + + ret = bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->root, abfd, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, + _bfd_elf_link_hash_newfunc, + sizeof (struct elf_link_hash_entry), + M32R_ELF_DATA)) +@@ -1547,7 +1533,7 @@ m32r_elf_link_hash_table_create (bfd *ab + return NULL; + } + +- return &ret->root.root; ++ return &ret->root; + } + + /* Create dynamic sections when linking against a dynamic object. */ +@@ -1555,7 +1541,7 @@ m32r_elf_link_hash_table_create (bfd *ab + static bfd_boolean + m32r_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + flagword flags, pltflags; + asection *s; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); +@@ -1578,7 +1564,7 @@ m32r_elf_create_dynamic_sections (bfd *a + pltflags |= SEC_READONLY; + + s = bfd_make_section_anyway_with_flags (abfd, ".plt", pltflags); +- htab->root.splt = s; ++ htab->splt = s; + if (s == NULL + || !bfd_set_section_alignment (s, bed->plt_alignment)) + return FALSE; +@@ -1598,7 +1584,7 @@ m32r_elf_create_dynamic_sections (bfd *a + h = (struct elf_link_hash_entry *) bh; + h->def_regular = 1; + h->type = STT_OBJECT; +- htab->root.hplt = h; ++ htab->hplt = h; + + if (bfd_link_pic (info) + && ! bfd_elf_link_record_dynamic_symbol (info, h)) +@@ -1609,12 +1595,12 @@ m32r_elf_create_dynamic_sections (bfd *a + bed->default_use_rela_p + ? ".rela.plt" : ".rel.plt", + flags | SEC_READONLY); +- htab->root.srelplt = s; ++ htab->srelplt = s; + if (s == NULL + || !bfd_set_section_alignment (s, ptralign)) + return FALSE; + +- if (htab->root.sgot == NULL ++ if (htab->sgot == NULL + && !_bfd_elf_create_got_section (abfd, info)) + return FALSE; + +@@ -1669,7 +1655,7 @@ static bfd_boolean + m32r_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + +@@ -1796,7 +1782,7 @@ static bfd_boolean + allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) + { + struct bfd_link_info *info; +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) +@@ -1807,7 +1793,7 @@ allocate_dynrelocs (struct elf_link_hash + if (htab == NULL) + return FALSE; + +- if (htab->root.dynamic_sections_created ++ if (htab->dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. +@@ -1821,7 +1807,7 @@ allocate_dynrelocs (struct elf_link_hash + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) + { +- asection *s = htab->root.splt; ++ asection *s = htab->splt; + + /* If this is the first .plt entry, make room for the special + first entry. */ +@@ -1847,10 +1833,10 @@ allocate_dynrelocs (struct elf_link_hash + + /* We also need to make an entry in the .got.plt section, which + will be placed in the .got section by the linker script. */ +- htab->root.sgotplt->size += 4; ++ htab->sgotplt->size += 4; + + /* We also need to make an entry in the .rel.plt section. */ +- htab->root.srelplt->size += sizeof (Elf32_External_Rela); ++ htab->srelplt->size += sizeof (Elf32_External_Rela); + } + else + { +@@ -1878,13 +1864,13 @@ allocate_dynrelocs (struct elf_link_hash + return FALSE; + } + +- s = htab->root.sgot; ++ s = htab->sgot; + + h->got.offset = s->size; + s->size += 4; +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)) +- htab->root.srelgot->size += sizeof (Elf32_External_Rela); ++ htab->srelgot->size += sizeof (Elf32_External_Rela); + } + else + h->got.offset = (bfd_vma) -1; +@@ -1944,7 +1930,7 @@ allocate_dynrelocs (struct elf_link_hash + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) +- || (htab->root.dynamic_sections_created ++ || (htab->dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { +@@ -1984,7 +1970,7 @@ static bfd_boolean + m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd_boolean relocs; +@@ -1998,10 +1984,10 @@ m32r_elf_size_dynamic_sections (bfd *out + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + BFD_ASSERT (dynobj != NULL); + +- if (htab->root.dynamic_sections_created) ++ if (htab->dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -2060,8 +2046,8 @@ m32r_elf_size_dynamic_sections (bfd *out + symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; +- s = htab->root.sgot; +- srel = htab->root.srelgot; ++ s = htab->sgot; ++ srel = htab->srelgot; + for (; local_got < end_local_got; ++local_got) + { + if (*local_got > 0) +@@ -2078,7 +2064,7 @@ m32r_elf_size_dynamic_sections (bfd *out + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ +- elf_link_hash_traverse (&htab->root, allocate_dynrelocs, info); ++ elf_link_hash_traverse (htab, allocate_dynrelocs, info); + + /* We now have determined the sizes of the various dynamic sections. + Allocate memory for them. */ +@@ -2088,9 +2074,9 @@ m32r_elf_size_dynamic_sections (bfd *out + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + +- if (s == htab->root.splt +- || s == htab->root.sgot +- || s == htab->root.sgotplt ++ if (s == htab->splt ++ || s == htab->sgot ++ || s == htab->sgotplt + || s == htab->sdynbss) + { + /* Strip this section if we don't need it; see the +@@ -2098,7 +2084,7 @@ m32r_elf_size_dynamic_sections (bfd *out + } + else if (CONST_STRNEQ (bfd_section_name (s), ".rela")) + { +- if (s->size != 0 && s != htab->root.srelplt) ++ if (s->size != 0 && s != htab->srelplt) + relocs = TRUE; + + /* We use the reloc_count field as a counter if we need +@@ -2188,7 +2174,7 @@ m32r_elf_relocate_section (bfd *output_b + Elf_Internal_Rela *rel, *relend; + /* Assume success. */ + bfd_boolean ret = TRUE; +- struct elf_m32r_link_hash_table *htab = m32r_elf_hash_table (info); ++ struct elf_link_hash_table *htab = m32r_elf_hash_table (info); + bfd_vma *local_got_offsets; + asection *sgot, *splt, *sreloc; + bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); +@@ -2198,8 +2184,8 @@ m32r_elf_relocate_section (bfd *output_b + + local_got_offsets = elf_local_got_offsets (input_bfd); + +- sgot = htab->root.sgot; +- splt = htab->root.splt; ++ sgot = htab->sgot; ++ splt = htab->splt; + sreloc = NULL; + + rel = relocs; +@@ -2295,7 +2281,7 @@ m32r_elf_relocate_section (bfd *output_b + bfd_boolean dyn; + sec = h->root.u.def.section; + +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + sec = h->root.u.def.section; + if (r_type == R_M32R_GOTPC24 + || (r_type == R_M32R_GOTPC_HI_ULO +@@ -2516,7 +2502,7 @@ m32r_elf_relocate_section (bfd *output_b + off = h->got.offset; + BFD_ASSERT (off != (bfd_vma) -1); + +- dyn = htab->root.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), + h) +@@ -2576,7 +2562,7 @@ m32r_elf_relocate_section (bfd *output_b + + /* We need to generate a R_M32R_RELATIVE reloc + for the dynamic linker. */ +- srelgot = htab->root.srelgot; ++ srelgot = htab->srelgot; + BFD_ASSERT (srelgot != NULL); + + outrel.r_offset = (sgot->output_section->vma +@@ -2892,7 +2878,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd_byte *loc; + + #ifdef DEBUG_PIC +@@ -2918,9 +2904,9 @@ m32r_elf_finish_dynamic_symbol (bfd *out + + BFD_ASSERT (h->dynindx != -1); + +- splt = htab->root.splt; +- sgot = htab->root.sgotplt; +- srela = htab->root.srelplt; ++ splt = htab->splt; ++ sgot = htab->sgotplt; ++ srela = htab->srelplt; + BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL); + + /* Get the index in the procedure linkage table which +@@ -3014,8 +3000,8 @@ m32r_elf_finish_dynamic_symbol (bfd *out + /* This symbol has an entry in the global offset table. Set it + up. */ + +- sgot = htab->root.sgot; +- srela = htab->root.srelgot; ++ sgot = htab->sgot; ++ srela = htab->srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma +@@ -3063,7 +3049,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + && (h->root.type == bfd_link_hash_defined + || h->root.type == bfd_link_hash_defweak)); + +- s = bfd_get_linker_section (htab->root.dynobj, ".rela.bss"); ++ s = bfd_get_linker_section (htab->dynobj, ".rela.bss"); + BFD_ASSERT (s != NULL); + + rela.r_offset = (h->root.u.def.value +@@ -3078,7 +3064,7 @@ m32r_elf_finish_dynamic_symbol (bfd *out + } + + /* Mark some specially defined symbols as absolute. */ +- if (h == htab->root.hdynamic || h == htab->root.hgot) ++ if (h == htab->hdynamic || h == htab->hgot) + sym->st_shndx = SHN_ABS; + + return TRUE; +@@ -3091,7 +3077,7 @@ static bfd_boolean + m32r_elf_finish_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) + { +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *sdyn; + asection *sgot; +@@ -3104,12 +3090,12 @@ m32r_elf_finish_dynamic_sections (bfd *o + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + +- sgot = htab->root.sgotplt; ++ sgot = htab->sgotplt; + sdyn = bfd_get_linker_section (dynobj, ".dynamic"); + +- if (htab->root.dynamic_sections_created) ++ if (htab->dynamic_sections_created) + { + asection *splt; + Elf32_External_Dyn *dyncon, *dynconend; +@@ -3132,17 +3118,17 @@ m32r_elf_finish_dynamic_sections (bfd *o + break; + + case DT_PLTGOT: +- s = htab->root.sgotplt; ++ s = htab->sgotplt; + goto get_vma; + case DT_JMPREL: +- s = htab->root.srelplt; ++ s = htab->srelplt; + get_vma: + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; + + case DT_PLTRELSZ: +- s = htab->root.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_val = s->size; + bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); + break; +@@ -3150,7 +3136,7 @@ m32r_elf_finish_dynamic_sections (bfd *o + } + + /* Fill in the first entry in the procedure linkage table. */ +- splt = htab->root.splt; ++ splt = htab->splt; + if (splt && splt->size > 0) + { + if (bfd_link_pic (info)) +@@ -3369,7 +3355,7 @@ m32r_elf_check_relocs (bfd *abfd, + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; + const Elf_Internal_Rela *rel_end; +- struct elf_m32r_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *sreloc; + +@@ -3384,7 +3370,7 @@ m32r_elf_check_relocs (bfd *abfd, + if (htab == NULL) + return FALSE; + +- dynobj = htab->root.dynobj; ++ dynobj = htab->dynobj; + + rel_end = relocs + sec->reloc_count; + for (rel = relocs; rel < rel_end; rel++) +@@ -3406,7 +3392,7 @@ m32r_elf_check_relocs (bfd *abfd, + } + + /* Some relocs require a global offset table. */ +- if (htab->root.sgot == NULL) ++ if (htab->sgot == NULL) + { + switch (r_type) + { +@@ -3423,7 +3409,7 @@ m32r_elf_check_relocs (bfd *abfd, + case R_M32R_GOTPC_LO: + case R_M32R_GOT24: + if (dynobj == NULL) +- htab->root.dynobj = dynobj = abfd; ++ htab->dynobj = dynobj = abfd; + if (!_bfd_elf_create_got_section (dynobj, info)) + return FALSE; + break; +@@ -3540,7 +3526,7 @@ m32r_elf_check_relocs (bfd *abfd, + struct elf_dyn_relocs **head; + + if (dynobj == NULL) +- htab->root.dynobj = dynobj = abfd; ++ htab->dynobj = dynobj = abfd; + + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc +diff -rup binutils.orig/bfd/elf32-m68hc1x.h binutils-2.35/bfd/elf32-m68hc1x.h +--- binutils.orig/bfd/elf32-m68hc1x.h 2020-07-30 15:04:05.378466625 +0100 ++++ binutils-2.35/bfd/elf32-m68hc1x.h 2020-07-30 15:04:16.710393941 +0100 +@@ -120,9 +120,6 @@ struct m68hc11_elf_link_hash_table + int top_index; + asection **input_list; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + bfd_boolean (* size_one_stub) (struct bfd_hash_entry*, void*); + bfd_boolean (* build_one_stub) (struct bfd_hash_entry*, void*); + }; +diff -rup binutils.orig/bfd/elf32-m68k.c binutils-2.35/bfd/elf32-m68k.c +--- binutils.orig/bfd/elf32-m68k.c 2020-07-30 15:04:05.363466721 +0100 ++++ binutils-2.35/bfd/elf32-m68k.c 2020-07-30 15:04:16.710393941 +0100 +@@ -889,9 +889,6 @@ struct elf_m68k_link_hash_table + { + struct elf_link_hash_table root; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* The PLT format used by this link, or NULL if the format has not + yet been chosen. */ + const struct elf_m68k_plt_info *plt_info; +@@ -2836,7 +2833,7 @@ elf_m68k_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&elf_m68k_hash_table (info)->sym_cache, ++ isym = bfd_sym_from_r_symndx (&elf_m68k_hash_table (info)->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-metag.c binutils-2.35/bfd/elf32-metag.c +--- binutils.orig/bfd/elf32-metag.c 2020-07-30 15:04:05.379466619 +0100 ++++ binutils-2.35/bfd/elf32-metag.c 2020-07-30 15:04:16.711393934 +0100 +@@ -823,9 +823,6 @@ struct elf_metag_link_hash_table + asection **input_list; + Elf_Internal_Sym **all_local_syms; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Data for LDM relocations. */ + union + { +@@ -2098,7 +2095,7 @@ elf_metag_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->etab.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-microblaze.c binutils-2.35/bfd/elf32-microblaze.c +--- binutils.orig/bfd/elf32-microblaze.c 2020-07-30 15:04:05.367466696 +0100 ++++ binutils-2.35/bfd/elf32-microblaze.c 2020-07-30 15:04:16.711393934 +0100 +@@ -744,9 +744,6 @@ struct elf32_mb_link_hash_table + { + struct elf_link_hash_table elf; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_sec; +- + /* TLS Local Dynamic GOT Entry */ + union { + bfd_signed_vma refcount; +@@ -2523,7 +2520,7 @@ microblaze_elf_check_relocs (bfd * abfd, + Elf_Internal_Sym *isym; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_sec, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-nds32.c binutils-2.35/bfd/elf32-nds32.c +--- binutils.orig/bfd/elf32-nds32.c 2020-07-30 15:04:05.365466709 +0100 ++++ binutils-2.35/bfd/elf32-nds32.c 2020-07-30 15:04:16.712393928 +0100 +@@ -3696,8 +3696,6 @@ nds32_elf_link_hash_table_create (bfd *a + return NULL; + } + +- ret->sdynbss = NULL; +- ret->srelbss = NULL; + ret->sym_ld_script = NULL; + + return &ret->root.root; +@@ -3833,7 +3831,7 @@ nds32_elf_create_dynamic_sections (bfd * + initialize them at run time. The linker script puts the .dynbss + section into the .bss section of the final image. */ + s = bfd_make_section (abfd, ".dynbss"); +- htab->sdynbss = s; ++ htab->root.sdynbss = s; + if (s == NULL + || !bfd_set_section_flags (s, SEC_ALLOC | SEC_LINKER_CREATED)) + return FALSE; +@@ -3852,7 +3850,7 @@ nds32_elf_create_dynamic_sections (bfd * + { + s = bfd_make_section (abfd, (bed->default_use_rela_p + ? ".rela.bss" : ".rel.bss")); +- htab->srelbss = s; ++ htab->root.srelbss = s; + if (s == NULL + || !bfd_set_section_flags (s, flags | SEC_READONLY) + || !bfd_set_section_alignment (s, ptralign)) +@@ -3988,7 +3986,7 @@ nds32_elf_adjust_dynamic_symbol (struct + same memory location for the variable. */ + + htab = nds32_elf_hash_table (info); +- s = htab->sdynbss; ++ s = htab->root.sdynbss; + BFD_ASSERT (s != NULL); + + /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker +@@ -3999,7 +3997,7 @@ nds32_elf_adjust_dynamic_symbol (struct + { + asection *srel; + +- srel = htab->srelbss; ++ srel = htab->root.srelbss; + BFD_ASSERT (srel != NULL); + srel->size += sizeof (Elf32_External_Rela); + h->needs_copy = 1; +@@ -7277,7 +7275,8 @@ nds32_elf_check_relocs (bfd *abfd, struc + void *vpp; + + Elf_Internal_Sym *isym; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ++ abfd, r_symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-nds32.h binutils-2.35/bfd/elf32-nds32.h +--- binutils.orig/bfd/elf32-nds32.h 2020-07-30 15:04:05.378466625 +0100 ++++ binutils-2.35/bfd/elf32-nds32.h 2020-07-30 15:04:16.712393928 +0100 +@@ -122,13 +122,6 @@ struct elf_nds32_link_hash_table + { + struct elf_link_hash_table root; + +- /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +- + /* Target dependent options. */ + int relax_fp_as_gp; /* --mrelax-omit-fp. */ + int eliminate_gc_relocs; /* --meliminate-gc-relocs. */ +diff -rup binutils.orig/bfd/elf32-nios2.c binutils-2.35/bfd/elf32-nios2.c +--- binutils.orig/bfd/elf32-nios2.c 2020-07-30 15:04:05.375466645 +0100 ++++ binutils-2.35/bfd/elf32-nios2.c 2020-07-30 15:04:16.712393928 +0100 +@@ -1808,9 +1808,6 @@ struct elf32_nios2_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + bfd_vma res_n_size; + }; + +@@ -4902,7 +4899,7 @@ nios2_elf32_check_relocs (bfd *abfd, str + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-or1k.c binutils-2.35/bfd/elf32-or1k.c +--- binutils.orig/bfd/elf32-or1k.c 2020-07-30 15:04:05.371466670 +0100 ++++ binutils-2.35/bfd/elf32-or1k.c 2020-07-30 15:04:16.713393921 +0100 +@@ -916,9 +916,6 @@ struct elf_or1k_link_hash_table + { + struct elf_link_hash_table root; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_sec; +- + bfd_boolean saw_plta; + }; + +@@ -2151,7 +2148,7 @@ or1k_elf_check_relocs (bfd *abfd, + Elf_Internal_Sym *isym; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_sec, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-ppc.c binutils-2.35/bfd/elf32-ppc.c +--- binutils.orig/bfd/elf32-ppc.c 2020-07-30 15:04:05.359466747 +0100 ++++ binutils-2.35/bfd/elf32-ppc.c 2020-07-30 15:04:16.713393921 +0100 +@@ -2212,9 +2212,6 @@ struct ppc_elf_link_hash_table + int plt_slot_size; + /* The size of the first PLT entry. */ + int plt_initial_entry_size; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Rename some of the generic section flags to better document how they +@@ -2952,7 +2949,7 @@ ppc_elf_check_relocs (bfd *abfd, + ifunc = NULL; + if (h == NULL && htab->elf.target_os != is_vxworks) + { +- Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3335,7 +3332,7 @@ ppc_elf_check_relocs (bfd *abfd, + asection *s; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3495,7 +3492,7 @@ ppc_elf_check_relocs (bfd *abfd, + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-s390.c binutils-2.35/bfd/elf32-s390.c +--- binutils.orig/bfd/elf32-s390.c 2020-07-30 15:04:05.376466638 +0100 ++++ binutils-2.35/bfd/elf32-s390.c 2020-07-30 15:04:16.714393915 +0100 +@@ -746,9 +746,6 @@ struct elf_s390_link_hash_table + bfd_signed_vma refcount; + bfd_vma offset; + } tls_ldm_got; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Get the s390 ELF linker hash table from a link_info structure. */ +@@ -930,7 +927,7 @@ elf_s390_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -1281,7 +1278,7 @@ elf_s390_check_relocs (bfd *abfd, + asection *s; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -3722,7 +3719,7 @@ elf_s390_finish_dynamic_sections (bfd *o + if (local_plt[i].plt.offset != (bfd_vma) -1) + { + asection *sec = local_plt[i].sec; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, i); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, i); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf32-sh.c binutils-2.35/bfd/elf32-sh.c +--- binutils.orig/bfd/elf32-sh.c 2020-07-30 15:04:05.376466638 +0100 ++++ binutils-2.35/bfd/elf32-sh.c 2020-07-30 15:04:16.714393915 +0100 +@@ -2160,8 +2160,6 @@ struct elf_sh_link_hash_table + struct elf_link_hash_table root; + + /* Short-cuts to get to dynamic linker sections. */ +- asection *sdynbss; +- asection *srelbss; + asection *sfuncdesc; + asection *srelfuncdesc; + asection *srofixup; +@@ -2169,9 +2167,6 @@ struct elf_sh_link_hash_table + /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ + asection *srelplt2; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* A counter or offset to track a TLS got entry. */ + union + { +@@ -2439,7 +2434,7 @@ sh_elf_create_dynamic_sections (bfd *abf + section into the .bss section of the final image. */ + s = bfd_make_section_anyway_with_flags (abfd, ".dynbss", + SEC_ALLOC | SEC_LINKER_CREATED); +- htab->sdynbss = s; ++ htab->root.sdynbss = s; + if (s == NULL) + return FALSE; + +@@ -2460,7 +2455,7 @@ sh_elf_create_dynamic_sections (bfd *abf + (bed->default_use_rela_p + ? ".rela.bss" : ".rel.bss"), + flags | SEC_READONLY); +- htab->srelbss = s; ++ htab->root.srelbss = s; + if (s == NULL + || !bfd_set_section_alignment (s, ptralign)) + return FALSE; +@@ -2580,7 +2575,7 @@ sh_elf_adjust_dynamic_symbol (struct bfd + both the dynamic object and the regular object will refer to the + same memory location for the variable. */ + +- s = htab->sdynbss; ++ s = htab->root.sdynbss; + BFD_ASSERT (s != NULL); + + /* We must generate a R_SH_COPY reloc to tell the dynamic linker to +@@ -2591,7 +2586,7 @@ sh_elf_adjust_dynamic_symbol (struct bfd + { + asection *srel; + +- srel = htab->srelbss; ++ srel = htab->root.srelbss; + BFD_ASSERT (srel != NULL); + srel->size += sizeof (Elf32_External_Rela); + h->needs_copy = 1; +@@ -3151,7 +3146,7 @@ sh_elf_size_dynamic_sections (bfd *outpu + || s == htab->root.sgotplt + || s == htab->sfuncdesc + || s == htab->srofixup +- || s == htab->sdynbss) ++ || s == htab->root.sdynbss) + { + /* Strip this section if we don't need it; see the + comment below. */ +@@ -5679,7 +5674,7 @@ sh_elf_check_relocs (bfd *abfd, struct b + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-tic6x.c binutils-2.35/bfd/elf32-tic6x.c +--- binutils.orig/bfd/elf32-tic6x.c 2020-07-30 15:04:05.366466702 +0100 ++++ binutils-2.35/bfd/elf32-tic6x.c 2020-07-30 15:04:16.714393915 +0100 +@@ -46,9 +46,6 @@ struct elf32_tic6x_link_hash_table + /* C6X specific command line arguments. */ + struct elf32_tic6x_params params; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* The output BFD, for convenience. */ + bfd *obfd; + +@@ -2729,7 +2726,7 @@ elf32_tic6x_check_relocs (bfd *abfd, str + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf32-tilepro.c binutils-2.35/bfd/elf32-tilepro.c +--- binutils.orig/bfd/elf32-tilepro.c 2020-07-30 15:04:05.364466715 +0100 ++++ binutils-2.35/bfd/elf32-tilepro.c 2020-07-30 15:04:16.715393908 +0100 +@@ -727,19 +727,11 @@ tilepro_elf_mkobject (bfd *abfd) + #include "elf/common.h" + #include "elf/internal.h" + +-struct tilepro_elf_link_hash_table +-{ +- struct elf_link_hash_table elf; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +-}; +- + /* Get the Tilepro ELF linker hash table from a link_info structure. */ + #define tilepro_elf_hash_table(p) \ + (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ + == TILEPRO_ELF_DATA \ +- ? ((struct tilepro_elf_link_hash_table *) ((p)->hash)) : NULL) ++ ? ((struct elf_link_hash_table *) ((p)->hash)) : NULL) + + static reloc_howto_type * + tilepro_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, +@@ -1184,14 +1176,14 @@ link_hash_newfunc (struct bfd_hash_entry + static struct bfd_link_hash_table * + tilepro_elf_link_hash_table_create (bfd *abfd) + { +- struct tilepro_elf_link_hash_table *ret; +- size_t amt = sizeof (struct tilepro_elf_link_hash_table); ++ struct elf_link_hash_table *ret; ++ size_t amt = sizeof (struct elf_link_hash_table); + +- ret = (struct tilepro_elf_link_hash_table *) bfd_zmalloc (amt); ++ ret = (struct elf_link_hash_table *) bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + +- if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, ++ if (!_bfd_elf_link_hash_table_init (ret, abfd, link_hash_newfunc, + sizeof (struct tilepro_elf_link_hash_entry), + TILEPRO_ELF_DATA)) + { +@@ -1199,7 +1191,7 @@ tilepro_elf_link_hash_table_create (bfd + return NULL; + } + +- return &ret->elf.root; ++ return &ret->root; + } + + /* Create the .got section. */ +@@ -1402,7 +1394,7 @@ static bfd_boolean + tilepro_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; +@@ -1423,8 +1415,8 @@ tilepro_elf_check_relocs (bfd *abfd, str + + BFD_ASSERT (is_tilepro_elf (abfd) || num_relocs == 0); + +- if (htab->elf.dynobj == NULL) +- htab->elf.dynobj = abfd; ++ if (htab->dynobj == NULL) ++ htab->dynobj = abfd; + + rel_end = relocs + num_relocs; + for (rel = relocs; rel < rel_end; rel++) +@@ -1569,9 +1561,9 @@ tilepro_elf_check_relocs (bfd *abfd, str + } + } + +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + { +- if (!tilepro_elf_create_got_section (htab->elf.dynobj, info)) ++ if (!tilepro_elf_create_got_section (htab->dynobj, info)) + return FALSE; + } + break; +@@ -1716,7 +1708,7 @@ tilepro_elf_check_relocs (bfd *abfd, str + if (sreloc == NULL) + { + sreloc = _bfd_elf_make_dynamic_reloc_section +- (sec, htab->elf.dynobj, 2, abfd, /*rela?*/ TRUE); ++ (sec, htab->dynobj, 2, abfd, /*rela?*/ TRUE); + + if (sreloc == NULL) + return FALSE; +@@ -1754,7 +1746,7 @@ tilepro_elf_check_relocs (bfd *abfd, str + { + size_t amt = sizeof *p; + p = ((struct elf_dyn_relocs *) +- bfd_alloc (htab->elf.dynobj, amt)); ++ bfd_alloc (htab->dynobj, amt)); + if (p == NULL) + return FALSE; + p->next = *head; +@@ -1850,14 +1842,14 @@ static bfd_boolean + tilepro_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + asection *s, *srel; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + /* Make sure we know what is going on here. */ +- BFD_ASSERT (htab->elf.dynobj != NULL ++ BFD_ASSERT (htab->dynobj != NULL + && (h->needs_plt + || h->is_weakalias + || (h->def_dynamic +@@ -1947,13 +1939,13 @@ tilepro_elf_adjust_dynamic_symbol (struc + .rel.bss section we are going to use. */ + if ((h->root.u.def.section->flags & SEC_READONLY) != 0) + { +- s = htab->elf.sdynrelro; +- srel = htab->elf.sreldynrelro; ++ s = htab->sdynrelro; ++ srel = htab->sreldynrelro; + } + else + { +- s = htab->elf.sdynbss; +- srel = htab->elf.srelbss; ++ s = htab->sdynbss; ++ srel = htab->srelbss; + } + if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0) + { +@@ -1971,7 +1963,7 @@ static bfd_boolean + allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { + struct bfd_link_info *info; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) +@@ -1981,7 +1973,7 @@ allocate_dynrelocs (struct elf_link_hash + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + +- if (htab->elf.dynamic_sections_created ++ if (htab->dynamic_sections_created + && h->plt.refcount > 0) + { + /* Make sure this symbol is output as a dynamic symbol. +@@ -1995,7 +1987,7 @@ allocate_dynrelocs (struct elf_link_hash + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) + { +- asection *s = htab->elf.splt; ++ asection *s = htab->splt; + + /* Allocate room for the header. */ + if (s->size == 0) +@@ -2021,10 +2013,10 @@ allocate_dynrelocs (struct elf_link_hash + s->size += PLT_ENTRY_SIZE; + + /* We also need to make an entry in the .got.plt section. */ +- htab->elf.sgotplt->size += GOT_ENTRY_SIZE; ++ htab->sgotplt->size += GOT_ENTRY_SIZE; + + /* We also need to make an entry in the .rela.plt section. */ +- htab->elf.srelplt->size += TILEPRO_ELF_RELA_BYTES; ++ htab->srelplt->size += TILEPRO_ELF_RELA_BYTES; + } + else + { +@@ -2060,22 +2052,22 @@ allocate_dynrelocs (struct elf_link_hash + return FALSE; + } + +- s = htab->elf.sgot; ++ s = htab->sgot; + h->got.offset = s->size; + s->size += TILEPRO_BYTES_PER_WORD; + /* R_TILEPRO_IMM16_Xn_TLS_GD entries need 2 consecutive GOT slots. */ + if (tls_type == GOT_TLS_GD) + s->size += TILEPRO_BYTES_PER_WORD; +- dyn = htab->elf.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + /* R_TILEPRO_IMM16_Xn_TLS_IE_xxx needs one dynamic relocation, + R_TILEPRO_IMM16_Xn_TLS_GD_xxx needs two if local symbol and two if + global. */ + if (tls_type == GOT_TLS_GD || tls_type == GOT_TLS_IE) +- htab->elf.srelgot->size += 2 * TILEPRO_ELF_RELA_BYTES; ++ htab->srelgot->size += 2 * TILEPRO_ELF_RELA_BYTES; + else if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), + h)) +- htab->elf.srelgot->size += TILEPRO_ELF_RELA_BYTES; ++ htab->srelgot->size += TILEPRO_ELF_RELA_BYTES; + } + else + h->got.offset = (bfd_vma) -1; +@@ -2134,7 +2126,7 @@ allocate_dynrelocs (struct elf_link_hash + if (!h->non_got_ref + && ((h->def_dynamic + && !h->def_regular) +- || (htab->elf.dynamic_sections_created ++ || (htab->dynamic_sections_created + && (h->root.type == bfd_link_hash_undefweak + || h->root.type == bfd_link_hash_undefined)))) + { +@@ -2195,14 +2187,14 @@ tilepro_elf_size_dynamic_sections (bfd * + { + (void)output_bfd; + +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd *ibfd; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = htab->elf.dynobj; ++ dynobj = htab->dynobj; + BFD_ASSERT (dynobj != NULL); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -2268,8 +2260,8 @@ tilepro_elf_size_dynamic_sections (bfd * + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + local_tls_type = _bfd_tilepro_elf_local_got_tls_type (ibfd); +- s = htab->elf.sgot; +- srel = htab->elf.srelgot; ++ s = htab->sgot; ++ srel = htab->srelgot; + for (; local_got < end_local_got; ++local_got, ++local_tls_type) + { + if (*local_got > 0) +@@ -2290,19 +2282,19 @@ tilepro_elf_size_dynamic_sections (bfd * + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ +- elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); ++ elf_link_hash_traverse (htab, allocate_dynrelocs, info); + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* If the .got section is more than 0x8000 bytes, we add + 0x8000 to the value of _GLOBAL_OFFSET_TABLE_, so that 16 + bit relocations have a greater chance of working. */ +- if (htab->elf.sgot->size >= 0x8000 ++ if (htab->sgot->size >= 0x8000 + && elf_hash_table (info)->hgot->root.u.def.value == 0) + elf_hash_table (info)->hgot->root.u.def.value = 0x8000; + } + +- if (htab->elf.sgotplt) ++ if (htab->sgotplt) + { + struct elf_link_hash_entry *got; + got = elf_link_hash_lookup (elf_hash_table (info), +@@ -2313,14 +2305,14 @@ tilepro_elf_size_dynamic_sections (bfd * + entries and there is no refeence to _GLOBAL_OFFSET_TABLE_. */ + if ((got == NULL + || !got->ref_regular_nonweak) +- && (htab->elf.sgotplt->size ++ && (htab->sgotplt->size + == GOTPLT_HEADER_SIZE) +- && (htab->elf.splt == NULL +- || htab->elf.splt->size == 0) +- && (htab->elf.sgot == NULL +- || (htab->elf.sgot->size ++ && (htab->splt == NULL ++ || htab->splt->size == 0) ++ && (htab->sgot == NULL ++ || (htab->sgot->size + == get_elf_backend_data (output_bfd)->got_header_size))) +- htab->elf.sgotplt->size = 0; ++ htab->sgotplt->size = 0; + } + + /* The check_relocs and adjust_dynamic_symbol entry points have +@@ -2331,11 +2323,11 @@ tilepro_elf_size_dynamic_sections (bfd * + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + +- if (s == htab->elf.splt +- || s == htab->elf.sgot +- || s == htab->elf.sgotplt +- || s == htab->elf.sdynbss +- || s == htab->elf.sdynrelro) ++ if (s == htab->splt ++ || s == htab->sgot ++ || s == htab->sgotplt ++ || s == htab->sdynbss ++ || s == htab->sdynrelro) + { + /* Strip this section if we don't need it; see the + comment below. */ +@@ -2527,7 +2519,7 @@ tilepro_elf_relocate_section (bfd *outpu + Elf_Internal_Sym *local_syms, + asection **local_sections) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + bfd_vma *local_got_offsets; +@@ -2758,7 +2750,7 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X1_GOT_HA: + /* Relocation is to the entry for this symbol in the global + offset table. */ +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + abort (); + + if (h != NULL) +@@ -2792,7 +2784,7 @@ tilepro_elf_relocate_section (bfd *outpu + else + { + bfd_put_32 (output_bfd, relocation, +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + h->got.offset |= 1; + } + } +@@ -2820,11 +2812,11 @@ tilepro_elf_relocate_section (bfd *outpu + + /* We need to generate a R_TILEPRO_RELATIVE reloc + for the dynamic linker. */ +- s = htab->elf.srelgot; ++ s = htab->srelgot; + BFD_ASSERT (s != NULL); + +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + + off); + outrel.r_info = ELF32_R_INFO (0, R_TILEPRO_RELATIVE); + outrel.r_addend = relocation; +@@ -2833,7 +2825,7 @@ tilepro_elf_relocate_section (bfd *outpu + } + + bfd_put_32 (output_bfd, relocation, +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + local_got_offsets[r_symndx] |= 1; + } + } +@@ -2845,7 +2837,7 @@ tilepro_elf_relocate_section (bfd *outpu + procedure linkage table. */ + BFD_ASSERT (h != NULL); + +- if (h->plt.offset == (bfd_vma) -1 || htab->elf.splt == NULL) ++ if (h->plt.offset == (bfd_vma) -1 || htab->splt == NULL) + { + /* We didn't make a PLT entry for this symbol. This + happens when statically linking PIC code, or when +@@ -2853,8 +2845,8 @@ tilepro_elf_relocate_section (bfd *outpu + break; + } + +- relocation = (htab->elf.splt->output_section->vma +- + htab->elf.splt->output_offset ++ relocation = (htab->splt->output_section->vma ++ + htab->splt->output_offset + + h->plt.offset); + unresolved_reloc = FALSE; + break; +@@ -2993,7 +2985,7 @@ tilepro_elf_relocate_section (bfd *outpu + outrel.r_addend = relocation + rel->r_addend; + + if (is_plt) +- sec = htab->elf.splt; ++ sec = htab->splt; + + if (bfd_is_abs_section (sec)) + indx = 0; +@@ -3016,7 +3008,7 @@ tilepro_elf_relocate_section (bfd *outpu + + if (indx == 0) + { +- osec = htab->elf.text_index_section; ++ osec = htab->text_index_section; + indx = elf_section_data (osec)->dynindx; + } + +@@ -3142,7 +3134,7 @@ tilepro_elf_relocate_section (bfd *outpu + local_got_offsets[r_symndx] |= 1; + } + +- if (htab->elf.sgot == NULL) ++ if (htab->sgot == NULL) + abort (); + + if ((off & 1) != 0) +@@ -3153,13 +3145,13 @@ tilepro_elf_relocate_section (bfd *outpu + int indx = 0; + bfd_boolean need_relocs = FALSE; + +- if (htab->elf.srelgot == NULL) ++ if (htab->srelgot == NULL) + abort (); + + if (h != NULL) + { + bfd_boolean dyn; +- dyn = htab->elf.dynamic_sections_created; ++ dyn = htab->dynamic_sections_created; + + if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, + bfd_link_pic (info), +@@ -3190,18 +3182,18 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X0_TLS_IE_HA: + case R_TILEPRO_IMM16_X1_TLS_IE_HA: + if (need_relocs) { +- bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset + off); ++ bfd_put_32 (output_bfd, 0, htab->sgot->contents + off); ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + off); + outrel.r_addend = 0; + if (indx == 0) + outrel.r_addend = relocation - dtpoff_base (info); + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_TPOFF32); +- tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, ++ tilepro_elf_append_rela_32 (output_bfd, htab->srelgot, + &outrel); + } else { + bfd_put_32 (output_bfd, tpoff (info, relocation), +- htab->elf.sgot->contents + off); ++ htab->sgot->contents + off); + } + break; + +@@ -3214,31 +3206,31 @@ tilepro_elf_relocate_section (bfd *outpu + case R_TILEPRO_IMM16_X0_TLS_GD_HA: + case R_TILEPRO_IMM16_X1_TLS_GD_HA: + if (need_relocs) { +- outrel.r_offset = (htab->elf.sgot->output_section->vma +- + htab->elf.sgot->output_offset + off); ++ outrel.r_offset = (htab->sgot->output_section->vma ++ + htab->sgot->output_offset + off); + outrel.r_addend = 0; + outrel.r_info = ELF32_R_INFO (indx, R_TILEPRO_TLS_DTPMOD32); +- bfd_put_32 (output_bfd, 0, htab->elf.sgot->contents + off); +- tilepro_elf_append_rela_32 (output_bfd, htab->elf.srelgot, ++ bfd_put_32 (output_bfd, 0, htab->sgot->contents + off); ++ tilepro_elf_append_rela_32 (output_bfd, htab->srelgot, + &outrel); + if (indx == 0) + { + BFD_ASSERT (! unresolved_reloc); + bfd_put_32 (output_bfd, + relocation - dtpoff_base (info), +- (htab->elf.sgot->contents + off + ++ (htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + } + else + { + bfd_put_32 (output_bfd, 0, +- (htab->elf.sgot->contents + off + ++ (htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD)); + outrel.r_info = ELF32_R_INFO (indx, + R_TILEPRO_TLS_DTPOFF32); + outrel.r_offset += TILEPRO_BYTES_PER_WORD; + tilepro_elf_append_rela_32 (output_bfd, +- htab->elf.srelgot, &outrel); ++ htab->srelgot, &outrel); + } + } + +@@ -3249,9 +3241,9 @@ tilepro_elf_relocate_section (bfd *outpu + symbol binding locally. Mark it as belonging + to module 1, the executable. */ + bfd_put_32 (output_bfd, 1, +- htab->elf.sgot->contents + off ); ++ htab->sgot->contents + off ); + bfd_put_32 (output_bfd, relocation - dtpoff_base (info), +- htab->elf.sgot->contents + off + ++ htab->sgot->contents + off + + TILEPRO_BYTES_PER_WORD); + } + break; +@@ -3411,7 +3403,7 @@ tilepro_elf_finish_dynamic_symbol (bfd * + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) + { +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +@@ -3431,9 +3423,9 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + BFD_ASSERT (h->dynindx != -1); + +- splt = htab->elf.splt; +- srela = htab->elf.srelplt; +- sgotplt = htab->elf.sgotplt; ++ splt = htab->splt; ++ srela = htab->srelplt; ++ sgotplt = htab->sgotplt; + + if (splt == NULL || srela == NULL) + abort (); +@@ -3481,8 +3473,8 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + /* This symbol has an entry in the GOT. Set it up. */ + +- sgot = htab->elf.sgot; +- srela = htab->elf.srelgot; ++ sgot = htab->sgot; ++ srela = htab->srelgot; + BFD_ASSERT (sgot != NULL && srela != NULL); + + rela.r_offset = (sgot->output_section->vma +@@ -3528,16 +3520,16 @@ tilepro_elf_finish_dynamic_symbol (bfd * + + h->root.u.def.section->output_offset); + rela.r_info = ELF32_R_INFO (h->dynindx, R_TILEPRO_COPY); + rela.r_addend = 0; +- if (h->root.u.def.section == htab->elf.sdynrelro) +- s = htab->elf.sreldynrelro; ++ if (h->root.u.def.section == htab->sdynrelro) ++ s = htab->sreldynrelro; + else +- s = htab->elf.srelbss; ++ s = htab->srelbss; + tilepro_elf_append_rela_32 (output_bfd, s, &rela); + } + + /* Mark some specially defined symbols as absolute. */ +- if (h == htab->elf.hdynamic +- || (h == htab->elf.hgot || h == htab->elf.hplt)) ++ if (h == htab->hdynamic ++ || (h == htab->hgot || h == htab->hplt)) + sym->st_shndx = SHN_ABS; + + return TRUE; +@@ -3551,7 +3543,7 @@ tilepro_finish_dyn (bfd *output_bfd, str + asection *splt ATTRIBUTE_UNUSED) + { + Elf32_External_Dyn *dyncon, *dynconend; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +@@ -3567,15 +3559,15 @@ tilepro_finish_dyn (bfd *output_bfd, str + switch (dyn.d_tag) + { + case DT_PLTGOT: +- s = htab->elf.sgotplt; ++ s = htab->sgotplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_JMPREL: +- s = htab->elf.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_PLTRELSZ: +- s = htab->elf.srelplt; ++ s = htab->srelplt; + dyn.d_un.d_val = s->size; + break; + default: +@@ -3593,11 +3585,11 @@ tilepro_elf_finish_dynamic_sections (bfd + { + bfd *dynobj; + asection *sdyn; +- struct tilepro_elf_link_hash_table *htab; ++ struct elf_link_hash_table *htab; + + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = htab->elf.dynobj; ++ dynobj = htab->dynobj; + + sdyn = bfd_get_linker_section (dynobj, ".dynamic"); + +@@ -3606,7 +3598,7 @@ tilepro_elf_finish_dynamic_sections (bfd + asection *splt; + bfd_boolean ret; + +- splt = htab->elf.splt; ++ splt = htab->splt; + BFD_ASSERT (splt != NULL && sdyn != NULL); + + ret = tilepro_finish_dyn (output_bfd, info, dynobj, sdyn, splt); +@@ -3627,42 +3619,42 @@ tilepro_elf_finish_dynamic_sections (bfd + = PLT_ENTRY_SIZE; + } + +- if (htab->elf.sgotplt) ++ if (htab->sgotplt) + { +- if (bfd_is_abs_section (htab->elf.sgotplt->output_section)) ++ if (bfd_is_abs_section (htab->sgotplt->output_section)) + { + _bfd_error_handler +- (_("discarded output section: `%pA'"), htab->elf.sgotplt); ++ (_("discarded output section: `%pA'"), htab->sgotplt); + return FALSE; + } + +- if (htab->elf.sgotplt->size > 0) ++ if (htab->sgotplt->size > 0) + { + /* Write the first two entries in .got.plt, needed for the dynamic + linker. */ + bfd_put_32 (output_bfd, (bfd_vma) -1, +- htab->elf.sgotplt->contents); ++ htab->sgotplt->contents); + bfd_put_32 (output_bfd, (bfd_vma) 0, +- htab->elf.sgotplt->contents + GOT_ENTRY_SIZE); ++ htab->sgotplt->contents + GOT_ENTRY_SIZE); + } + +- elf_section_data (htab->elf.sgotplt->output_section)->this_hdr.sh_entsize ++ elf_section_data (htab->sgotplt->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + +- if (htab->elf.sgot) ++ if (htab->sgot) + { +- if (htab->elf.sgot->size > 0) ++ if (htab->sgot->size > 0) + { + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + bfd_vma val = (sdyn ? + sdyn->output_section->vma + sdyn->output_offset : + 0); +- bfd_put_32 (output_bfd, val, htab->elf.sgot->contents); ++ bfd_put_32 (output_bfd, val, htab->sgot->contents); + } + +- elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize ++ elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize + = GOT_ENTRY_SIZE; + } + +diff -rup binutils.orig/bfd/elf64-ppc.c binutils-2.35/bfd/elf64-ppc.c +--- binutils.orig/bfd/elf64-ppc.c 2020-07-30 15:04:05.363466721 +0100 ++++ binutils-2.35/bfd/elf64-ppc.c 2020-07-30 15:04:16.716393902 +0100 +@@ -3250,9 +3250,6 @@ struct ppc_link_hash_table + + /* Incremented every time we size stubs. */ + unsigned int stub_iteration; +- +- /* Small local sym cache. */ +- struct sym_cache sym_cache; + }; + + /* Rename some of the generic section flags to better document how they +@@ -4383,7 +4380,8 @@ ppc64_elf_before_check_relocs (bfd *ibfd + Elf_Internal_Sym *isym; + asection *s; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, ++ r_symndx); + if (isym == NULL) + { + if (elf_section_data (opd)->relocs != relocs) +@@ -4684,7 +4682,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + } + else + { +- Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ Elf_Internal_Sym *isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -4955,7 +4953,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -5231,7 +5229,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elf64-s390.c binutils-2.35/bfd/elf64-s390.c +--- binutils.orig/bfd/elf64-s390.c 2020-07-30 15:04:05.369466683 +0100 ++++ binutils-2.35/bfd/elf64-s390.c 2020-07-30 15:04:16.716393902 +0100 +@@ -663,9 +663,6 @@ struct elf_s390_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Options passed from the linker. */ + struct s390_elf_params *params; + }; +@@ -852,7 +849,7 @@ elf_s390_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -1216,7 +1213,7 @@ elf_s390_check_relocs (bfd *abfd, + asection *s; + void *vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -2258,7 +2255,7 @@ elf_s390_relocate_section (bfd *output_b + & 0xff00f000) == 0xe300c000 + && bfd_get_8 (input_bfd, + contents + rel->r_offset + 3) == 0x04)) +- && (isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ && (isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + input_bfd, r_symndx)) + && isym->st_shndx != SHN_ABS + && h != htab->elf.hdynamic +@@ -3572,7 +3569,7 @@ elf_s390_finish_dynamic_sections (bfd *o + if (local_plt[i].plt.offset != (bfd_vma) -1) + { + asection *sec = local_plt[i].sec; +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, i); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ibfd, i); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elf64-x86-64.c binutils-2.35/bfd/elf64-x86-64.c +--- binutils.orig/bfd/elf64-x86-64.c 2020-07-30 15:04:05.365466709 +0100 ++++ binutils-2.35/bfd/elf64-x86-64.c 2020-07-30 15:04:16.717393895 +0100 +@@ -1371,7 +1371,7 @@ elf_x86_64_tls_transition (struct bfd_li + { + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + name = bfd_elf_sym_name (abfd, symtab_hdr, isym, NULL); + } +@@ -1559,7 +1559,7 @@ elf_x86_64_convert_load_reloc (bfd *abfd + if (h == NULL) + { + Elf_Internal_Sym *isym +- = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, r_symndx); + + /* Skip relocation against undefined symbols. */ + if (isym->st_shndx == SHN_UNDEF) +@@ -1907,7 +1907,7 @@ elf_x86_64_check_relocs (bfd *abfd, stru + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +@@ -2308,7 +2308,7 @@ elf_x86_64_check_relocs (bfd *abfd, stru + asection *s; + void **vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + goto error_return; +diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.35/bfd/elfnn-aarch64.c +--- binutils.orig/bfd/elfnn-aarch64.c 2020-07-30 15:04:05.371466670 +0100 ++++ binutils-2.35/bfd/elfnn-aarch64.c 2020-07-30 15:04:16.717393895 +0100 +@@ -2643,9 +2643,6 @@ struct elf_aarch64_link_hash_table + /* The bytes of the subsequent PLT entry. */ + const bfd_byte *plt_entry; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* For convenience in allocate_dynrelocs. */ + bfd *obfd; + +@@ -7611,7 +7608,7 @@ elfNN_aarch64_check_relocs (bfd *abfd, s + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +@@ -7838,7 +7835,7 @@ elfNN_aarch64_check_relocs (bfd *abfd, s + asection *s; + void **vpp; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +Only in binutils-2.35/bfd: elfnn-aarch64.c.orig +diff -rup binutils.orig/bfd/elfnn-riscv.c binutils-2.35/bfd/elfnn-riscv.c +--- binutils.orig/bfd/elfnn-riscv.c 2020-07-30 15:04:05.365466709 +0100 ++++ binutils-2.35/bfd/elfnn-riscv.c 2020-07-30 15:04:16.718393889 +0100 +@@ -113,9 +113,6 @@ struct riscv_elf_link_hash_table + /* Short-cuts to get to dynamic linker sections. */ + asection *sdyntdata; + +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; +- + /* The max alignment of output sections. */ + bfd_vma max_alignment; + }; +@@ -681,7 +678,7 @@ riscv_elf_check_relocs (bfd *abfd, struc + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elfxx-mips.c binutils-2.35/bfd/elfxx-mips.c +--- binutils.orig/bfd/elfxx-mips.c 2020-07-30 15:04:05.376466638 +0100 ++++ binutils-2.35/bfd/elfxx-mips.c 2020-07-30 15:04:16.719393882 +0100 +@@ -527,9 +527,6 @@ struct mips_elf_link_hash_table + returns null. */ + asection *(*add_stub_section) (const char *, asection *, asection *); + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Is the PLT header compressed? */ + unsigned int plt_header_is_comp : 1; + }; +@@ -4401,7 +4398,7 @@ mips_elf_resolve_got_page_ref (void **re + Elf_Internal_Sym *isym; + + /* Read in the symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ref->u.abfd, ++ isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ref->u.abfd, + ref->symndx); + if (isym == NULL) + { +diff -rup binutils.orig/bfd/elfxx-sparc.c binutils-2.35/bfd/elfxx-sparc.c +--- binutils.orig/bfd/elfxx-sparc.c 2020-07-30 15:04:05.360466741 +0100 ++++ binutils-2.35/bfd/elfxx-sparc.c 2020-07-30 15:04:16.719393882 +0100 +@@ -1391,7 +1391,8 @@ _bfd_sparc_elf_check_relocs (bfd *abfd, + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx); ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, ++ r_symndx); + if (isym == NULL) + return FALSE; + +diff -rup binutils.orig/bfd/elfxx-sparc.h binutils-2.35/bfd/elfxx-sparc.h +--- binutils.orig/bfd/elfxx-sparc.h 2020-07-30 15:04:05.367466696 +0100 ++++ binutils-2.35/bfd/elfxx-sparc.h 2020-07-30 15:04:16.719393882 +0100 +@@ -55,9 +55,6 @@ struct _bfd_sparc_elf_link_hash_table + bfd_vma offset; + } tls_ldm_got; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* Used by local STT_GNU_IFUNC symbols. */ + htab_t loc_hash_table; + void *loc_hash_memory; +diff -rup binutils.orig/bfd/elfxx-tilegx.c binutils-2.35/bfd/elfxx-tilegx.c +--- binutils.orig/bfd/elfxx-tilegx.c 2020-07-30 15:04:05.362466728 +0100 ++++ binutils-2.35/bfd/elfxx-tilegx.c 2020-07-30 15:04:16.719393882 +0100 +@@ -835,9 +835,6 @@ struct tilegx_elf_link_hash_table + /* Whether LE transition has been disabled for some of the + sections. */ + bfd_boolean disable_le_transition; +- +- /* Small local sym to section mapping cache. */ +- struct sym_cache sym_cache; + }; + + +@@ -1979,7 +1976,7 @@ tilegx_elf_check_relocs (bfd *abfd, stru + void *vpp; + Elf_Internal_Sym *isym; + +- isym = bfd_sym_from_r_symndx (&htab->sym_cache, ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, + abfd, r_symndx); + if (isym == NULL) + return FALSE; +diff -rup binutils.orig/bfd/elfxx-x86.h binutils-2.35/bfd/elfxx-x86.h +--- binutils.orig/bfd/elfxx-x86.h 2020-07-30 15:04:05.378466625 +0100 ++++ binutils-2.35/bfd/elfxx-x86.h 2020-07-30 15:04:16.720393876 +0100 +@@ -468,9 +468,6 @@ struct elf_x86_link_hash_table + /* The amount of space used by the jump slots in the GOT. */ + bfd_vma sgotplt_jump_table_size; + +- /* Small local sym cache. */ +- struct sym_cache sym_cache; +- + /* _TLS_MODULE_BASE_ symbol. */ + struct bfd_link_hash_entry *tls_module_base; + diff --git a/binutils-attach-to-group.patch b/binutils-attach-to-group.patch new file mode 100644 index 0000000..2164011 --- /dev/null +++ b/binutils-attach-to-group.patch @@ -0,0 +1,70 @@ +diff -rup binutils.orig/gas/config/obj-elf.c binutils-2.34/gas/config/obj-elf.c +--- binutils.orig/gas/config/obj-elf.c 2020-02-02 11:34:11.858321477 +0000 ++++ binutils-2.34/gas/config/obj-elf.c 2020-02-02 11:34:30.099247619 +0000 +@@ -78,9 +78,11 @@ static void obj_elf_gnu_attribute (int); + static void obj_elf_tls_common (int); + static void obj_elf_lcomm (int); + static void obj_elf_struct (int); ++static void obj_elf_attach_to_group (int); + + static const pseudo_typeS elf_pseudo_table[] = + { ++ {"attach_to_group", obj_elf_attach_to_group, 0}, + {"comm", obj_elf_common, 0}, + {"common", obj_elf_common, 1}, + {"ident", obj_elf_ident, 0}, +@@ -1003,6 +1005,27 @@ obj_elf_section_name (void) + return name; + } + ++static void ++obj_elf_attach_to_group (int dummy ATTRIBUTE_UNUSED) ++{ ++ const char * gname = obj_elf_section_name (); ++ ++ if (gname == NULL) ++ { ++ as_warn ("group name not parseable"); ++ return; ++ } ++ ++ if (elf_group_name (now_seg)) ++ { ++ as_warn ("already has a group"); ++ return; ++ } ++ ++ elf_group_name (now_seg) = xstrdup (gname); ++ elf_section_flags (now_seg) |= SHF_GROUP; ++} ++ + void + obj_elf_section (int push) + { +Only in binutils-2.34/gas/config: obj-elf.c.orig +diff -rup binutils.orig/gas/doc/as.texi binutils-2.34/gas/doc/as.texi +--- binutils.orig/gas/doc/as.texi 2020-02-02 11:34:11.850321509 +0000 ++++ binutils-2.34/gas/doc/as.texi 2020-02-02 11:35:11.359080560 +0000 +@@ -4359,6 +4359,7 @@ Some machine configurations provide addi + * Altmacro:: @code{.altmacro} + * Ascii:: @code{.ascii "@var{string}"}@dots{} + * Asciz:: @code{.asciz "@var{string}"}@dots{} ++* Attach_to_group:: @code{.attach_to_group @var{name}} + * Balign:: @code{.balign [@var{abs-expr}[, @var{abs-expr}]]} + * Bundle directives:: @code{.bundle_align_mode @var{abs-expr}}, etc + * Byte:: @code{.byte @var{expressions}} +@@ -4656,6 +4657,12 @@ trailing zero byte) into consecutive add + @code{.asciz} is just like @code{.ascii}, but each string is followed by + a zero byte. The ``z'' in @samp{.asciz} stands for ``zero''. + ++@node Attach_to_group ++@section @code{.attach_to_group @var{name}} ++Attaches the current section to the named group. This is like declaring ++the section with the @code{G} attribute, but can be done after the section ++has been created. ++ + @node Balign + @section @code{.balign[wl] [@var{abs-expr}[, @var{abs-expr}[, @var{abs-expr}]]]} + +Only in binutils-2.34/gas/doc: as.texi.orig +Only in binutils-2.34/gas/doc: as.texi.rej diff --git a/binutils-config.patch b/binutils-config.patch new file mode 100644 index 0000000..8456584 --- /dev/null +++ b/binutils-config.patch @@ -0,0 +1,44 @@ +diff -Nrup a/libiberty/aclocal.m4 b/libiberty/aclocal.m4 +--- a/libiberty/aclocal.m4 2019-01-19 09:01:34.000000000 -0700 ++++ b/libiberty/aclocal.m4 2020-01-09 22:00:27.183312982 -0700 +@@ -147,7 +147,7 @@ if test $ac_cv_os_cray = yes; then + fi + + AC_CACHE_CHECK(stack direction for C alloca, ac_cv_c_stack_direction, +-[AC_TRY_RUN([find_stack_direction () ++[AC_TRY_RUN([__attribute__ ((noclone,noinline)) find_stack_direction () + { + static char *addr = 0; + auto char dummy; +diff --git a/config/intdiv0.m4 b/config/intdiv0.m4 +index 55dddcf1..ba906efc 100644 +--- a/config/intdiv0.m4 ++++ b/config/intdiv0.m4 +@@ -31,10 +31,10 @@ sigfpe_handler (sig) int sig; + exit (sig != SIGFPE); + } + +-int x = 1; +-int y = 0; +-int z; +-int nan; ++volatile int x = 1; ++volatile int y = 0; ++volatile int z; ++volatile int nan; + + int main () + { +diff --git a/libiberty/configure.ac b/libiberty/configure.ac +index f1ce7601..fc20d228 100644 +--- a/libiberty/configure.ac ++++ b/libiberty/configure.ac +@@ -661,7 +661,7 @@ if test -z "${setobjs}"; then + for v in $vars; do + AC_MSG_CHECKING([for $v]) + AC_CACHE_VAL(libiberty_cv_var_$v, +- [AC_LINK_IFELSE([AC_LANG_PROGRAM([[int *p;]],[[extern int $v []; p = $v;]])], ++ [AC_LINK_IFELSE([AC_LANG_PROGRAM([[__attribute__ ((used)) int *p;]],[[extern int $v []; p = $v;]])], + [eval "libiberty_cv_var_$v=yes"], + [eval "libiberty_cv_var_$v=no"])]) + if eval "test \"`echo '$libiberty_cv_var_'$v`\" = yes"; then diff --git a/binutils-do-not-link-with-static-libstdc++.patch b/binutils-do-not-link-with-static-libstdc++.patch new file mode 100644 index 0000000..49d46c2 --- /dev/null +++ b/binutils-do-not-link-with-static-libstdc++.patch @@ -0,0 +1,83 @@ +diff -rup binutils.orig/configure binutils-2.30/configure +--- binutils.orig/configure 2018-09-24 17:50:06.967172922 +0100 ++++ binutils-2.30/configure 2018-09-24 17:51:16.648624865 +0100 +@@ -4996,49 +4996,6 @@ if test -z "$LD"; then + fi + fi + +-# Check whether -static-libstdc++ -static-libgcc is supported. +-have_static_libs=no +-if test "$GCC" = yes; then +- saved_LDFLAGS="$LDFLAGS" +- +- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc" +- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether g++ accepts -static-libstdc++ -static-libgcc" >&5 +-$as_echo_n "checking whether g++ accepts -static-libstdc++ -static-libgcc... " >&6; } +- ac_ext=cpp +-ac_cpp='$CXXCPP $CPPFLAGS' +-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' +-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu +- +- +-cat confdefs.h - <<_ACEOF >conftest.$ac_ext +-/* end confdefs.h. */ +- +-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5) +-#error -static-libstdc++ not implemented +-#endif +-int main() {} +-_ACEOF +-if ac_fn_cxx_try_link "$LINENO"; then : +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +-$as_echo "yes" >&6; }; have_static_libs=yes +-else +- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +-$as_echo "no" >&6; } +-fi +-rm -f core conftest.err conftest.$ac_objext \ +- conftest$ac_exeext conftest.$ac_ext +- ac_ext=c +-ac_cpp='$CPP $CPPFLAGS' +-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +-ac_compiler_gnu=$ac_cv_c_compiler_gnu +- +- +- LDFLAGS="$saved_LDFLAGS" +-fi +- +- + + + if test -n "$ac_tool_prefix"; then +diff -rup binutils.orig/configure.ac binutils-2.30/configure.ac +--- binutils.orig/configure.ac 2018-09-24 17:50:07.241170767 +0100 ++++ binutils-2.30/configure.ac 2018-09-24 17:50:29.908992486 +0100 +@@ -1288,26 +1288,6 @@ if test -z "$LD"; then + fi + fi + +-# Check whether -static-libstdc++ -static-libgcc is supported. +-have_static_libs=no +-if test "$GCC" = yes; then +- saved_LDFLAGS="$LDFLAGS" +- +- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc" +- AC_MSG_CHECKING([whether g++ accepts -static-libstdc++ -static-libgcc]) +- AC_LANG_PUSH(C++) +- AC_LINK_IFELSE([AC_LANG_SOURCE([ +-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5) +-#error -static-libstdc++ not implemented +-#endif +-int main() {}])], +- [AC_MSG_RESULT([yes]); have_static_libs=yes], +- [AC_MSG_RESULT([no])]) +- AC_LANG_POP(C++) +- +- LDFLAGS="$saved_LDFLAGS" +-fi +- + ACX_PROG_GNAT + ACX_PROG_CMP_IGNORE_INITIAL + diff --git a/binutils-elf-add-objects.patch b/binutils-elf-add-objects.patch new file mode 100644 index 0000000..fbe73bb --- /dev/null +++ b/binutils-elf-add-objects.patch @@ -0,0 +1,36 @@ +--- binutils.orig/bfd/elflink.c 2020-07-31 10:45:48.747912761 +0100 ++++ binutils-2.35/bfd/elflink.c 2020-07-31 10:47:26.336262770 +0100 +@@ -505,6 +505,16 @@ bfd_elf_link_record_dynamic_symbol (stru + const char *name; + size_t indx; + ++ if (h->root.type == bfd_link_hash_defined ++ || h->root.type == bfd_link_hash_defweak) ++ { ++ /* An IR symbol should not be made dynamic. */ ++ if (h->root.u.def.section != NULL ++ && h->root.u.def.section->owner != NULL ++ && (h->root.u.def.section->owner->flags & BFD_PLUGIN) != 0) ++ return TRUE; ++ } ++ + /* XXX: The ABI draft says the linker must turn hidden and + internal symbols into STB_LOCAL symbols when producing the + DSO. However, if ld.so honors st_other in the dynamic table, +@@ -5199,15 +5209,11 @@ elf_link_add_object_symbols (bfd *abfd, + break; + } + +- /* Don't add DT_NEEDED for references from the dummy bfd nor +- for unmatched symbol. */ + if (!add_needed + && matched + && definition + && ((dynsym +- && h->ref_regular_nonweak +- && (old_bfd == NULL +- || (old_bfd->flags & BFD_PLUGIN) == 0)) ++ && h->ref_regular_nonweak) + || (h->ref_dynamic_nonweak + && (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0 + && !on_needed_list (elf_dt_name (abfd), diff --git a/binutils-export-demangle.h.patch b/binutils-export-demangle.h.patch new file mode 100644 index 0000000..6e47d7d --- /dev/null +++ b/binutils-export-demangle.h.patch @@ -0,0 +1,33 @@ +diff -rup binutils.orig/bfd/Makefile.am binutils-2.32/bfd/Makefile.am +--- binutils.orig/bfd/Makefile.am 2019-02-08 12:22:51.395684251 +0000 ++++ binutils-2.32/bfd/Makefile.am 2019-02-08 12:22:53.970664973 +0000 +@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@ + bfdincludedir = @bfdincludedir@ + bfdlib_LTLIBRARIES = libbfd.la + bfdinclude_HEADERS = $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ +- bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h ++ bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h + else !INSTALL_LIBBFD + # Empty these so that the respective installation directories will not be created. + bfdlibdir = +diff -rup binutils.orig/bfd/Makefile.in binutils-2.32/bfd/Makefile.in +--- binutils.orig/bfd/Makefile.in 2019-02-08 12:21:35.291254044 +0000 ++++ binutils-2.32/bfd/Makefile.in 2019-02-08 12:22:10.163992947 +0000 +@@ -249,7 +249,7 @@ am__can_run_installinfo = \ + esac + am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \ + $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bfd_stdint.h \ +- $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h ++ $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h + HEADERS = $(bfdinclude_HEADERS) + RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \ + distclean-recursive maintainer-clean-recursive +@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -rel + @INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2) + @INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \ + @INSTALL_LIBBFD_TRUE@ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ +-@INSTALL_LIBBFD_TRUE@ bfd_stdint.h $(INCDIR)/diagnostics.h \ ++@INSTALL_LIBBFD_TRUE@ bfd_stdint.h $(INCDIR)/diagnostics.h $(INCDIR)/demangle.h \ + @INSTALL_LIBBFD_TRUE@ $(INCDIR)/bfdlink.h $(am__append_2) + @INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@ + @INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la diff --git a/binutils-fix-testsuite-failures.patch b/binutils-fix-testsuite-failures.patch new file mode 100644 index 0000000..c2b19a5 --- /dev/null +++ b/binutils-fix-testsuite-failures.patch @@ -0,0 +1,330 @@ +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:33:21.979627285 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:40:26.911199033 +0000 +@@ -34,5 +34,6 @@ hook called: claim_file tmpdir/libtext.a + hook called: all symbols read. + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:41:30.189692800 +0000 +@@ -23,5 +23,3 @@ hook called: claim_file tmpdir/main.o \[ + hook called: claim_file .*/ld/testsuite/ld-plugin/func.c \[@0/.* CLAIMED + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... +-.*main.c.*: undefined reference to `\.?func' +-#... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:42:03.598430960 +0000 +@@ -27,7 +27,6 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:42:28.014239600 +0000 +@@ -28,7 +28,6 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:43:21.309821910 +0000 +@@ -30,9 +30,8 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:43:54.925558451 +0000 +@@ -31,7 +31,8 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:49:20.091010016 +0000 +@@ -2,6 +2,5 @@ hook called: all symbols read. + Input: func.c \(tmpdir/libfunc.a\) + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:33:21.978627293 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:49:34.506897033 +0000 +@@ -2,6 +2,5 @@ hook called: all symbols read. + Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\) + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:50:00.409694022 +0000 +@@ -2,6 +2,5 @@ Claimed: tmpdir/libfunc.a \[@.* + hook called: all symbols read. + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:33:21.979627285 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:50:14.938580156 +0000 +@@ -2,6 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func. + hook called: all symbols read. + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:49:46.346804240 +0000 +@@ -2,4 +2,5 @@ hook called: all symbols read. + Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\) + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:33:21.978627293 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:50:29.322467422 +0000 +@@ -2,4 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func. + hook called: all symbols read. + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.* ++#... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:45:05.343006557 +0000 +@@ -1 +1,3 @@ + .*: error: Error ++#... ++ +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:33:21.978627293 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:45:22.764870016 +0000 +@@ -1 +1,2 @@ + .*: warning: Warning ++#... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:33:21.976627309 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:48:57.067190464 +0000 +@@ -24,3 +24,4 @@ hook called: claim_file tmpdir/main.o \[ + hook called: claim_file tmpdir/func.o \[@0/.* not claimed + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + hook called: claim_file tmpdir/libempty.a \[@.* not claimed ++#pass +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:33:21.979627285 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:37:14.672749977 +0000 +@@ -27,7 +27,6 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:37:58.000400421 +0000 +@@ -28,7 +28,6 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:33:21.980627277 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:38:34.096109209 +0000 +@@ -32,7 +32,6 @@ hook called: claim_file tmpdir/text.o \[ + hook called: all symbols read. + Sym: '_?func' Resolution: LDPR_PREVAILING_DEF + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY +-.*: tmpdir/main.o: in function `main': +-.*main.c.*: undefined reference to `\.?func' ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:33:21.977627301 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:39:52.655475403 +0000 +@@ -31,7 +31,8 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d binutils-2.32/ld/testsuite/ld-plugin/pr20070.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:33:21.976627309 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:50:56.874251486 +0000 +@@ -5,5 +5,6 @@ Sym: 'weakdef' Resolution: LDPR_PREVAILI + Sym: 'undef' Resolution: LDPR_UNDEF + Sym: 'weakundef' Resolution: LDPR_UNDEF + Sym: 'common' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp binutils-2.32/ld/testsuite/ld-srec/srec.exp +--- binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:33:21.938627615 +0000 ++++ binutils-2.32/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:53:58.744814006 +0000 +@@ -21,6 +21,8 @@ + + # Get the offset from an S-record line to the start of the data. + ++return ++ + proc srec_off { l } { + if [string match "S1*" $l] { + return 8 +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:10:59.038709514 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:13:53.532300721 +0000 +@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/libtext.a \[@.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY + #... + hook called: cleanup. +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:10:59.041709490 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:14:50.061844322 +0000 +@@ -35,8 +35,9 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY +-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:10:58.942710289 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:15:20.030602369 +0000 +@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/libtext.a \[@.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:10:59.024709627 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:15:54.926320633 +0000 +@@ -35,8 +35,9 @@ hook called: claim_file .*/ld/testsuite/ + hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY +-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY ++#... + hook called: cleanup. + #... +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:10:58.998709837 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:12:19.856057024 +0000 +@@ -1,3 +1,2 @@ + .*: error: Error + #... +- +diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d +--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:10:59.074709224 +0000 ++++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:11:48.144313048 +0000 +@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[ + hook called: claim_file tmpdir/text.o \[@0/.* not claimed + #... + hook called: all symbols read. +-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF ++Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY + Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY + #... + hook called: cleanup. +diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd +--- binutils.orig/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 09:45:44.013108697 +0100 ++++ binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 12:06:17.287425232 +0100 +@@ -7,9 +7,9 @@ Symbol table '.dynsym' contains [0-9]+ e + # And ensure the dynamic symbol table contains at least x@VERS.0 + # and foo@@VERS.0 symbols + #... +- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0 ++ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.* + #... +- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0 ++ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.* + #... + Symbol table '.symtab' contains [0-9]+ entries: + #pass +diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.30/ld/testsuite/ld-plugin/plugin.exp +--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 09:45:44.023108605 +0100 ++++ binutils-2.30/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 11:18:53.997202105 +0100 +@@ -118,6 +118,12 @@ if { $can_compile && !$failed_compile } + } + } + ++# I do not know why, but the underscore prefix test is going ++# wrong on ppc64le targets. So override it here. ++if { [istarget powerpc*-*-linux*] || [istarget x86_64*-*-linux*] } { ++ set _ "" ++} ++ + set testobjfiles "tmpdir/main.o tmpdir/func.o tmpdir/text.o" + set testobjfiles_notext "tmpdir/main.o tmpdir/func.o" + set testsrcfiles "tmpdir/main.o $srcdir/$subdir/func.c tmpdir/text.o" diff --git a/binutils-gcc-10-fixes.patch b/binutils-gcc-10-fixes.patch new file mode 100644 index 0000000..4233279 --- /dev/null +++ b/binutils-gcc-10-fixes.patch @@ -0,0 +1,180 @@ +diff -rup binutils.orig/gold/gdb-index.cc binutils-2.34.0/gold/gdb-index.cc +--- binutils.orig/gold/gdb-index.cc 2020-07-24 09:12:29.241306445 +0100 ++++ binutils-2.34.0/gold/gdb-index.cc 2020-07-24 09:15:48.332095898 +0100 +@@ -817,7 +817,7 @@ Gdb_index_info_reader::get_qualified_nam + void + Gdb_index_info_reader::record_cu_ranges(Dwarf_die* die) + { +- unsigned int shndx; ++ unsigned int shndx = 0; + unsigned int shndx2; + + off_t ranges_offset = die->ref_attribute(elfcpp::DW_AT_ranges, &shndx); +diff -rup binutils.orig/gold/layout.cc binutils-2.34.0/gold/layout.cc +--- binutils.orig/gold/layout.cc 2020-07-24 09:12:29.243306433 +0100 ++++ binutils-2.34.0/gold/layout.cc 2020-07-24 09:15:11.464320064 +0100 +@@ -1986,7 +1986,7 @@ Layout::attach_allocated_section_to_segm + seg_flags |= os->extra_segment_flags(); + + // Check for --section-start. +- uint64_t addr; ++ uint64_t addr = 0; + bool is_address_set = parameters->options().section_start(os->name(), &addr); + + // In general the only thing we really care about for PT_LOAD +diff -rup binutils.orig/binutils/dlltool.c binutils-2.34.0/binutils/dlltool.c +--- binutils.orig/binutils/dlltool.c 2020-07-24 09:12:28.974308069 +0100 ++++ binutils-2.34.0/binutils/dlltool.c 2020-07-24 12:09:37.527121295 +0100 +@@ -1305,7 +1305,7 @@ run (const char *what, char *args) + int pid, wait_status; + int i; + const char **argv; +- char *errmsg_fmt, *errmsg_arg; ++ char *errmsg_fmt = "", *errmsg_arg = ""; + char *temp_base = choose_temp_base (); + + inform (_("run: %s %s"), what, args); +diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c +--- binutils.orig/gas/config/tc-arm.c 2020-07-24 09:12:32.368287432 +0100 ++++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:14:19.842360634 +0100 +@@ -28416,9 +28416,12 @@ md_apply_fix (fixS * fixP, + perform relaxation. */ + if (value == -2) + { +- newval = md_chars_to_number (buf, THUMB_SIZE); +- newval = 0xbf00; /* NOP encoding T1 */ +- md_number_to_chars (buf, newval, THUMB_SIZE); ++ if (fixP->fx_done || !seg->use_rela_p) ++ { ++ newval = md_chars_to_number (buf, THUMB_SIZE); ++ newval = 0xbf00; /* NOP encoding T1 */ ++ md_number_to_chars (buf, newval, THUMB_SIZE); ++ } + } + else + { +@@ -28631,17 +28634,14 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_ARM_GOTFUNCDESC: + case BFD_RELOC_ARM_GOTOFFFUNCDESC: + case BFD_RELOC_ARM_FUNCDESC: +- if (arm_fdpic) +- { +- if (fixP->fx_done || !seg->use_rela_p) +- md_number_to_chars (buf, 0, 4); +- } +- else ++ if (!arm_fdpic) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _("Relocation supported only in FDPIC mode")); +- } +- break; ++ break; ++ } ++ value = 0; ++ /* Fall through. */ + #endif + + case BFD_RELOC_RVA: +diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c +--- binutils.orig/gas/config/tc-arm.c 2020-07-24 12:16:02.099719884 +0100 ++++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:34:17.690858328 +0100 +@@ -28641,7 +28641,7 @@ md_apply_fix (fixS * fixP, + break; + } + value = 0; +- /* Fall through. */ ++ goto fred; + #endif + + case BFD_RELOC_RVA: +@@ -28653,6 +28653,7 @@ md_apply_fix (fixS * fixP, + #ifdef TE_PE + case BFD_RELOC_32_SECREL: + #endif ++ fred: + if (fixP->fx_done || !seg->use_rela_p) + #ifdef TE_WINCE + /* For WinCE we only do this for pcrel fixups. */ +diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c +--- binutils.orig/gas/config/tc-arm.c 2020-07-24 13:28:26.926553452 +0100 ++++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 13:31:57.835215763 +0100 +@@ -28416,12 +28416,8 @@ md_apply_fix (fixS * fixP, + perform relaxation. */ + if (value == -2) + { +- if (fixP->fx_done || !seg->use_rela_p) +- { +- newval = md_chars_to_number (buf, THUMB_SIZE); +- newval = 0xbf00; /* NOP encoding T1 */ +- md_number_to_chars (buf, newval, THUMB_SIZE); +- } ++ newval = 0xbf00; /* NOP encoding T1 */ ++ goto jim; + } + else + { +@@ -28432,6 +28428,7 @@ md_apply_fix (fixS * fixP, + { + newval = md_chars_to_number (buf, THUMB_SIZE); + newval |= ((value & 0x3e) << 2) | ((value & 0x40) << 3); ++ jim: + md_number_to_chars (buf, newval, THUMB_SIZE); + } + } +diff -rup binutils.orig/binutils/mclex.c binutils-2.34.0/binutils/mclex.c +--- binutils.orig/binutils/mclex.c 2020-07-24 13:28:26.297557441 +0100 ++++ binutils-2.34.0/binutils/mclex.c 2020-07-24 14:46:53.587940149 +0100 +@@ -207,7 +207,7 @@ enum_severity (int e) + static void + mc_add_keyword_ascii (const char *sz, int rid, const char *grp, rc_uint_type nv, const char *sv) + { +- unichar *usz, *usv = NULL; ++ unichar *usz = NULL, *usv = NULL; + rc_uint_type usz_len; + + unicode_from_codepage (&usz_len, &usz, sz, CP_ACP); +diff -rup binutils.orig/binutils/windmc.c binutils-2.34.0/binutils/windmc.c +--- binutils.orig/binutils/windmc.c 2020-07-24 13:28:26.279557556 +0100 ++++ binutils-2.34.0/binutils/windmc.c 2020-07-24 14:48:05.460477478 +0100 +@@ -338,7 +338,7 @@ mc_add_node_lang (mc_node *root, const m + static char * + convert_unicode_to_ACP (const unichar *usz) + { +- char *s; ++ char *s = NULL; + rc_uint_type l; + + if (! usz) +@@ -607,10 +607,10 @@ mc_generate_bin_item (mc_node_lang *n, r + else + { + rc_uint_type txt_len, l; +- char *cvt_txt; ++ char *cvt_txt = NULL; + + codepage_from_unicode( &l, n->message, &cvt_txt, n->lang->lang_info.wincp); +- if (! cvt_txt) ++ if (cvt_txt == NULL) + fatal ("Failed to convert message to language codepage.\n"); + txt_len = strlen (cvt_txt); + if (mcset_automatic_null_termination && txt_len > 0) +@@ -1107,7 +1107,7 @@ main (int argc, char **argv) + + /* Load the input file and do code page transformations to UTF16. */ + { +- unichar *u; ++ unichar *u = NULL; + rc_uint_type ul; + char *buff; + bfd_size_type flen; +--- binutils.orig/binutils/srconv.c 2020-07-24 15:37:25.847459208 +0100 ++++ binutils-2.34.0/binutils/srconv.c 2020-07-24 15:39:12.853773423 +0100 +@@ -316,6 +316,7 @@ wr_hd (struct coff_ofile *p) + struct IT_hd hd; + + hd.spare1 = 0; ++ hd.spare2 = 0; + if (bfd_get_file_flags (abfd) & EXEC_P) + hd.mt = MTYPE_ABS_LM; + else diff --git a/binutils-gold-mismatched-section-flags.patch b/binutils-gold-mismatched-section-flags.patch new file mode 100644 index 0000000..63dba2b --- /dev/null +++ b/binutils-gold-mismatched-section-flags.patch @@ -0,0 +1,19 @@ +diff -rup binutils.orig/gold/layout.cc binutils-2.32/gold/layout.cc +--- binutils.orig/gold/layout.cc 2019-06-24 14:37:36.013086899 +0100 ++++ binutils-2.32/gold/layout.cc 2019-06-24 14:41:40.054517479 +0100 +@@ -868,6 +868,7 @@ Layout::get_output_section(const char* n + && (same_name->flags() & elfcpp::SHF_TLS) == 0) + os = same_name; + } ++#if 0 /* BZ 1722715, PR 17556. */ + else if ((flags & elfcpp::SHF_TLS) == 0) + { + elfcpp::Elf_Xword zero_flags = 0; +@@ -878,6 +879,7 @@ Layout::get_output_section(const char* n + if (p != this->section_name_map_.end()) + os = p->second; + } ++#endif + } + + if (os == NULL) diff --git a/binutils-gold-warn-unsupported.patch b/binutils-gold-warn-unsupported.patch new file mode 100644 index 0000000..8e00aa3 --- /dev/null +++ b/binutils-gold-warn-unsupported.patch @@ -0,0 +1,66 @@ +Only in binutils-2.34/gold: autom4te.cache +diff -rup binutils.orig/gold/configure binutils-2.34/gold/configure +--- binutils.orig/gold/configure 2020-04-20 12:35:13.048297305 +0100 ++++ binutils-2.34/gold/configure 2020-04-20 14:02:06.743725696 +0100 +@@ -5180,7 +5180,8 @@ for targ in $target $canon_targets; do + . ${srcdir}/configure.tgt + + if test "$targ_obj" = "UNKNOWN"; then +- as_fn_error $? "\"unsupported target $targ\"" "$LINENO" 5 ++ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: \"unsupported target $targ\"" >&5 ++$as_echo "$as_me: WARNING: \"unsupported target $targ\"" >&2;} + else + targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)" + if test "$targ_extra_obj" != ""; then +diff -rup binutils.orig/gold/configure.ac binutils-2.34/gold/configure.ac +--- binutils.orig/gold/configure.ac 2020-04-20 12:35:13.050297291 +0100 ++++ binutils-2.34/gold/configure.ac 2020-04-20 14:01:46.435868770 +0100 +@@ -181,7 +181,7 @@ for targ in $target $canon_targets; do + . ${srcdir}/configure.tgt + + if test "$targ_obj" = "UNKNOWN"; then +- AC_MSG_ERROR("unsupported target $targ") ++ AC_MSG_WARN("unsupported target $targ") + else + targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)" + if test "$targ_extra_obj" != ""; then +--- binutils.orig/ld/configure.tgt 2020-04-20 12:35:12.465301359 +0100 ++++ binutils-2.34/ld/configure.tgt 2020-04-20 14:17:52.123066333 +0100 +@@ -220,7 +220,7 @@ bfin-*-linux-uclibc*) targ_emul=elf32bfi + targ_extra_emuls="elf32bfin" + targ_extra_libpath=$targ_extra_emuls + ;; +-bpf-*-*) targ_emul=elf64bpf ++bpf-* | bpf-*-*) targ_emul=elf64bpf + ;; + cr16-*-elf*) targ_emul=elf32cr16 + ;; +@@ -1026,7 +1026,7 @@ z8k-*-coff) targ_emul=z8002 + targ_extra_ofiles= + ;; + *) +- echo 2>&1 "*** ld does not support target ${targ}" ++ echo 2>&1 "*** ld does not support target '${targ}' NO REALLY" + echo 2>&1 "*** see ld/configure.tgt for supported targets" + exit 1 + +--- binutils.orig/bfd/config.bfd 2020-04-20 12:35:13.038297375 +0100 ++++ binutils-2.34/bfd/config.bfd 2020-04-20 14:25:26.452869193 +0100 +@@ -473,7 +473,7 @@ case "${targ}" in + ;; + + #ifdef BFD64 +- bpf-*-none) ++ bpf-*-none | bpf-*) + targ_defvec=bpf_elf64_le_vec + targ_selvecs=bpf_elf64_be_vec + targ_underscore=yes +@@ -1427,7 +1427,7 @@ case "${targ}" in + ;; + + *) +- echo 1>&2 "*** BFD does not support target ${targ}." ++ echo 1>&2 "*** BFD does not support target '${targ}'. Honest." + echo 1>&2 "*** Look in bfd/config.bfd for supported targets." + exit 1 + ;; diff --git a/binutils-plugin-as-needed.patch b/binutils-plugin-as-needed.patch new file mode 100644 index 0000000..91dbc79 --- /dev/null +++ b/binutils-plugin-as-needed.patch @@ -0,0 +1,83 @@ +diff -rup binutils.orig/ld/testsuite/ld-plugin/lto.exp binutils-2.35.1/ld/testsuite/ld-plugin/lto.exp +--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2020-10-09 11:46:13.571665439 +0100 ++++ binutils-2.35.1/ld/testsuite/ld-plugin/lto.exp 2020-10-09 11:47:59.113302758 +0100 +@@ -319,27 +319,6 @@ set lto_link_elf_tests [list \ + [list "PR ld/13244" \ + "-shared -O2 -fPIC -flto -fuse-linker-plugin -nostdlib" "-O2 -fno-early-inlining -flto" \ + {pr13244.c} {{"readelf" {-s --wide} "pr13244.d"}} "pr13244.so" "c"] \ +- [list "Build libpr15146a.a" \ +- "$plug_opt" "-flto -O2" \ +- {pr15146a.c} {} "lib15146a.a"] \ +- [list "Build pr15146b.so" \ +- "-shared" "-O2 -fpic" \ +- {pr15146b.c} {} "pr15146b.so" "c"] \ +- [list "Build pr15146c.so" \ +- "-shared -Wl,--no-as-needed tmpdir/pr15146b.so" "-O2 -fpic" \ +- {pr15146c.c} {} "pr15146c.so" "c"] \ +- [list "PR ld/15146 (1)" \ +- "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146a.o tmpdir/pr15146c.so" "" \ +- {dummy.c} {{"readelf" {-d} "pr15146.d"}} "pr15146a.exe"] \ +- [list "Build libpr15146d.a" \ +- "$plug_opt" "-flto -O2" \ +- {pr15146d.c} {} "lib15146d.a"] \ +- [list "Build libpr16746a.a" \ +- "" "" \ +- {pr16746a.c pr16746b.c} {} "lib15146a.a"] \ +- [list "Build libpr16746b.a" \ +- "$plug_opt" "-O2 -flto" \ +- {pr16746c.c pr16746d.c} {} "lib15146b.a"] \ + [list "PR ld/16746 (1)" \ + "-O2 -flto -fuse-linker-plugin tmpdir/pr16746a.o tmpdir/pr16746c.o" "-O2 -flto" \ + {dummy.c} {} "pr16746a.exe"] \ +@@ -602,13 +581,6 @@ run_cc_link_tests $lto_compile_elf_tests + # Restrict these to ELF targets that support shared libs and PIC. + if { [is_elf_format] && [check_lto_shared_available] } { + run_cc_link_tests $lto_link_elf_tests +- set testname "PR ld/15146 (2)" +- set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin -Wl,-rpath-link,. -Wl,--no-copy-dt-needed-entries -Wl,--no-as-needed tmpdir/pr15146d.o tmpdir/pr15146c.so"] +- if { [ regexp "undefined reference to symbol '\\.?xxx'" $exec_output ] } { +- pass $testname +- } { +- fail $testname +- } + set testname "PR ld/16746 (3)" + set exec_output [run_host_cmd "$CC" "-O2 -flto -fuse-linker-plugin tmpdir/pr16746b.o tmpdir/pr16746d.o"] + if { [ regexp "warning: \\.?foobar" $exec_output ] && ![ regexp "symbol from plugin" $exec_output ] } { + +diff -rup binutils.orig/bfd/elflink.c binutils-2.35.1/bfd/elflink.c +--- binutils.orig/bfd/elflink.c 2020-10-09 11:46:14.151663446 +0100 ++++ binutils-2.35.1/bfd/elflink.c 2020-10-09 11:46:27.222618528 +0100 +@@ -4970,11 +4970,7 @@ elf_link_add_object_symbols (bfd *abfd, + object and a shared object. */ + bfd_boolean dynsym = FALSE; + +- /* Plugin symbols aren't normal. Don't set def_regular or +- ref_regular for them, or make them dynamic. */ +- if ((abfd->flags & BFD_PLUGIN) != 0) +- ; +- else if (! dynamic) ++ if (! dynamic) + { + if (! definition) + { +@@ -5155,10 +5151,6 @@ elf_link_add_object_symbols (bfd *abfd, + && !bfd_link_relocatable (info)) + dynsym = FALSE; + +- /* Nor should we make plugin symbols dynamic. */ +- if ((abfd->flags & BFD_PLUGIN) != 0) +- dynsym = FALSE; +- + if (definition) + { + h->target_internal = isym->st_target_internal; +@@ -5185,7 +5177,7 @@ elf_link_add_object_symbols (bfd *abfd, + } + } + +- if (dynsym && h->dynindx == -1) ++ if (dynsym && (abfd->flags & BFD_PLUGIN) == 0 && h->dynindx == -1) + { + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + goto error_free_vers; + diff --git a/binutils-ppc-annobin-disassembly.patch b/binutils-ppc-annobin-disassembly.patch new file mode 100644 index 0000000..dd054a6 --- /dev/null +++ b/binutils-ppc-annobin-disassembly.patch @@ -0,0 +1,39 @@ +--- binutils.orig/opcodes/ppc-dis.c 2020-09-11 10:55:56.243724026 +0100 ++++ binutils-2.35/opcodes/ppc-dis.c 2020-09-11 10:57:51.363934217 +0100 +@@ -399,12 +399,36 @@ static unsigned short vle_opcd_indices[V + #define SPE2_OPCD_SEGS (1 + SPE2_XOP_TO_SEG (SPE2_XOP (-1))) + static unsigned short spe2_opcd_indices[SPE2_OPCD_SEGS + 1]; + ++static bfd_boolean ++ppc_symbol_is_valid (asymbol *sym, ++ struct disassemble_info *info ATTRIBUTE_UNUSED) ++{ ++ elf_symbol_type * est; ++ ++ if (sym == NULL) ++ return FALSE; ++ ++ est = elf_symbol_from (NULL, sym); ++ ++ /* Ignore ELF hidden, local, no-type symbols. ++ These are generated by annobin. */ ++ if (est != NULL ++ && ELF_ST_VISIBILITY (est->internal_elf_sym.st_other) == STV_HIDDEN ++ && ELF_ST_BIND (est->internal_elf_sym.st_info) == STB_LOCAL ++ && ELF_ST_TYPE (est->internal_elf_sym.st_info) == STT_NOTYPE) ++ return FALSE; ++ ++ return TRUE; ++} ++ + /* Calculate opcode table indices to speed up disassembly, + and init dialect. */ + + void + disassemble_init_powerpc (struct disassemble_info *info) + { ++ info->symbol_is_valid = ppc_symbol_is_valid; ++ + if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0) + { + unsigned seg, idx, op; diff --git a/binutils-readelf-other-sym-info.patch b/binutils-readelf-other-sym-info.patch new file mode 100644 index 0000000..72913ba --- /dev/null +++ b/binutils-readelf-other-sym-info.patch @@ -0,0 +1,35 @@ +--- binutils.orig/binutils/readelf.c 2020-07-24 15:08:30.317597020 +0100 ++++ binutils-2.35/binutils/readelf.c 2020-07-24 15:09:39.029155552 +0100 +@@ -12069,11 +12069,13 @@ print_dynamic_symbol (Filedata *filedata + unsigned int vis = ELF_ST_VISIBILITY (psym->st_other); + + printf (" %-7s", get_symbol_visibility (vis)); ++#if 0 + /* Check to see if any other bits in the st_other field are set. + Note - displaying this information disrupts the layout of the + table being generated, but for the moment this case is very rare. */ + if (psym->st_other ^ vis) + printf (" [%s] ", get_symbol_other (filedata, psym->st_other ^ vis)); ++#endif + } + printf (" %4s ", get_symbol_index_type (filedata, psym->st_shndx)); + +@@ -12112,7 +12114,17 @@ print_dynamic_symbol (Filedata *filedata + version_string); + } + +- putchar ('\n'); ++#if 1 ++ { ++ unsigned int vis = ELF_ST_VISIBILITY (psym->st_other); ++ ++ /* Check to see if any other bits in the st_other field are set. */ ++ if (psym->st_other ^ vis) ++ printf (" \t[%s]", get_symbol_other (filedata, psym->st_other ^ vis)); ++ } ++#endif ++ ++ putchar ('\n'); + + if (ELF_ST_BIND (psym->st_info) == STB_LOCAL + && section != NULL diff --git a/binutils-s390-build.patch b/binutils-s390-build.patch new file mode 100644 index 0000000..cdb6a5d --- /dev/null +++ b/binutils-s390-build.patch @@ -0,0 +1,772 @@ +diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c +--- binutils.orig/libctf/ctf-create.c 2020-06-16 12:06:28.466468753 +0100 ++++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 12:16:19.744482839 +0100 +@@ -871,7 +871,8 @@ ctf_add_encoded (ctf_file_t *fp, uint32_ + + if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ +- ++ if (dtd == NULL) ++ return CTF_ERR; + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0); + dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT) + / CHAR_BIT); +@@ -896,6 +897,8 @@ ctf_add_reftype (ctf_file_t *fp, uint32_ + + if ((type = ctf_add_generic (fp, flag, NULL, kind, &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0); + dtd->dtd_data.ctt_type = (uint32_t) ref; +@@ -958,6 +961,8 @@ ctf_add_slice (ctf_file_t *fp, uint32_t + + if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_SLICE, &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_SLICE, flag, 0); + dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT) +@@ -1008,6 +1013,8 @@ ctf_add_array (ctf_file_t *fp, uint32_t + + if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_ARRAY, &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ARRAY, flag, 0); + dtd->dtd_data.ctt_size = 0; +@@ -1075,6 +1082,8 @@ ctf_add_function (ctf_file_t *fp, uint32 + free (vdat); + return CTF_ERR; /* errno is set for us. */ + } ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FUNCTION, flag, vlen); + dtd->dtd_data.ctt_type = (uint32_t) ctc->ctc_return; +@@ -1104,6 +1113,8 @@ ctf_add_struct_sized (ctf_file_t *fp, ui + else if ((type = ctf_add_generic (fp, flag, name, CTF_K_STRUCT, + &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_STRUCT, flag, 0); + +@@ -1141,6 +1152,8 @@ ctf_add_union_sized (ctf_file_t *fp, uin + else if ((type = ctf_add_generic (fp, flag, name, CTF_K_UNION, + &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_UNION, flag, 0); + +@@ -1177,6 +1190,8 @@ ctf_add_enum (ctf_file_t *fp, uint32_t f + else if ((type = ctf_add_generic (fp, flag, name, CTF_K_ENUM, + &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ENUM, flag, 0); + dtd->dtd_data.ctt_size = fp->ctf_dmodel->ctd_int; +diff -rup binutils.orig/libctf/ctf-types.c binutils-2.34.0/libctf/ctf-types.c +--- binutils.orig/libctf/ctf-types.c 2020-06-16 12:06:28.466468753 +0100 ++++ binutils-2.34.0/libctf/ctf-types.c 2020-06-16 12:10:58.033563365 +0100 +@@ -748,7 +748,7 @@ ctf_type_encoding (ctf_file_t *fp, ctf_i + case CTF_K_SLICE: + { + const ctf_slice_t *slice; +- ctf_encoding_t underlying_en; ++ ctf_encoding_t underlying_en = {0}; + slice = &dtd->dtd_u.dtu_slice; + + data = ctf_type_encoding (fp, slice->cts_type, &underlying_en); +diff -rup binutils.orig/opcodes/s390-mkopc.c binutils-2.34.0/opcodes/s390-mkopc.c +--- binutils.orig/opcodes/s390-mkopc.c 2020-06-16 12:06:28.447468816 +0100 ++++ binutils-2.34.0/opcodes/s390-mkopc.c 2020-06-16 12:17:10.783311417 +0100 +@@ -168,7 +168,7 @@ insertExpandedMnemonic (char *opcode, ch + int mask_start, i = 0, tag_found = 0, reading_number = 0; + int number_p = 0, suffix_p = 0, prefix_p = 0; + const struct s390_cond_ext_format *ext_table; +- int ext_table_length; ++ int ext_table_length = 0; + + if (!(tag = strpbrk (mnemonic, "*$"))) + { +Only in binutils.orig/libctf: .#ctf-create.c +diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c +--- binutils.orig/libctf/ctf-create.c 2020-06-16 14:49:06.080801319 +0100 ++++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 14:49:08.046794113 +0100 +@@ -798,6 +798,7 @@ ctf_add_generic (ctf_file_t *fp, uint32_ + { + ctf_dtdef_t *dtd; + ctf_id_t type; ++ *rp = NULL; + + if (flag != CTF_ADD_NONROOT && flag != CTF_ADD_ROOT) + return (ctf_set_errno (fp, EINVAL)); +diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c +--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 14:49:06.074801341 +0100 ++++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 16:43:31.428324833 +0100 +@@ -810,7 +810,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_DIR10 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); + value = ((value) << (2)); + fields->f_dir10 = value; +@@ -821,7 +821,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_DIR9 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); + value = ((value) << (1)); + fields->f_dir9 = value; +@@ -829,7 +829,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_DISP10 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_disp10 = value; +@@ -840,7 +840,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_DISP9 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_disp9 = value; +@@ -865,7 +865,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_LABEL12 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_rel12 = value; +@@ -873,7 +873,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_LABEL9 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_rel9 = value; +@@ -881,7 +881,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_M4 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value); + value = ((value) | (-16)); + fields->f_m4 = value; +@@ -911,7 +911,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_U10 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value); + value = ((value) << (2)); + fields->f_u10 = value; +@@ -928,7 +928,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_UDISP6 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value); + value = ((value) << (2)); + fields->f_udisp6 = value; + +diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c +--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 17:10:22.540563440 +0100 ++++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 17:10:48.966468906 +0100 +@@ -903,7 +903,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC + break; + case FR30_OPERAND_S10 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_s10 = value; +Only in binutils-2.34.0/opcodes: fr30-ibld.c~ +--- binutils.orig/opcodes/m32c-ibld.c 2020-06-16 17:10:22.531563472 +0100 ++++ binutils-2.34.0/opcodes/m32c-ibld.c 2020-06-16 17:25:48.612258094 +0100 +@@ -1805,7 +1805,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_BIT32RNPREFIXED : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_dst32_rn_prefixed_QI = value; +@@ -1813,7 +1813,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_BIT32RNUNPREFIXED : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_dst32_rn_unprefixed_QI = value; +@@ -1824,7 +1824,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_BITBASE16_16_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -1860,7 +1860,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_16_s16 = value; +@@ -1887,7 +1887,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -1903,7 +1903,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -1971,7 +1971,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_32_u16 = value; +@@ -1996,7 +1996,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_16_S16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_16_s16 = value; +@@ -2007,7 +2007,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_16_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -2016,7 +2016,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_DSP_16_U20 : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -2032,7 +2032,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_DSP_16_U24 : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; +@@ -2078,7 +2078,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_32_u16 = value; +@@ -2094,7 +2094,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_32_u16 = value; +@@ -2110,7 +2110,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_32_S16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_32_s16 = value; +@@ -2121,7 +2121,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_32_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_32_u16 = value; +@@ -2129,7 +2129,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_32_U20 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + fields->f_dsp_32_u24 = value; +@@ -2137,7 +2137,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_32_U24 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + fields->f_dsp_32_u24 = value; +@@ -2148,7 +2148,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_40_S16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_40_s16 = value; +@@ -2159,7 +2159,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_40_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_40_u16 = value; +@@ -2167,7 +2167,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_40_U20 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); + fields->f_dsp_40_u20 = value; +@@ -2175,7 +2175,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_40_U24 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + fields->f_dsp_40_u24 = value; +@@ -2186,7 +2186,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_48_S16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_48_s16 = value; +@@ -2197,7 +2197,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_48_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_48_u16 = value; +@@ -2206,7 +2206,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_DSP_48_U20 : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_48_u16 = value; +@@ -2222,7 +2222,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_DSP_48_U24 : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_48_u16 = value; +@@ -2240,7 +2240,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_8_S24 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608)); + fields->f_dsp_8_s24 = value; +@@ -2251,7 +2251,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_8_U16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_8_u16 = value; +@@ -2259,7 +2259,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DSP_8_U24 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); + value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + fields->f_dsp_8_u24 = value; +@@ -2343,7 +2343,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNPREFIXEDHI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); + value = ((((value) + (2))) % (4)); + fields->f_dst32_rn_prefixed_HI = value; +@@ -2351,7 +2351,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNPREFIXEDQI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_dst32_rn_prefixed_QI = value; +@@ -2359,7 +2359,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNPREFIXEDSI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); + value = ((value) - (2)); + fields->f_dst32_rn_prefixed_SI = value; +@@ -2367,7 +2367,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNUNPREFIXEDHI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); + value = ((((value) + (2))) % (4)); + fields->f_dst32_rn_unprefixed_HI = value; +@@ -2375,7 +2375,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNUNPREFIXEDQI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_dst32_rn_unprefixed_QI = value; +@@ -2383,7 +2383,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_DST32RNUNPREFIXEDSI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); + value = ((value) - (2)); + fields->f_dst32_rn_unprefixed_SI = value; +@@ -2402,7 +2402,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM_16_HI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_16_s16 = value; +@@ -2414,14 +2414,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_IMM_16_SI : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_16_u16 = value; + } + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_32_u16 = value; +@@ -2454,7 +2454,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + fields->f_dsp_32_u24 = value; +@@ -2467,7 +2467,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM_32_HI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_32_s16 = value; +@@ -2486,7 +2486,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM_40_HI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_40_s16 = value; +@@ -2498,7 +2498,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_IMM_40_SI : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); + value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); + fields->f_dsp_40_u24 = value; +@@ -2513,7 +2513,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM_48_HI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_48_s16 = value; +@@ -2525,14 +2525,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + case M32C_OPERAND_IMM_48_SI : + { + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_48_u16 = value; + } + if (length <= 0) break; + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); + value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))); + fields->f_dsp_64_u16 = value; +@@ -2567,7 +2567,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM_8_HI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) & (255))) | (((((value) & (255))) << (8))))))); + fields->f_dsp_8_s16 = value; +@@ -2593,7 +2593,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_IMM1_S : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); + value = ((value) + (1)); + fields->f_imm1_S = value; +@@ -2612,7 +2612,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_16_8 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_16_8 = value; +@@ -2620,7 +2620,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_24_8 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_24_8 = value; +@@ -2628,7 +2628,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_32_8 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_32_8 = value; +@@ -2636,7 +2636,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_40_8 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_40_8 = value; +@@ -2644,7 +2644,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_5_3 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_5_3 = value; +@@ -2652,7 +2652,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_8_16 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1)))); + fields->f_lab_8_16 = value; +@@ -2660,7 +2660,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_8_24 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); + fields->f_lab_8_24 = value; +@@ -2668,7 +2668,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_LAB_8_8 : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0|(1<f_lab_8_8 = value; +@@ -2757,7 +2757,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNPREFIXEDHI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); + value = ((((value) + (2))) % (4)); + fields->f_src32_rn_prefixed_HI = value; +@@ -2765,7 +2765,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNPREFIXEDQI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_src32_rn_prefixed_QI = value; +@@ -2773,7 +2773,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNPREFIXEDSI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); + value = ((value) - (2)); + fields->f_src32_rn_prefixed_SI = value; +@@ -2781,7 +2781,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNUNPREFIXEDHI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); + value = ((((value) + (2))) % (4)); + fields->f_src32_rn_unprefixed_HI = value; +@@ -2789,7 +2789,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNUNPREFIXEDQI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); + value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); + fields->f_src32_rn_unprefixed_QI = value; +@@ -2797,7 +2797,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC + break; + case M32C_OPERAND_SRC32RNUNPREFIXEDSI : + { +- long value; ++ long value = 0; + length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); + value = ((value) - (2)); + fields->f_src32_rn_unprefixed_SI = value; +--- binutils.orig/binutils/srconv.c 2020-06-16 17:10:22.251564474 +0100 ++++ binutils-2.34.0/binutils/srconv.c 2020-06-16 20:07:51.670025912 +0100 +@@ -492,6 +492,8 @@ wr_rl (struct coff_ofile *ptr ATTRIBUTE_ + rl.addr = r->offset; + rl.bitloc = 0; + rl.flen = 32; /* SH Specific. */ ++ rl.dunno = 0; ++ rl.symn = 0; + + /* What sort of reloc ? Look in the section to find out. */ + ref = r->symbol; +--- binutils.orig/libctf/ctf-create.c 2020-07-24 15:33:26.100996335 +0100 ++++ binutils-2.35/libctf/ctf-create.c 2020-07-24 15:33:29.042977475 +0100 +@@ -1257,6 +1257,8 @@ ctf_add_forward (ctf_file_t *fp, uint32_ + + if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR) + return CTF_ERR; /* errno is set for us. */ ++ if (dtd == NULL) ++ return CTF_ERR; + + dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FORWARD, flag, 0); + dtd->dtd_data.ctt_type = kind; diff --git a/binutils-special-sections-in-groups.patch b/binutils-special-sections-in-groups.patch new file mode 100644 index 0000000..7de5a93 --- /dev/null +++ b/binutils-special-sections-in-groups.patch @@ -0,0 +1,27 @@ +--- binutils.orig/bfd/elf.c 2018-10-19 11:42:10.107277490 +0100 ++++ binutils-2.31.1/bfd/elf.c 2018-10-19 11:44:33.607105801 +0100 +@@ -830,7 +830,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd + } + } + +- if (elf_group_name (newsect) == NULL) ++ if (elf_group_name (newsect) == NULL ++ /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section) ++ but they will not have been added to the group because they do not ++ have contents that the ELF code in the BFD library knows how to ++ process. This is OK though - we rely upon the target backends to ++ handle these sections for us. */ ++ && hdr->sh_type < SHT_LOOS) + { + /* xgettext:c-format */ + _bfd_error_handler (_("%pB: no group info for section '%pA'"), +@@ -936,7 +942,8 @@ _bfd_elf_setup_sections (bfd *abfd) + else if (idx->shdr->bfd_section) + elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section; + else if (idx->shdr->sh_type != SHT_RELA +- && idx->shdr->sh_type != SHT_REL) ++ && idx->shdr->sh_type != SHT_REL ++ && idx->shdr->sh_type < SHT_LOOS) + { + /* There are some unknown sections in the group. */ + _bfd_error_handler diff --git a/binutils-strip-merge.patch b/binutils-strip-merge.patch new file mode 100644 index 0000000..2453685 --- /dev/null +++ b/binutils-strip-merge.patch @@ -0,0 +1,19 @@ +--- binutils.orig/binutils/objcopy.c 2020-10-06 14:53:19.264943750 +0100 ++++ binutils-2.35.1/binutils/objcopy.c 2020-10-06 14:53:47.002761889 +0100 +@@ -3313,14 +3313,12 @@ copy_object (bfd *ibfd, bfd *obfd, const + /* It is likely that output sections are in the same order + as the input sections, but do not assume that this is + the case. */ +- if (strcmp (bfd_section_name (merged->sec), +- bfd_section_name (osec)) != 0) ++ if (merged->sec->output_section != osec) + { + for (merged = merged_note_sections; + merged != NULL; + merged = merged->next) +- if (strcmp (bfd_section_name (merged->sec), +- bfd_section_name (osec)) == 0) ++ if (merged->sec->output_section == osec) + break; + + if (merged == NULL) diff --git a/binutils-warnings.patch b/binutils-warnings.patch new file mode 100644 index 0000000..6f3d32d --- /dev/null +++ b/binutils-warnings.patch @@ -0,0 +1,158 @@ +diff --git a/binutils/dwarf.c b/binutils/dwarf.c +index 6ecfab5d..f8698213 100644 +--- a/binutils/dwarf.c ++++ b/binutils/dwarf.c +@@ -4914,7 +4914,7 @@ display_debug_lines_decoded (struct dwarf_section * section, + else + { + newFileName = (char *) xmalloc (fileNameLength + 1); +- strncpy (newFileName, fileName, fileNameLength + 1); ++ strcpy (newFileName, fileName); + } + + if (!do_wide || (fileNameLength <= MAX_FILENAME_LENGTH)) +diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c +index 3639bfbf..ed080a1a 100644 +--- a/libiberty/cp-demangle.c ++++ b/libiberty/cp-demangle.c +@@ -185,20 +185,6 @@ static void d_init_info (const char *, int, size_t, struct d_info *); + #define CP_STATIC_IF_GLIBCPP_V3 + #endif /* ! defined(IN_GLIBCPP_V3) */ + +-/* See if the compiler supports dynamic arrays. */ +- +-#ifdef __GNUC__ +-#define CP_DYNAMIC_ARRAYS +-#else +-#ifdef __STDC__ +-#ifdef __STDC_VERSION__ +-#if __STDC_VERSION__ >= 199901L && !__STDC_NO_VLA__ +-#define CP_DYNAMIC_ARRAYS +-#endif /* __STDC_VERSION__ >= 199901L && !__STDC_NO_VLA__ */ +-#endif /* defined (__STDC_VERSION__) */ +-#endif /* defined (__STDC__) */ +-#endif /* ! defined (__GNUC__) */ +- + /* We avoid pulling in the ctype tables, to prevent pulling in + additional unresolved symbols when this code is used in a library. + FIXME: Is this really a valid reason? This comes from the original +@@ -4343,29 +4329,21 @@ cplus_demangle_print_callback (int options, + d_print_init (&dpi, callback, opaque, dc); + + { +-#ifdef CP_DYNAMIC_ARRAYS +- /* Avoid zero-length VLAs, which are prohibited by the C99 standard +- and flagged as errors by Address Sanitizer. */ +- __extension__ struct d_saved_scope scopes[(dpi.num_saved_scopes > 0) +- ? dpi.num_saved_scopes : 1]; +- __extension__ struct d_print_template temps[(dpi.num_copy_templates > 0) +- ? dpi.num_copy_templates : 1]; +- +- dpi.saved_scopes = scopes; +- dpi.copy_templates = temps; +-#else +- dpi.saved_scopes = alloca (dpi.num_saved_scopes +- * sizeof (*dpi.saved_scopes)); +- dpi.copy_templates = alloca (dpi.num_copy_templates +- * sizeof (*dpi.copy_templates)); +-#endif +- ++ dpi.saved_scopes ++ = (struct d_saved_scope *) xmalloc (dpi.num_saved_scopes ++ * sizeof (*dpi.saved_scopes)); ++ dpi.copy_templates ++ = (struct d_print_template *) xmalloc (dpi.num_copy_templates ++ * sizeof (*dpi.copy_templates)); + d_print_comp (&dpi, options, dc); + } + + d_print_flush (&dpi); + +- return ! d_print_saw_error (&dpi); ++ int retval = ! d_print_saw_error (&dpi); ++ free (dpi.saved_scopes); ++ free (dpi.copy_templates); ++ return retval; + } + + /* Turn components into a human readable string. OPTIONS is the +@@ -6307,16 +6285,12 @@ d_demangle_callback (const char *mangled, int options, + } + + { +-#ifdef CP_DYNAMIC_ARRAYS +- __extension__ struct demangle_component comps[di.num_comps]; +- __extension__ struct demangle_component *subs[di.num_subs]; +- +- di.comps = comps; +- di.subs = subs; +-#else +- di.comps = alloca (di.num_comps * sizeof (*di.comps)); +- di.subs = alloca (di.num_subs * sizeof (*di.subs)); +-#endif ++ di.comps ++ = (struct demangle_component *) xmalloc (di.num_comps ++ * sizeof (*di.comps)); ++ di.subs ++ = (struct demangle_component **) xmalloc (di.num_subs ++ * sizeof (*di.subs)); + + switch (type) + { +@@ -6357,6 +6331,8 @@ d_demangle_callback (const char *mangled, int options, + : 0; + } + ++ free (di.comps); ++ free (di.subs); + return status; + } + +@@ -6588,16 +6564,12 @@ is_ctor_or_dtor (const char *mangled, + cplus_demangle_init_info (mangled, DMGL_GNU_V3, strlen (mangled), &di); + + { +-#ifdef CP_DYNAMIC_ARRAYS +- __extension__ struct demangle_component comps[di.num_comps]; +- __extension__ struct demangle_component *subs[di.num_subs]; +- +- di.comps = comps; +- di.subs = subs; +-#else +- di.comps = alloca (di.num_comps * sizeof (*di.comps)); +- di.subs = alloca (di.num_subs * sizeof (*di.subs)); +-#endif ++ di.comps ++ = (struct demangle_component *) xmalloc (di.num_comps ++ * sizeof (*di.comps)); ++ di.subs ++ = (struct demangle_component **) xmalloc (di.num_subs ++ * sizeof (*di.subs)); + + dc = cplus_demangle_mangled_name (&di, 1); + +@@ -6640,6 +6612,8 @@ is_ctor_or_dtor (const char *mangled, + } + } + ++ free (di.comps); ++ free (di.subs); + return ret; + } + +diff --git a/libiberty/make-relative-prefix.c b/libiberty/make-relative-prefix.c +index e3f9f920..5dbe6f89 100644 +--- a/libiberty/make-relative-prefix.c ++++ b/libiberty/make-relative-prefix.c +@@ -259,10 +259,7 @@ make_relative_prefix_1 (const char *progname, const char *bin_prefix, + #ifdef HAVE_HOST_EXECUTABLE_SUFFIX + len += strlen (HOST_EXECUTABLE_SUFFIX); + #endif +- if (len < MAX_ALLOCA_SIZE) +- nstore = (char *) alloca (len); +- else +- alloc_ptr = nstore = (char *) malloc (len); ++ alloc_ptr = nstore = (char *) malloc (len); + + startp = endp = temp; + while (1) diff --git a/binutils.spec b/binutils.spec new file mode 100644 index 0000000..451d0e9 --- /dev/null +++ b/binutils.spec @@ -0,0 +1,3394 @@ + +Summary: A GNU collection of binary utilities +Name: %{?cross}binutils%{?_with_debug:-debug} +Version: 2.35.1 +Release: 1%{?dist} +License: GPLv3+ +URL: https://sourceware.org/binutils + +#---------------------------------------------------------------------------- + +# Binutils SPEC file. Can be invoked with the following parameters to change +# the default behaviour: + +# --define "binutils_target arm-linux-gnu" to create arm-linux-gnu-binutils. +# +# --with bootstrap Build with minimal dependencies. +# --with debug Build without optimizations and without splitting +# the debuginfo into a separate file. +# --without docs Skip building documentation. +# --without testsuite Do not run the testsuite. Default is to run it. +# --without gold Disable building of the GOLD linker. +# --with clang To force building with the CLANG. +# --without debuginfod Disable support for debuginfod. + +#---Start of Configure Options----------------------------------------------- + +# Create deterministic archives (ie ones without timestamps). +# Default is off because of BZ 1195883. +%define enable_deterministic_archives 0 + +# Enable support for GCC LTO compilation. +# Disable if it is necessary to work around bugs in LTO. +%define enable_lto 1 + +# Enable the compression of debug sections as default behaviour of the +# assembler and linker. This option is disabled for now. The assembler and +# linker have command line options to override the default behaviour. +%define default_compress_debug 0 + +# Default to read-only-relocations (relro) in shared binaries. +# This is enabled as a security feature. +%define default_relro 1 + +# Enable the default generation of GNU Build notes by the assembler. +# This option is disabled as it has turned out to be problematic for the i686 +# architecture, although the exact reason has not been determined. (See +# BZ 1572485). It also breaks building EFI binaries on AArch64, as these +# cannot have relocations against absolute symbols. +%define default_generate_notes 0 + +# Enable thread support in the GOLD linker (if it is being built). This is +# particularly important if plugins to the linker intend to use threads +# themselves. See BZ 1636479 for more details. This option is made +# configurable in case there is ever a need to disable thread support. +%define enable_threading 1 + +#----End of Configure Options------------------------------------------------ + +# Note - in the future the gold linker may become deprecated. +%ifnarch riscv64 +%bcond_without gold +%else +# RISC-V does not have ld.gold thus disable by default. +%bcond_with gold +%endif + +# Default: Not bootstrapping. +%bcond_with bootstrap +# Default: Not debug +%bcond_with debug +# Default: Always build documentation. +%bcond_without docs +# Default: Always run the testsuite. +%bcond_without testsuite +# Use clang as the build time compiler. Default: gcc +%bcond_with clang +# Default: support debuginfod. +%bcond_without debuginfod + +%if %{with bootstrap} +%undefine with_docs +%undefine with_testsuite +%endif + +%if %{with debug} +%undefine with_testsuite +%endif + +%if 0%{!?binutils_target:1} +%define binutils_target %{_target_platform} +%define isnative 1 +%define enable_shared 1 +%else +%define cross %{binutils_target}- +%define isnative 0 +%define enable_shared 0 +%endif + +#---------------------------------------------------------------------------- + +# Note - the Linux Kernel binutils releases are too unstable and contain +# too many controversial patches so we stick with the official FSF version +# instead. + +Source: https://ftp.gnu.org/gnu/binutils/binutils-%{version}.tar.xz +Source2: binutils-2.19.50.0.1-output-format.sed + +%if %{with docs} +# Strictly speaking this next file is not part of the binutils distribution. +# But the emacs info system expects it to be present on any system where +# emacs is installed, and old binutils distributions used to include it by +# mistake. Since there is no suitable documentation files component to +# current RHEL releases, it is included here instead. In order to save time +# and complexity it is stored as a pre-built, compressed, info file. +# The upstream version of the original source file can be found here: +# http://git.savannah.gnu.org/gitweb/?p=gnulib.git;a=blob_plain;f=doc/standards.texi;hb=HEAD +# For more information see: https://bugzilla.redhat.com/show_bug.cgi?id=1467390 +Source3: standards.info.gz +%endif + +#---------------------------------------------------------------------------- + +# Purpose: Use /lib64 and /usr/lib64 instead of /lib and /usr/lib in the +# default library search path of 64-bit targets. +# Lifetime: Permanent, but it should not be. This is a bug in the libtool +# sources used in both binutils and gcc, (specifically the +# libtool.m4 file). These are based on a version released in 2009 +# (2.2.6?) rather than the latest version. (Definitely fixed in +# libtool version 2.4.6). +Patch01: binutils-2.20.51.0.2-libtool-lib64.patch + +# Purpose: Appends a RHEL or Fedora release string to the generic binutils +# version string. +# Lifetime: Permanent. This is a RHEL/Fedora specific patch. +Patch02: binutils-2.25-version.patch + +# Purpose: Exports the demangle.h header file (associated with the libiberty +# sources) with the binutils-devel rpm. +# Lifetime: Permanent. This is a RHEL/Fedora specific patch. +Patch03: binutils-export-demangle.h.patch + +# Purpose: Disables the check in the BFD library's bfd.h header file that +# config.h has been included before the bfd.h header. See BZ +# #845084 for more details. +# Lifetime: Permanent - but it should not be. The bfd.h header defines +# various types that are dependent upon configuration options, so +# the order of inclusion is important. +# FIXME: It would be better if the packages using the bfd.h header were +# fixed so that they do include the header files in the correct +# order. +Patch04: binutils-2.22.52.0.4-no-config-h-check.patch + +# Purpose: Include the filename concerned in readelf error messages. This +# makes readelf's output more helpful when it is run on multiple +# input files. +# Lifetime: Permanent. This patch changes the format of readelf's output, +# making it better (IMHO) but also potentially breaking tools that +# depend upon readelf's current format. Hence it remains a local +# patch. +Patch05: binutils-2.29-filename-in-error-messages.patch + +# Purpose: Use the "unsigned long long" type for pointers on hosts where +# long is a 32-bit type but pointers are a 64-bit type. Necessary +# because the rpmdiff tester insists that if both the i686 and +# x86_64 versions of binutils-devel are installed on the same +# machine, then they will have identical versions of the bfd.h +# header file. +# Lifetime: Permanent. +Patch06: binutils-2.25-set-long-long.patch + +# Purpose: Disable an x86/x86_64 optimization that moves functions from the +# PLT into the GOTPLT for faster access. This optimization is +# problematic for tools that want to intercept PLT entries, such +# as ltrace and LD_AUDIT. See BZs 1452111 and 1333481. +# Lifetime: Permanent. But it should not be. +# FIXME: Replace with a configure time option. +Patch07: binutils-2.29-revert-PLT-elision.patch + +# Purpose: Changes readelf so that when it displays extra information about +# a symbol, this information is placed at the end of the line. +# Lifetime: Permanent. +# FIXME: The proper fix would be to update the scripts that are expecting +# a fixed output from readelf. But it seems that some of them are +# no longer being maintained. +Patch08: binutils-readelf-other-sym-info.patch + +# Purpose: Do not create PLT entries for AARCH64 IFUNC symbols referenced in +# debug sections. +# Lifetime: Permanent. +# FIXME: Find related bug. Decide on permanency. +Patch09: binutils-2.27-aarch64-ifunc.patch + +# Purpose: Stop the binutils from statically linking with libstdc++. +# Lifetime: Permanent. +Patch10: binutils-do-not-link-with-static-libstdc++.patch + +# Purpose: Add a .attach_to_group pseudo-op to the assembler for +# use by the annobin gcc plugin. +# Lifetime: Permanent. +Patch11: binutils-attach-to-group.patch + +# Purpose: Allow OS specific sections in section groups. +# Lifetime: Fixed in 2.36 (maybe) +Patch12: binutils-special-sections-in-groups.patch + +# Purpose: Fix linker testsuite failures. +# Lifetime: Fixed in 2.36 (maybe) +Patch13: binutils-fix-testsuite-failures.patch + +# Purpose: Stop gold from aborting when input sections with the same name +# have different flags. +# Lifetime: Fixed in 2.36 (maybe) +Patch14: binutils-gold-mismatched-section-flags.patch + +# Purpose: Add a check to the GOLD linker for a corrupt input file +# with a fuzzed section offset. +# Lifetime: Fixed in 2.36 (maybe) +Patch15: binutils-CVE-2019-1010204.patch + +# Purpose: Change the gold configuration script to only warn about +# unsupported targets. This allows the binutils to be built with +# BPF support enabled. +# Lifetime: Permanent. +Patch16: binutils-gold-warn-unsupported.patch + +# Purpose: Fix compile time warning messages building s390 target with gcc-10. +# Lifetime: Should be fixed in 2.36. +Patch17: binutils-s390-build.patch + +# Purpose: Fix LTO problems running config mini-builds. +# Lifetime: Should be fixed in 2.36. +Patch18: binutils-config.patch + +# Purpose: Fix compile time warning messages building with gcc-10. +# Lifetime: Should be fixed in 2.36. +Patch19: binutils-warnings.patch + +# Purpose: Fix compile time warning messages building with gcc-10. (part 2). +# Lifetime: Should be fixed in 2.36. +Patch20: binutils-gcc-10-fixes.patch + +# Purpose: Fixes for linking LTO objects. +# Lifetime: Fixed in 2.36 +Patch21: binutils-add-sym-cache-to-elf-link-hash.patch +Patch22: binutils-elf-add-objects.patch + +# Purpose: Fix handling of relocations for AArch64 conditional branches. +# Lifetime: Fixed in 2.36 +Patch23: binutils-aarch64-condbranch-relocs.patch + +# Purpose: Fix the PowerPC disassembler so that it ignores annobin symbols. +# Lifetime: Fixed in 2.36 +Patch24: binutils-ppc-annobin-disassembly.patch + +# Purpose: Fix the strip program to cope when merging multiple same-named +# sections. +# Lifetime: Fixed in 2.36 +Patch25: binutils-strip-merge.patch + +# Purpose: Fix various problems with the PowerPC arch10 extensions. +# Lifetime: Fixed in 2.36 +Patch26: binutils-Power10-fixes.patch + +# Purpose: Allow plugin syms to mark as-needed shared libs needed. +# Lifetime: Fixed in 2.36 +Patch27: binutils-plugin-as-needed.patch + +#---------------------------------------------------------------------------- + +Provides: bundled(libiberty) +BuildRequires: autoconf automake + +%if %{with gold} +# For now we make the binutils package require the gold sub-package. +# That way other packages that have a requirement on "binutils" but +# actually want gold will not have to be changed. In the future, if +# we decide to deprecate gold, we can remove this requirement, and +# then update other packages as necessary. +Requires: binutils-gold >= %{version} +%endif + +%if %{with debug} +# Define this if you want to skip the strip step and preserve debug info. +# Useful for testing. +%define __debug_install_post : > %{_builddir}/%{?buildsubdir}/debugfiles.list +%define debug_package %{nil} +%endif + +# Perl, sed and touch are all used in the %%prep section of this spec file. +BuildRequires: perl, sed, coreutils + +%if %{with clang} +BuildRequires: clang compiler-rt +%else +BuildRequires: gcc +%endif + +%if %{without bootstrap} +BuildRequires: gettext, flex, zlib-devel +%endif + +%if %{with docs} +BuildRequires: texinfo >= 4.0 +# BZ 920545: We need pod2man in order to build the manual pages. +BuildRequires: /usr/bin/pod2man +%else +BuildRequires: findutils +%endif + +# Required for: ld-bootstrap/bootstrap.exp bootstrap with --static +# It should not be required for: ld-elf/elf.exp static {preinit,init,fini} array +%if %{with testsuite} +# relro_test.sh uses dc which is part of the bc rpm, hence its inclusion here. +BuildRequires: dejagnu, zlib-static, glibc-static, sharutils, bc +%endif + +Requires(post): %{_sbindir}/alternatives +Requires(preun): %{_sbindir}/alternatives +# We also need rm. +Requires(post): coreutils + +# On ARM EABI systems, we do want -gnueabi to be part of the +# target triple. +%ifnarch %{arm} +%define _gnu %{nil} +%endif + +%if %{with debuginfod} +BuildRequires: elfutils-debuginfod-client-devel +%endif + +#---------------------------------------------------------------------------- + +%description +Binutils is a collection of binary utilities, including ar (for +creating, modifying and extracting from archives), as (a family of GNU +assemblers), gprof (for displaying call graph profile data), ld (the +GNU linker), nm (for listing symbols from object files), objcopy (for +copying and translating object files), objdump (for displaying +information from object files), ranlib (for generating an index for +the contents of an archive), readelf (for displaying detailed +information about binary files), size (for listing the section sizes +of an object or archive file), strings (for listing printable strings +from files), strip (for discarding symbols), and addr2line (for +converting addresses to file and line). + +#---------------------------------------------------------------------------- + +%package devel +Summary: BFD and opcodes static and dynamic libraries and header files +Provides: binutils-static = %{version}-%{release} +Requires: zlib-devel +Requires: binutils = %{version}-%{release} +# BZ 1215242: We need touch... +Requires: coreutils + +%description devel +This package contains BFD and opcodes static and dynamic libraries. + +The dynamic libraries are in this package, rather than a separate +base package because they are actually linker scripts that force +the use of the static libraries. This is because the API of the +BFD library is too unstable to be used dynamically. + +The static libraries are here because they are now needed by the +dynamic libraries. + +Developers starting new projects are strongly encouraged to consider +using libelf instead of BFD. + +#---------------------------------------------------------------------------- + +%if %{with gold} + +%package gold +Summary: The GOLD linker, a faster alternative to the BFD linker +Provides: gold = %{version}-%{release} +Requires: binutils >= %{version} + +%description gold +This package provides the GOLD linker, which can be used as an alternative to +the default binutils linker (ld.bfd). The GOLD is generally faster than the +BFD linker, and it supports features such as Identical Code Folding and +Incremental linking. Unfortunately it is not as well maintained as the BFD +linker, and it may become deprecated in the future. + +# Gold needs bison in order to build gold/yyscript.c. +BuildRequires: bison, m4, gcc-c++ +# The GOLD testsuite needs a static libc++ +BuildRequires: libstdc++-static + +%if ! %{with clang} +BuildRequires: gcc-c++ +Conflicts: gcc-c++ < 4.0.0 +%endif + +# The higher of these two numbers determines the default ld. +%{!?ld_gold_priority:%global ld_gold_priority 30} + +%endif + +%{!?ld_bfd_priority: %global ld_bfd_priority 50} + +#---------------------------------------------------------------------------- + +%prep +%autosetup -p1 -n binutils-%{version} + +# We cannot run autotools as there is an exact requirement of autoconf-2.59. +# FIXME - this is no longer true. Maybe try reinstating autotool use ? + +# On ppc64 and aarch64, we might use 64KiB pages +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*ppc.c +sed -i -e '/#define.*ELF_COMMONPAGESIZE/s/0x1000$/0x10000/' bfd/elf*aarch64.c +sed -i -e '/common_pagesize/s/4 /64 /' gold/powerpc.cc +sed -i -e '/pagesize/s/0x1000,/0x10000,/' gold/aarch64.cc +# LTP sucks +perl -pi -e 's/i\[3-7\]86/i[34567]86/g' */conf* +sed -i -e 's/%''{release}/%{release}/g' bfd/Makefile{.am,.in} +sed -i -e '/^libopcodes_la_\(DEPENDENCIES\|LIBADD\)/s,$, ../bfd/libbfd.la,' opcodes/Makefile.{am,in} +# Build libbfd.so and libopcodes.so with -Bsymbolic-functions if possible. +if gcc %{optflags} -v --help 2>&1 | grep -q -- -Bsymbolic-functions; then +sed -i -e 's/^libbfd_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' bfd/Makefile.{am,in} +sed -i -e 's/^libopcodes_la_LDFLAGS = /&-Wl,-Bsymbolic-functions /' opcodes/Makefile.{am,in} +fi +# $PACKAGE is used for the gettext catalog name. +sed -i -e 's/^ PACKAGE=/ PACKAGE=%{?cross}/' */configure +# Undo the name change to run the testsuite. +for tool in binutils gas ld +do + sed -i -e "2aDEJATOOL = $tool" $tool/Makefile.am + sed -i -e "s/^DEJATOOL = .*/DEJATOOL = $tool/" $tool/Makefile.in +done +touch */configure +# Touch the .info files so that they are newer then the .texi files and +# hence do not need to be rebuilt. This eliminates the need for makeinfo. +# The -print is there just to confirm that the command is working. +%if %{without docs} + find . -name *.info -print -exec touch {} \; +%endif + +%ifarch %{power64} +%define _target_platform %{_arch}-%{_vendor}-%{_host_os} +%endif + +#---------------------------------------------------------------------------- + +%build +echo target is %{binutils_target} + +%ifarch %{power64} +export CFLAGS="$RPM_OPT_FLAGS -Wno-error" +%else +export CFLAGS="$RPM_OPT_FLAGS" +%endif + +CARGS= + +%if %{with debuginfod} +CARGS="$CARGS --with-debuginfod" +%endif + +case %{binutils_target} in i?86*|sparc*|ppc*|s390*|sh*|arm*|aarch64*|riscv*) + CARGS="$CARGS --enable-64-bit-bfd" + ;; +esac + +# Extra targets to build along with the default one. +# We add the BPF target so that strip will work on bpf files. + +case %{binutils_target} in ia64*) + CARGS="$CARGS --enable-targets=ia64-linux,bpf-unknown-none" + ;; +esac + +case %{binutils_target} in ppc*|ppc64*) + CARGS="$CARGS --enable-targets=spu,bpf-unknown-none" + ;; +esac + +case %{binutils_target} in ppc64-*) + CARGS="$CARGS --enable-targets=powerpc64le-linux,bpf-unknown-none" + ;; +esac + +case %{binutils_target} in ppc64le*) + CARGS="$CARGS --enable-targets=powerpc-linux,bpf-unknown-none" + ;; +esac + +case %{binutils_target} in s390*) + # FIXME: For some unknown reason settting --enable-targets=bpf-unknown-none + # here breaks the building of GOLD. I have no idea why, and not enough + # knowledge of how gold is configured to fix quickly. So instead I have + # found that supporting "all" targets works. + CARGS="$CARGS --enable-targets=all" + ;; +esac + +case %{binutils_target} in x86_64*|i?86*|arm*|aarch64*|riscv*) + CARGS="$CARGS --enable-targets=x86_64-pep,bpf-unknown-none" + ;; +esac + +%if %{default_relro} + CARGS="$CARGS --enable-relro=yes" +%else + CARGS="$CARGS --enable-relro=no" +%endif + +%if %{with debug} +export CFLAGS="$CFLAGS -O0 -ggdb2 -Wno-error -D_FORTIFY_SOURCE=0" +%define enable_shared 0 +%endif + +# BZ 1541027 - include the linker flags from redhat-rpm-config as well. +export LDFLAGS=$RPM_LD_FLAGS + +%if %{with clang} +%define _with_cc_clang 1 +%endif + +# Dependencies are not set up to rebuild the configure files +# in the subdirectories. So we just rebuild the ones we care +# about after applying the configure patches +pushd libiberty +autoconf +popd +pushd intl +autoconf +popd + + +# We could optimize the cross builds size by --enable-shared but the produced +# binaries may be less convenient in the embedded environment. +%configure \ + --quiet \ + --build=%{_target_platform} --host=%{_target_platform} \ + --target=%{binutils_target} \ +%if %{with gold} + --enable-gold=default \ +%endif + --enable-ld \ +%if %{isnative} + --with-sysroot=/ \ +%else + --enable-targets=%{_host} \ + --with-sysroot=%{_prefix}/%{binutils_target}/sys-root \ + --program-prefix=%{cross} \ +%endif +%if %{enable_shared} + --enable-shared \ +%else + --disable-shared \ +%endif +%if %{enable_deterministic_archives} + --enable-deterministic-archives \ +%else + --enable-deterministic-archives=no \ +%endif +%if %{enable_lto} + --enable-lto \ +%endif +%if %{default_compress_debug} + --enable-compressed-debug-sections=all \ +%else + --enable-compressed-debug-sections=none \ +%endif +%if %{default_generate_notes} + --enable-generate-build-notes=yes \ +%else + --enable-generate-build-notes=no \ +%endif +%if %{enable_threading} + --enable-threads=yes \ +%else + --enable-threads=no \ +%endif + $CARGS \ + --enable-plugins \ + --with-bugurl=http://bugzilla.redhat.com/bugzilla/ \ + || cat config.log + +%if %{with docs} +%make_build %{_smp_mflags} tooldir=%{_prefix} all +%make_build %{_smp_mflags} tooldir=%{_prefix} info +%else +%make_build %{_smp_mflags} tooldir=%{_prefix} MAKEINFO=true all +%endif + +# Do not use %%check as it is run after %%install where libbfd.so is rebuilt +# with -fvisibility=hidden no longer being usable in its shared form. +%if %{without testsuite} +echo ====================TESTSUITE DISABLED========================= +%else +make -k check < /dev/null || : +echo ====================TESTING========================= +cat {gas/testsuite/gas,ld/ld,binutils/binutils}.sum +%if %{with gold} +if [ -f gold/test-suite.log ]; then + cat gold/test-suite.log +fi +if [ -f gold/testsuite/test-suite.log ]; then + cat gold/testsuite/*.log +fi +%endif +echo ====================TESTING END===================== +for file in {gas/testsuite/gas,ld/ld,binutils/binutils}.{sum,log} +do + ln $file binutils-%{_target_platform}-$(basename $file) || : +done +tar cjf binutils-%{_target_platform}.tar.xz binutils-%{_target_platform}-*.{sum,log} +uuencode binutils-%{_target_platform}.tar.xz binutils-%{_target_platform}.tar.xz +rm -f binutils-%{_target_platform}.tar.xz binutils-%{_target_platform}-*.{sum,log} +%if %{with gold} +if [ -f gold/testsuite/test-suite.log ]; then + tar cjf binutils-%{_target_platform}-gold.log.tar.xz gold/testsuite/*.log + uuencode binutils-%{_target_platform}-gold.log.tar.xz binutils-%{_target_platform}-gold.log.tar.xz + rm -f binutils-%{_target_platform}-gold.log.tar.xz +fi +%endif +%endif + +#---------------------------------------------------------------------------- + +%install +%if %{with docs} +%make_install DESTDIR=%{buildroot} +%else +%make_install DESTDIR=%{buildroot} MAKEINFO=true +%endif + +%if %{isnative} +%if %{with docs} +make prefix=%{buildroot}%{_prefix} infodir=%{buildroot}%{_infodir} install-info +%endif + +# Rebuild libiberty.a with -fPIC. +# Future: Remove it together with its header file, projects should bundle it. +%make_build -C libiberty clean +%set_build_flags +%make_build CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C libiberty + +# Rebuild libbfd.a with -fPIC. +# Without the hidden visibility the 3rd party shared libraries would export +# the bfd non-stable ABI. +%make_build -C bfd clean +%set_build_flags +%make_build CFLAGS="-g -fPIC $RPM_OPT_FLAGS -fvisibility=hidden" -C bfd + +# Rebuild libopcodes.a with -fPIC. +%make_build -C opcodes clean +%set_build_flags +%make_build CFLAGS="-g -fPIC $RPM_OPT_FLAGS" -C opcodes + +install -m 644 bfd/libbfd.a %{buildroot}%{_libdir} +install -m 644 libiberty/libiberty.a %{buildroot}%{_libdir} +install -m 644 include/libiberty.h %{buildroot}%{_prefix}/include +install -m 644 opcodes/libopcodes.a %{buildroot}%{_libdir} +# Remove Windows/Novell only man pages +rm -f %{buildroot}%{_mandir}/man1/{dlltool,nlmconv,windres,windmc}* +%if %{without docs} +rm -f %{buildroot}%{_mandir}/man1/{addr2line,ar,as,c++filt,elfedit,gprof,ld,nm,objcopy,objdump,ranlib,readelf,size,strings,strip}* +rm -f %{buildroot}%{_infodir}/{as,bfd,binutils,gprof,ld}* +%endif + +%if %{enable_shared} +chmod +x %{buildroot}%{_libdir}/lib*.so* +%endif + +# Prevent programs from linking against libbfd and libopcodes +# dynamically, as they are changed far too often. +rm -f %{buildroot}%{_libdir}/lib{bfd,opcodes}.so + +# Remove libtool files, which reference the .so libs +rm -f %{buildroot}%{_libdir}/lib{bfd,opcodes}.la + +# Sanity check --enable-64-bit-bfd really works. +grep '^#define BFD_ARCH_SIZE 64$' %{buildroot}%{_prefix}/include/bfd.h +# Fix multilib conflicts of generated values by __WORDSIZE-based expressions. +%ifarch %{ix86} x86_64 ppc %{power64} s390 s390x sh3 sh4 sparc sparc64 arm +sed -i -e '/^#include "ansidecl.h"/{p;s~^.*$~#include ~;}' \ + -e 's/^#define BFD_DEFAULT_TARGET_SIZE \(32\|64\) *$/#define BFD_DEFAULT_TARGET_SIZE __WORDSIZE/' \ + -e 's/^#define BFD_HOST_64BIT_LONG [01] *$/#define BFD_HOST_64BIT_LONG (__WORDSIZE == 64)/' \ + -e 's/^#define BFD_HOST_64_BIT \(long \)\?long *$/#if __WORDSIZE == 32\ +#define BFD_HOST_64_BIT long long\ +#else\ +#define BFD_HOST_64_BIT long\ +#endif/' \ + -e 's/^#define BFD_HOST_U_64_BIT unsigned \(long \)\?long *$/#define BFD_HOST_U_64_BIT unsigned BFD_HOST_64_BIT/' \ + %{buildroot}%{_prefix}/include/bfd.h +%endif +touch -r bfd/bfd-in2.h %{buildroot}%{_prefix}/include/bfd.h + +# Generate .so linker scripts for dependencies; imported from glibc/Makerules: + +# This fragment of linker script gives the OUTPUT_FORMAT statement +# for the configuration we are building. +OUTPUT_FORMAT="\ +/* Ensure this .so library will not be used by a link for a different format + on a multi-architecture system. */ +$(gcc $CFLAGS $LDFLAGS -shared -x c /dev/null -o /dev/null -Wl,--verbose -v 2>&1 | sed -n -f "%{SOURCE2}")" + +tee %{buildroot}%{_libdir}/libbfd.so <> %{?cross}binutils.lang +cat %{?cross}bfd.lang >> %{?cross}binutils.lang +cat %{?cross}gas.lang >> %{?cross}binutils.lang +cat %{?cross}gprof.lang >> %{?cross}binutils.lang + +if [ -x ld/ld-new ]; then + %find_lang %{?cross}ld + cat %{?cross}ld.lang >> %{?cross}binutils.lang +fi +if [ -x gold/ld-new ]; then + %find_lang %{?cross}gold + cat %{?cross}gold.lang >> %{?cross}binutils.lang +fi + +#---------------------------------------------------------------------------- + +%post +%__rm -f %{_bindir}/%{?cross}ld +%{_sbindir}/alternatives --install %{_bindir}/%{?cross}ld %{?cross}ld \ + %{_bindir}/%{?cross}ld.bfd %{ld_bfd_priority} + +%if %{with gold} +%{_sbindir}/alternatives --install %{_bindir}/%{?cross}ld %{?cross}ld \ + %{_bindir}/%{?cross}ld.gold %{ld_gold_priority} +%endif + +# Do not run "alternatives --auto ld" here. Leave the setting to +# however the user previously had it set. See BZ 1592069 for more details. + +%if %{isnative} +%ldconfig_post +%endif + +exit 0 + +#---------------------------------------------------------------------------- + +%preun +if [ $1 = 0 ]; then + %{_sbindir}/alternatives --remove %{?cross}ld %{_bindir}/%{?cross}ld.bfd +fi +%if %{with gold} +if [ $1 = 0 ]; then + %{_sbindir}/alternatives --remove %{?cross}ld %{_bindir}/%{?cross}ld.gold +fi +%endif + +exit 0 + +#---------------------------------------------------------------------------- + +%if %{isnative} +%postun +%ldconfig_postun +%endif + +#---------------------------------------------------------------------------- + +%files -f %{?cross}binutils.lang +%license COPYING COPYING3 COPYING3.LIB COPYING.LIB +%doc README +%{_bindir}/%{?cross}[!l]* +# %%verify(symlink) does not work for some reason, so using "owner" instead. +%verify(owner) %{_bindir}/%{?cross}ld +%{_bindir}/%{?cross}ld.bfd + +%if %{with docs} +%{_mandir}/man1/* +%{_infodir}/as.info.* +%{_infodir}/binutils.info.* +%{_infodir}/gprof.info.* +%{_infodir}/ld.info.* +%{_infodir}/bfd.info.* +%endif + +%if %{enable_shared} +%{_libdir}/lib*.so +%{_libdir}/libctf* +%exclude %{_libdir}/libbfd.so +%exclude %{_libdir}/libopcodes.so +%endif + +%if %{isnative} + +%files devel +%{_prefix}/include/* +%{_libdir}/lib*.a +%{_libdir}/libbfd.so +%{_libdir}/libopcodes.so + +%endif + +%if %{with gold} +%files gold +%{_bindir}/%{?cross}ld.gold +%endif + +# %%ghost %%{_bindir}/%%{?cross}ld + +#---------------------------------------------------------------------------- +%changelog +* Fri Oct 09 2020 Nick Clifton - 2.35.1-5 +- Allow plugin syms to mark as-needed shared libs needed + +* Thu Oct 08 2020 Nick Clifton - 2.35.1-4 +- Fix various problems with Power10 support. + +* Tue Oct 06 2020 Nick Clifton - 2.35.1-3 +- Fix strip when merging multiple same-named sections. (#1885607) + +* Mon Sep 21 2020 Nick Clifton - 2.35.1-1 +- Rebase to GNU Binutils 2.35.1 release. +- Retire: binutils-gas-dwarf-level-4.patch +- Retire: binutils-aarch64-plt-sh_entsize.patch +- Retire: binutils-ppc-rename-xvcvbf16sp-to-xvcvbf16spn.patch +- Retire: binutils-dwarf-5-fixes.patch + +* Fri Sep 11 2020 Nick Clifton - 2.35-14 +- Fix the PowerPC disassembler so that it ignores annobin symbols. + +* Thu Sep 10 2020 Nick Clifton - 2.35-13 +- Fix the handling of relocations for AArch64 conditional branches. + +* Tue Aug 25 2020 Nick Clifton - 2.35-12 +- Import fixes from GNU binutils mainline for handling DWARF-5 debug information. + +* Mon Aug 24 2020 Nick Clifton - 2.35-11 +- Rename the PPC xvcvbf16sp instruction to xvcvbf16spn. + +* Fri Jul 31 2020 Jeff Law - 2.35-10 +- Re-enable LTO + +* Fri Jul 31 2020 Jeff Law - 2.35-9 +- Disable LTO for bootstrapping purposes + +* Fri Jul 31 2020 Nick Clifton - 2.35-8 +- Fix building with LTO enabled. + +* Fri Jul 31 2020 Nick Clifton - 2.35-7 +- Set the sh_entsize field of the AArch64's PLT section to 0. (PR 26312) + +* Thu Jul 30 2020 Richard W.M. Jones - 2.35-6 +- Disable LTO again, it causes "ar" to segfault. + +* Thu Jul 30 2020 Nick Clifton - 2.35-5 +- Default to DWARF level 3 in the assembler. + +* Mon Jul 27 2020 Fedora Release Engineering - 2.35-3 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_33_Mass_Rebuild + +* Sun Jul 26 2020 Jeff Law - 2.35-2 +- Disable LTO for now + +* Sun Jul 26 2020 Nick Clifton - 2.35-1 +- Rebase to GNU Binutils 2.35. (#1854613) + +* Mon Jul 20 2020 Jeff Law - 2.34-9 +- Fix more configure tests compromised by LTO. + +* Sun Jul 19 2020 Jeff Law - 2.34-9 +- Fix configure test compromised by LTO. Add appropriate BuildRequires + and force rebuliding the configure files in the appropriate dirs +- Fix various warnings exposed by LTO. + +* Tue Jul 07 2020 Jeff Law - 2.34-8 +- Switch to using %%autosetup. + +* Tue Jun 16 2020 Nick Clifton - 2.34-7 +- Add BPF support to the s390x target. (#1825193) + +* Tue May 26 2020 Nick Clifton - 2.34-6 +- Enhance the error message displayed by the BFD library when it fails to load a plugin. (#1836618) + +* Fri May 22 2020 Nick Clifton - 2.34-5 +- Rebase to tip of GNU Binutils 2.34 branch, brining in LTO fixes. +- Retire: binutils-nm-lto-plugin.patch + +* Tue Apr 28 2020 Nick Clifton - 2.34-4 +- Fix seg fault when loading plugins via symlinks. (#1828587) + +* Fri Apr 17 2020 Nick Clifton - 2.34-3 +- Add support for the BPF target. (#1825193) + +* Sun Feb 16 2020 Nick Clifton - 2.34-2 +- Fix the plugin support architecture to allow proper symbol info handling. (PR 25355) + +* Sun Feb 02 2020 Nick Clifton - 2.34-1 +- Rebase to GNU Binutils 2.34. (#1793098) +- Retire: binutils-improved-note-merging.patch +- Retire: binutils-CVE-2019-17451.patch +- Retire: binutils-CVE-2019-17450.patch +- Retire: binutils-addr2line-fixes.patch + +* Tue Jan 28 2020 Fedora Release Engineering - 2.33.1-13 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_32_Mass_Rebuild + +* Thu Jan 23 2020 David Abdurachmanov - 2.33.1-12 +- Enable 64-bit BFD and PEP support for riscv. (#1794343) + +* Thu Jan 02 2020 Nick Clifton - 2.33.1-11 +- Improve the accuracy of addr2line. (#1760967) + +* Mon Dec 02 2019 Nick Clifton - 2.33.1-10 +- Re-enable strip merging build notes. (#1777760) + +* Mon Nov 25 2019 Nick Clifton - 2.33.1-9 +- Remove spurious code left in gold-mimatched-section-flags patch. (#1775750) + +* Thu Nov 21 2019 Nick Clifton - 2.33.1-8 +- Fix a buffer overrun in the note merging code. (#1774507) + +* Wed Nov 13 2019 Nick Clifton - 2.33.1-7 +- Fix a potential seg-fault in the BFD library when parsing pathalogical debug_info sections. (#1771669) +- Fix a potential memory exhaustion in the BFD library when parsing corrupt DWARF debug information. (#1771678) + +* Wed Nov 06 2019 Nick Clifton - 2.33.1-6 +- Stop objcopy from creating null filled note sections when merging notes. + +* Wed Nov 06 2019 Nick Clifton - 2.33.1-5 +- Strip: Do not merge notes unless explicitly requested to do so. + +* Tue Nov 05 2019 Nick Clifton - 2.33.1-4 +- Objcopy: Do not generate a failure exit status if note merging fails. (#1767937) + +* Wed Oct 30 2019 Nick Clifton - 2.33.1-3 +- Fix the verification of the installed linker symlink. (#1767000) + +* Mon Oct 28 2019 Nick Clifton - 2.33.1-2 +- Improve objdump's ability to merge GNU build attribute notes. + +* Mon Oct 14 2019 Nick Clifton - 2.33.1-1 +- Rebase to GNU Binutils 2.33.1. +- Retire: binutils-CVE-2019-9073.patch +- Retire: binutils-CVE-2019-9074.patch +- Retire: binutils-CVE-2019-9075.patch +- Retire: binutils-CVE-2019-9077.patch +- Retire: binutils-disassembling-efi-files.patch +- Retire: binutils-CVE-2019-9071.patch +- Retire: binutils-gas-build-note-relocs.patch +- Retire: binutils-do-not-warn-about-debuginfo-files.patch +- Retire: binutils-do-not-merge-differing-SHF_EXCLUDE-groups.patch +- Retire: binutils-rh1736114.patch +- Retire: binutils-objcopy-gnu-build-version-notes.patch +- Retire: binutils-CVE-2019-14250.patch +- Retire: binutils-CVE-2019-14444.patch +- Retire: binutils-gcc-10-fixes.patch +- Retire: binutils-remove-old-formats.patch +- Retire: binutils-aarch64-gold-PLT-for-MOVW_ABS.patch + +* Fri Oct 04 2019 Nick Clifton - 2.32-27 +- Remove support for old file formats (ihex, tekhex, verilog) as they are a constant source of CVEs. + +* Wed Sep 25 2019 Nick Clifton - 2.32-26 +- Add an option to build using clang instead of gcc. + +* Tue Sep 24 2019 Nick Clifton - 2.32-25 +- Fix building with gcc-10. + +* Tue Aug 13 2019 Nick Clifton - 2.32-24 +- Fix potential integer overflow in readelf. (#1740470) + +* Fri Aug 09 2019 Nick Clifton - 2.32-23 +- Fix potential integer overflow in GOLD. (#1739491) + +* Tue Aug 06 2019 Nick Clifton - 2.32-22 +- Stop GOLD from seg-faulting on a corrupt input with a fuzzed section offset. (#1735605) + +* Mon Aug 05 2019 Nick Clifton - 2.32-21 +- Stop strip from complaining if the first build note is not a version note. (#1736114) + +* Fri Aug 2 2019 Florian Weimer - 2.32-20 +- Fix ld -Map not to produce corrupt ELF notes (#1736114) + +* Wed Jul 24 2019 Fedora Release Engineering - 2.32-19 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_31_Mass_Rebuild + +* Mon Jul 22 2019 Nick Clifton - 2.32-18 +- Stops the linker from merging section groups with different SHF_EXCLUDE flags. (#1730906) + +* Tue Jul 02 2019 Nick Clifton - 2.32-17 +- Stop the BFD library from complaining about sections found inside debuginfo files. (PR 24717) + +* Mon Jul 01 2019 Nick Clifton - 2.32-16 +- Stop gas from triggering a seg-fault when creating relocs for build notes. (PR 24748) + +* Mon Jun 24 2019 Nick Clifton - 2.32-15 +- Stop gold from aborting when it encounters input sections with the same name and different flags. (#1722715) + +* Tue May 21 2019 Nick Clifton - 2.32-14 +- Import fix for PR 23870 in order to help building Go binaries. + +* Mon Apr 29 2019 Nick Clifton - 2.32-13 +- Do not include ld.gold in the base binutils package. (#1703714) + +* Wed Apr 24 2019 Björn Esser - 2.32-12 +- Remove hardcoded gzip suffix from GNU info pages + +* Wed Apr 10 2019 Nick Clifton - 2.32-11 +- Fix a stack exhaustion problem in libiberty's name demangling code. (#1680658) + +* Mon Mar 18 2019 David Abdurachmanov - 2.32-10 +- Disable ld.gold on RISC-V and fix file installation issues. + +* Wed Mar 06 2019 Nick Clifton - 2.32-9 +- Stop potential illegal memory access when disassembling an EFI binary. (#1685727) + +* Wed Feb 27 2019 Nick Clifton - 2.32-8 +- Fix requirements and use of the alternatives mechanism. (#1683408, #1683466) + +* Tue Feb 26 2019 Nick Clifton - 2.32-7 +- Move GOLD into a sub-package of BINUTILS. + +* Tue Feb 26 2019 Nick Clifton - 2.32-6 +- Stop potential illegal memory access when parsing a corrupt MIPS binary. (#1680676) + +* Tue Feb 26 2019 Nick Clifton - 2.32-5 +- Stop potential illegal memory access when parsing corrupt archives. (#1680670) + +* Mon Feb 25 2019 Nick Clifton - 2.32-4 +- Stop potential illegal memory access when parsing corrupt PE files. (#1680682) + +* Mon Feb 25 2019 Nick Clifton - 2.32-3 +- Improve objdump's handling of corrupt input files. (#1680663) + +* Wed Feb 20 2019 Nick Clifton - 2.32-2 +- Fix some bfd linker testsuite failures. + +* Wed Feb 20 2019 Nick Clifton - 2.32-1 +- Rebase to GNU Binutils 2.32 +- Retire: binutils-s390-partial-relro.patch +- Retire: binutils-note-merge-improvements.patch +- Retire: Retire: binutils-merge-attribute-sections.patch +- Retire: binutils-gold-discard-version-info.patch +- Retire: binutils-gas-input-matches-output.patch +- Retire: binutils-fix-testsuite-failures.patch +- Retire: binutils-do-not-provide-shared-section-symbols.patch +- Retire: binutils-disable-readelf-gap-reports.patch +- Retire: binutils-detect-corrupt-sym-version-info.patch +- Retire: binutils-delay-ld-script-constant-eval.patch +- Retire: binutils-clear-version-info.patch +- Retire: binutils-CVE-2018-20002.patch +- Retire: binutils-CVE-2018-17358.patch +- Retire: binutils-2.31-export-demangle.h.patch +- Retire: binutils-2.28-ignore-gold-duplicates.patch +- Retire: binutils-2.26-lto.patch + +* Mon Feb 18 2019 Nick Clifton - 2.31.1-23 +- Ensure that decompressed sections have the correct alignment. (#1678204) + +* Thu Feb 14 2019 Nick Clifton - 2.31.1-22 +- Rework the post uninstall stage to avoid mysterious error from ldconfig. (#1673912) + +* Thu Jan 31 2019 Fedora Release Engineering - 2.31.1-21 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_30_Mass_Rebuild + +* Wed Jan 30 2019 Nick Clifton - 2.31.1-20 +- Fix the assembler's check that the output file is not also one of the input files. (#1660279) + +* Thu Jan 03 2019 Nick Clifton - 2.31.1-19 +- Fix a memory leak reading minisymbols. (#1661535) + +* Wed Jan 02 2019 Nick Clifton - 2.31.1-18 +- Ensure that GOLD is linked with pthread library. (#1636479) + +* Wed Nov 28 2018 Nick Clifton - 2.31.1-17 +- Stop gold from warning about discard version information unless explicitly requested. (#1654153) + +* Thu Nov 15 2018 Nick Clifton - 2.31.1-16 +- Remove debugging fprintf statement accidentally left in patch. (#1645828) + +* Fri Oct 12 2018 Nick Clifton - 2.31.1-15 +- Allow OS specific sections in section groups. (#1639485) + +* Fri Sep 28 2018 Nick Clifton - 2.31.1-14 +- Fix a potential buffer overrun when parsing a corrupt ELF file. (#1632912) +- Add a .attach_to_group pseuo-op to assembler (for use by annobin). (#1630574) +- Stop the binutils from statically linking with libstdc++. (#1630550) +- Include gold testsuite results in test logs. +- Disable readelf's reporting of gaps in build notes. (#1623556) + +* Tue Sep 04 2018 Nick Clifton - 2.31.1-13 +- Delay the evaluation of linker script constants until after the configuration options have been set. (#1624751) + +* Tue Aug 28 2018 Nick Clifton - 2.31.1-12 +- Detect and report corrupt symbol version information. (#1599521) + +* Tue Aug 14 2018 Nick Clifton - 2.31.1-11 +- Remove the version information from a dynamic symbol that is being overridden. (#1614920) + +* Mon Aug 06 2018 Nick Clifton - 2.31.1-10 +- Improve objcopy's --merge-notes option. (#1608390) + +* Tue Jul 31 2018 Florian Weimer - 2.31.1-9 +- Rebuild with fixed binutils + +* Mon Jul 30 2018 Nick Clifton - 2.31.1-8 +- Move the .gnu.build.attributes section to after the .comment section. + +* Fri Jul 27 2018 Nick Clifton - 2.31.1-7 +- Fix a thinko in the merge patch. + +* Fri Jul 27 2018 Nick Clifton - 2.31.1-6 +- Fix a typo in the merge patch. + +* Thu Jul 26 2018 Nick Clifton - 2.31.1-5 +- Merge .gnu.build.attribute sections together. (#1608390) + +* Tue Jul 24 2018 Nick Clifton - 2.31.1-3 +- Extend gold linker patch to cover subsections of .gnu.build.attributes. (#1607054) + +* Thu Jul 19 2018 Nick Clifton - 2.31.1-2 +- Improve partial relro support for the s/390. + +* Thu Jul 19 2018 Nick Clifton - 2.31.1-1 +- Rebase to official 2.31.1 GNU Binutils release. +- Retire: binutils-2.22.52.0.1-export-demangle.h.patch +- Retire: binutils-2.30-allow_R_AARCH64-symbols.patch +- Retire: binutils-CVE-2018-10372.patch +- Retire: binutils-CVE-2018-10373.patch +- Retire: binutils-CVE-2018-10534.patch +- Retire: binutils-CVE-2018-10535.patch +- Retire: binutils-CVE-2018-6323.patch +- Retire: binutils-CVE-2018-6759.patch +- Retire: binutils-CVE-2018-7208.patch +- Retire: binutils-CVE-2018-7568.patch +- Retire: binutils-CVE-2018-7569.patch +- Retire: binutils-CVE-2018-7570.patch +- Retire: binutils-CVE-2018-7642.patch +- Retire: binutils-CVE-2018-7643.patch +- Retire: binutils-CVE-2018-8945.patch +- Retire: binutils-PowerPC-IEEE-long-double-warnings.patch +- Retire: binutils-debug-section-marking.patch +- Retire: binutils-gas-build-notes.patch +- Retire: binutils-gold-llvm-plugin.patch +- Retire: binutils-ifunc-relocs-in-notes.patch +- Retire: binutils-linkonce-notes.patch +- Retire: binutils-missing-notes.patch +- Retire: binutils-page-to-segment-assignment.patch +- Retire: binutils-revert-PowerPC-speculation-barriers.patch +- Retire: binutils-skip-dwo-search-if-not-needed.patch +- Retire: binutils-speed-up-objdump.patch +- Retire: binutils-strip-unknown-relocs.patch +- Retire: binutils-x86-local-relocs.patch +- Retire: binutils-x86-local-version.patch + +* Thu Jul 12 2018 Fedora Release Engineering - 2.30.90-4 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_29_Mass_Rebuild + +* Thu Jul 12 2018 Nick Clifton 2.30.90-3 +- Stop gold from complaining about annobin note relocs against symbols in sections which have been discarded. (#1600431) + +* Tue Jul 10 2018 Nick Clifton 2.30.90-2 +- Revert fix for PR 23161 which was placing unversioned section symbols (_edata, _end, __bss_start) into shared libraries. (#1599521) + +* Mon Jul 9 2018 Nick Clifton 2.30.90-1 +- Rebase to a snapshot of the soon-to-be-created 2.31 FSF release. + +* Fri Jul 6 2018 Peter Robinson 2.30-26 +- Fix the generation of relocations for assembler created notes. (#1598551) + +* Wed Jul 4 2018 Peter Robinson 2.30-25 +- Minor spec cleanups and fixes. + +* Mon Jun 18 2018 Nick Clifton 2.30-24 +- When installing both ld.bfd and ld.gold, do not reset the current alternative if upgrading. (#1592069) + +* Tue Jun 12 2018 Nick Clifton 2.30-23 +- Correct warning messages about incompatible PowerPC IEEE long double settings. + +* Fri Jun 01 2018 Nick Clifton 2.30-22 +- Fix handling of local versioned symbols by the x86 linker. (PR 23194) +- Fix linker testsuite failures. + +* Thu May 17 2018 Nick Clifton 2.30-21 +- Fix a seg-fault parsing PE format binaries. (#1560829) + +* Mon May 14 2018 Nick Clifton 2.30-20 +- Have the x86 linker resolve relocations against the _end, _edata and __bss_start symbols locally. (#1576735) +- Do not generate GNU build notes for linkonce sections. (#1576362) + +* Thu May 10 2018 Nick Clifton 2.30-19 +- Fix a seg-fault running objcopy on a corrupt PE format file. (#1574702) +- Fix a seg-fault running objcopy on a corrupt ELF format file. (#1574705) + +* Tue May 01 2018 Nick Clifton 2.30-18 +- Fix a seg-fault parsing corrupt DWARF information. (#1573360) +- Fix another seg-fault parsing corrupt DWARF information. (#1573367) +- Fix a seg-fault copying a corrupt ELF file. (#1551788) +- Fix a seg-fault parsing a large ELF files on a 32-bit host. (#1539891) +- Fix a seg-fault running nm on a corrupt ELF file. (#15343247) +- Fix a seg-fault running nm on a file containing corrupt DWARF information. (#1551781) +- Fix another seg-fault running nm on a file containing corrupt DWARF information. (#1551763) + +* Fri Apr 27 2018 Nick Clifton 2.30-17 +- Disable the automatic generation of annobin notes. (#1572485) + +* Fri Apr 27 2018 Nick Clifton 2.30-16 +- Fix for PR 22887 - crashing objdump by passing it a corrupt AOUT binary. (#1553115) +- Fix for PR 22905 - crashing objdump by passing it a corrupt DWARF file. (#1553122) +- Fix for PR 22741 - crashing objdump by passing it a corrupt COFF file. (#1571918) + +* Thu Apr 26 2018 Nick Clifton 2.30-15 +- Enhance the assembler to automatically generate annobin notes if none are present in the input. + +* Thu Mar 22 2018 Nick Clifton 2.30-14 +- Fix the GOLD linker's processing of protected symbols created by the LLVM plugin. (#1559234 and PR 22868) + +* Wed Mar 14 2018 Nick Clifton 2.30-13 +- Do not discard debugobj files created by GCC v8 LTO wrapper. (#1543912 and RHBZ 84847 and PR 20882) + +* Fri Mar 09 2018 Nick Clifton 2.30-12 +- Treat relocs against s390x IFUNC symbols in note sections as relocs against the FUNC symbol instead. +- Combined previous patches into one which covers all ifunc supporting architectures. (#1553705) +- Retire binutils-s390-ifunc-relocs-in-notes.patch +- Retire binutils-x86_64-ifunc-relocs-in-notes.patch + +* Fri Mar 09 2018 Nick Clifton 2.30-11 +- Treat relocs against s390x IFUNC symbols in note sections as relocs against the FUNC symbol instead. (#1553705) + +* Wed Mar 07 2018 Nick Clifton 2.30-10 +- Ignore duplicate symbols generated by GOLD. (#1458003) + +* Wed Mar 07 2018 Nick Clifton 2.30-9 +- Stop strip from replacing unknown relocs with null relocs. (#1545386) + +* Wed Mar 07 2018 Nick Clifton 2.30-8 +- Ignore duplicate symbols generated by GOLD. (#1458003) + +* Mon Mar 05 2018 Nick Clifton 2.30-7 +- Speed up objdump. (#1551540) + +* Thu Feb 22 2018 Patrick Uiterwijk - 2.30-6 +- Fix R_AARCH64 symbols (PR 22764) (#1547781) + +* Wed Feb 21 2018 Nick Clifton 2.30-5 +- Fix assignment of pages to segments. (PR 22758) +- Inject RPM_LD_FLAGS into the build. (#1541027) +- Fix slowdown in readelf when examining files with lots of debug information. (PR 22802) +- Remove support for PowerPC speculation barrier insertion. +- Rebase on 2.30 +- Retire binutils-2.22.52.0.1-relro-on-by-default.patch +- Retire binutils-2.28-dynamic-section-warning.patch +- Retire binutils-2.29-skip-rp14918-test-for-arm.patch +- Retire binutils-2.29.1-gold-start-stop.patch +- Retire binutils-2.29.1-readelf-use-dynamic.patch +- Retire binutils-aarch64-pie.patch +- Retire binutils-coverity.patch +- Retire binutils-ppc64-stub-creation.patch +- Retire binutils-strip-delete-relocs.patch +- Retire binutils-support-v3-build-notes.patch +- Retire binutils-z-undefs.patch + +* Mon Feb 12 2018 Nick Clifton 2.29.1-19 +- Remove comment that explained how to disable annobin. (#1541027) + +* Thu Feb 08 2018 Nick Clifton 2.29.1-18 +- Inject RPM_LD_FLAGS into the build. (#1541027) + +* Wed Feb 07 2018 Fedora Release Engineering - 2.29.1-17 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild + +* Thu Feb 01 2018 Nick Clifton 2.29.1-16 +- Use make_build and make_install macros. (#1541027) + +* Thu Jan 25 2018 Nick Clifton 2.29.1-15 +- Reenable binary annotations. + +* Thu Jan 25 2018 Nick Clifton 2.29.1-14 +- Fix creation of PowerPC64 function call stubs. (#1523457) +- Disable -z defs during build. +- Disable binary annotations. (temporary ?) + +* Mon Jan 22 2018 Nick Clifton 2.29.1-13 +- Fix bugs in AArch64 static PIE support. (#1536645) + +* Tue Jan 16 2018 Nick Clifton 2.29.1-12 +- Add "-z undefs" option to the linker. + +* Thu Jan 11 2018 Nick Clifton 2.29.1-11 +- *Do* enable relro by default for the PowerPC64 architecture. (#1523946) + +* Wed Jan 03 2018 Nick Clifton 2.29.1-10 +- Update readelf and objcopy to support v3 build notes. + +* Tue Dec 12 2017 Nick Clifton 2.29.1-9 +- Have readelf display extra symbol information at the end of the line. (#1479302) + +* Mon Dec 11 2017 Nick Clifton 2.29.1-8 +- Do not enable relro by default for the PowerPC64 architecture. (#1523946) + +* Thu Dec 07 2017 Nick Clifton 2.29.1-7 +- Stop strip from crashing when deleteing relocs in a file with annobin notes. (#1520805) + +* Wed Dec 06 2017 Nick Clifton 2.29.1-6 +- Have readelf return an exit failure status when attempting to process an empty file. (#1522732) + +* Tue Nov 28 2017 Nick Clifton 2.29.1-5 +- Disable PLT elision for x86/x86_64. (#1452111 and #1333481) + +* Wed Nov 01 2017 Nick Clifton 2.29.1-4 +- Have readelf suggest the use of --use-dynamic when there are dynamic relocs that could have been displayed. (#1507694) + +* Wed Oct 18 2017 Nick Clifton 2.29.1-3 +- Fix the GOLD linker's generation of relocations for start and stop symbols. (#1500898) + +* Thu Sep 28 2017 Nick Clifton 2.29.1-2 +- Enable GOLD for PPC64 and s390x. (#1173780) +- Retire: binutils-2.20.51.0.10-sec-merge-emit.patch. + (It has been redundant for a long time now...) + +* Tue Sep 26 2017 Nick Clifton 2.29.1-1 +- Rebase on FSF binutils 2.29.1 release. +- Retire: binutils-2.29-ppc64-plt-localentry0-disable.patch +- Retire: binutils-2.29-non-elf-orphan-skip.patch + +* Thu Sep 14 2017 Nick Clifton 2.29-10 +- Extend fix for PR 21884. + (#1491023) + +* Thu Sep 14 2017 Nick Clifton 2.29-8 +- Import fix for PR 21884 which stops a seg-fault in the linker when changing output format to binary during a final link. + (#1491023) + +* Sun Sep 10 2017 Nick Clifton - 2.29-7 +- Annotate patches with reason and lifetime expectances. +- Retire: binutils-2.24-ldforcele.patch +- Retire: binutils-2.25-set-long-long.patch +- Retire: binutils-2.25.1-cleansweep.patch +- Retire: binutils-2.26-fix-compile-warnings.patch +- Retire: binutils-2.28-ignore-gold-duplicates.patch + +* Wed Aug 02 2017 Fedora Release Engineering - 2.29-6 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Binutils_Mass_Rebuild + +* Mon Jul 31 2017 Nick Clifton 2.29-5 +- Update ppc64 localentry0 patch with changes made by Alan Modra to the FSF binutils sources. + (#1475636) + +* Sun Jul 30 2017 Florian Weimer - 2.29-4 +- Rebuild with binutils fix for ppc64le, bootstrapping (#1475636) + +* Fri Jul 28 2017 Nick Clifton 2.29-3 +- Do not enable the PPC64 plt-localentry0 linker optimization by default. + (#1475636) + +* Wed Jul 26 2017 Fedora Release Engineering - 2.29-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_27_Mass_Rebuild + +* Mon Jul 24 2017 Nick Clifton 2.29-1 +- Rebase on FSF binutils 2.29. +- Retire: binutils-2.20.51.0.10-ppc64-pie.patch +- Retire: binutils-2.27-ld-buffer-overflow.patch +- Retire: binutils-2.28-libiberty-bugfixes.patch +- Retire: binutils-gnu-build-notes.patch +- Retire: binutils-2.28-gas-comp_dir.patch +- Retire: binutils-2.28-ppc-dynamic-relocs.patch +- Retire: binutils-2.28-dynamic-section-warning.patch +- Retire: binutils-2.28-aarch64-copy-relocs.patch +- Retire: binutils-2.28-DW_AT_export_symbols.patch + +* Thu Jul 20 2017 Nick Clifton 2.28-14 +- Remove -flto compile time option accidentally added to CFLAGS. + +* Thu Jul 20 2017 Nick Clifton 2.28-13 +- Add support for displaying new DWARF5 tags. + (#1472966) + +* Wed Jul 19 2017 Nick Clifton 2.28-12 +- Correct snafu in previous delta that broke building s390 binaries. + (#1472486) + +* Mon Jul 17 2017 Nick Clifton 2.28-11 +- Fix s390 assembler so that it remove fake local symbols from its output. + (#1460254) + +* Wed Jun 28 2017 Nick Clifton 2.28-10 +- Update support for GNU Build Attribute notes to include version 2 notes. + +* Thu Jun 15 2017 Nick Clifton 2.28-9 +- Update patch to fix AArch64 copy reloc generation. + (#1452170) + +* Fri Jun 09 2017 Nick Clifton 2.28-8 +- Ignore duplicate indirect symbols generated by the GOLD linker. + (#1458003) + +* Thu Jun 08 2017 Nick Clifton 2.28-7 +- Eliminate the generation of incorrect dynamic copy relocations on AArch64. + (#1452170) + +* Mon May 15 2017 Fedora Release Engineering - 2.28-6 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_26_27_Mass_Rebuild + +* Mon Mar 20 2017 Nick Clifton 2.28-5 +- Update GNU BUILD NOTES patch. +- Import FSF binutils patch to fix running readelf on debug info binaries. + (#1434050) + +* Wed Mar 08 2017 Nick Clifton 2.28-4 +- Update GNU BUILD NOTES patch. +- Import FSF binutils patch to fix an abort with PowerPC dynamic relocs. + +* Mon Mar 06 2017 Mark Wielaard 2.28-3 +- Backport patch to add support for putting name, comp_dir and + producer strings into the .debug_str section. + (#1429389) + +* Fri Mar 03 2017 Nick Clifton 2.28-2 +- Add support for GNU BUILD NOTEs. + +* Thu Mar 02 2017 Nick Clifton 2.28-1 +- Rebase on FSF binutils v2.28. +- Retire: binutils-2.23.52.0.1-addr2line-dynsymtab.patch +- Retire: binutils-2.27-local-dynsym-count.patch +- Retire: binutils-2.27-monotonic-section-offsets.patch +- Retire: binutils-2.27-arm-aarch64-default-relro.patch +- Retire: binutils-2.28-gold.patch +- Retire: binutils-2.27-objdump-improvements.patch +- Retire: binutils-2.27-dwarf-parse-speedup.patch +- Retire: binutils-2.27-objdump-improvements.2.patch +- Retire: binutils-2.27-arm-binary-objects.patch +- Retire: binutils-2.27-ppc-fp-attributes.patch +- Add patch to sync libiberty with FSF GCC mainline. + (#1428310) + +* Fri Feb 17 2017 Nick Clifton 2.27-19 +- Add support for PowerPC FP attributes. + (#1422461) + +* Wed Feb 15 2017 Nick Clifton 2.27-18 +- Fix running the ARM port of the linker on BINARY objects. + (#1422577) + +* Fri Feb 10 2017 Fedora Release Engineering - 2.27-17 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_26_Mass_Rebuild + +* Thu Feb 02 2017 Stephen Gallagher 2.27-16 +- Install COPYING[*] files using the % license macro. + (#1418430) + +* Tue Jan 31 2017 Nick Clifton 2.27-15 +- Fix buffer overflows when printing translated messages. + (#1417411) + +* Mon Jan 16 2017 Nick Clifton 2.27-14 +- Include the filename concerned in readelf error messages. + (#1412348) + +* Mon Jan 09 2017 Nick Clifton 2.27-13 +- Another speed up for objdump when displaying source code alognside disassembly. + (#1397113) + +* Tue Nov 22 2016 Nick Clifton 2.27-12 +- Speed up objdump when displaying source code alognside disassembly. + (#1397113) + +* Tue Nov 08 2016 Nick Clifton 2.27-11 +- Fix objdumps disassembly of dynamic executables. + (#1370275) + +* Fri Nov 04 2016 Nick Clifton 2.27-10 +- Fix GOLD for ARM and AARCH64 + (#1386126) + +* Mon Sep 26 2016 Mark Pryor 2.27-9 +- Fix invocation of /sbin/ldconfig when reinstalling binutils + in order to prevent warnings from rpm. + (#1379030) + (#1379117) + +* Thu Sep 22 2016 Mark Pryor 2.27-8 +- Add i386pep emulation for all EFI capable CPU types. + (#1376870) + +* Wed Sep 21 2016 Nick Clifton 2.27-7 +- Use --with-sysroot=/ for native targets. This prevents the default + sysroot of /usr/local//sys-root from being used, which breaks + locating needed shared libaries, but still allows the --sysroot + linker command line option to be effective. + (#1374889) + (#1377803) + (#1377949) + +* Tue Sep 20 2016 Nick Clifton 2.27-6 +- Omit building GOLD when bootstrapping. +- Add a generic build requirement on gcc. +- Move bison and m4 build requirements to be conditional upon building GOLD. +- Add --with-sysroot configure option when building native targets. +- Skip PR14918 linker test for ARM native targets. + (#1374889) + +* Fri Sep 16 2016 Nick Clifton 2.27-5 +- Add support for building the rpm with "--with bootstrap" enabled. +- Retire: binutils-2.20.51.0.2-ia64-lib64.patch + +* Thu Sep 01 2016 Nick Clifton 2.27-4 +- Properly disable the default generation of compressed debug sections. + (#1366182) + +* Fri Aug 19 2016 Nick Clifton 2.27-3 +- Put sections in a monotonically increasing order of file offset. +- Allow ARM and AArch64 targets to have relro on by default. + +* Mon Aug 15 2016 Nick Clifton 2.27-2 +- Fix computation of sh_info field in the header of .dynsym sections. + +* Wed Aug 03 2016 Nick Clifton 2.27-1 +- Rebase on FSF binutils 2.27 release. +- Retire: binutils-2.26-formatting.patch +- Retire: binutils-2.26-Bsymbolic_PIE.patch +- Retire: binutils-rh1312151.patch +- Retire: binutils-2.26-fix-GOT-offset-calculation.patch +- Retire: binutils-2.26-common-definitions.patch +- Retire: binutils-2.26-x86-PIE-relocations.patch + +* Mon Jun 13 2016 Nick Clifton 2.26-23 +- Enable support for GCC's LTO. + (#1342618) + +* Thu Jun 02 2016 Nick Clifton 2.26-22 +- Retire the copy-osabi patch. + (#1252066) + +* Mon May 09 2016 Nick Clifton 2.26-21 +- Fix another compile time warning, this time in tc-arm.c. + (#1333695) + +* Fri Apr 22 2016 Nick Clifton 2.26-20 +- Housekeeping: Delete retired patches. Renumber patches. +- Increase version number past F24 because F24 update is blocked by a version number comparison. + +* Fri Mar 18 2016 Nick Clifton 2.26-16 +- Import patch to fix generation of x86 relocs in PIE mode. (PR 19827) + +* Mon Mar 14 2016 Nick Clifton 2.26-15 +- Import patch to have common symbols in an executable override definitions in shared objects (PR 19579) + (#1312507) + +* Mon Feb 29 2016 Nick Clifton 2.26-14 +- Import patch to fix x86 GOT offset calculation in 2.26 sources (PR 19601) + (#1312489) + +* Fri Feb 26 2016 Nick Clifton 2.26-13 +- Import patch to fix symbol versioning bug in 2.26 sources (PR 19698) + (#1312151) + +* Fri Feb 19 2016 Nick Clifton 2.26-12 +- Import H.J.Lu's kernel LTO patch. + (#1302071) + +* Tue Feb 16 2016 poma 2.26-11 +- Enable -Bsymbolic and -Bsymbolic-functions to PIE. Needed by Syslinux + (#1308296) + +* Wed Feb 10 2016 Nick Clifton 2.26-10 +- Retire: binutils-2.23.2-aarch64-em.patch + (#1305179) + +* Tue Feb 09 2016 Nick Clifton 2.26-9 +- Fix indentation in bfd/elf64-s390.c, gas/config/tc-ia64.c + and bfd/pe-mips.c to avoid compile time warnings. + +* Thu Feb 04 2016 Nick Clifton 2.26-8 +- Fix indentation in bfd/coff-[i386|x86_64].c to avoid compile time warning. +- Suppress GOLD's dir_caches destructor. +- Suppress GOLD's Reloc_stub::Key::name function. +- Suppress unused ARM architecture variations in GAS. + +* Wed Feb 03 2016 Fedora Release Engineering - 2.26-5 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_24_Mass_Rebuild + +* Wed Jan 27 2016 Nick Clifton 2.26-4 +- Drop the kernel patch entirely... +- Retire: binutils-2.25-kernel-ld-r.patch +- Retire: binutils-2.25.1-plugin-format-checking.patch + +* Tue Jan 26 2016 Nick Clifton 2.26-3 +- Fix kernel patch for AVR targets. + +* Mon Jan 25 2016 Nick Clifton 2.26-2 +- Fix kernel patch for PPC32 targets. + +* Mon Jan 25 2016 Nick Clifton 2.26-1 +- Rebase on FSF binutils 2.26 release. +- Retire: binutils-2.25.1-ihex-parsing.patch +- Retire: binutils-2.25.1-dynamic_list.patch +- Retire: binutils-2.25.1-aarch64-pr18668.patch +- Retire: binutils-rh1247126.patch + (#1271387) + +* Thu Nov 05 2015 Nick Clifton 2.25.1-9 +- Prevent an infinite recursion when a plugin tries to claim a file in an unrecognised format. + (#1174065) + +* Wed Oct 28 2015 Nick Clifton 2.25.1-8 +- Enable little endian support when configuring for 64-bit PowerPC. + (#1275709) + +* Thu Sep 24 2015 Nick Clifton 2.25.1-7 +- Fix incorrectly generated binaries and DSOs on PPC platforms. + (#1247126) + +* Fri Sep 11 2015 Nick Clifton 2.25.1-6 +- Fix handling of AArch64 local GOT relocs. (#1262091) + +* Thu Sep 10 2015 Nick Clifton 2.25.1-5 +- Do not enable deterministic archives by default (#1195883) + +* Thu Aug 06 2015 Rex Dieter 2.25.1-4 +- Qt linked with gold crash on startup (#1193044) + +* Tue Aug 04 2015 Nick Clifton - 2.25.1-3 +- Fix the parsing of corrupt iHex files. +- Resovles: 1250141 + +* Tue Aug 04 2015 Nick Clifton - 2.25.1-2 +- Retire: binutils-2.25-aarch64-fPIC-error.patch +- Resovles: 1249969 + +* Thu Jul 23 2015 Nick Clifton - 2.25.1-1 +- Rebase on FSF binutils 2.25.1 release. +- Retire: binutils-2.25-x86_64-pie-relocs.patch + +* Thu Jul 02 2015 Nick Clifton - 2.25-12 +- For AArch64 issue an error message when attempting to resolve a + PC-relative dynamic reloc in a non-PIC object file. +- Related: 1232499 + +* Wed Jun 17 2015 Fedora Release Engineering - 2.25-11 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_23_Mass_Rebuild + +* Wed Jun 10 2015 Nick Clifton - 2.25-10 +- Make the AArch64 GOLD port use 64K pages. +- Resolves: BZ #1225156 and BZ #1215546 + +* Mon Apr 27 2015 Nick Clifton - 2.25-8 +- Require the coreutils so that touch is available. +- Resolves: BZ #1215242 + +* Tue Apr 21 2015 Nick Clifton - 2.25-7 +- Enable building GOLD for the AArch64. +- Resolves: BZ #1203057 + +* Thu Mar 19 2015 Nick Clifton - 2.25-6 +- Remove the windmc manual page, so that it is not installed. +- Resolves: BZ #1203606 + +* Sat Feb 21 2015 Till Maas - 2.25-6 +- Rebuilt for Fedora 23 Change + https://fedoraproject.org/wiki/Changes/Harden_all_packages_with_position-independent_code + +* Mon Feb 02 2015 Nick Clifton - 2.25-5 +- Fix scanning for object symbols in binutils-2.25-kernel-ld-r.patch +- Resolves: BZ #1149660 + +* Tue Jan 20 2015 Nick Clifton - 2.25-4 +- Import the fix for PR ld/17827 from FSF mainline. +- Resolves: BZ #1182511 + +* Mon Jan 12 2015 Nick Clifton - 2.25-3 +- Suppress building of GOLD for PPC, for now... +- Resolves: BZ #1173780 + +* Sat Dec 27 2014 Ralf Corsépius - 2.25-2 +- Reflect configure.info/standards.info having been dropped (RHBZ#1177359). + +* Wed Dec 24 2014 Nick Clifton - 2.25-1 +- Rebase on FSF binutils 2.25 release. +- Retire: binutils-2.24-s390-mkopc.patch +- Retire: binutils-2.24-elfnn-aarch64.patch +- Retire: binutils-2.24-DW_FORM_ref_addr.patch +- Retire: binutils-2.24-set-section-macros.patch +- Retire: binutils-2.24-fake-zlib-sections.patch +- Retire: binutils-2.24-arm-static-tls.patch +- Retire: binutils-2.24-fat-lto-objects.patch +- Retire: binutils-2.24-symbol-warning.patch +- Retire: binutils-2.24-aarch64-ld-shared-non-PIC-xfail.patch +- Retire: binutils-2.24-weak-sym-merge.patch +- Retire: binutils-2.24-indirect-chain.patch +- Retire: binutils-2.24-aarch64-fix-final_link_relocate.patch +- Retire: binutils-2.24-aarch64-fix-gotplt-offset-ifunc.patch +- Retire: binutils-2.24-aarch64-fix-static-ifunc.patch +- Retire: binutils-2.24-aarch64-fix-ie-relax.patch +- Retire: binutils-HEAD-change-ld-notice-interface.patch +- Retire: binutils-2.24-corrupt-binaries.patch +- Retire: binutils-2.24-strings-default-all.patch +- Retire: binutils-2.24-corrupt-ar.patch + +* Thu Nov 13 2014 Nick Clifton - 2.24-29 +- Fix problems with the ar program reported in FSF PR 17533. + Resolves: BZ #1162666, #1162655 + +* Fri Oct 31 2014 Nick Clifton - 2.24-28 +- Fix buffer overrun in ihex parser. +- Fix memory corruption in previous patch. +- Consoldiate corrupt handling patches into just one patch. +- Default strings command to using -a. + +* Wed Oct 29 2014 Nick Clifton - 2.24-27 +- Fix memory corruption bug introduced by the previous patch. + +* Tue Oct 28 2014 Nick Clifton - 2.24-26 +- Import patches for PR/17510 and PR/17512 to fix reading corrupt ELF binaries. + Resolves: BZ #1157276, #1157277 + +* Mon Oct 27 2014 Nick Clifton - 2.24-25 +- Import patch from mainline to fix seg-fault when reading corrupt group headers. + Resolves: BZ #1157276 + +* Fri Oct 24 2014 Nick Clifton - 2.24-24 +- Import patch from mainline to fix seg-fault when reading corrupt srec fields. + Resolves: BZ #1156272 + +* Mon Aug 25 2014 Kyle McMartin - 2.24-23 +- aarch64: increase common page size to 64KB +- binutils-HEAD-change-ld-notice-interface.patch: backport fix from HEAD + that fixes LTO + ifunc when using ld.bfd instead of gold. +- binutils-2.24-aarch64-fix-gotplt-offset-ifunc.patch + binutils-2.24-aarch64-fix-static-ifunc.patch, split elfnn-aarch64 patches + into upstream git commits, to make it easier to figure out what's + backported already +- binutils-2.24-aarch64-fix-ie-relax.patch: add fix for gd to ie relaxation + when target register is >16 (pretty unlikely, but...) + +* Thu Aug 21 2014 Kyle McMartin - 2.24-22 +- bfd/elfnn-aarch64.c: use correct offsets in final_link_relocate + Resolves: BZ #1126199 + +* Thu Aug 21 2014 Nick Clifton - 2.24-21 +- Import patch from mainline to fix indirect symbol resolution. + Resolves: BZ #1123714 + +* Tue Aug 19 2014 Nick Clifton - 2.24-20 +- Enable deterministic archives by default. + Resolves: BZ #1124342 + +* Fri Aug 15 2014 Fedora Release Engineering - 2.24-19 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_21_22_Mass_Rebuild + +* Fri Aug 15 2014 Nick Clifton - 2.24-18 +- Correct elf_merge_st_other arguments for weak symbols. + Resolves: #1126436 + +* Tue Aug 12 2014 Jeff Law - 2.24-17 +- Enable gold for PPC. + +* Tue Jun 24 2014 Kyle McMartin - 2.24-16 +- Backport a couple LTO testsuite fixes from HEAD. + Default to -ffat-lto-objects for some ld tests, which was the default in + gcc 4.8, but changed in 4.9, and resulted in some failures. +- Add STATIC_TLS flag on ARM when IE relocs are emitted in a shared + library. Also fix up offsets in the testsuite resulting from the + addition of the flags. +- XFail some ld tests on AArch64 to cut some of the spurious testsuite + failures down. + +* Sat Jun 07 2014 Fedora Release Engineering - 2.24-15 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_21_Mass_Rebuild + +* Fri May 09 2014 Nick Clifton - 2.24-14 +- Fix detection of little endian PPC64 binaries. (#1095885) + +* Mon Apr 28 2014 Nick Clifton - 2.24-13 +- Fix detection of uncompressed .debug_str sections. (#1082370) + +* Tue Apr 22 2014 Nick Clifton - 2.24-12 +- Fix compiling using gcc 4.9 (#1087374) + +* Thu Mar 27 2014 Nick Clifton - 2.24-11 +- Use {version} in Source string. Delete unused patches. + +* Tue Jan 28 2014 Nick Clifton - 2.24-10 +- Fix decoding of abbrevs using a DW_FORM_ref_addr attribute. (#1056797) + +* Tue Dec 17 2013 Nick Clifton - 2.24-9 +- Import fixes on 2.24 branch that affect AArch64 IFUNC and PLT handling. + +* Thu Dec 05 2013 Nick Clifton - 2.24-8 +- Fix building opcodes library with -Werror=format-security. (#1037026) + +* Wed Dec 04 2013 Jeff Law - 2.24-7 +- Update to official binutils 2.24 release. + +* Thu Nov 21 2013 Nick Clifton - 2.24-6 +- Update binutils 2.24 snapshot. + +* Mon Nov 11 2013 Nick Clifton - 2.24-5 +- Update binutils 2.24 snapshot. +- Switch to using GIT instead of CVS to access the FSF repository. +- Retire binutils-2.24-nm-dynsym.patch + +* Fri Oct 25 2013 Nick Clifton - 2.24-4 +- Update binutils 2.24 snapshot. +- Stop NM from halting if it encounters a file with no symbols when displaying dynamic symbols in multiple files. (#1022845) + +* Fri Oct 18 2013 Nick Clifton - 2.24-3 +- Update binutils 2.24 snapshot. + +* Fri Oct 11 2013 Nick Clifton - 2.24-2 +- Update binutils 2.24 snapshot. + +* Fri Oct 04 2013 Nick Clifton - 2.24-1 +- Rebase on binutils 2.24 snapshot. +- Retire: binutils-2.23.52.0.1-64-bit-thin-archives.patch, +- binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch, +- binutils-2.23.52.0.1-check-regular-ifunc-refs.patch, +- binutils-2.23.2-ld-texinfo-fixes.patch, +- binutils-2.23.2-bfd-texinfo-fixes.patch, +- binutils-2.23.2-dwz-alt-debuginfo.patch +- binutils-2.23.2-s390-gas-machinemode.patch +- binutils-2.23.2-xtensa.memset.patch +- binutils-2.23.2-s390-zEC12.patch +- binutils-2.23.2-arm-add-float-abi-to-e_flags.patch +- binutils-2.23.51.0.1-readelf-flush-stdout.patch + +* Mon Sep 09 2013 Nick Clifton - 2.23.88.0.1-14 +- Make readelf flush stdout before emitting an error or warning message. (#1005182) + +* Fri Aug 30 2013 Kyle McMartin 2.23.88.0.1-13 +- Add the hard-float/soft-float ABI flag as appropriate for + ET_DYN/ET_EXEC in EABI_VER5. +- Fix last changelog entry, it was release 12, not 14. + +* Wed Aug 14 2013 Nick Clifton 2.23.88.0.1-12 +- Add support for the s/390 zEC12 architecture to gas. (#996395) + +* Mon Aug 12 2013 Nick Clifton 2.23.88.0.1-11 +- Fix typos in invocations of memset in elf32-xtensa.c + +* Wed Aug 07 2013 Karsten Hopp 2.23.88.0.1-10 +- disable -Werror on ppc64p7 for #918189 + +* Sat Aug 03 2013 Fedora Release Engineering - 2.23.88.0.1-9 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_20_Mass_Rebuild + +* Fri Jul 19 2013 Nick Clifton - 2.23.88.0.1-8 +- Add support for the S/390 .machinemode pseudo-op to GAS. (#986031) + +* Fri Jul 05 2013 Nick Clifton - 2.23.88.0.1-7 +- Add a requirement for libstdc++-static when running the GOLD testsuite. + +* Wed Jun 05 2013 Nick Clifton - 2.23.88.0.1-6 +- Fix building of aarch64 targets after applying the patch for kernel ld -r modules. +- Fix building when "--with debug" is specified. + +* Wed May 29 2013 Nick Clifton - 2.23.88.0.1-5 +- Add support for the alternative debuging files generated by the DWZ program. (#965255) + +* Fri May 17 2013 Nick Clifton - 2.23.88.0.1-4 +- Import H.J.'s patch to add support for kernel ld -r modules. +- Fix errors reported by version 5.0 of texinfo when parsing bfd documentation. + +* Fri Apr 26 2013 Nick Clifton - 2.23.88.0.1-3 +- Fix errors reported by version 5.0 of texinfo when parsing assembler documentation. + +* Thu Apr 25 2013 Nick Clifton - 2.23.88.0.1-2 +- Fix errors reported by version 5.0 of texinfo when parsing linker documentation. + +* Wed Apr 24 2013 Nick Clifton - 2.23.88.0.1-1 +- Switch over to basing sources on the official FSF binutils releases. +- Retire binutils-2.23.52.0.1-revert-pr15149.patch. +- Update binutils-2.22.52.0.1-relro-on-by-default.patch and binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch. + +* Wed Apr 17 2013 Nick Clifton - 2.23.52.0.1-10 +- Import patch for FSF mainline PR 15371 to fix ifunc references in shared libraries. (#927818) + +* Thu Mar 14 2013 Nick Clifton - 2.23.52.0.1-9 +- Enhance opncls.c:find_separate_debug_file() to look in Fedora specific locations. +- Enhance dwarf2.c:find_line() to work with shared libraries. (#920542) + +* Wed Mar 13 2013 Nick Clifton - 2.23.52.0.1-8 +- Fix addr2line to use dynamic symbols if it failed to canonicalize ordinary symbols. (#920542) + +* Wed Mar 13 2013 Nick Clifton - 2.23.52.0.1-7 +- Change requirement to explicitly depend upon /usr/bin/pod2man. (#920545) + +* Wed Mar 13 2013 Nick Clifton - 2.23.52.0.1-6 +- Require perl for pod2man for building man pages. (#920545) + +* Fri Mar 08 2013 Nick Clifton - 2.23.52.0.1-5 +- Reverts patch for PR15149 - prevents report weak DT_NEEDED symbols. (#918003) + +* Wed Mar 06 2013 Nick Clifton - 2.23.52.0.1-4 +- Enable building of GOLD for the ARM. (#908966) + +* Mon Mar 04 2013 Nick Clifton - 2.23.52.0.1-3 +- Fix errors reported by version 5.0 of texinfo when parsing assembler documentaion. + +* Fri Mar 01 2013 Nick Clifton - 2.23.52.0.1-2 +- Fix the creation of index tables in 64-bit thin archives. (#915411) + +* Thu Feb 28 2013 Nick Clifton - 2.23.52.0.1-1 +- Rebase on 2.23.51.0.1 release. (#916516) + +* Fri Feb 08 2013 Nick Clifton - 2.23.51.0.9-2 +- Enable 64-bit BFD for aarch64. (#908904) + +* Mon Feb 04 2013 Nick Clifton - 2.23.51.0.9-1 +- Rebase on 2.23.51.0.9 release. (#907089) +- Retire binutils-2.23.51.0.8-arm-whitespace.patch. + +* Mon Jan 21 2013 Nick Clifton - 2.23.51.0.8-4 +- Allow more whitespace in ARM instructions. (#892261) + +* Tue Jan 15 2013 Patsy Franklin - 2.23.51.0.8-3 +- Add bc to BuildRequires when running the testsuite. (#895321) + +* Wed Jan 02 2013 Nick Clifton - 2.23.51.0.8-2 +- Add runtime link with libdl. (#889134) + +* Wed Jan 02 2013 Nick Clifton - 2.23.51.0.8-1 +- Rebase on 2.23.51.0.8 release. (#890382) + +* Fri Dec 21 2012 Nick Clifton - 2.23.51.0.7-1 +- Rebase on 2.23.51.0.7 release. (#889432) + +* Tue Nov 27 2012 Nick Clifton - 2.23.51.0.6-1 +- Rebase on 2.23.51.0.6 release. (#880508) + +* Tue Nov 13 2012 Nick Clifton - 2.23.51.0.5-1 +- Rebase on 2.23.51.0.5 release. (#876141) +- Retire binutils-2.23.51.0.3-arm-ldralt.patch + +* Tue Oct 23 2012 Nick Clifton - 2.23.51.0.3-3 +- Rename ARM LDRALT instruction to LDALT. (#869025) PR/14575 + +* Mon Oct 15 2012 Jon Ciesla - 2.23.51.0.3-2 +- Provides: bundled(libiberty) + +* Tue Oct 02 2012 Nick Clifton - 2.23.51.0.3-1 +- Rebase on 2.23.51.0.3 release. (#858560) + +* Tue Sep 11 2012 Nick Clifton - 2.23.51.0.2-1 +- Rebase on 2.23.51.0.2 release. (#856119) +- Retire binutils-2.23.51.0.1-gold-keep.patch and binutils-rh805974.patch. + +* Tue Sep 4 2012 Jeff Law 2.23.51.0.1-4 +- Correctly handle PLTOFF relocs for s390 IFUNCs. + +* Tue Aug 14 2012 Karsten Hopp 2.23.51.0.1-3 +- apply F17 commit cd2fda5 to honour {powerpc64} macro (#834651) + +* Tue Aug 14 2012 Nick Clifton - 2.23.51.0.1-2 +- Make GOLD honour KEEP directives in linker scripts (#8333355) + +* Wed Aug 08 2012 Nick Clifton - 2.23.51.0.1-1 +- Rebase on 2.23.51.0.1 release. (#846433) +- Retire binutils-2.22.52.0.4-dwz.patch, binutils-2.22.52.0.4-ar-4Gb.patch, binutils-2.22.52.0.4-arm-plt-refcount.patch, binutils-2.22.52.0.4-s390-64bit-archive.patch. + +* Thu Aug 02 2012 Nick Clifton - 2.22.52.0.4-8 +- Make the binutils-devel package depend upon the binutils package. (#845082) + +* Thu Aug 02 2012 Nick Clifton - 2.22.52.0.4-7 +- Disable checks that config.h is included before system headers. (#845084) + +* Tue Jul 17 2012 Nick Clifton - 2.22.52.0.4-6 +- Use 64bit indicies in archives for s390 binaries. (#835957) + +* Thu Jul 05 2012 Nick Clifton - 2.22.52.0.4-5 +- Catch attempts to create a broken symbol index with archives > 4Gb in size. (#835957) + +* Fri Jun 29 2012 Nick Clifton - 2.22.52.0.4-4 +- Import fix for ld/14189. (#829311) + +* Fri Jun 29 2012 Nick Clifton - 2.22.52.0.4-3 +- Fix handling of archives > 4Gb in size by importing patch for PR binutils/14302. (#835957) + +* Tue Jun 19 2012 Jakub Jelinek - 2.22.52.0.4-2 +- Add minimal dwz -m support. + +* Wed Jun 06 2012 Nick Clifton - 2.22.52.0.4-1 +- Rebase on 2.22.52.0.4 release. (#829027) + +* Tue May 08 2012 Nick Clifton - 2.22.52.0.3-1 +- Rebase on 2.22.52.0.3 release. (#819823) + +* Mon Apr 30 2012 Nick Clifton - 2.22.52.0.2-1 +- Rebase on 2.22.52.0.2 release. (#816514) +- Retire binutils-2.22.52.0.1-weakdef.patch, binutils-2.22.52.0.1-ld-13621.patch, binutils-rh797752.patch, binutils-2.22.52.0.1-x86_64-hidden-ifunc.patch, binutils-2.22.52.0.1-tsx.patch and binutils-2.22.52.0.1-hidden-ifunc.patch. +- Update binutils-2.22.52.0.1-reloc-on-by-default.patch. + +* Fri Apr 27 2012 Nick Clifton - 2.22.52.0.1-12 +- Include demangle.h in the devel rpm. + +* Tue Apr 03 2012 Nick Clifton - 2.22.52.0.1-11 +- Enable -zrelro by default for RHEL 7+. (#807831) + +* Fri Mar 16 2012 Jakub Jelinek - 2.22.52.0.1-10 +- Fix up handling of hidden ifunc relocs on i?86 + +* Wed Mar 14 2012 Jeff Law - 2.22.52.0.1-9 +- Fix c++filt docs (2nd instance) (#797752) + +* Wed Mar 07 2012 Jakub Jelinek - 2.22.52.0.1-8 +- Fix up handling of hidden ifunc relocs on x86_64 +- Add Intel TSX support + +* Tue Mar 06 2012 Nick Clifton - 2.22.52.0.1-7 +- Enable -zrelro by default. (#621983 #807831) + +* Mon Feb 27 2012 Jeff Law - 2.22.52.0.1-6 +- Fix c++filt docs (#797752) + +* Wed Feb 15 2012 Mark Wielaard - 2.22.52.0.1-5 +- Add upstream ld/13621 'dangling global hidden symbol in symtab' patch. + +* Wed Feb 08 2012 Adam Williamson - 2.22.52.0.1-4 +- Actually apply the patch + +* Wed Feb 08 2012 Adam Williamson - 2.22.52.0.1-3 +- Add upstream weakdef.patch to fix RH #788107 + +* Wed Feb 01 2012 Nick Clifton - 2.22.52.0.1-2 +- Drat - forgot to upload the new tarball. Now done. + +* Wed Feb 01 2012 Nick Clifton - 2.22.52.0.1-1 +- Rebase on 2.22.52 release. +- Remove build-id.patch and gold-casts.patch as they are included in the 2.22.52 sources. + +* Fri Jan 13 2012 Nick Clifton - 2.22-4 +- Fix bug in GOLD sources parsing signed integers in command line options. + +* Fri Jan 13 2012 Nick Clifton - 2.22-3 +- Add casts for building gold with 4.7 version of gcc. + +* Thu Jan 12 2012 Fedora Release Engineering - 2.22-2 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_17_Mass_Rebuild + +* Tue Nov 22 2011 Nick Clifton - 2.22-1 +- Rebase on 2.22 release. + +* Fri Sep 30 2011 Ricky Zhou - 2.21.53.0.2-2 +- Rebuild libopcodes.a with -fPIC. + +* Tue Aug 09 2011 Nick Clifton - 2.21.53.0.2-1 +- Rebase on 2.21.53.0.2 tarball. Delete unneeded patches. (BZ 728677) + +* Tue Aug 02 2011 Nick Clifton - 2.21.53.0.1-3 +- Update libiberty demangling. (BZ 727453) + +* Wed Jul 27 2011 Nick Clifton - 2.21.53.0.1-2 +- Import Jakub Jelinek's patch to add support for displaying the contents of .debug_macro sections. + +* Tue Jul 19 2011 Nick Clifton - 2.21.53.0.1-1 +- Rebase on 2.21.53.0.1 tarball. Delete unneeded patches. (BZ 712668) + +* Fri Jun 24 2011 Nick Clifton - 2.21.52.0.1-5 +- Import fix for PR ld/12921. + +* Fri Jun 24 2011 Nick Clifton - 2.21.52.0.1-4 +- Run "alternatives --auto" to restore ld symbolic link if it was manually configured. (BZ 661247) + +* Thu Jun 16 2011 Nick Clifton - 2.21.52.0.1-3 +- Fix seg-fault attempting to find a function name without a symbol table. (BZ 713471) + +* Fri Jun 10 2011 Nick Clifton - 2.21.52.0.1-2 +- Import fix for PR ld/12851 (BZ 711268) + +* Thu Jun 09 2011 Nick Clifton - 2.21.52.0.1-1 +- Rebase on 2.21.52.0.1 tarball. (BZ 712025) + +* Tue May 17 2011 Nick Clifton - 2.21.51.0.9-1 +- Rebase on 2.21.51.0.9 tarball. (BZ 703105) + +* Mon May 2 2011 Peter Robinson - 2.21.51.0.8-3 +- Add ARM to BFD checks + +* Mon Apr 11 2011 Nick Clifton - 2.21.51.0.8-2 +- Delete plugins patch - enable plugins via configure option. + +* Mon Apr 11 2011 Nick Clifton - 2.21.51.0.8-1 +- Rebase on 2.21.51.0.8 tarball. + +* Thu Mar 17 2011 Nick Clifton - 2.21.51.0.7-1 +- Rebase on 2.21.51.0.7 tarball. + +* Tue Mar 08 2011 Nick Clifton - 2.21.51.0.6-2 +- Enable gold plugins. (BZ 682852) + +* Thu Feb 10 2011 Nick Clifton - 2.21.51.0.6-1 +- Rebase on 2.21.51.0.6 tarball. + +* Mon Feb 07 2011 Fedora Release Engineering - 2.21.51.0.5-4 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_15_Mass_Rebuild + +* Fri Jan 28 2011 Jakub Jelinek - 2.21.51.0.5-3 +- Readd --build-id fix patch. (PR ld/12451) + +* Thu Jan 6 2011 Dan Horák - 2.21.51.0.5-2 +- fix build on non-gold arches like s390(x) where both ld and ld.bfd is installed + +* Wed Jan 5 2011 Nick Clifton - 2.21.51.0.5-1 +- Rebase on 2.21.51.0.5 tarball. +- Delete redundant patches. +- Fix gold+ld configure command line option. + +* Fri Nov 5 2010 Dan Horák - 2.20.51.0.12-2 +- "no" is not valid option for --enable-gold + +* Thu Oct 28 2010 Nick Clifton - 2.20.51.0.12-1 +- Rebase on 2.20.51.0.12 tarball. (BZ 582160) + +* Fri Sep 10 2010 Nick Clifton - 2.20.51.0.11-1 +- Rebase on 2.20.51.0.11 tarball. (BZ 631771) + +* Fri Aug 20 2010 Nick Clifton - 2.20.51.0.10-3 +- Allow ^ and ! characters in linker script wildcard patterns. (BZ 621742) + +* Fri Aug 20 2010 Nick Clifton - 2.20.51.0.10-2 +- Fix seg fault in sec_merge_emit(). (BZ 623687) + +* Tue Aug 10 2010 Nick Clifton - 2.20.51.0.10-1 +- Rebase on 2.20.51.0.10 tarball. +- Import GOLD sources from binutils mainline as of 10 Aug 2010. + +* Wed Jun 30 2010 Nick Clifton - 2.20.51.0.7-5 +- Rename the binutils-static package to binutils-devel in line with the Fedora packaging guidelines. + +* Wed Jun 9 2010 Nick Clifton - 2.20.51.0.7-4 +- Allow GOLD linker to parse "-l" directives inside INPUT statements in linker scripts. (BZ 600553) + +* Tue May 4 2010 Nick Clifton - 2.20.51.0.7-3 +- Allow unique symbols in archive maps. + +* Tue Apr 20 2010 Nick Clifton - 2.20.51.0.7-2 +- Merge binutils-devel package into binutils-static package. (BZ 576300) + +* Thu Apr 8 2010 Nick Clifton - 2.20.51.0.7-1 +- Rebase on 2.20.51.0.7 tarball. +- Delete redundant patches: + binutils-2.20.51.0.2-add-needed.patch, + binutils-2.20.51.0.2-do-not-set-ifunc.patch, + binutils-2.20.51.0.2-enable-gold.patch, + binutils-2.20.51.0.2-gas-expr.patch, + binutils-2.20.51.0.2-ifunc-ld-s.patch, + binutils-2.20.51.0.2-lwp.patch, + binutils-2.20.51.0.2-ppc-hidden-plt-relocs.patch, + binutils-2.20.51.0.2-x86-hash-table.patch, +- Do not allow unique symbols to be bound locally. (PR ld/11434) +- Add support for DWARF4 debug information. + +* Thu Mar 4 2010 Nick Clifton - 2.20.51.0.2-17 +- Do not set ELFOSABI_LINUX on binaries which just link to IFUNC using DSOs. (BZ 568941) + +* Tue Mar 2 2010 Nick Clifton - 2.20.51.0.2-16 +- Copy the OSABI field in ELF headers, if set. (BZ 568921) + +* Fri Feb 12 2010 Nick Clifton - 2.20.51.0.2-15 +- Create separate static and devel sub-packages. (BZ 556040) + +* Tue Feb 2 2010 Nick Clifton - 2.20.51.0.2-14 +- Fix seg-fault when linking mixed x86 and x86_64 binaries. (BZ 487472) + +* Fri Jan 22 2010 Nick Clifton - 2.20.51.0.2-13 +- Add a requirement for the coreutils. (BZ 557006) + +* Wed Jan 20 2010 Nick Clifton - 2.20.51.0.2-12 +- Fix --no-copy-dt-needed so that it will not complain about weak references. + +* Fri Dec 18 2009 Nick Clifton - 2.20.51.0.2-11 +- Add missing part of PR 11088 patch. + +* Thu Dec 17 2009 Nick Clifton - 2.20.51.0.2-10 +- Apply patch for PR 11088. (BZ 544149) + +* Wed Dec 9 2009 Nick Clifton - 2.20.51.0.2-9 +- Apply patch for PR 10856. (BZ 544358) + +* Tue Dec 1 2009 Roland McGrath - 2.20.51.0.2-8 +- Build gold only for x86 flavors until others are tested. + +* Tue Nov 24 2009 Roland McGrath - 2.20.51.0.2-7 +- Add support for building gold. + +* Mon Nov 9 2009 Jakub Jelinek 2.20.51.0.2-5 +- Fix up --copy-dt-needed-entries default. (Nick Clifton) + +* Mon Nov 9 2009 Jakub Jelinek 2.20.51.0.2-4 +- Fix ld -s with IRELATIVE relocations. (BZ 533321, PR ld/10911) +- Add AMD Orochi LWP support, fix FMA4 support. + +* Thu Nov 05 2009 Nick CLifton 2.20.51.0.2-3 +- Rename --add-needed to --copy-dt-needed-entries and improve error message about unresolved symbols in DT_NEEDED DSOs. + +* Tue Oct 27 2009 Jan Kratochvil 2.20.51.0.2-2 +- Fix rpm --excludedocs (BZ 515922). +- Fix spurious scriplet errors by `exit 0'. (BZ 517979, Nick Clifton) + +* Mon Oct 12 2009 Nick Clifton 2.20.51.0.2-1 +- Rebase on 2.20 tarball. +- Remove redundant moxie patch. +- Remove redundant unique is global patch. +- Remove redundant cxxfilt java doc patch. + +* Tue Sep 29 2009 Jan Kratochvil 2.19.51.0.14-32 +- Remove spurious description of nonexistent --java switch for cxxfilt. + +* Thu Aug 6 2009 Jakub Jelinek 2.19.51.0.14-31 +- Fix strip on objects with STB_GNU_UNIQUE symbols. (BZ 515700, PR binutils/10492) + +* Fri Jul 24 2009 Fedora Release Engineering - 2.19.51.0.14-30 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_12_Mass_Rebuild + +* Wed Jul 22 2009 Nick Clifton 2.19.51.0.11-28 +- Rebase sources on 2.19.51.0.14 tarball. Gain fixes for PRs 10429 and 10433. + +* Wed Jul 22 2009 Nick Clifton 2.19.51.0.11-28 +- Rebase sources on 2.19.51.0.13 tarball. Remove redundant orphan section placement patch. (BZ 512937) + +* Tue Jul 14 2009 Nick Clifton 2.19.51.0.11-27 +- Add patch to allow moxie target to build, and hence --enable-targets=all to work. + +* Tue Jul 14 2009 Nick Clifton 2.19.51.0.11-26 +- Import orphan section placement patch from mainline. (BZ 510384) + +* Tue Jul 14 2009 Nick Clifton 2.19.51.0.11-25 +- Fix build-id patch to avoid memory corruption. (BZ 501582) + +* Sat Jul 11 2009 Jan Kratochvil 2.19.51.0.11-24 +- Provide uuencode output of the testsuite results. + +* Tue Jun 30 2009 Nick Clifton 2.19.51.0.11-23 +- Rebase sources on the 2.19.51.0.11 tarball. + +* Mon Jun 22 2009 Nick Clifton 2.19.51.0.10-22 +- Rebase sources on the 2.19.51.0.10 tarball. + +* Thu Jun 11 2009 Nick Clifton 2.19.51.0.2-21 +- Do not attempt to set execute permission on non-regular files. (BZ 503426) + +* Tue Jun 9 2009 Jakub Jelinek 2.19.51.0.2-20 +- Fix .cfi_* skip over >= 64KB of code. (PR gas/10255) + +* Wed May 27 2009 Nick Clifton 2.19.51.0.2-19 +- Import fix for binutils PR #9938. (BZ 500295) + +* Wed Apr 15 2009 Nick Clifton 2.19.51.0.2-18 +- Update IBM Power 7 support patch to fix tlbilx opcode. (BZ 494718) + +* Tue Mar 17 2009 Nick Clifton 2.19.51.0.2-17 +- Add glibc-static to BuildRequires when running the testsuite. + +* Thu Mar 05 2009 Nick Clifton 2.19.51.0.2-16 +- Add IBM Power7 support. (BZ 487887) + +* Mon Mar 02 2009 Nick Clifton 2.19.51.0.2-15 +- Add IFUNC support. (BZ 465302) + +* Mon Feb 23 2009 Fedora Release Engineering - 2.19.51.0.2-14 +- Rebuilt for https://fedoraproject.org/wiki/Fedora_11_Mass_Rebuild + +* Mon Feb 23 2009 Jan Kratochvil 2.19.50.0.2-13 +- Rediff the symbolic-envvar-revert patch to comply with rpm patch --fuzz=0. + +* Thu Feb 5 2009 Nick Clifton 2.19.51.0.2-12 +- Rebase sources on 2.19.51.0.2 tarball. Remove linkonce-r-discard and + gcc-expect-table patches. + +* Mon Feb 2 2009 Jan Kratochvil 2.19.50.0.1-11 +- Fix .eh_frame_hdr build also for .gcc_except_table LSDA refs (BZ 461675). + +* Fri Jan 23 2009 Nick Clifton 2.19.50.0.1-10 +- Only require dejagnu if the testsuites are going to be run. (BZ 481169) + +* Sat Nov 29 2008 Nick Clifton 2.19.50.0.1-8 +- Add build-id patch to ensure that section contents are incorporated + into a build id. (BZ 472152) + +* Fri Nov 21 2008 Nick Clifton 2.19.50.0.1 +- Rebase sources on 2.19.50.0.1 tarball. Update all patches, trimming + those that are no longer needed. + +* Thu Oct 30 2008 Jan Kratochvil 2.18.50.0.9-7 +- Fix %%{_prefix}/include/bfd.h on 32-bit hosts due the 64-bit BFD target + support from 2.18.50.0.8-2 (BZ 468495). + +* Thu Oct 30 2008 Jan Kratochvil 2.18.50.0.9-6 +- binutils-devel now requires zlib-devel (BZ 463101 comment 5). +- Fix complains on .gnu.linkonce.r relocations to their discarded + .gnu.linkonce.t counterparts. + +* Mon Sep 22 2008 Jan Kratochvil 2.18.50.0.9-5 +- Remove %%makeinstall to comply with the spu-binutils review (BZ 452211). + +* Mon Sep 22 2008 Jan Kratochvil 2.18.50.0.9-4 +- Fix *.so scripts for multilib linking (BZ 463101, suggested by Jakub Jelinek). + +* Sun Sep 21 2008 Jan Kratochvil 2.18.50.0.9-3 +- Provide libbfd.so and libopcodes.so for automatic dependencies (BZ 463101). +- Fix .eh_frame_hdr build on C++ files with discarded common groups (BZ 458950). +- Provide --build and --host to fix `rpmbuild --target' biarch builds. +- Include %%{binutils_target}- filename prefix for binaries for cross builds. +- Fix multilib conflict on %%{_prefix}/include/bfd.h's BFD_HOST_64BIT_LONG_LONG. + +* Mon Sep 15 2008 Jan Kratochvil 2.18.50.0.9-2 +- Package review, analysed by Jon Ciesla and Patrice Dumas (BZ 225615). + - build back in the sourcedir without problems as gasp is no longer included. + - Fix the install-info requirement. + - Drop the needless gzipping of the info files. + - Provide Obsoletes versions. + - Use the %%configure macro. + +* Sat Aug 30 2008 Jan Kratochvil 2.18.50.0.9-1 +- Update to 2.18.50.0.9. + - Drop the ppc-only spu target pre-build stage (BZ 455242). + - Drop parsing elf64-i386 files for kdump PAE vmcore dumps (BZ 457189). +- New .spec BuildRequires zlib-devel (/-static) for compressed sections. +- Update .spec Buildroot to be more unique. + +* Fri Aug 1 2008 Jan Kratochvil 2.18.50.0.8-2 +- Fix parsing elf64-i386 files for kdump PAE vmcore dumps (BZ 457189). +- Turn on 64-bit BFD support for i386, globally enable AC_SYS_LARGEFILE. +- `--with debug' builds now with --disable-shared. +- Removed a forgotten unused ld/eelf32_spu.c workaround from 2.18.50.0.8-1. + +* Thu Jul 31 2008 Jan Kratochvil 2.18.50.0.8-1 +- Update to 2.18.50.0.8. + - Drop the .clmul -> .pclmul renaming backport. +- Add %%{binutils_target} macro to support building cross-binutils. + (David Woodhouse) +- Support `--without testsuite' to suppress the testsuite run. +- Support `--with debug' to build without optimizations. +- Refresh the patchset with fuzz 0 (for new rpmbuild). +- Enable the spu target on ppc/ppc64 (BZ 455242). + +* Wed Jul 16 2008 Jan Kratochvil 2.18.50.0.6-4 +- include the `dist' tag in the Release number +- libbfd.a symbols visibility is now hidden (for #447426, suggested by Jakub) + +* Wed Jul 16 2008 Jan Kratochvil 2.18.50.0.6-3 +- rebuild libbfd.a with -fPIC for inclusion into shared libraries (#447426) + +* Tue Apr 8 2008 Jakub Jelinek 2.18.50.0.6-2 +- backport .clmul -> .pclmul renaming + +* Fri Apr 4 2008 Jakub Jelinek 2.18.50.0.6-1 +- update to 2.18.50.0.6 + - Intel AES, CLMUL, AVX/FMA support + +* Mon Mar 3 2008 Jakub Jelinek 2.18.50.0.4-2 +- revert aranges optimization (Alan Modra, BZ#5303, BZ#5755) +- fix ld-shared testcase for GCC 4.3 (H.J. Lu) + +* Fri Feb 29 2008 Jakub Jelinek 2.18.50.0.4-1 +- update to 2.18.50.0.4 + +* Tue Feb 19 2008 Fedora Release Engineering 2.18.50.0.3-2 +- Autorebuild for GCC 4.3 + +* Wed Dec 12 2007 Jakub Jelinek 2.18.50.0.3-1 +- update to 2.18.50.0.3 + - fix build with recent makeinfo (#415271) + +* Thu Aug 16 2007 Jakub Jelinek 2.17.50.0.18-1 +- update to 2.17.50.0.18 + - GPLv3+ + - preserve .note.gnu.build-id in objcopy --only-keep-debug (#251935) + - fix sparc64/alpha broken by --build-id patch (#252936) +- update License tag +- fix ld crash with --build-id and non-ELF output format (Alan Modra, BZ#4923) + +* Tue Jul 31 2007 Jakub Jelinek 2.17.50.0.17-7 +- fix ppc32 secure PLT detection (Alan Modra) + +* Wed Jul 25 2007 Jakub Jelinek 2.17.50.0.17-6 +- rebuilt to make sure even libbfd.so and libopcodes.so aren't + broken by #249435 + +* Tue Jul 24 2007 Jakub Jelinek 2.17.50.0.17-5 +- add .note.gnu.build-id into default linker script (#249435) + +* Tue Jul 24 2007 Jakub Jelinek 2.17.50.0.17-4 +- don't kill the %%{_gnu} part of target name on arm + (Lennert Buytenhek, #243516) +- create just one PT_NOTE segment header for all consecutive SHT_NOTE + sections + +* Wed Jul 18 2007 Roland McGrath 2.17.50.0.17-3 +- fix for ld --build-id + +* Sun Jul 15 2007 Roland McGrath 2.17.50.0.17-2 +- ld --build-id support + +* Wed Jun 27 2007 Jakub Jelinek 2.17.50.0.17-1 +- update to 2.17.50.0.17 + +* Tue Jun 12 2007 Jakub Jelinek 2.17.50.0.16-1 +- update to 2.17.50.0.16 + +* Sat Apr 14 2007 Jakub Jelinek 2.17.50.0.12-4 +- fix linking non-ELF input objects into ELF output (#235747) + +* Wed Mar 14 2007 Jakub Jelinek 2.17.50.0.12-3 +- don't require matching ELF_OSABI for target vecs with ELFOSABI_NONE, + only prefer specific osabi target vecs over the generic ones + (H.J.Lu, #230964, BZ#3826) +- build libbfd.so and libopcodes.so with -Bsymbolic-functions + +* Fri Mar 2 2007 Jakub Jelinek 2.17.50.0.12-2 +- ignore install-info errors from scriptlets (#223678) + +* Thu Mar 1 2007 Jakub Jelinek 2.17.50.0.12-1 +- update to 2.17.50.0.12 +- revert the misdesigned LD_SYMBOLIC{,_FUNCTIONS} env var support, + only support -Bsymbolic/-Bsymbolic-functions/--dynamic-list* + +* Mon Jan 8 2007 Jakub Jelinek 2.17.50.0.9-1 +- update to 2.17.50.0.9 +- fix tekhex reader + +* Sat Dec 23 2006 Jakub Jelinek 2.17.50.0.8-2 +- fix --as-needed on ppc64 (#219629) + +* Sun Dec 3 2006 Jakub Jelinek 2.17.50.0.8-1 +- update to 2.17.50.0.8 +- initialize frch_cfi_data (BZ#3607) + +* Fri Dec 1 2006 Jakub Jelinek 2.17.50.0.7-1 +- update to 2.17.50.0.7 + - .cfi_personality and .cfi_lsda directives, per subsection .cfi_* + directives, better .eh_frame CIE merging + +* Thu Nov 9 2006 Jakub Jelinek 2.17.50.0.6-3 +- fix popcnt instruction assembly and disassembly on amd64 (#214767) + +* Mon Oct 23 2006 Jakub Jelinek 2.17.50.0.6-2 +- update to 2.17.50.0.6 + - fix for section relative linker script defined symbols in + empty sections (#207598, BZ#3267) + - fix handling of DW_CFA_set_loc in .eh_frame optimizations + - fix R_PPC_{PLT,GOT{,_TLSGD,_TLSLD,_TPREL,_DTPREL}}16_HA relocation + handling with weak undefined symbols (Alan Modra, #211094) + +* Tue Sep 12 2006 Jakub Jelinek 2.17.50.0.3-6 +- fix multilib conflict in %%{_prefix}/include/bfd.h + +* Tue Sep 12 2006 Jakub Jelinek 2.17.50.0.3-5 +- fix efi-app-ia64 magic number (#206002, BZ#3171) + +* Tue Sep 5 2006 Jakub Jelinek 2.17.50.0.3-4 +- link libopcodes*.so against libbfd*.so (#202327) +- split *.a and header files into binutils-devel + +* Fri Aug 18 2006 Jakub Jelinek 2.17.50.0.3-3 +- on ppc and ppc64 increase default -z commonpagesize to 64K (#203001) + +* Fri Jul 28 2006 Alexandre Oliva 2.17.50.0.3-2 +- do not infer x86 arch implicitly based on instruction in the input + (#200330) + +* Mon Jul 17 2006 Jakub Jelinek 2.17.50.0.3-1 +- update to 2.17.50.0.3 + +* Fri Jul 14 2006 Jakub Jelinek 2.17.50.0.2-8 +- add support for new AMDFAM10 instructions (#198281, IT#97662) +- add -march=/-mtune= gas support on x86/x86-64 +- x86/x86-64 nop insn improvements +- fix DT_GNU_HASH shift count value computation + +* Tue Jul 11 2006 Jakub Jelinek 2.17.50.0.2-7 +- add DT_GNU_HASH support (--hash-style=gnu and --hash-style=both + ld options) + +* Thu Jun 29 2006 Jakub Jelinek 2.17.50.0.2-4 +- fix i?86 TLS GD->IE transition in executables (#196157, BZ#2513) + +* Mon Jun 19 2006 Jakub Jelinek 2.17.50.0.2-3 +- fix two places in ld that misbehaved with MALLOC_PERTURB_=N +- fix .tls_common handling in relocatable linking + +* Mon Jun 5 2006 Jakub Jelinek 2.17.50.0.2-2 +- fix --as-needed (Alan Modra, #193689, BZ#2721) + +* Thu Jun 1 2006 Jakub Jelinek 2.17.50.0.2-1 +- update to 2.17.50.0.2 +- update from CVS to 20060601 +- speed up the ELF linker by caching the result of kept section check + (H.J. Lu) + +* Tue May 9 2006 Jakub Jelinek 2.17.50.0.1-1 +- update to 2.17.50.0.1 + +* Fri Mar 31 2006 Jakub Jelinek 2.16.91.0.6-6 +- fix ld error message formatting, so that collect2 parser can + parse it again for g++ -frepo (#187142) + +* Thu Mar 9 2006 Alexandre Oliva 2.16.91.0.6-4 +- fix relaxation of TLS GD to LE on PPC (#184590) + +* Fri Mar 3 2006 Jakub Jelinek 2.16.91.0.6-3 +- support DW_CFA_val_{offset,offset_sf,expression} in readelf/objdump + +* Tue Feb 28 2006 Jakub Jelinek 2.16.91.0.6-2 +- add MNI support on i?86/x86_64 (#183080) +- support S signal frame augmentation flag in .eh_frame, + add .cfi_signal_frame support (#175951, PR other/26208, BZ#300) + +* Tue Feb 14 2006 Jakub Jelinek 2.16.91.0.6-1 +- update to 2.16.91.0.6 + - fix ppc64 --gc-sections + - disassembler fixes for x86_64 cr/debug regs + - fix linker search order for DT_NEEDED libs + +* Mon Jan 02 2006 Jakub Jelinek 2.16.91.0.5-1 +- update to 2.16.91.0.5 +- don't error about .toc1 references to discarded sectiosn on ppc64 + (#175944) + +* Wed Dec 14 2005 Jakub Jelinek 2.16.91.0.3-2 +- put .gnu.linkonce.d.rel.ro.* sections into relro region + +* Fri Dec 09 2005 Jesse Keating +- rebuilt + +* Fri Nov 11 2005 Jakub Jelinek 2.16.91.0.3-1 +- update to 2.16.91.0.3 +- add .weakref support (Alexandre Oliva, #115157, #165728) + +* Thu Aug 18 2005 Jakub Jelinek 2.16.91.0.2-4 +- install-info also configure.info +- update standards.texi from gnulib (#165530) + +* Tue Aug 16 2005 Jakub Jelinek 2.16.91.0.2-3 +- update to 20050816 CVS +- better fix for ld-cdtest +- fix symbol version script parsing + +* Fri Jul 29 2005 Jakub Jelinek 2.16.91.0.2-2 +- don't complain about relocs to discarded sections in ppc32 + .got2 sections (Alan Modra, PR target/17828) + +* Fri Jul 22 2005 Jakub Jelinek 2.16.91.0.2-1 +- update to 2.16.91.0.2 + +* Thu Jul 21 2005 Jakub Jelinek 2.16.91.0.1-3 +- fix buffer overflow in readelf ia64 unwind printing code +- use vsnprintf rather than vsprintf in gas diagnostics (Tavis Ormandy) +- fix ld-cdtest when CFLAGS contains -fexceptions + +* Wed Jul 20 2005 Jakub Jelinek 2.16.91.0.1-2 +- update to 20050720 CVS + +* Mon Jul 11 2005 Jakub Jelinek 2.16.91.0.1-1 +- update to 2.16.91.0.1 plus 20050708 CVS + +* Wed Jun 15 2005 Jakub Jelinek 2.16.90.0.3-1 +- update to 2.16.90.0.3 +- update to 20050615 CVS + - ppc32 secure PLT support (Alan Modra) +- further bfd/readelf robustification + +* Sat Jun 11 2005 Jakub Jelinek 2.15.94.0.2.2-4 +- further bfd robustification (CAN-2005-1704, #158680) + +* Fri Jun 10 2005 Jakub Jelinek 2.15.94.0.2.2-3 +- further objdump and readelf robustification (CAN-2005-1704, #158680) + +* Wed May 25 2005 Jakub Jelinek 2.15.94.0.2.2-2 +- bfd and readelf robustification (CAN-2005-1704, #158680) + +* Tue Mar 29 2005 Jakub Jelinek 2.15.94.0.2.2-1 +- update to 2.15.94.0.2.2 +- speed up walk_wild_section (Robert O'Callahan) + +* Mon Mar 7 2005 Jakub Jelinek 2.15.94.0.2-4 +- rebuilt with GCC 4 + +* Mon Feb 28 2005 Jakub Jelinek 2.15.94.0.2-3 +- fix buffer overflows in readelf (#149506) +- move c++filt to binutils from gcc-c++, conflict with gcc-c++ < 4.0 (#86333) + +* Thu Feb 10 2005 Jakub Jelinek 2.15.94.0.2-1 +- update to 2.15.94.0.2 +- fix .note.GNU-stack/PT_GNU_STACK computation in linker on ppc64 (#147296) +- fix stripping of binaries/libraries that have empty sections right before + .dynamic section (with the same starting address; #144038) +- handle AS_NEEDED (...) in linker script INPUT/GROUP + +* Tue Dec 14 2004 Jakub Jelinek 2.15.92.0.2-11 +- fix a longstanding -z relro bug + +* Mon Dec 13 2004 Jakub Jelinek 2.15.92.0.2-10 +- avoid unnecessary gap with -z relro showing on i686 libc.so +- ppc64 --emit-relocs fix (Alan Modra) +- don't crash if STT_SECTION symbol has incorrect st_shndx (e.g. SHN_ABS, + as created by nasm; #142181) +- don't try to make absptr LSDAs relative if they don't have relocations + against them (Alan Modra, #141162) + +* Wed Oct 27 2004 Jakub Jelinek 2.15.92.0.2-5.EL4 +- fix ar xo (#104344) + +* Wed Oct 20 2004 Jakub Jelinek 2.15.92.0.2-5 +- fix --just-symbols on ppc64 (Alan Modra, #135498) + +* Fri Oct 15 2004 Jakub Jelinek 2.15.92.0.2-4 +- fix code detecting matching linkonce and single member comdat + group sections (#133078) + +* Mon Oct 11 2004 Jakub Jelinek 2.15.92.0.2-3 +- revert Sep 09 change to make ppc L second argument e.g. for tlbie + non-optional +- fix stripping of prelinked binaries and libraries (#133734) +- allow strings(1) on 32-bit arches to be used again with > 2GB + files (#133555) + +* Mon Oct 4 2004 Jakub Jelinek 2.15.92.0.2-2 +- update to 2.15.92.0.2 +- change ld's ld.so.conf parser to match ldconfig's (#129340) + +* Mon Sep 20 2004 Jakub Jelinek 2.15.91.0.2-9 +- avoid almost 1MB (sparse) gaps in the middle of -z relro + libraries on x86-64 (Andreas Schwab) +- fix -z relro to make sure end of PT_GNU_RELRO segment is always + COMMONPAGESIZE aligned + +* Wed Aug 18 2004 Jakub Jelinek 2.15.91.0.2-8 +- fix linker segfaults on input objects with SHF_LINK_ORDER with + incorrect sh_link (H.J.Lu, Nick Clifton, #130198, BZ #290) + +* Wed Aug 18 2004 Jakub Jelinek 2.15.91.0.2-7 +- resolve all undefined ppc64 .* syms to the function bodies through + .opd, not just those used in brach instructions (Alan Modra) + +* Tue Aug 17 2004 Jakub Jelinek 2.15.91.0.2-6 +- fix ppc64 ld --dotsyms (Alan Modra) + +* Tue Aug 17 2004 Jakub Jelinek 2.15.91.0.2-5 +- various ppc64 make check fixes when using non-dot-syms gcc (Alan Modra) +- fix --gc-sections +- on ia64 create empty .gnu.linkonce.ia64unw*.* sections for + .gnu.linkonce.t.* function doesn't need unwind info + +* Mon Aug 16 2004 Jakub Jelinek 2.15.91.0.2-4 +- kill ppc64 dot symbols (Alan Modra) +- objdump -d support for objects without dot symbols +- support for overlapping ppc64 .opd entries + +* Mon Aug 9 2004 Jakub Jelinek 2.15.91.0.2-3 +- fix a newly introduced linker crash on x86-64 + +* Sun Aug 8 2004 Alan Cox 2.15.91.0.2-2 +- BuildRequire bison and macroise buildroot - from Steve Grubb + +* Fri Jul 30 2004 Jakub Jelinek 2.15.91.0.2-1 +- update to 2.15.91.0.2 +- BuildRequire flex (#117763) + +* Wed May 19 2004 Jakub Jelinek 2.15.90.0.3-7 +- use lib64 instead of lib directories on ia64 if %%{_lib} is + set to lib64 by rpm + +* Sat May 15 2004 Jakub Jelinek 2.15.90.0.3-6 +- fix a bug introduced in the ++/-- rejection patch + from 2.15.90.0.3 (Alan Modra) + +* Tue May 4 2004 Jakub Jelinek 2.15.90.0.3-5 +- fix s390{,x} .{,b,p2}align handling +- ppc/ppc64 testsuite fix + +* Mon May 3 2004 Jakub Jelinek 2.15.90.0.3-4 +- -z relro ppc/ppc64/ia64 fixes +- change x86-64 .plt symbol st_size handling to match ia32 +- prettify objdump -d output + +* Tue Apr 20 2004 Jakub Jelinek 2.15.90.0.3-3 +- several SPARC fixes + +* Sun Apr 18 2004 Jakub Jelinek 2.15.90.0.3-2 +- yet another fix for .tbss handling + +* Fri Apr 16 2004 Jakub Jelinek 2.15.90.0.3-1 +- update to 2.15.90.0.3 + +* Fri Mar 26 2004 Jakub Jelinek 2.15.90.0.1.1-2 +- update to 20040326 CVS + - fix ppc64 weak .opd symbol handling (Alan Modra, #119086) +- fix .tbss handling bug introduced + +* Fri Mar 26 2004 Jakub Jelinek 2.15.90.0.1.1-1 +- update to 2.15.90.0.1.1 + +* Sat Feb 21 2004 Jakub Jelinek 2.14.90.0.8-8 +- with -z now without --enable-new-dtags create DT_BIND_NOW + dynamic entry in addition to DT_FLAGS_1 with DF_1_NOW bit set + +* Fri Feb 20 2004 Jakub Jelinek 2.14.90.0.8-7 +- fix -pie on ppc32 + +* Fri Feb 20 2004 Jakub Jelinek 2.14.90.0.8-6 +- clear .plt sh_entsize on sparc32 +- put whole .got into relro area with -z now -z relro + +* Fri Feb 13 2004 Elliot Lee +- rebuilt + +* Thu Jan 22 2004 Jakub Jelinek 2.14.90.0.8-4 +- fix -pie on IA64 + +* Mon Jan 19 2004 Jakub Jelinek 2.14.90.0.8-3 +- fix testcases on s390 and s390x + +* Fri Jan 16 2004 Jakub Jelinek 2.14.90.0.8-2 +- fix testcases on AMD64 +- fix .got's sh_entsize on IA32/AMD64 +- set COMMONPAGESIZE on s390/s390x +- set COMMONPAGESIZE on ppc32 (Alan Modra) + +* Fri Jan 16 2004 Jakub Jelinek 2.14.90.0.8-1 +- update to 2.14.90.0.8 + +* Tue Jan 13 2004 Jakub Jelinek 2.14.90.0.7-4 +- fix -z relro on 64-bit arches + +* Mon Jan 12 2004 Jakub Jelinek 2.14.90.0.7-3 +- fix some bugs in -z relro support + +* Fri Jan 9 2004 Jakub Jelinek 2.14.90.0.7-2 +- -z relro support, reordering of RW sections + +* Fri Jan 9 2004 Jakub Jelinek 2.14.90.0.7-1 +- update to 2.14.90.0.7 + +* Mon Nov 24 2003 Jakub Jelinek 2.14.90.0.6-4 +- fix assembly parsing of foo=(.-bar)/4 (Alan Modra) +- fix IA-64 assembly parsing of (p7) hint @pause + +* Tue Sep 30 2003 Jakub Jelinek 2.14.90.0.6-3 +- don't abort on some linker warnings/errors on IA-64 + +* Sat Sep 20 2003 Jakub Jelinek 2.14.90.0.6-2 +- fix up merge2.s to use .p2align instead of .align + +* Sat Sep 20 2003 Jakub Jelinek 2.14.90.0.6-1 +- update to 2.14.90.0.6 +- speed up string merging (Lars Knoll, Michael Matz, Alan Modra) +- speed up IA-64 local symbol handling during linking + +* Fri Sep 5 2003 Jakub Jelinek 2.14.90.0.5-7 +- avoid ld -s segfaults introduced in 2.14.90.0.5-5 (Dmitry V. Levin, + #103180) + +* Fri Aug 29 2003 Jakub Jelinek 2.14.90.0.5-6 +- build old demangler into libiberty.a (#102268) +- SPARC .cfi* support + +* Tue Aug 5 2003 Jakub Jelinek 2.14.90.0.5-5 +- fix orphan section placement + +* Tue Jul 29 2003 Jakub Jelinek 2.14.90.0.5-4 +- fix ppc64 elfvsb linker tests +- some more 64-bit cleanliness fixes, give ppc64 fdesc symbols + type and size (Alan Modra) + +* Tue Jul 29 2003 Jakub Jelinek 2.14.90.0.5-3 +- fix 64-bit unclean code in ppc-opc.c + +* Mon Jul 28 2003 Jakub Jelinek 2.14.90.0.5-2 +- fix 64-bit unclean code in tc-ppc.c + +* Mon Jul 28 2003 Jakub Jelinek 2.14.90.0.5-1 +- update to 2.14.90.0.5 +- fix ld -r on ppc64 (Alan Modra) + +* Fri Jul 18 2003 Jakub Jelinek 2.14.90.0.4-23 +- rebuilt + +* Thu Jul 17 2003 Jakub Jelinek 2.14.90.0.4-22 +- fix elfNN_ia64_dynamic_symbol_p (Richard Henderson, #86661) +- don't access memory beyond what was allocated in readelf + (Richard Henderson) + +* Thu Jul 10 2003 Jakub Jelinek 2.14.90.0.4-21 +- add .cfi_* support on ppc{,64} and s390{,x} + +* Tue Jul 8 2003 Jakub Jelinek 2.14.90.0.4-20 +- remove lib{bfd,opcodes}.la (#98190) + +* Mon Jul 7 2003 Jakub Jelinek 2.14.90.0.4-19 +- fix -pie support on amd64, s390, s390x and ppc64 +- issue relocation overflow errors for s390/s390x -fpic code when + accessing .got slots above 4096 bytes from .got start + +* Thu Jul 3 2003 Jakub Jelinek 2.14.90.0.4-18 +- rebuilt + +* Thu Jul 3 2003 Jakub Jelinek 2.14.90.0.4-17 +- fix ia64 -pie support +- require no undefined non-weak symbols in PIEs like required for normal + binaries + +* Wed Jul 2 2003 Jakub Jelinek 2.14.90.0.4-16 +- fix readelf -d on IA-64 +- build libiberty.a with -fPIC, so that it can be lined into shared + libraries + +* Wed Jun 25 2003 Jakub Jelinek 2.14.90.0.4-15 +- rebuilt + +* Wed Jun 25 2003 Jakub Jelinek 2.14.90.0.4-14 +- added support for Intel Prescott instructions +- fix hint@pause for ia64 +- add workaround for LTP sillyness (#97934) + +* Wed Jun 18 2003 Jakub Jelinek 2.14.90.0.4-13 +- update CFI stuff to 2003-06-18 +- make sure .eh_frame is aligned to 8 bytes on 64-bit arches, + remove padding within one .eh_frame section + +* Tue Jun 17 2003 Jakub Jelinek 2.14.90.0.4-12 +- rebuilt + +* Tue Jun 17 2003 Jakub Jelinek 2.14.90.0.4-11 +- one more fix for the same patch + +* Tue Jun 17 2003 Jakub Jelinek 2.14.90.0.4-10 +- fix previous patch + +* Mon Jun 16 2003 Jakub Jelinek 2.14.90.0.4-9 +- ensure R_PPC64_{RELATIVE,ADDR64} have *r_offset == r_addend + and the other relocs have *r_offset == 0 + +* Tue Jun 10 2003 Jakub Jelinek 2.14.90.0.4-8 +- remove some unnecessary provides in ppc64 linker script + which were causing e.g. empty .ctors/.dtors section creation + +* Fri Jun 6 2003 Jakub Jelinek 2.14.90.0.4-7 +- some CFI updates/fixes +- don't create dynamic relocations against symbols defined in PIE + exported from its .dynsym + +* Wed Jun 4 2003 Jakub Jelinek 2.14.90.0.4-6 +- update gas to 20030604 +- PT_GNU_STACK support + +* Mon Jun 2 2003 Jakub Jelinek 2.14.90.0.4-5 +- buildrequire gettext (#91838) + +* Sat May 31 2003 Jakub Jelinek 2.14.90.0.4-4 +- fix shared libraries with >= 8192 .plt slots on ppc32 + +* Thu May 29 2003 Jakub Jelinek 2.14.90.0.4-3 +- rebuilt + +* Thu May 29 2003 Jakub Jelinek 2.14.90.0.4-2 +- rename ld --dynamic option to --pic-executable or --pie +- fix ld --help output +- document --pie/--pic-executable in ld.info and ld.1 + +* Wed May 28 2003 Jakub Jelinek 2.14.90.0.4-1 +- update to 2.14.90.0.4-1 +- gas CFI updates (Richard Henderson) +- dynamic executables (Ulrich Drepper) + +* Tue May 20 2003 Jakub Jelinek 2.14.90.0.2-2 +- fix ELF visibility handling +- tidy plt entries on IA-32, ppc and ppc64 + +* Mon May 19 2003 Jakub Jelinek 2.14.90.0.2-1 +- update to 2.14.90.0.2-1 + +* Tue May 13 2003 Jakub Jelinek 2.13.90.0.20-8 +- fix bfd_elf_hash on 64-bit arches (Andrew Haley) + +* Wed Apr 30 2003 Jakub Jelinek 2.13.90.0.20-7 +- rebuilt + +* Mon Apr 14 2003 Jakub Jelinek 2.13.90.0.20-6 +- optimize DW_CFA_advance_loc4 in gas even if there is 'z' augmentation + with size 0 in FDE + +* Fri Apr 11 2003 Jakub Jelinek 2.13.90.0.20-5 +- fix SPARC build + +* Thu Apr 3 2003 Jakub Jelinek 2.13.90.0.20-4 +- fix ppc32 plt reference counting +- don't include %%{_prefix}/%%{_lib}/debug in the non-debuginfo package + (#87729) + +* Mon Mar 31 2003 Jakub Jelinek 2.13.90.0.20-3 +- make elf64ppc target native extra on ppc and elf32ppc native extra + on ppc64. + +* Fri Mar 28 2003 Jakub Jelinek 2.13.90.0.20-2 +- fix TLS on IA-64 with ld relaxation + +* Sat Mar 22 2003 Jakub Jelinek 2.13.90.0.20-1 +- update to 2.13.90.0.20 + +* Mon Feb 24 2003 Jakub Jelinek 2.13.90.0.18-9 +- rebuilt + +* Mon Feb 24 2003 Jakub Jelinek 2.13.90.0.18-8 +- don't strip binaries in %%install, so that there is non-empty + debuginfo + +* Mon Feb 24 2003 Jakub Jelinek 2.13.90.0.18-7 +- don't optimize .eh_frame during ld -r + +* Thu Feb 13 2003 Jakub Jelinek 2.13.90.0.18-6 +- don't clear elf_link_hash_flags in the .symver patch +- only use TC_FORCE_RELOCATION in s390's TC_FORCE_RELOCATION_SUB_SAME + (Alan Modra) + +* Mon Feb 10 2003 Jakub Jelinek 2.13.90.0.18-5 +- fix the previous .symver change +- remove libbfd.so and libopcodes.so symlinks, so that other packages + link statically, not dynamically against libbfd and libopcodes + whose ABI is everything but stable + +* Mon Feb 10 2003 Jakub Jelinek 2.13.90.0.18-4 +- do .symver x, x@FOO handling earlier +- support .file and .loc on s390* + +* Mon Feb 10 2003 Jakub Jelinek 2.13.90.0.18-3 +- handle .symver x, x@FOO in ld such that relocs against x become + dynamic relocations against x@FOO (#83325) +- two PPC64 TLS patches (Alan Modra) + +* Sun Feb 09 2003 Jakub Jelinek 2.13.90.0.18-2 +- fix SEARCH_DIR on x86_64/s390x +- fix Alpha --relax +- create DT_RELA{,SZ,ENT} on s390 even if there is just .rela.plt + and no .rela.dyn section +- support IA-32 on IA-64 (#83752) +- .eh_frame_hdr fix (Andreas Schwab) + +* Thu Feb 06 2003 Jakub Jelinek 2.13.90.0.18-1 +- update to 2.13.90.0.18 + 20030121->20030206 CVS diff + +* Tue Feb 04 2003 Jakub Jelinek 2.13.90.0.16-8 +- alpha TLS fixes +- use .debug_line directory table to make the section tiny bit smaller +- libtool fix from Jens Petersen + +* Sun Feb 02 2003 Jakub Jelinek 2.13.90.0.16-7 +- sparc32 TLS + +* Fri Jan 24 2003 Jakub Jelinek 2.13.90.0.16-6 +- s390{,x} TLS and two other mainframe patches + +* Fri Jan 17 2003 Jakub Jelinek 2.13.90.0.16-5 +- fix IA-64 TLS IE in shared libs +- .{preinit,init,fini}_array compat hack from Alexandre Oliva + +* Thu Jan 16 2003 Jakub Jelinek 2.13.90.0.16-4 +- IA-64 TLS fixes +- fix .plt sh_entsize on Alpha +- build with %%_smp_mflags + +* Sat Nov 30 2002 Jakub Jelinek 2.13.90.0.16-3 +- fix strip on TLS binaries and libraries + +* Fri Nov 29 2002 Jakub Jelinek 2.13.90.0.16-2 +- fix IA-64 ld bootstrap + +* Thu Nov 28 2002 Jakub Jelinek 2.13.90.0.16-1 +- update to 2.13.90.0.16 +- STT_TLS SHN_UNDEF fix + +* Wed Nov 27 2002 Jakub Jelinek 2.13.90.0.10-4 +- pad .rodata.cstNN sections at the end if they aren't sized to multiple + of sh_entsize +- temporary patch to make .eh_frame and .gcc_except_table sections + readonly if possible (should be removed when AUTO_PLACE is implemented) +- fix .PPC.EMB.apuinfo section flags + +* Wed Oct 23 2002 Jakub Jelinek 2.13.90.0.10-3 +- fix names and content of alpha non-alloced .rela.* sections (#76583) +- delete unpackaged files from the buildroot + +* Tue Oct 15 2002 Jakub Jelinek 2.13.90.0.10-2 +- enable s390x resp. s390 emulation in linker too + +* Mon Oct 14 2002 Jakub Jelinek 2.13.90.0.10-1 +- update to 2.13.90.0.10 +- add a bi-arch patch for sparc/s390/x86_64 +- add --enable-64-bit-bfd on sparc, s390 and ppc + +* Thu Oct 10 2002 Jakub Jelinek 2.13.90.0.4-3 +- fix combreloc testcase + +* Thu Oct 10 2002 Jakub Jelinek 2.13.90.0.4-2 +- fix orphan .rel and .rela section placement with -z combreloc (Alan Modra) +- skip incompatible linker scripts when searching for libraries + +* Tue Oct 1 2002 Jakub Jelinek 2.13.90.0.4-1 +- update to 2.13.90.0.4 +- x86-64 TLS support +- some IA-32 TLS fixes +- some backported patches from trunk +- include opcodes, ld, gas and bfd l10n too + +* Thu Sep 19 2002 Jakub Jelinek 2.13.90.0.2-3 +- allow addends for IA-32 TLS @tpoff, @ntpoff and @dtpoff +- clear memory at *r_offset of dynamic relocs on PPC +- avoid ld crash if accessing non-local symbols through LE relocs +- new IA-32 TLS relocs, bugfixes and testcases +- use brl insn on IA-64 (Richard Henderson) +- fix R_IA64_PCREL21{M,F} handling (Richard Henderson) +- build in separate builddir, so that gasp tests don't fail +- include localization + +* Thu Aug 8 2002 Jakub Jelinek 2.13.90.0.2-2 +- fix R_386_TPOFF32 addends (#70824) + +* Sat Aug 3 2002 Jakub Jelinek 2.13.90.0.2-1 +- update to 2.13.90.0.2 + - fix ld TLS assertion failure (#70084) + - fix readelf --debug-dump= handling to match man page and --help + (#68997) +- fix _GLOBAL_OFFSET_TABLE gas handling (#70241) + +* Wed Jul 24 2002 Jakub Jelinek 2.12.90.0.15-1 +- update to 2.12.90.0.15 +- TLS .tbss fix +- don't use rpm %%configure macro, it is broken too often (#69366) + +* Thu May 30 2002 Jakub Jelinek 2.12.90.0.9-1 +- update to 2.12.90.0.9 + - TLS support +- remove gasp.info from %%post/%%preun (#65400) + +* Mon Apr 29 2002 Jakub Jelinek 2.12.90.0.7-1 +- update to 2.12.90.0.7 +- run make check + +* Mon Apr 29 2002 Jakub Jelinek 2.11.93.0.2-12 +- fix .hidden handling on SPARC (Richard Henderson) +- don't crash when linking -shared non-pic code with SHF_MERGE +- fix .eh_frame_hdr for DW_EH_PE_aligned +- correctly adjust DW_EH_PE_pcrel encoded personalities in CIEs + +* Fri Apr 5 2002 Jakub Jelinek 2.11.93.0.2-11 +- don't emit dynamic R_SPARC_DISP* relocs against STV_HIDDEN symbols + into shared libraries + +* Thu Mar 21 2002 Jakub Jelinek 2.11.93.0.2-10 +- don't merge IA-64 unwind info sections together during ld -r + +* Mon Mar 11 2002 Jakub Jelinek 2.11.93.0.2-9 +- fix DATA_SEGMENT_ALIGN on ia64/alpha/sparc/sparc64 + +* Fri Mar 8 2002 Jakub Jelinek 2.11.93.0.2-8 +- don't crash on SHN_UNDEF local dynsyms (Andrew MacLeod) + +* Thu Mar 7 2002 Jakub Jelinek 2.11.93.0.2-7 +- fix bfd configury bug (Alan Modra) + +* Tue Mar 5 2002 Jakub Jelinek 2.11.93.0.2-6 +- don't copy visibility when equating symbols +- fix alpha .text/.data with .previous directive bug + +* Tue Mar 5 2002 Jakub Jelinek 2.11.93.0.2-5 +- fix SHF_MERGE crash with --gc-sections (#60369) +- C++ symbol versioning patch + +* Fri Feb 22 2002 Jakub Jelinek 2.11.93.0.2-4 +- add DW_EH_PE_absptr -> DW_EH_PE_pcrel optimization for shared libs, + if DW_EH_PE_absptr cannot be converted that way, don't build the + .eh_frame_hdr search table + +* Fri Feb 15 2002 Jakub Jelinek 2.11.93.0.2-3 +- fix ld -N broken by last patch + +* Tue Feb 12 2002 Jakub Jelinek 2.11.93.0.2-2 +- trade one saved runtime page for data segment (=almost always not shared) + for up to one page of disk space where possible + +* Fri Feb 8 2002 Jakub Jelinek 2.11.93.0.2-1 +- update to 2.11.93.0.2 +- use %%{ix86} instead of i386 for -z combreloc default (#59086) + +* Thu Jan 31 2002 Jakub Jelinek 2.11.92.0.12-10 +- don't create SHN_UNDEF STB_WEAK symbols unless there are any relocations + against them + +* Wed Jan 30 2002 Bill Nottingham 2.11.92.0.12-9.1 +- rebuild (fix ia64 miscompilation) + +* Wed Jan 09 2002 Tim Powers +- automated rebuild + +* Fri Dec 28 2001 Jakub Jelinek 2.11.92.0.12-8 +- two further .eh_frame patch fixes + +* Wed Dec 19 2001 Jakub Jelinek 2.11.92.0.12-7 +- as ld is currently not able to shrink input sections to zero size + during discard_info, build a fake minimal CIE in that case +- update elf-strtab patch to what was commited + +* Mon Dec 17 2001 Jakub Jelinek 2.11.92.0.12-6 +- one more .eh_frame patch fix +- fix alpha .eh_frame handling +- optimize elf-strtab finalize + +* Sat Dec 15 2001 Jakub Jelinek 2.11.92.0.12-5 +- yet another fix for the .eh_frame patch + +* Fri Dec 14 2001 Jakub Jelinek 2.11.92.0.12-4 +- Alan Modra's patch to avoid crash if there is no dynobj + +* Thu Dec 13 2001 Jakub Jelinek 2.11.92.0.12-3 +- H.J.'s patch to avoid crash if input files are not ELF +- don't crash if a SHF_MERGE for some reason could not be merged +- fix objcopy/strip to preserve SHF_MERGE sh_entsize +- optimize .eh_frame sections, add PT_GNU_EH_FRAME support +- support anonymous version tags in version script + +* Tue Nov 27 2001 Jakub Jelinek 2.11.92.0.12-2 +- fix IA-64 SHF_MERGE handling + +* Tue Nov 27 2001 Jakub Jelinek 2.11.92.0.12-1 +- update to 2.11.92.0.12 + - optimize .dynstr and .shstrtab sections (#55524) + - fix ld.1 glitch (#55459) +- turn relocs against SHF_MERGE local symbols with zero addend + into STT_SECTION + addend +- remove man pages for programs not included (nlmconv, windres, dlltool; + #55456, #55461) +- add BuildRequires for texinfo + +* Thu Oct 25 2001 Jakub Jelinek 2.11.92.0.7-2 +- duh, fix strings on bfd objects (#55084) + +* Sat Oct 20 2001 Jakub Jelinek 2.11.92.0.7-1 +- update to 2.11.92.0.7 +- remove .rel{,a}.dyn from output if it is empty + +* Thu Oct 11 2001 Jakub Jelinek 2.11.92.0.5-2 +- fix strings patch +- use getc_unlocked in strings to speed it up by 50% on large files + +* Wed Oct 10 2001 Jakub Jelinek 2.11.92.0.5-1 +- update to 2.11.92.0.5 + - binutils localization (#45148) + - fix typo in REPORT_BUGS_TO (#54325) +- support files bigger than 2GB in strings (#54406) + +* Wed Sep 26 2001 Jakub Jelinek 2.11.90.0.8-12 +- on IA-64, don't mix R_IA64_IPLTLSB relocs with non-PLT relocs in + .rela.dyn section. + +* Tue Sep 25 2001 Jakub Jelinek 2.11.90.0.8-11 +- add iplt support for IA-64 (Richard Henderson) +- switch to new section flags for SHF_MERGE and SHF_STRINGS, put + in compatibility code +- "s" section flag for small data sections on IA-64 and Alpha + (Richard Henderson) +- fix sparc64 .plt[32768+] handling +- don't emit .rela.stab on sparc + +* Mon Sep 10 2001 Jakub Jelinek 2.11.90.0.8-10 +- fix SHF_MERGE on Sparc + +* Fri Aug 31 2001 Jakub Jelinek 2.11.90.0.8-9 +- on Alpha, copy *r_offset to R_ALPHA_RELATIVE's r_addend + +* Thu Aug 30 2001 Jakub Jelinek 2.11.90.0.8-8 +- on IA-64, put crtend{,S}.o's .IA_64.unwind section last in + .IA_64.unwind output section (for compatibility with 7.1 eh) + +* Fri Aug 24 2001 Jakub Jelinek 2.11.90.0.8-7 +- put RELATIVE relocs first, not last +- enable -z combreloc by default on IA-{32,64}, Alpha, Sparc* + +* Thu Aug 23 2001 Jakub Jelinek 2.11.90.0.8-6 +- support for -z combreloc +- remove .dynamic patch, -z combreloc patch does this better +- set STT_FUNC default symbol sizes in .endp directive on IA-64 + +* Mon Jul 16 2001 Jakub Jelinek 2.11.90.0.8-5 +- fix last patch (H.J.Lu) + +* Fri Jul 13 2001 Jakub Jelinek 2.11.90.0.8-4 +- fix placing of orphan sections + +* Sat Jun 23 2001 Jakub Jelinek +- fix SHF_MERGE support on Alpha + +* Fri Jun 8 2001 Jakub Jelinek +- 2.11.90.0.8 + - some SHF_MERGE suport fixes +- don't build with tooldir /usrusr instead of /usr (#40937) +- reserve few .dynamic entries for prelinking + +* Mon Apr 16 2001 Jakub Jelinek +- 2.11.90.0.5 + - SHF_MERGE support + +* Tue Apr 3 2001 Jakub Jelinek +- 2.11.90.0.4 + - fix uleb128 support, so that CVS gcc bootstraps + - some ia64 fixes + +* Mon Mar 19 2001 Jakub Jelinek +- add -Bgroup support from Ulrich Drepper + +* Fri Mar 9 2001 Jakub Jelinek +- hack - add elf_i386_glibc21 emulation + +* Fri Feb 16 2001 Jakub Jelinek +- 2.10.91.0.2 + +* Fri Feb 9 2001 Jakub Jelinek +- 2.10.1.0.7 +- remove ExcludeArch ia64 +- back out the -oformat, -omagic and -output change for now + +* Fri Dec 15 2000 Jakub Jelinek +- Prereq /sbin/install-info + +* Tue Nov 21 2000 Jakub Jelinek +- 2.10.1.0.2 + +* Tue Nov 21 2000 Jakub Jelinek +- add one more alpha patch + +* Wed Nov 15 2000 Jakub Jelinek +- fix alpha visibility as problem +- add support for Ultra-III + +* Fri Sep 15 2000 Jakub Jelinek +- and one more alpha patch + +* Fri Sep 15 2000 Jakub Jelinek +- two sparc patches + +* Mon Jul 24 2000 Jakub Jelinek +- 2.10.0.18 + +* Mon Jul 10 2000 Jakub Jelinek +- 2.10.0.12 + +* Mon Jun 26 2000 Jakub Jelinek +- 2.10.0.9 + +* Thu Jun 15 2000 Jakub Jelinek +- fix ld -r + +* Mon Jun 5 2000 Jakub Jelinek +- 2.9.5.0.46 +- use _mandir/_infodir/_lib + +* Mon May 8 2000 Bernhard Rosenkraenzer +- 2.9.5.0.41 + +* Wed Apr 12 2000 Bernhard Rosenkraenzer +- 2.9.5.0.34 + +* Wed Mar 22 2000 Bernhard Rosenkraenzer +- 2.9.5.0.31 + +* Fri Feb 04 2000 Cristian Gafton +- man pages are compressed +- apply kingdon's patch from #5031 + +* Wed Jan 19 2000 Jeff Johnson +- Permit package to be built with a prefix other than /usr. + +* Thu Jan 13 2000 Cristian Gafton +- add pacth from hjl to fix the versioning problems in ld + +* Tue Jan 11 2000 Bernhard Rosenkraenzer +- Add sparc patches from Jakub Jelinek +- Add URL: + +* Tue Dec 14 1999 Bernhard Rosenkraenzer +- 2.9.5.0.22 + +* Wed Nov 24 1999 Bernhard Rosenkraenzer +- 2.9.5.0.19 + +* Sun Oct 24 1999 Bernhard Rosenkraenzer +- 2.9.5.0.16 + +* Mon Sep 06 1999 Jakub Jelinek +- make shared non-pic libraries work on sparc with glibc 2.1. + +* Fri Aug 27 1999 Jim Kingdon +- No source/spec changes, just rebuilding with egcs-1.1.2-18 because + the older egcs was miscompling gprof. + +* Mon Apr 26 1999 Cristian Gafton +- back out very *stupid* sparc patch done by HJLu. People, keep out of + things you don't understand. +- add alpha relax patch from rth + +* Mon Apr 05 1999 Cristian Gafton +- version 2.9.1.0.23 +- patch to make texinfo documentation compile +- auto rebuild in the new build environment (release 2) + +* Tue Feb 23 1999 Cristian Gafton +- updated to 2.9.1.0.21 +- merged with UltraPenguin + +* Mon Jan 04 1999 Cristian Gafton +- added ARM patch from philb +- version 2.9.1.0.19a +- added a patch to allow arm* arch to be identified as an ARM + +* Thu Oct 01 1998 Cristian Gafton +- updated to 2.9.1.0.14. + +* Sat Sep 19 1998 Jeff Johnson +- updated to 2.9.1.0.13. + +* Wed Sep 09 1998 Cristian Gafton +- updated to 2.9.1.0.12 + +* Thu Jul 2 1998 Jeff Johnson +- updated to 2.9.1.0.7. + +* Wed Jun 03 1998 Jeff Johnson +- updated to 2.9.1.0.6. + +* Tue Jun 02 1998 Erik Troan +- added patch from rth to get right offsets for sections in relocateable + objects on sparc32 + +* Thu May 07 1998 Prospector System +- translations modified for de, fr, tr + +* Tue May 05 1998 Cristian Gafton +- version 2.9.1.0.4 is out; even more, it is public ! + +* Tue May 05 1998 Jeff Johnson +- updated to 2.9.1.0.3. + +* Mon Apr 20 1998 Cristian Gafton +- updated to 2.9.0.3 + +* Tue Apr 14 1998 Cristian Gafton +- upgraded to 2.9.0.2 + +* Sun Apr 05 1998 Cristian Gafton +- updated to 2.8.1.0.29 (HJ warned me that this thing is a moving target... + :-) +- "fixed" the damn make install command so that all tools get installed + +* Thu Apr 02 1998 Cristian Gafton +- upgraded again to 2.8.1.0.28 (at least on alpha now egcs will compile) +- added info packages handling + +* Tue Mar 10 1998 Cristian Gafton +- upgraded to 2.8.1.0.23 + +* Mon Mar 02 1998 Cristian Gafton +- updated to 2.8.1.0.15 (required to compile the newer glibc) +- all patches are obsoleted now + +* Wed Oct 22 1997 Erik Troan +- added 2.8.1.0.1 patch from hj +- added patch for alpha palcode form rth diff --git a/sources b/sources new file mode 100644 index 0000000..06e4566 --- /dev/null +++ b/sources @@ -0,0 +1,3 @@ +SHA512 (binutils-2.35.1.tar.xz) = 94ff72708403413b70b247f3af4099ebaa882b6659249869f1ed9941a0f1912e313f08357d470f9fd2359e7f5e5b0eb86285e5eaf883fa8187789d6b1bd304eb +SHA512 (binutils-2.19.50.0.1-output-format.sed) = 2f8686b0c8af13c98cda056824c2820416f6e2d003f70b78ccf5314525b9ee3684d421dfa83e638a2d42d06ea4d4bdaf5226b64d6ec26f7ff59c44ffb2a23dd2 +SHA512 (standards.info.gz) = 52452ec58c9b0045abeb1f7fb29d56a62cd4042edbb5e1685dad5f6932731ace2bf05ec238b2e8d3d851114a2718b511dfc721c996bee8721a873314de7c7358