2013-08-28 19:31:28 +00:00
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Patch carried over from the prior iasl package and updated. This allows
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for builds on systems requiring aligned memory access. Please see
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http://lists.acpica.org/pipermail/devel/2010-July/000159.html. Resolves
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BZ#865013 and BZ#856856.
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--
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Add more platforms to the list of the ones requiring aligned memory access.
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Also fix callsites where wrong assumptions where made in terms of aligment.
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Signed-off-by: Mattia Dongili <malattia@linux.it>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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---
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source/compiler/asltree.c | 15 ++++++++++-----
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source/components/executer/exoparg2.c | 12 +++++++++---
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source/include/actypes.h | 26 +++++++++++++-------------
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3 file modificati, 32 inserzioni(+), 21 rimozioni(-)
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diff --git a/source/compiler/asltree.c b/source/compiler/asltree.c
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index ebf87f3..fd859d7 100644
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--- a/source/compiler/asltree.c
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+++ b/source/compiler/asltree.c
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@@ -577,28 +577,31 @@ TrCreateValuedLeafNode (
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"\nCreateValuedLeafNode Ln/Col %u/%u NewNode %p Op %s Value %8.8X%8.8X ",
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Op->Asl.LineNumber, Op->Asl.Column, Op, UtGetOpName(ParseOpcode),
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ACPI_FORMAT_UINT64 (Value));
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- Op->Asl.Value.Integer = Value;
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switch (ParseOpcode)
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{
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case PARSEOP_STRING_LITERAL:
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- DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Value);
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+ Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
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+ DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Op->Asl.Value.String);
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break;
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case PARSEOP_NAMESEG:
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- DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Value);
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+ Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
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+ DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Op->Asl.Value.String);
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break;
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case PARSEOP_NAMESTRING:
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- DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Value);
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+ Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
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+ DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Op->Asl.Value.String);
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break;
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case PARSEOP_EISAID:
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- DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Value);
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+ Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
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+ DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Op->Asl.Value.String);
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break;
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case PARSEOP_METHOD:
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@@ -608,11 +610,13 @@ TrCreateValuedLeafNode (
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case PARSEOP_INTEGER:
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+ Op->Asl.Value.Integer = Value;
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DbgPrint (ASL_PARSE_OUTPUT, "INTEGER");
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break;
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default:
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+ Op->Asl.Value.Integer = Value;
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break;
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}
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diff --git a/source/components/executer/exoparg2.c b/source/components/executer/exoparg2.c
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index e55f40c..ed5b1fd 100644
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--- a/source/components/executer/exoparg2.c
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+++ b/source/components/executer/exoparg2.c
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@@ -175,6 +176,8 @@ AcpiExOpcode_2A_2T_1R (
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ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
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ACPI_OPERAND_OBJECT *ReturnDesc1 = NULL;
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ACPI_OPERAND_OBJECT *ReturnDesc2 = NULL;
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+ UINT64 ReturnValue1 = 0;
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+ UINT64 ReturnValue2 = 0;
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ACPI_STATUS Status;
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@@ -208,8 +211,10 @@ AcpiExOpcode_2A_2T_1R (
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Status = AcpiUtDivide (Operand[0]->Integer.Value,
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Operand[1]->Integer.Value,
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- &ReturnDesc1->Integer.Value,
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- &ReturnDesc2->Integer.Value);
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+ &ReturnValue1, &ReturnValue2);
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+ ReturnDesc1->Integer.Value = ReturnValue1;
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+ ReturnDesc2->Integer.Value = ReturnValue2;
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+
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if (ACPI_FAILURE (Status))
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{
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goto Cleanup;
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@@ -283,6 +285,7 @@ AcpiExOpcode_2A_1T_1R (
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ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
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ACPI_OPERAND_OBJECT *ReturnDesc = NULL;
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UINT64 Index;
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+ UINT64 ReturnValue = 0;
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ACPI_STATUS Status = AE_OK;
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ACPI_SIZE Length = 0;
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@@ -326,7 +333,8 @@ AcpiExOpcode_2A_1T_1R (
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Status = AcpiUtDivide (Operand[0]->Integer.Value,
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Operand[1]->Integer.Value,
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NULL,
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- &ReturnDesc->Integer.Value);
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+ &ReturnValue);
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+ ReturnDesc->Integer.Value = ReturnValue;
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break;
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case AML_CONCAT_OP: /* Concatenate (Data1, Data2, Result) */
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diff --git a/source/include/actypes.h b/source/include/actypes.h
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index 07fb7d5..08bdf2f 100644
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--- a/source/include/actypes.h
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+++ b/source/include/actypes.h
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2014-02-28 02:42:26 +00:00
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@@ -144,6 +157,19 @@ typedef COMPILER_DEPENDENT_INT64 INT64;
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2013-08-28 19:31:28 +00:00
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*/
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#define ACPI_THREAD_ID UINT64
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+/*
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+ * In the case of the Itanium Processor Family (IPF), the hardware does not
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+ * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
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+ * to indicate that special precautions must be taken to avoid alignment faults.
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+ * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
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+ *
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+ * Note: EM64T and other X86-64 processors support misaligned transfers,
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+ * so there is no need to define this flag.
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+ */
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+#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__)
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+#define ACPI_MISALIGNMENT_NOT_SUPPORTED
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+#endif
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+
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/*******************************************************************************
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*
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2014-02-28 02:42:26 +00:00
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@@ -183,19 +189,6 @@ typedef UINT64 ACPI_PHYSICAL_ADDRESS;
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2013-08-28 19:31:28 +00:00
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#define ACPI_SIZE_MAX ACPI_UINT64_MAX
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#define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */
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-/*
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- * In the case of the Itanium Processor Family (IPF), the hardware does not
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- * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
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- * to indicate that special precautions must be taken to avoid alignment faults.
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- * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
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- *
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- * Note: EM64T and other X86-64 processors support misaligned transfers,
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- * so there is no need to define this flag.
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- */
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-#if defined (__IA64__) || defined (__ia64__)
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-#define ACPI_MISALIGNMENT_NOT_SUPPORTED
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-#endif
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-
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/*******************************************************************************
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*
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--
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1.7.12.1
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