forked from rpms/kernel
		
	
		
			
				
	
	
		
			60 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			60 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From edc7986d4d405daebaf2f66269b353da579fce5f Mon Sep 17 00:00:00 2001
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| From: Christopher Covington <cov@codeaurora.org>
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| Date: Tue, 31 May 2016 16:19:02 -0400
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| Subject: arm64: Workaround for QDF2432 ID_AA64 SR accesses
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| 
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| The ARMv8.0 architecture reserves several system register encodings for
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| future use. These encodings should behave as read-only and always return
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| zero on a read. As described in Errata 94, the CPU cores in the QDF2432
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| errantly cause an instruction abort if an AArch64 MRS instruction attempts
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| to read any of the following system register encodings:
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| 
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| 	Op0, Op1, CRn, CRm,        Op2
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| 	3,   0,   C0,  [C4-C7],    [2-3, 6-7]
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| 	3,   0,   C0,  C3,         [3-7]
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| 	3,   0,   C0,  [C4,C6,C7], [4-5]
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| 	3,   0,   C0,  C2,         [6-7]
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| 
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| Naively projecting ARMv8.0 names, this space includes:
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| 
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| 	ID_AA64PFR[2-7]_EL1
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| 	ID_AA64DFR[2-3]_EL1
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| 	ID_AA64AFR[2-3]_EL1
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| 	ID_AA64ISAR[2-7]_EL1
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| 	ID_AA64MMFR[2-7]_EL1
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| 
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| As of v4.8-rc2, Linux only attempts to query one register in this space,
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| ID_AA64MMFR2_EL1. As simple workaround, skip that access when the affected
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| MIDR is detected.
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| 
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| Signed-off-by: Christopher Covington <cov@codeaurora.org>
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| ---
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|  arch/arm64/kernel/cpuinfo.c | 4 +++-
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|  1 file changed, 3 insertions(+), 1 deletion(-)
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| 
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| diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
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| index ed1b84f..790de6b 100644
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| --- a/arch/arm64/kernel/cpuinfo.c
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| +++ b/arch/arm64/kernel/cpuinfo.c
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| @@ -325,6 +325,8 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
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|  
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|  static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
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|  {
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| +	bool qdf2432_cpu = read_cpuid_id() == 0x510f2811;
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| +
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|  	info->reg_cntfrq = arch_timer_get_cntfrq();
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|  	info->reg_ctr = read_cpuid_cachetype();
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|  	info->reg_dczid = read_cpuid(DCZID_EL0);
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| @@ -337,7 +339,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
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|  	info->reg_id_aa64isar1 = read_cpuid(ID_AA64ISAR1_EL1);
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|  	info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
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|  	info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
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| -	info->reg_id_aa64mmfr2 = read_cpuid(ID_AA64MMFR2_EL1);
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| +	info->reg_id_aa64mmfr2 = qdf2432_cpu ? 0 : read_cpuid(ID_AA64MMFR2_EL1);
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|  	info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
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|  	info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);
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|  
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| -- 
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| cgit v0.12
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| 
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