xz/xz-5.2.5-enable_CET.patch
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Source: https://src.fedoraproject.org/rpms/xz.git#a1cb606d8240e86167942d726dd1ee18ca3c59e9
2021-01-04 11:09:05 +00:00

71 lines
1.8 KiB
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From: H.J. Lu <hjl.tools@gmail.com>
Date: Wed, 23 Dec 2020 15:49:04 +0100 (06:49 -0800)
Subject: [PATCH] liblzma: Enable Intel CET in x86 CRC assembly codes
When Intel CET is enabled, we need to include <cet.h> in assembly codes
to mark Intel CET support and add _CET_ENDBR to indirect jump targets.
Tested on Intel Tiger Lake under CET enabled Linux.
---
src/liblzma/check/crc32_x86.S | 9 +++++++++
src/liblzma/check/crc64_x86.S | 9 +++++++++
2 files changed, 18 insertions(+)
diff --git a/src/liblzma/check/crc32_x86.S b/src/liblzma/check/crc32_x86.S
index 67f68a4..e3745e6 100644
--- a/src/liblzma/check/crc32_x86.S
+++ b/src/liblzma/check/crc32_x86.S
@@ -51,6 +51,14 @@ init_table(void)
* extern uint32_t lzma_crc32(const uint8_t *buf, size_t size, uint32_t crc);
*/
+/* When Intel CET is enabled, include <cet.h> in assembly code to mark
+ Intel CET support. */
+#ifdef __CET__
+# include <cet.h>
+#else
+# define _CET_ENDBR
+#endif
+
/*
* On some systems, the functions need to be prefixed. The prefix is
* usually an underscore.
@@ -83,6 +91,7 @@ init_table(void)
ALIGN(4, 16)
LZMA_CRC32:
+ _CET_ENDBR
/*
* Register usage:
* %eax crc
diff --git a/src/liblzma/check/crc64_x86.S b/src/liblzma/check/crc64_x86.S
index f5bb84b..7ee08f6 100644
--- a/src/liblzma/check/crc64_x86.S
+++ b/src/liblzma/check/crc64_x86.S
@@ -41,6 +41,14 @@ init_table(void)
* extern uint64_t lzma_crc64(const uint8_t *buf, size_t size, uint64_t crc);
*/
+/* When Intel CET is enabled, include <cet.h> in assembly code to mark
+ Intel CET support. */
+#ifdef __CET__
+# include <cet.h>
+#else
+# define _CET_ENDBR
+#endif
+
/*
* On some systems, the functions need to be prefixed. The prefix is
* usually an underscore.
@@ -73,6 +81,7 @@ init_table(void)
ALIGN(4, 16)
LZMA_CRC64:
+ _CET_ENDBR
/*
* Register usage:
* %eax crc LSB
--
2.26.0