b3eda9b80b
- Add valgrind-3.14.0-get_otrack_shadow_offset_wrk-ppc.patch, valgrind-3.14.0-new-strlen-IROps.patch, valgrind-3.14.0-ppc-instr-new-IROps.patch, valgrind-3.14.0-memcheck-new-IROps.patch, valgrind-3.14.0-ppc-frontend-new-IROps.patch, valgrind-3.14.0-transform-popcount64-ctznat64.patch and valgrind-3.14.0-enable-ppc-Iop_Sar_Shr8.patch (#1652926)
83 lines
2.7 KiB
Diff
83 lines
2.7 KiB
Diff
commit cb5d7e047598bff6d0f1d707a70d9fb1a1c7f0e2
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Author: Julian Seward <jseward@acm.org>
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Date: Tue Nov 20 11:46:55 2018 +0100
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VEX/priv/ir_opt.c
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fold_Expr: transform PopCount64(And64(Add64(x,-1),Not64(x))) into CtzNat64(x).
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This is part of the fix for bug 386945.
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diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c
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index f40870b..23964be 100644
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--- a/VEX/priv/ir_opt.c
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+++ b/VEX/priv/ir_opt.c
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@@ -1377,6 +1377,8 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e )
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case Iex_Unop:
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/* UNARY ops */
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if (e->Iex.Unop.arg->tag == Iex_Const) {
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+
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+ /* cases where the arg is a const */
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switch (e->Iex.Unop.op) {
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case Iop_1Uto8:
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e2 = IRExpr_Const(IRConst_U8(toUChar(
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@@ -1690,8 +1692,56 @@ static IRExpr* fold_Expr ( IRExpr** env, IRExpr* e )
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default:
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goto unhandled;
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- }
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- }
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+ } // switch (e->Iex.Unop.op)
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+
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+ } else {
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+
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+ /* other cases (identities, etc) */
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+ switch (e->Iex.Unop.op) {
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+ case Iop_PopCount64: {
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+ // PopCount64( And64( Add64(x,-1), Not64(x) ) ) ==> CtzNat64(x)
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+ // bindings:
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+ // a1:And64( a11:Add64(a111:x,a112:-1), a12:Not64(a121:x) )
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+ IRExpr* a1 = chase(env, e->Iex.Unop.arg);
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+ if (!a1)
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+ goto nomatch;
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+ if (a1->tag != Iex_Binop || a1->Iex.Binop.op != Iop_And64)
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+ goto nomatch;
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+ // a1 is established
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+ IRExpr* a11 = chase(env, a1->Iex.Binop.arg1);
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+ if (!a11)
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+ goto nomatch;
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+ if (a11->tag != Iex_Binop || a11->Iex.Binop.op != Iop_Add64)
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+ goto nomatch;
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+ // a11 is established
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+ IRExpr* a12 = chase(env, a1->Iex.Binop.arg2);
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+ if (!a12)
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+ goto nomatch;
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+ if (a12->tag != Iex_Unop || a12->Iex.Unop.op != Iop_Not64)
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+ goto nomatch;
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+ // a12 is established
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+ IRExpr* a111 = a11->Iex.Binop.arg1;
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+ IRExpr* a112 = chase(env, a11->Iex.Binop.arg2);
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+ IRExpr* a121 = a12->Iex.Unop.arg;
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+ if (!a111 || !a112 || !a121)
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+ goto nomatch;
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+ // a111 and a121 need to be the same temp.
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+ if (!eqIRAtom(a111, a121))
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+ goto nomatch;
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+ // Finally, a112 must be a 64-bit version of -1.
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+ if (!isOnesU(a112))
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+ goto nomatch;
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+ // Match established. Transform.
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+ e2 = IRExpr_Unop(Iop_CtzNat64, a111);
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+ break;
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+ nomatch:
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+ break;
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+ }
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+ default:
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+ break;
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+ } // switch (e->Iex.Unop.op)
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+
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+ } // if (e->Iex.Unop.arg->tag == Iex_Const)
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break;
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case Iex_Binop:
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