603 lines
21 KiB
Diff
603 lines
21 KiB
Diff
commit 13b3c5c25500879aad0a682c6cced934def56e53
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Author: carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9>
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Date: Fri Aug 9 21:55:45 2013 +0000
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The following instructions were introduced in the Power ISA 2.05
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(i.e., POWER6) - lfdp - stfdp - lfdpx - stfdpx These instructions were promptly
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deprecated (phased out) in ISA 2.06 (i.e., POWER7). Recent updates in binutils
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no longer supports these instructions unless the assembler is invoked with
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'-mpower6'. When 'make check' is run on valgrind when using such a newer
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binutils and running on a ppc64 system newer than POWER6, you get the
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following build error:
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y
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pc64_linux=1 -DVGPV_ppc64_linux_vanilla=1 -DVGA_SEC_ppc32=1 -DVGP_SEC_ppc64_linux=1 -Winline -Wall -Wshadow -g -Winline -Wall -Wshadow -g -I../../../include -m64 -Wno-long-long -Wwrite-strings -fno-stack-protector -Wno-write-strings -MT power_ISA2_05-power_ISA2_05.o -MD -MP -MF .deps/power_ISA2_05-power_ISA2_05.Tpo -c -o power_ISA2_05-power_ISA2_05.o `test -f 'power_ISA2_05.c' || echo './'`power_ISA2_05.c
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/tmp/cciGIkGG.s:Assembler messages:
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/tmp/cciGIkGG.s:387: Error: operand out of domain (31 is not a multiple of 4)
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/tmp/cciGIkGG.s:387: Error: syntax error; found `,', expected `('
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/tmp/cciGIkGG.s:387: Error: junk at end of line: `,9'
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/tmp/cciGIkGG.s:478: Error: operand out of domain (31 is not a multiple of 4)
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/tmp/cciGIkGG.s:478: Error: syntax error; found `,', expected `('
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/tmp/cciGIkGG.s:478: Error: junk at end of line: `,9'
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make[2]: *** [power_ISA2_05-power_ISA2_05.o] Error 1
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make[2]: Leaving directory `/tmp/Valgrind_review/valgrind_ISA2_05/memcheck/tests/ppc64'
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make[1]: *** [check-am] Error 2
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make[1]: Leaving directory `/tmp/Valgrind_review/valgrind_ISA2_05/memcheck/tests/ppc64' make: *** [check-recursive] Error 1
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This patch fixes the problem by adding a configure check to determine if these
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phased out instructions are supported by the binutils, and the result of that
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configure check is used to decide whether or not to compile in the source for
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testing these instructions.
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Bugzilla 323116
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committed by Carl Love, carll@us.ibm.com
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13490 a5019735-40e9-0310-863c-91ae7b9d1cf9
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diff --git a/configure.in b/configure.in
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index 6ac32b0..5cf28a1 100644
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--- a/configure.in
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+++ b/configure.in
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@@ -1771,6 +1771,28 @@ if test x$ac_have_as_ppc_mftocrf = xyes ; then
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fi
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+# does the ppc assembler support "lfdp" and other phased out floating point insns?
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+AC_MSG_CHECKING([if ppc32/64 asm supports phased out floating point instructions])
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+
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+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[
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+ do { typedef struct {
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+ double hi;
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+ double lo;
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+ } dbl_pair_t;
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+ dbl_pair_t dbl_pair[3];
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+ __asm__ volatile ("lfdp 10, %0"::"m" (dbl_pair[0]));
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+ } while (0)
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+]])], [
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+ac_have_as_ppc_fpPO=yes
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+AC_MSG_RESULT([yes])
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+], [
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+ac_have_as_ppc_fpPO=no
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+AC_MSG_RESULT([no])
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+])
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+if test x$ac_have_as_ppc_fpPO = xyes ; then
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+ AC_DEFINE(HAVE_AS_PPC_FPPO, 1, [Define to 1 if as supports floating point phased out category.])
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+fi
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+
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CFLAGS=$safe_CFLAGS
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# does the x86/amd64 assembler understand SSE3 instructions?
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diff --git a/memcheck/tests/ppc32/Makefile.am b/memcheck/tests/ppc32/Makefile.am
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index 40033fc..bd70eea 100644
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--- a/memcheck/tests/ppc32/Makefile.am
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+++ b/memcheck/tests/ppc32/Makefile.am
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@@ -4,7 +4,8 @@ include $(top_srcdir)/Makefile.tool-tests.am
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dist_noinst_SCRIPTS = filter_stderr
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EXTRA_DIST = $(noinst_SCRIPTS) \
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- power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest
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+ power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest \
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+ power_ISA2_05.stdout.exp_Without_FPPO
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check_PROGRAMS = \
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power_ISA2_05
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diff --git a/memcheck/tests/ppc32/power_ISA2_05.c b/memcheck/tests/ppc32/power_ISA2_05.c
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index 0178452..3736c27 100644
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--- a/memcheck/tests/ppc32/power_ISA2_05.c
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+++ b/memcheck/tests/ppc32/power_ISA2_05.c
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@@ -1,4 +1,5 @@
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#include <stdio.h>
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+#include <config.h>
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double foo = -1.0;
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double FRT1;
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@@ -65,9 +66,15 @@ void test_lfiwax()
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** FPp = leftmost 64 bits stored at DS(RA)
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** FPp+1= rightmost 64 bits stored at DS(RA)
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** FPp must be an even float register
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+**
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+** The [st|l]fdp[x] instructions were put into the "Floating-Point.Phased-Out"
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+** category in ISA 2.06 (i.e., POWER7 timeframe). If valgrind and its
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+** testsuite are built with -mcpu=power7 (or later), then the assembler will
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+** not recognize those phased out instructions.
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*/
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void test_double_pair_instrs()
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{
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+#ifdef HAVE_AS_PPC_FPPO
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typedef struct {
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double hi;
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double lo;
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@@ -122,6 +129,7 @@ void test_double_pair_instrs()
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__asm__ volatile ("stfdpx 10, 20, 21");
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printf("stfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
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FRT1, FRT2, dbl_pair[2].hi, dbl_pair[2].lo);
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+#endif
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}
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diff --git a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
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new file mode 120000
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index 0000000..da5c109
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--- /dev/null
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+++ b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
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@@ -0,0 +1 @@
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+../ppc64/power_ISA2_05.stdout.exp_Without_FPPO
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\ No newline at end of file
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diff --git a/memcheck/tests/ppc64/Makefile.am b/memcheck/tests/ppc64/Makefile.am
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index a18afd7..96eb576 100644
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--- a/memcheck/tests/ppc64/Makefile.am
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+++ b/memcheck/tests/ppc64/Makefile.am
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@@ -4,7 +4,8 @@ include $(top_srcdir)/Makefile.tool-tests.am
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dist_noinst_SCRIPTS = filter_stderr
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EXTRA_DIST = $(noinst_SCRIPTS) \
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- power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest
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+ power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest \
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+ power_ISA2_05.stdout.exp_Without_FPPO
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check_PROGRAMS = \
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power_ISA2_05
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diff --git a/memcheck/tests/ppc64/power_ISA2_05.c b/memcheck/tests/ppc64/power_ISA2_05.c
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index 8c0eab9..f552dc4 100644
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--- a/memcheck/tests/ppc64/power_ISA2_05.c
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+++ b/memcheck/tests/ppc64/power_ISA2_05.c
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@@ -1,4 +1,5 @@
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#include <stdio.h>
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+#include <config.h>
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double foo = -1.0;
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double FRT1;
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@@ -63,9 +64,16 @@ void test_lfiwax()
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** FPp = leftmost 64 bits stored at DS(RA)
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** FPp+1= rightmost 64 bits stored at DS(RA)
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** FPp must be an even float register
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+**
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+** The [st|l]fdp[x] instructions were put into the "Floating-Point.Phased-Out"
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+** category in ISA 2.06 (i.e., POWER7 timeframe). If valgrind and its
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+** testsuite are built with -mcpu=power7 (or later), then the assembler will
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+** not recognize those phased out instructions.
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+**
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*/
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void test_double_pair_instrs()
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{
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+#ifdef HAVE_AS_PPC_FPPO
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typedef struct {
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double hi;
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double lo;
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@@ -120,6 +128,7 @@ void test_double_pair_instrs()
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__asm__ volatile ("stfdpx 10, 20, 21");
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printf("stfdpx (%f, %f) => F_hi=%f, F_lo=%f\n",
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FRT1, FRT2, dbl_pair[2].hi, dbl_pair[2].lo);
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+#endif
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}
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diff --git a/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO
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new file mode 100644
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index 0000000..1945526
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--- /dev/null
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+++ b/memcheck/tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO
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@@ -0,0 +1,119 @@
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+lwarx => 0
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+ldarx => bad0beef
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+fcpsgn sign=10.101010, base=11.111111 => 11.111111
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+fcpsgn sign=10.101010, base=-0.000000 => 0.000000
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+fcpsgn sign=10.101010, base=0.000000 => 0.000000
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+fcpsgn sign=10.101010, base=-11.111111 => 11.111111
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+fcpsgn sign=-0.000000, base=11.111111 => -11.111111
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+fcpsgn sign=-0.000000, base=-0.000000 => -0.000000
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+fcpsgn sign=-0.000000, base=0.000000 => -0.000000
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+fcpsgn sign=-0.000000, base=-11.111111 => -11.111111
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+fcpsgn sign=0.000000, base=11.111111 => 11.111111
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+fcpsgn sign=0.000000, base=-0.000000 => 0.000000
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+fcpsgn sign=0.000000, base=0.000000 => 0.000000
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+fcpsgn sign=0.000000, base=-11.111111 => 11.111111
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+fcpsgn sign=-10.101010, base=11.111111 => -11.111111
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+fcpsgn sign=-10.101010, base=-0.000000 => -0.000000
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+fcpsgn sign=-10.101010, base=0.000000 => -0.000000
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+fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
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+lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
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+prtyd (0) => parity=0
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+prtyw (0) => parity=0
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+prtyd (1) => parity=1
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+prtyw (1) => parity=1
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+prtyd (2) => parity=0
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+prtyw (2) => parity=0
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+prtyd (3) => parity=1
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+prtyw (3) => parity=1
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+prtyd (4) => parity=0
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+prtyw (4) => parity=0
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+prtyd (5) => parity=1
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+prtyw (5) => parity=1
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+prtyd (6) => parity=0
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+prtyw (6) => parity=0
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+prtyd (7) => parity=1
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+prtyw (7) => parity=1
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+prtyd (8) => parity=0
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+prtyw (8) => parity=0
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+prtyd (9) => parity=1
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+prtyw (9) => parity=1
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+prtyd (a) => parity=0
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+prtyw (a) => parity=0
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+prtyd (b) => parity=1
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+prtyw (b) => parity=1
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+prtyd (c) => parity=0
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+prtyw (c) => parity=0
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+prtyd (d) => parity=1
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+prtyw (d) => parity=1
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+prtyd (e) => parity=0
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+prtyw (e) => parity=0
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+prtyd (f) => parity=1
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+prtyw (f) => parity=1
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+prtyd (10) => parity=0
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+prtyw (10) => parity=0
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+prtyd (11) => parity=1
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+prtyw (11) => parity=1
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+prtyd (12) => parity=0
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+prtyw (12) => parity=0
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+prtyd (13) => parity=1
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+prtyw (13) => parity=1
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+prtyd (14) => parity=0
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+prtyw (14) => parity=0
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+prtyd (15) => parity=1
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+prtyw (15) => parity=1
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+prtyd (16) => parity=0
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+prtyw (16) => parity=0
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+prtyd (17) => parity=1
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+prtyw (17) => parity=1
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+prtyd (18) => parity=0
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+prtyw (18) => parity=0
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+prtyd (19) => parity=1
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+prtyw (19) => parity=1
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+prtyd (1a) => parity=0
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+prtyw (1a) => parity=0
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+prtyd (1b) => parity=1
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+prtyw (1b) => parity=1
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+prtyd (1c) => parity=0
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+prtyw (1c) => parity=0
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+prtyd (1d) => parity=1
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+prtyw (1d) => parity=1
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+prtyd (1e) => parity=0
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+prtyw (1e) => parity=0
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+prtyd (1f) => parity=1
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+prtyw (1f) => parity=1
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+prtyd (20) => parity=0
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+prtyw (20) => parity=0
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+prtyd (21) => parity=1
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+prtyw (21) => parity=1
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+prtyd (22) => parity=0
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+prtyw (22) => parity=0
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+prtyd (23) => parity=1
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+prtyw (23) => parity=1
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+prtyd (24) => parity=0
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+prtyw (24) => parity=0
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+prtyd (25) => parity=1
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+prtyw (25) => parity=1
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+prtyd (26) => parity=0
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+prtyw (26) => parity=0
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+prtyd (27) => parity=1
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+prtyw (27) => parity=1
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+prtyd (28) => parity=0
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+prtyw (28) => parity=0
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+prtyd (29) => parity=1
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+prtyw (29) => parity=1
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+prtyd (2a) => parity=0
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+prtyw (2a) => parity=0
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+prtyd (2b) => parity=1
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+prtyw (2b) => parity=1
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+prtyd (2c) => parity=0
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+prtyw (2c) => parity=0
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+prtyd (2d) => parity=1
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+prtyw (2d) => parity=1
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+prtyd (2e) => parity=0
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+prtyw (2e) => parity=0
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+prtyd (2f) => parity=1
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+prtyw (2f) => parity=1
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+prtyd (30) => parity=0
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+prtyw (30) => parity=0
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+prtyd (31) => parity=1
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+prtyw (31) => parity=1
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diff -ur valgrind-3.8.1.orig/config.h.in valgrind-3.8.1/config.h.in
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--- valgrind-3.8.1.orig/config.h.in 2013-08-14 17:58:25.970210332 +0200
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+++ valgrind-3.8.1/config.h.in 2013-08-14 17:59:26.000000000 +0200
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@@ -81,6 +81,9 @@
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/* Define to 1 if you have the <asm/unistd.h> header file. */
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#undef HAVE_ASM_UNISTD_H
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+/* Define to 1 if as supports floating point phased out category. */
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+#undef HAVE_AS_PPC_FPPO
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+
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/* Define to 1 if as supports mtocrf/mfocrf. */
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#undef HAVE_AS_PPC_MFTOCRF
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Only in valgrind-3.8.1: config.h.in~
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diff -ur valgrind-3.8.1.orig/configure valgrind-3.8.1/configure
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--- valgrind-3.8.1.orig/configure 2013-08-14 17:58:25.970210332 +0200
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+++ valgrind-3.8.1/configure 2013-08-14 17:59:32.537941678 +0200
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@@ -8134,6 +8134,49 @@
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fi
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+# does the ppc assembler support "lfdp" and other phased out floating point insns?
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if ppc32/64 asm supports phased out floating point instructions" >&5
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+$as_echo_n "checking if ppc32/64 asm supports phased out floating point instructions... " >&6; }
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+
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+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
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+/* end confdefs.h. */
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+
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+int
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+main ()
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+{
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+
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+ do { typedef struct {
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+ double hi;
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+ double lo;
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+ } dbl_pair_t;
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+ dbl_pair_t dbl_pair[3];
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+ __asm__ volatile ("lfdp 10, %0"::"m" (dbl_pair[0]));
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+ } while (0)
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+
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+ ;
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+ return 0;
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+}
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+_ACEOF
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+if ac_fn_c_try_compile "$LINENO"; then :
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+
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+ac_have_as_ppc_fpPO=yes
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
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+$as_echo "yes" >&6; }
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+
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+else
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+
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+ac_have_as_ppc_fpPO=no
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
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+$as_echo "no" >&6; }
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+
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+fi
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+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
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+if test x$ac_have_as_ppc_fpPO = xyes ; then
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+
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+$as_echo "#define HAVE_AS_PPC_FPPO 1" >>confdefs.h
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+
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+fi
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+
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CFLAGS=$safe_CFLAGS
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# does the x86/amd64 assembler understand SSE3 instructions?
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diff -ur valgrind-3.8.1.orig/memcheck/tests/ppc32/Makefile.in valgrind-3.8.1/memcheck/tests/ppc32/Makefile.in
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--- valgrind-3.8.1.orig/memcheck/tests/ppc32/Makefile.in 2013-08-14 17:58:25.794211043 +0200
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+++ valgrind-3.8.1/memcheck/tests/ppc32/Makefile.in 2013-08-14 17:59:30.729948971 +0200
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@@ -362,7 +362,8 @@
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@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
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dist_noinst_SCRIPTS = filter_stderr
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EXTRA_DIST = $(noinst_SCRIPTS) \
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- power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest
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+ power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest \
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+ power_ISA2_05.stdout.exp_Without_FPPO
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power_ISA2_05_CFLAGS = $(AM_CFLAGS) $(WERROR) -Winline -Wall -Wshadow -g \
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-I$(top_srcdir)/include @FLAG_M32@
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diff -ur valgrind-3.8.1.orig/memcheck/tests/ppc64/Makefile.in valgrind-3.8.1/memcheck/tests/ppc64/Makefile.in
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--- valgrind-3.8.1.orig/memcheck/tests/ppc64/Makefile.in 2013-08-14 17:58:25.789211063 +0200
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+++ valgrind-3.8.1/memcheck/tests/ppc64/Makefile.in 2013-08-14 17:59:30.785948745 +0200
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@@ -362,7 +362,8 @@
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@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
|
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dist_noinst_SCRIPTS = filter_stderr
|
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EXTRA_DIST = $(noinst_SCRIPTS) \
|
|
- power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest
|
|
+ power_ISA2_05.stderr.exp power_ISA2_05.stdout.exp power_ISA2_05.vgtest \
|
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+ power_ISA2_05.stdout.exp_Without_FPPO
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|
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|
power_ISA2_05_CFLAGS = $(AM_CFLAGS) $(WERROR) -Winline -Wall -Wshadow -g \
|
|
-I$(top_srcdir)/include @FLAG_M64@
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|
commit 5d0d52118210671d3eeff94fd3f5cc3807bd2a44
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Author: sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9>
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Date: Tue Jan 29 22:14:01 2013 +0000
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test_reservation(), test_double_pair_instrs(): Fix broken inline assembly
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causing segfaults with gcc-4.7. The inline assembly still isn't right,
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but it's better than it was before.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13279 a5019735-40e9-0310-863c-91ae7b9d1cf9
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diff --git a/memcheck/tests/ppc32/power_ISA2_05.c b/memcheck/tests/ppc32/power_ISA2_05.c
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index a95f427..0178452 100644
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--- a/memcheck/tests/ppc32/power_ISA2_05.c
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+++ b/memcheck/tests/ppc32/power_ISA2_05.c
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@@ -103,8 +103,8 @@ void test_double_pair_instrs()
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FRT2 = -1.0;
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base = (unsigned long) &dbl_pair;
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offset = (unsigned long) &dbl_pair[1] - base;
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("lfdpx 10, 20, 21");
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__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
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__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
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@@ -115,8 +115,8 @@ void test_double_pair_instrs()
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FRT2 = -16.1024;
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base = (unsigned long) &dbl_pair;
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offset = (unsigned long) &dbl_pair[2] - base;
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
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__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
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__asm__ volatile ("stfdpx 10, 20, 21");
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@@ -168,14 +168,14 @@ void test_reservation()
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base = (unsigned long) &arr;
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offset = (unsigned long) &arr[1] - base;
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
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printf("lwarx => %x\n", RT);
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#ifdef __powerpc64__
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offset = (unsigned long) &arr[1] - base;
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
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printf("ldarx => %x\n", RT);
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#endif
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diff --git a/memcheck/tests/ppc64/power_ISA2_05.c b/memcheck/tests/ppc64/power_ISA2_05.c
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index dcf0e7a..8c0eab9 100644
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--- a/memcheck/tests/ppc64/power_ISA2_05.c
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+++ b/memcheck/tests/ppc64/power_ISA2_05.c
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@@ -101,8 +101,8 @@ void test_double_pair_instrs()
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FRT2 = -1.0;
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base = (unsigned long) &dbl_pair;
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offset = (unsigned long) &dbl_pair[1] - base;
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("lfdpx 10, 20, 21");
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__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
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__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
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@@ -113,8 +113,8 @@ void test_double_pair_instrs()
|
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FRT2 = -16.1024;
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base = (unsigned long) &dbl_pair;
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offset = (unsigned long) &dbl_pair[2] - base;
|
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
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__asm__ volatile ("fmr %0, 10":"=f" (FRT1));
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__asm__ volatile ("fmr %0, 11":"=f" (FRT2));
|
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__asm__ volatile ("stfdpx 10, 20, 21");
|
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@@ -166,14 +166,14 @@ void test_reservation()
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|
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base = (unsigned long) &arr;
|
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offset = (unsigned long) &arr[1] - base;
|
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- __asm__ volatile ("or 20, 0, %0"::"r" (base));
|
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- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
|
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+ __asm__ volatile ("ori 20, %0, 0"::"r" (base));
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+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
|
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__asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
|
|
printf("lwarx => %x\n", RT);
|
|
|
|
#ifdef __powerpc64__
|
|
offset = (unsigned long) &arr[1] - base;
|
|
- __asm__ volatile ("or 21, 0, %0"::"r" (offset));
|
|
+ __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
|
|
__asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
|
|
printf("ldarx => %x\n", RT);
|
|
#endif
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commit 28b37cc93e8b7a851f005a217752073bb8ac7dca
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Author: carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9>
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Date: Wed Aug 21 19:46:50 2013 +0000
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The file tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO was a link
|
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to file tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO. That was a
|
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commit error as the output for ppc32 and ppc64 are different. Remove
|
|
the file and commit to remove the link.
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See bugzilla 81535.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13505 a5019735-40e9-0310-863c-91ae7b9d1cf9
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diff --git a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
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deleted file mode 120000
|
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index da5c109..0000000
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--- a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
|
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+++ /dev/null
|
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@@ -1 +0,0 @@
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-../ppc64/power_ISA2_05.stdout.exp_Without_FPPO
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\ No newline at end of file
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commit bfde541a949ff59db394b0ce26f370215e94e30a
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Author: carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9>
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Date: Wed Aug 21 19:47:19 2013 +0000
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The file tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO was a link
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to file tests/ppc64/power_ISA2_05.stdout.exp_Without_FPPO. That was a
|
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commit error as the output for ppc32 and ppc64 are different. Replaced
|
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the link with the correct real file of expected results. See bugzilla
|
|
81535.
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git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13506 a5019735-40e9-0310-863c-91ae7b9d1cf9
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|
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diff --git a/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
|
|
new file mode 100644
|
|
index 0000000..f9e934e
|
|
--- /dev/null
|
|
+++ b/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
|
|
@@ -0,0 +1,68 @@
|
|
+lwarx => bad0beef
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+fcpsgn sign=10.101010, base=11.111111 => 11.111111
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+fcpsgn sign=10.101010, base=-0.000000 => 0.000000
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+fcpsgn sign=10.101010, base=0.000000 => 0.000000
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+fcpsgn sign=10.101010, base=-11.111111 => 11.111111
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+fcpsgn sign=-0.000000, base=11.111111 => -11.111111
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|
+fcpsgn sign=-0.000000, base=-0.000000 => -0.000000
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|
+fcpsgn sign=-0.000000, base=0.000000 => -0.000000
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|
+fcpsgn sign=-0.000000, base=-11.111111 => -11.111111
|
|
+fcpsgn sign=0.000000, base=11.111111 => 11.111111
|
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+fcpsgn sign=0.000000, base=-0.000000 => 0.000000
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+fcpsgn sign=0.000000, base=0.000000 => 0.000000
|
|
+fcpsgn sign=0.000000, base=-11.111111 => 11.111111
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|
+fcpsgn sign=-10.101010, base=11.111111 => -11.111111
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|
+fcpsgn sign=-10.101010, base=-0.000000 => -0.000000
|
|
+fcpsgn sign=-10.101010, base=0.000000 => -0.000000
|
|
+fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
|
|
+lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
|
|
+prtyw (0) => parity=0
|
|
+prtyw (1) => parity=1
|
|
+prtyw (2) => parity=0
|
|
+prtyw (3) => parity=1
|
|
+prtyw (4) => parity=0
|
|
+prtyw (5) => parity=1
|
|
+prtyw (6) => parity=0
|
|
+prtyw (7) => parity=1
|
|
+prtyw (8) => parity=0
|
|
+prtyw (9) => parity=1
|
|
+prtyw (a) => parity=0
|
|
+prtyw (b) => parity=1
|
|
+prtyw (c) => parity=0
|
|
+prtyw (d) => parity=1
|
|
+prtyw (e) => parity=0
|
|
+prtyw (f) => parity=1
|
|
+prtyw (10) => parity=0
|
|
+prtyw (11) => parity=1
|
|
+prtyw (12) => parity=0
|
|
+prtyw (13) => parity=1
|
|
+prtyw (14) => parity=0
|
|
+prtyw (15) => parity=1
|
|
+prtyw (16) => parity=0
|
|
+prtyw (17) => parity=1
|
|
+prtyw (18) => parity=0
|
|
+prtyw (19) => parity=1
|
|
+prtyw (1a) => parity=0
|
|
+prtyw (1b) => parity=1
|
|
+prtyw (1c) => parity=0
|
|
+prtyw (1d) => parity=1
|
|
+prtyw (1e) => parity=0
|
|
+prtyw (1f) => parity=1
|
|
+prtyw (20) => parity=0
|
|
+prtyw (21) => parity=1
|
|
+prtyw (22) => parity=0
|
|
+prtyw (23) => parity=1
|
|
+prtyw (24) => parity=0
|
|
+prtyw (25) => parity=1
|
|
+prtyw (26) => parity=0
|
|
+prtyw (27) => parity=1
|
|
+prtyw (28) => parity=0
|
|
+prtyw (29) => parity=1
|
|
+prtyw (2a) => parity=0
|
|
+prtyw (2b) => parity=1
|
|
+prtyw (2c) => parity=0
|
|
+prtyw (2d) => parity=1
|
|
+prtyw (2e) => parity=0
|
|
+prtyw (2f) => parity=1
|
|
+prtyw (30) => parity=0
|
|
+prtyw (31) => parity=1
|