valgrind/valgrind-3.18.1-ppc64-lxsibzx-lxsihzx.patch
Mark Wielaard 85a0e79c10 valgrind 3.18.1 fixups
Resolves: #2025643
Arch fixups for valgrind 3.18.1
2021-11-24 18:02:11 +01:00

61 lines
2.1 KiB
Diff

commit 6e08ee95f7f1b1c3fd434fa380cc5b2cc3e3f7c7
Author: Carl Love <cel@us.ibm.com>
Date: Fri Oct 29 16:30:33 2021 -0500
Bug 444571 - PPC, fix the lxsibzx and lxsihzx so they only load their respective sized data.
The lxsibzx was doing a 64-bit load. The result was initializing
additional bytes in the register that should not have been initialized.
The memcheck/tests/linux/dlclose_leak test detected the issue. The
code generation uses lxsibzx and stxsibx with -mcpu=power9. Previously
the lbz and stb instructions were generated.
The same issue was noted and fixed with the lxsihzx instruction. The
memcheck/tests/linux/badrw test now passes as well.
https://bugs.kde.org/show_bug.cgi?id=444571
diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
index d90d566ed..8afd77490 100644
--- a/VEX/priv/guest_ppc_toIR.c
+++ b/VEX/priv/guest_ppc_toIR.c
@@ -25359,19 +25359,17 @@ dis_vx_load ( UInt prefix, UInt theInstr )
else
irx_addr = mkexpr( EA );
-
- byte = load( Ity_I64, irx_addr );
+ /* byte load */
+ byte = load( Ity_I8, irx_addr );
putVSReg( XT, binop( Iop_64HLtoV128,
- binop( Iop_And64,
- byte,
- mkU64( 0xFF ) ),
+ unop( Iop_8Uto64, byte ),
mkU64( 0 ) ) );
break;
}
case 0x32D: // lxsihzx
{
- IRExpr *byte;
+ IRExpr *hword;
IRExpr* irx_addr;
DIP("lxsihzx %u,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
@@ -25382,11 +25380,10 @@ dis_vx_load ( UInt prefix, UInt theInstr )
else
irx_addr = mkexpr( EA );
- byte = load( Ity_I64, irx_addr );
+ hword = load( Ity_I16, irx_addr );
putVSReg( XT, binop( Iop_64HLtoV128,
- binop( Iop_And64,
- byte,
- mkU64( 0xFFFF ) ),
+ unop( Iop_16Uto64,
+ hword ),
mkU64( 0 ) ) );
break;
}