85a0e79c10
Resolves: #2025643 Arch fixups for valgrind 3.18.1
61 lines
2.1 KiB
Diff
61 lines
2.1 KiB
Diff
commit 6e08ee95f7f1b1c3fd434fa380cc5b2cc3e3f7c7
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Author: Carl Love <cel@us.ibm.com>
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Date: Fri Oct 29 16:30:33 2021 -0500
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Bug 444571 - PPC, fix the lxsibzx and lxsihzx so they only load their respective sized data.
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The lxsibzx was doing a 64-bit load. The result was initializing
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additional bytes in the register that should not have been initialized.
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The memcheck/tests/linux/dlclose_leak test detected the issue. The
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code generation uses lxsibzx and stxsibx with -mcpu=power9. Previously
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the lbz and stb instructions were generated.
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The same issue was noted and fixed with the lxsihzx instruction. The
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memcheck/tests/linux/badrw test now passes as well.
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https://bugs.kde.org/show_bug.cgi?id=444571
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diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
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index d90d566ed..8afd77490 100644
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--- a/VEX/priv/guest_ppc_toIR.c
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+++ b/VEX/priv/guest_ppc_toIR.c
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@@ -25359,19 +25359,17 @@ dis_vx_load ( UInt prefix, UInt theInstr )
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else
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irx_addr = mkexpr( EA );
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-
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- byte = load( Ity_I64, irx_addr );
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+ /* byte load */
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+ byte = load( Ity_I8, irx_addr );
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putVSReg( XT, binop( Iop_64HLtoV128,
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- binop( Iop_And64,
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- byte,
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- mkU64( 0xFF ) ),
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+ unop( Iop_8Uto64, byte ),
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mkU64( 0 ) ) );
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break;
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}
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case 0x32D: // lxsihzx
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{
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- IRExpr *byte;
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+ IRExpr *hword;
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IRExpr* irx_addr;
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DIP("lxsihzx %u,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr);
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@@ -25382,11 +25380,10 @@ dis_vx_load ( UInt prefix, UInt theInstr )
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else
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irx_addr = mkexpr( EA );
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- byte = load( Ity_I64, irx_addr );
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+ hword = load( Ity_I16, irx_addr );
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putVSReg( XT, binop( Iop_64HLtoV128,
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- binop( Iop_And64,
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- byte,
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- mkU64( 0xFFFF ) ),
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+ unop( Iop_16Uto64,
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+ hword ),
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mkU64( 0 ) ) );
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break;
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}
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