3.22.0-5 - Add valgrind-3.22.0-x86-nop.patch
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valgrind-3.22.0-x86-nop.patch
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136
valgrind-3.22.0-x86-nop.patch
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From d35005cef8ad8207542738812705ceabf137d7e0 Mon Sep 17 00:00:00 2001
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From: Paul Floyd <pjfloyd@wanadoo.fr>
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Date: Sun, 17 Dec 2023 14:18:51 +0100
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Subject: [PATCH] Bug 478624 - Valgrind incompatibility with binutils-2.42 on
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x86 with new nop patterns (unhandled instruction bytes: 0x2E 0x8D 0xB4 0x26)
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It was a bit of a struggle to get the testcase to build
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with both clang and gcc (oddly enough gcc was more difficult) so
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I just resorted to using .byte arrays.
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---
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.gitignore | 1 +
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NEWS | 2 ++
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VEX/priv/guest_x86_toIR.c | 22 +++++++++++++-
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none/tests/x86/Makefile.am | 2 ++
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none/tests/x86/gnu_binutils_nop.c | 34 ++++++++++++++++++++++
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none/tests/x86/gnu_binutils_nop.stderr.exp | 0
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none/tests/x86/gnu_binutils_nop.vgtest | 2 ++
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7 files changed, 62 insertions(+), 1 deletion(-)
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create mode 100644 none/tests/x86/gnu_binutils_nop.c
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create mode 100644 none/tests/x86/gnu_binutils_nop.stderr.exp
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create mode 100644 none/tests/x86/gnu_binutils_nop.vgtest
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diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c
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index 5d6e6dc64..3b6efb387 100644
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--- a/VEX/priv/guest_x86_toIR.c
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+++ b/VEX/priv/guest_x86_toIR.c
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@@ -8198,7 +8198,7 @@ DisResult disInstr_X86_WRK (
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delta += 5;
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goto decode_success;
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}
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- /* Don't barf on recent binutils padding,
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+ /* Don't barf on recent (2010) binutils padding,
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all variants of which are: nopw %cs:0x0(%eax,%eax,1)
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66 2e 0f 1f 84 00 00 00 00 00
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66 66 2e 0f 1f 84 00 00 00 00 00
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@@ -8223,6 +8223,26 @@ DisResult disInstr_X86_WRK (
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}
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}
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+ /* bug478624 GNU binutils uses a leal of esi into itself with
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+ a zero offset and CS prefix as an 8 byte no-op (Dec 2023).
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+ Since the CS prefix is hardly ever used we don't do much
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+ to decode it, just a few cases for conditional branches.
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+ So add handling here with other pseudo-no-ops.
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+ */
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+ if (code[0] == 0x2E && code[1] == 0x8D) {
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+ if (code[2] == 0x74 && code[3] == 0x26 && code[4] == 0x00) {
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+ DIP("leal %%cs:0(%%esi,%%eiz,1),%%esi\n");
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+ delta += 5;
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+ goto decode_success;
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+ }
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+ if (code[2] == 0xB4 && code[3] == 0x26 && code[4] == 0x00
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+ && code[5] == 0x00 && code[6] == 0x00 && code[7] == 0x00) {
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+ DIP("leal %%cs:0(%%esi,%%eiz,1),%%esi\n");
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+ delta += 8;
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+ goto decode_success;
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+ }
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+ }
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+
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// Intel CET requires the following opcodes to be treated as NOPs
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// with any prefix and ModRM, SIB and disp combination:
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// "0F 19", "0F 1C", "0F 1D", "0F 1E", "0F 1F"
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diff --git a/none/tests/x86/Makefile.am b/none/tests/x86/Makefile.am
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index 3ecd1ad3c..dbae86571 100644
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--- a/none/tests/x86/Makefile.am
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+++ b/none/tests/x86/Makefile.am
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@@ -52,6 +52,7 @@ EXTRA_DIST = \
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fxtract.stdout.exp fxtract.stderr.exp fxtract.vgtest \
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fxtract.stdout.exp-older-glibc \
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getseg.stdout.exp getseg.stderr.exp getseg.vgtest \
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+ gnu_binutils_nop.stderr.exp gnu_binutils_nop.vgtest \
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incdec_alt.stdout.exp incdec_alt.stderr.exp incdec_alt.vgtest \
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int.stderr.exp int.stdout.exp int.disabled \
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$(addsuffix .stderr.exp,$(INSN_TESTS)) \
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@@ -100,6 +101,7 @@ check_PROGRAMS = \
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fpu_lazy_eflags \
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fxtract \
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getseg \
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+ gnu_binutils_nop \
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incdec_alt \
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$(INSN_TESTS) \
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int \
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diff --git a/none/tests/x86/gnu_binutils_nop.c b/none/tests/x86/gnu_binutils_nop.c
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new file mode 100644
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index 000000000..412a4c2cb
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--- /dev/null
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+++ b/none/tests/x86/gnu_binutils_nop.c
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@@ -0,0 +1,34 @@
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+int main(void)
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+{
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+ // GNU binutils uses various opcodes as alternatives for nop
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+ // the idea is that it is faster to execute one large opcode
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+ // with no side-effects than multiple repetitions of the
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+ // single byte 'nop'. This gives more choice when code
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+ // needs to be padded.
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+
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+ // the following is based on
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+ // https://sourceware.org/cgit/binutils-gdb/tree/gas/config/tc-i386.c#n1256
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+
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+ // one byte
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+ __asm__ __volatile__("nop");
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+ // two bytes
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+ __asm__ __volatile__("xchg %ax,%ax");
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+ // three bytes
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+ //__asm__ __volatile__("leal 0(%esi),%esi");
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+ __asm__ __volatile__(".byte 0x8d,0x76,0x00");
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+ // four bytes
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+ //__asm__ __volatile__("leal 0(%esi,%eiz),%esi");
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+ __asm__ __volatile__(".byte 0x8d,0x74,0x26,0x00");
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+ // five bytes
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+ //__asm__ __volatile__("leal %cs:0(%esi,%eiz),%esi");
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+ __asm__ __volatile__(".byte 0x2e,0x8d,0x74,0x26,0x00");
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+ // six bytes
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+ //__asm__ __volatile__("leal 0L(%esi),%esi");
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+ __asm__ __volatile__(".byte 0x8d,0xb6,0x00,0x00,0x00,0x00");
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+ // seven bytes
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+ //__asm__ __volatile__("leal 0L(%esi,%eiz),%esi");
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+ __asm__ __volatile__(".byte 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00");
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+ // eight bytes
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+ //__asm__ __volatile__("leal %cs:0L(%esi,%eiz),%esi");
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+ __asm__ __volatile__(".byte 0x2e,0x8d,0xb4,0x26,0x00,0x00,0x00,0x00");
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+}
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diff --git a/none/tests/x86/gnu_binutils_nop.stderr.exp b/none/tests/x86/gnu_binutils_nop.stderr.exp
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new file mode 100644
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index 000000000..e69de29bb
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diff --git a/none/tests/x86/gnu_binutils_nop.vgtest b/none/tests/x86/gnu_binutils_nop.vgtest
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new file mode 100644
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index 000000000..7f378dd53
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--- /dev/null
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+++ b/none/tests/x86/gnu_binutils_nop.vgtest
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@@ -0,0 +1,2 @@
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+prog: gnu_binutils_nop
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+vgopts: -q
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--
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2.43.0
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Summary: Dynamic analysis tools to detect memory or thread bugs and profile
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Name: %{?scl_prefix}valgrind
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Version: 3.22.0
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Release: 4%{?dist}
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Release: 5%{?dist}
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Epoch: 1
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License: GPLv2+ AND BSD
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URL: https://www.valgrind.org/
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@ -90,6 +90,11 @@ Patch6: valgrind-3.22.0-rodata.patch
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# https://bugs.kde.org/show_bug.cgi?id=477198
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Patch7: valgrind-3.22.0-fchmodat2.patch
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# Valgrind incompatibility with binutils-2.42 on x86 with new nop patterns
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# (unhandled instruction bytes: 0x2E 0x8D 0xB4 0x26)
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# https://bugs.kde.org/show_bug.cgi?id=478624
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Patch8: valgrind-3.22.0-x86-nop.patch
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BuildRequires: make
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BuildRequires: glibc-devel
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@ -226,6 +231,7 @@ Valgrind User Manual for details.
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%patch -P5 -p1
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%patch -P6 -p1
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%patch -P7 -p1
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%patch -P8 -p1
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%build
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# LTO triggers undefined symbols in valgrind. Valgrind has a --enable-lto
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@ -442,6 +448,9 @@ echo ===============END TESTING===============
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%endif
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%changelog
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* Mon Jan 22 2023 Mark Wielaard <mjw@fedoraproject.org> - 3.22.0-5
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- Add valgrind-3.22.0-x86-nop.patch
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* Sat Dec 9 2023 Mark Wielaard <mjw@fedoraproject.org> - 3.22.0-4
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- Add valgrind-3.22.0-fchmodat2.patch
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- Prep for migration to SPDX identifiers
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